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fully edited. Content may change prior to final publication. Citation information: DOI

10.1109/TPEL.2014.2377738, IEEE Transactions on Power Electronics

Soft-charging Operation of Switched-Capacitor

Converters

Yutian Lei, Student Member, IEEE, Robert C.N. Pilawa-Podgurski, Member, IEEE

AbstractTraditionally, switched-capacitor (SC) converters capacitors are directly charged/discharged by other capacitors

have suffered from high transient currents, which limit both the or voltage sources, large transient current spikes can occur,

efficiency and power density of such converters. Soft-charging which limit the efficiency and power density of the con-

operation can be employed to eliminate the current transients

and greatly improve the power density of SC converters. In this verter. Moreover, these transient effects increase the device

approach, a second-stage magnetic converter is cascaded with the stress and can cause undesirable electromagnetic interference

SC stage to act as a controlled current load. Another approach is (EMI) problems. To reduce the current spikes, either large

to use resonant SC converters with zero current switching. This capacitors or higher switching frequency has to be employed,

paper shows that resonant and soft-charging operations of SC neither of which is a satisfactory solution. The quasi-switched-

converters are closely related, and a technique will be proposed

which achieves either operation by adding a single inductor capacitor converter given in [14] manages to reduce the

to existing SC topologies. In addition, since most preexisting peak of the current transient, but results in the same power

resonant or soft-charging SC converters were devised in an ad loss as conventional SC converters. Resonant SC converters

hoc manner, this paper formulates an analytical method that (or soft-switching SC converters), which incorporate one or

can determine whether an existing conventional SC converter more inductors, have been proposed to eliminate the current

topology is compatible with the proposed approach. A number

of common SC topologies are analyzed, including Dickson, series- transients [15][25]. Because of the resonant inductor, the

parallel, ladder, Fibonacci and doubler configurations. Through capacitor current becomes sinusoidal, and if the switching

comparison to simulated results as well as experimental work, the takes place at the moment when the current reaches zero,

proposed method is validated and a family of high performance resonant SC converters can operate in zero current switching

SC converters is obtained. (ZCS) mode. This mode of operation enables such converters

Index Termssoft-charging, switched-capacitor converter, zero to operate at higher frequencies and achieve higher power

current switching, resonant. density than their hard-switched counterparts.

Another drawback of SC converters is that high efficiency is

I. I NTRODUCTION only achieved at one or a few conversion ratios. This limits the

application of SC converters to mostly low power applications.

OLTAGE-SOURCE power converters are predominantly

V implemented using magnetic components (inductors or

transformers) as energy storage elements. Due to their rel-

In higher power applications, the solution is usually to cascade

a magnetic converter to act as a post-regulation stage [26]

[29]. However, the overall converter size may increase and

atively low energy density, the magnetic components are the peak conversion efficiency may be reduced.

bulky in size and costly to build. On the other hand, the An effective method to enable lossless regulation and elim-

efficiency and power-density of dc-dc converters need to be inate the detrimental current transients in SC converters si-

continuously improved due to increasing demands in areas multaneously is called soft-charging operation, as first demon-

such as computing and portable devices. As a result, switched- strated with a merged two-stage converter in [30], [31]. In this

capacitor (SC) converters [1][10] are gaining popularity. architecture, a second-stage buck converter is cascaded to the

These converters use capacitors as the energy storage element output of a step-down SC converter and acts as a controlled

and consequently can achieve higher power density and greater current load. The buck converter operates at a low voltage

suitability for on-chip integration compared to magnetic-based and high frequency, enabling high bandwidth regulation and

converters. Additionally, SC converters also tend to achieve a reduced magnetic component size. The difference between

higher efficiency at large voltage conversion ratios [11]. These soft-charging operation and the aforementioned two stage

advantages make SC converters desirable for a broad range designs is that in soft-charging operation, the output capacitor

of applications, including voltage balancing [2], [3], energy of the SC stage is removed and the flying capacitors of the

buffering [4], CMOS integrated power conversion [5], [7], [12] SC converter are charged/discharged by a controlled current

and renewable energy harvesting [8]. source (the buck converter). This mode of operation eliminates

However, SC converters also have certain drawbacks, which current transients, enabling the SC converter to operate with

limit their performance in some applications [13]. Since the large capacitor voltage ripples with high efficiency. Larger ca-

pacitor voltage ripples result in larger energy transfer through

The authors are with the Department of Electrical and Computer Engineer-

ing, University of Illinois at Urbana-Champaign, Urbana, IL, 61801, USA. capacitors in each switching cycle, yielding significant power

E-mail: {lei10, pilawa}@illinois.edu density improvements of the SC converter. Therefore, the size

0885-8993 (c) 2013 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See

http://www.ieee.org/publications_standards/publications/rights/index.html for more information.

This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI

10.1109/TPEL.2014.2377738, IEEE Transactions on Power Electronics

of both the buck converter as well as the SC converter can m:n Rout

be reduced. It is also possible to achieve the same regulated

+ +

soft-charging operation by adding only an inductor and utilizes

the existing switches from the SC converter to form a buck

Vin Vout

converter cell. In this approach, no additional switches are

necessary and the control of the converter is simlified [32] The

- -

switched-capacitor stage employed in [30], [31] had a series-

parallel configuration that readily lends itself to soft-charging Fig. 1: Generic model of a switched-capacitor converter.

operation. Another recent implementation of the soft-charging

two-stage design utilizes a variable ratio SC stage and achieves

100

significant power density improvements over conventional

approaches [33], [34]. There are many SC topologies that

Output impedance ()

may also be designed to operate in soft-charging mode and SSL

yield similar benefits, but to date, no formal method exists to

evaluate SC converters for their potential use in soft-charging

architecture. One of the main contributions of this work is the

development of such a formal method.

In this paper, the origin of the transient current and associ- 101

FSL

ated loss are first introduced and the concept of soft-charging

revisited. The requirements imposed on the SC converters by

soft-charging operation are postulated. Resonant SC converters 105 106 107

and soft-charging SC converters are then analyzed, and it is

Frequency (Hz)

shown that their terminal behaviors are closely related. This

makes it possible to use similar techniques to analyze and Fig. 2: Output impedance of a typical SC converter.

synthesize both types of converters. We present a technique

to achieve soft-charging or resonant mode of operation with

a single inductor added to existing SC converter topologies. lowering the series resistance. Fundamentally, the SSL power

In addition, in order to expand the family of soft-charging SC loss is the result of charging/discharging the capacitor with a

converters, a formal method is presented to analyze arbitrary constant voltage source or another capacitor, as illustrated in

SC topologies to determine their suitability for the proposed Fig. 3a and Fig. 3b respectively. We will examine case 2 (Fig.

technique. Supported by simulation and experimental results, 3b) more closely since case 1 (Fig. 3a) can be seen identical to

this new family of SC converters is shown to have the case 2 with C2 being infinite. When the switch closes, since the

potential to achieve a higher efficiency and higher power capacitor voltage cannot change instantaneously, the mismatch

density compared to traditional SC converters. of the initial capacitor voltages will be present across the

series resistor, resulting in a large instantaneous current as

II. C APACITOR C HARGE S HARING L OSS AND shown in Fig. 4. The power loss incurred for complete charge

S OFT- CHARGING C ONCEPT redistribution for the schematic showing in Fig. 3b can be

easily calculated and is given by

A generic SC converter model is shown in Fig. 1, which

consists of an ideal fixed-conversion-ratio stage with an 1

C1 (VC1(t=0) VC2(t=0) )2 fsw

Ploss =

output-referred impedance [35]. The output impedance directly 4

1

reflects the efficiency of the converter, and incorporates both = C1 V(t=0)2

fsw , (1)

the conduction loss and the capacitor charging/discharging 4

loss. This impedance is usually plotted against the switching assuming C1 = C2 . This equation is valid provided that the

frequency to reveal the characteristics of the SC converters. A duration of each phase is much larger than the time-constant

typical such plot is shown in Fig. 2, which shows two asymp- of the circuit, i.e. in SSL region of operation. As can be

totic operating regions for SC converters: the fast switching seen, this power loss does not depend on the value of the

limit (FSL) and the slow switching limit (SSL) [11] [36] series resistance. Instead, it depends on the initial voltage

[39]. The FSL occurs at high switching frequencies, when the difference between the capacitors. Additionally, the initial

dominating loss is the conduction loss due to the resistance difference in capacitor voltages is due to the charge transfer in

of the switches as well as the ESR of the capacitors. As can the previous cycle, and thus is proportional to the charge drawn

be seen in Fig. 2, the output impedance in the FSL region is by the load and inversely proportional to the capacitor values.

independent of the switching frequency. On the other hand, Moreover, the change of charge in the capacitor is proportional

the SSL occurs at low switching frequencies, when the output to the duration of the charge/discharge, and thus is inversely

impedance is dominated by the charging/discharging loss of proportional to the switching frequency. These relations are

the capacitors during the charge redistribution process at phase summarized below.

transitions. The SSL impedance depends on the switching 1 1

V , , (2)

frequency and capacitor values, and cannot be reduced by fsw Cf ly

0885-8993 (c) 2013 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See

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10.1109/TPEL.2014.2377738, IEEE Transactions on Power Electronics

RESR RESR

to change instantaneously to accommodate the voltage mis-

match between the flying capacitors and the load during

phase transitions. In practice however, the majority of the

+ loads are voltage-source loads or current-source loads with

Vin C1 C2 C1

large decoupling capacitors. Therefore, an interfacing element

typically has to be inserted between the SC converters and

the voltage-source load. Buck converters can be such an

(a) Capacitor charged by a (b) Capacitor charged by an-

voltage source. other capacitor. interfacing element, providing controlled charging/discharging

of the capacitors while regulating the output voltage [30], [31].

Fig. 3: Basic capacitor charging scenarios. As will be shown in Section III, the buck converter can also

be replaced by an inductor, while still achieving soft-charging

1

Voltage of C1

100

operation.

0.8 Voltage of C2 80 The second requirement for soft-charging operation is that

there should be no voltage mismatch within the flying ca-

Current (A)

Voltage (V)

0.6 60

pacitor network during phase transitions. In [30], [31], a

0.4 40

series-parallel SC stage was chosen as the SC topology,

0.2 20 since the flying capacitors are simultaneously connected to

Current of C2

0 0 the output either in series or in parallel, and therefore, can

0 0.2 0.4 0.6 0.8 1 1.2

5

always be charged/discharged in the same manner through

Time (s) 10

the load current. Other SC topologies tend to have more

Fig. 4: Capacitor voltages and current waveform in charge complex switching configuration and it is not immediately

redistribution process. apparent whether soft-charging of all flying capacitors can

be achieved by cascading a second-stage converter (or an

inductor) alone. Section IV introduces a formal method for

where Cf ly represents the overall flying capacitor value, and evaluating an arbitrary SC topology and determining whether

for the circuit in Fig. 3b, it is simply C1 . Substituting (2) into soft-charging operation is possible. This method replaces the

the power loss equation in (1), we have ad-hoc approaches that have been employed to date [30], [33].

1 1

Ploss , (3)

fsw Cf ly . III. S OFT- CHARGING O PERATION WITH AN I NDUCTOR

For more complex SC converters, more complicated charge Since an inductor allows instantaneous change of its ter-

sharing scenarios will arise, but the general relationship stays minal voltage, it can also act as a controlled current load

the same, as shown by the analytical results given in [11]. [40] [32]. In fact, the buck converter is able to facilitate

To reduce the charge sharing loss, one may simply increase soft-charging operation precisely because of the inductor it

the switching frequency so that the converter operates in the contains. In this section, the technique of adding an inductor

FSL region. However, it is often not favorable to do so, since alone to achieve soft-charging is presented. Furthermore, it

the transistor switching losses, as well as the bottom plate will be shown that resonant operation can also be achieved

capacitance losses in integrated SC converters, increase as using the same technique.

the switching frequency increases. Alternatively, increasing the To illustrate the technique, a simple 2-to-1 SC converter

flying capacitor values can push the FSL region of operation is shown in Fig. 5a, and a modified structure is shown in

to a lower frequency, but it inevitably increases the circuit size Fig. 5b. As can be seen in Fig. 5b, the technique to achieve

and cost. To overcome this dilemma, the soft-charging tech- resonant and soft-charging operation is to add an inductor at

nique was proposed to eliminate the capacitor charge sharing the output of the SC converter, immediately before the output

loss [30]. In soft-charging operation, a controlled current load capacitor. The simple circuit structure in Fig. 5b allows direct

is placed in the charging/discharging paths of the capacitors. circuit analysis using differential equations [40]. Figure 6 plots

The majority of the voltage mismatch between the capacitors the simulated output impedance as a function of frequency

and the input/output will be present across the current load, for both the original SC converter (Fig. 5a), as well as the

instead of across the switch resistance. With this technique, modified converter (Fig. 5b). It can be seen that for the original

the capacitor charging loss that is present in conventional SC SC converter, the output impedance reduces as the frequency

converters is recovered through the controlled current load, increases, while leveling off at high frequencies, marking the

which typically is a high frequency magnetic converter. As a transition from SSL to FSL. The output impedance curve

result, smaller capacitance can be used without sacrificing the is more complicated for the modified converter, but a few

efficiency, despite the resultant larger capacitor voltage ripples. key observations can be made. First, with the additional

This is the key benefit of soft-charging operation. inductor, the modified converter is able to reach the same

Given the origin of the charge sharing loss, this paper minimum impedance at a much lower switching frequency,

postulates two requirements for achieving soft-charging op- due to the elimination of the current transient and associated

eration. The first requirement is that the load must behave loss. Therefore, the proposed converter can achieve the same

0885-8993 (c) 2013 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See

http://www.ieee.org/publications_standards/publications/rights/index.html for more information.

This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI

10.1109/TPEL.2014.2377738, IEEE Transactions on Power Electronics

+

Phase 1 is (C1 k C2 + C3 ) and the capacitance in Phase 2

1 2 is (C2 k C3 + C1 ). Both phases have the same equivalent

Cfly capacitance of 1.5C1 assuming C1 = C2 = C3 . For converter

+ Vload topologies that have different equivalent capacitance in each

Vin 1 Cout phase (such as the Fibonacci and series-parallel), there is a crit-

2

ical frequency for each phase, and the overall critical frequency

- is the weighted average of the individual frequencies according

(a) Example 2-to-1 SC converter. to the duty ratio. Note that the critical frequency corresponds

to the resonant frequency of the circuit. To understand the

L1 frequency dependent behavior of the modified SC converter,

+

the terminal voltage before the inductor (Vsc in Fig. 5b) as

1 2 + well as the inductor current are shown in Fig. 7 at 3 different

Cfly frequencies - the resonant frequency (fcrit ) as well as below

+ Vsc Vload (f2 ) and above (f1 ) the resonant frequency. It can be seen that,

Vin 1 Cout above the resonant frequency, the current waveform (Fig. 7a)

2

- is smooth and has small ripple, due to the filtering effect of the

- inductor. Moreover, since the flying capacitor is always in the

(b) Example 2-to-1 SC converter with an inductor. same current path as the inductor, the conventional current

spikes of the capacitor are eliminated, and the capacitors

Fig. 5: Schematics of a simple SC converter. transfer charges in soft-charging mode, with no charge transfer

loss. The effect of this can be seen directly from Fig. 6, where

for switching frequencies larger than the critical frequency,

ConventionalhSChconverter the SC converter has the minimum FSL output impedance. As

0

10 SChconverterhwithhanhoutputhinductor the switching frequency is reduced, the current waveform has

larger ripple, while having the same average value, since the

Outputhimpedanceh()

the inductor current takes the shape of a rectified sinusoid,

and the current reaches zero at moments of phase transitions,

as shown in Fig. 7b. Thus, zero current switching can be

1

10 achieved at the resonant frequency. As can be seen in Fig. 6,

the impedance of the converter at resonance is slightly larger

than the FSL impedance. This is because the sinusoidal current

h has larger RMS value than the near constant current in FSL

operation. As the switching frequency is reduced further (Fig.

4 5 6

10 10 10 7c), the inductor current drops negative during each cycle,

Frequencyh(Hz)

resulting in a much larger RMS current for the same average

Fig. 6: Simulated output impedance vs frequency. power delivered. This is why the impedance increases sharply

for fsw < fcrit . At one half of the resonant frequency defined

by (4), the current becomes nearly a full-wave sinusoid, giving

efficiency as conventional SC converters while using signifi- a peak impedance in Fig. 6. This peak repeats itself at lower

cantly lower switching frequency, or equivalently, significantly frequencies when the current waveform has multiple periods of

smaller flying capacitor values. The second observation is that, the full-wave sinusoid, at fsw = n1 fcrit , where n is an integer

at lower frequencies, the output impedance oscillates around and n 2. Therefore, fcrit given in (4) sets the lower bound

the SSL impedance of the conventional SC converter. on the switching frequency for which near FSL impedance in

The minimum frequency at which the converter is able to soft-charging operation can be achieved.

stay in FSL operation can be defined as fcrit and for the

modified converter in Fig. 5b, it is given by

It can be noted that the reduction in frequency and capaci-

1

fcrit = (4) tance with soft-charging operation can be achieved but at the

2 LC expense of adding an inductor. While the trade-off between

where L is the added inductance and C is the collective the capacitor values and inductor values should be evaluated

capacitance in series with the inductor. In the case of the on a case-by-case basis, in general, adding an inductor results

example SC converter in Fig. 5b, the capacitance is simply in better utilization of passive components than simply using

Cf ly . For more complex SC converter topologies, this equiva- larger capacitance. For a traditional SC converter circuit,

lent capacitance can be obtained by calculating the equivalent whether the high current transient takes place is determined

series and parallel connected capacitance at the inductor input by the time constant of the circuit - RESR C, where RESR

node for each phase. For instance, for the 4-to-1 Dickson is the series resistance in each conducting branch and C is

converter shown later in Fig. 10, the effective capacitance in the capacitance in each branch. Thus the critical frequency at

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8.5 8.5 9

(V)

Vsc (V)

Vsc (V)

8 8 8

sc

V

7.5 7.5 7

0 2 4 6 0 5 10 0 5 10 15 20

Time (s) Time (s) Time (s)

10 10 10

i (A)

iL (A)

iL (A)

5 5

0 0 0

L

5 5 5

0 2 4 6 0 5 10 0 5 10 15 20

Time (s) Time (s) Time (s)

(a) fsw = f1 > fcrit . (b) fsw = fcrit . (c) fsw = f2 < fcrit .

Fig. 7: SC stage voltage (Vsc in Fig. 5b) and inductor current of the modified 2-to-1 converter.

1

10

R =100 m

on

1

fcrit = (5) R =10 m

on

2RESR C 0

10

portional to the product of the equivalent series resistance and 1

10

capacitance. Thus, for a given desired critical frequency, the

capacitance must be increased if the resistance is lowered. This

limitation can be clearly seen in Fig. 8a, where the power loss 2

10

4 5 6 7

10 10 10 10

of a pure SC converter is plotted against two different switch Frequency (Hz)

Rds,on values. Even when the Rds,on of the switch is reduced (a) Conventional SC converter.

by a factor of 10, to see a factor of 10 reduction in the power

loss, one needs to increase the switching frequency by a factor 1

10

of 10, or equivalently, increase the capacitor values by a factor R =100 m

on

on

Power loss (W)

0

among the resistance, capacitance and switching frequency. On 10

the other hand, with the additional inductor presented here, the

critical frequency is decoupled from the series resistance, and 1

10

only depends on the inductance and the capacitance, as shown

in (4). The effect can be seen in Fig. 8b, where a reduction in

the series resistance instantly brings a nearly equal reduction in

2

10

4 5 6 7

10 10 10 10

power loss, without the need to increase the capacitance nor Frequency (Hz)

the frequency. Therefore, the addition of the inductor gives (b) Soft-charging SC converter.

the designer the choice of using smaller on-state-resistance

Fig. 8: Power loss at different frequencies for different Rds,on

switches and introduces a new design dimension in which

values, for the circuit in Fig. 5.

the converter can be optimized. Also can be observed from

Simulation parameters: C = 10 F , L = 0.1 H

Fig. 8b is that oscillation does not occur for the case of

Ronq= 100 m. This is because the system is over-damped

( R2 C L < 1) for large resistance values. In this case, the RC design goal of the soft-charging SC converters. In discrete

time constant starts to dominate the frequency response of the implementations, the addition of the inductors often results

system again, and soft-charging operation does not take place. in overall improvement in energy utilization of the passive

As a result, there is no change in power loss by adding the components. While the inductor is more difficult to integrate

small inductor, as can be seen by comparing the red dotted than the capacitors given the current IC technology, the energy

lines in Fig. 8a and Fig. 8b. In this case, a larger inductance density and quality of integrated inductors are improving as

would have been needed to achieve a reduction in power loss in more advanced processes are adopted [13], [41], [42], and the

the SSL region. Therefore, in addition to the critical switching proposed converter is able to take advantage of the progress

frequency requirement given in (4), the soft-charging (as well and advancement of technologies in inductors, capacitors and

as resonant) SC converters needq to be designed such that the switches simultaneously.

system is under-damped ( R2 C L < 1). Nevertheless, a lower

series resistance is one of the goals for power converters aim- IV. A NALYZING AN A RBITRARY SC T OPOLOGY FOR

ing for high conversion efficiency, especially for applications S OFT- CHARGING O PERATION

with small load resistances. This naturally coincides with the It was shown in the previous section that resonant and soft-

charging operation are closely related and both modes of op-

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C3

example used was a 2-to-1 SC converter, which easily satisfies C1

the second condition given in Section II, which states that to 1 2

achieve full soft-charging operation, there can be no voltage

mismatch among the flying capacitors during phase transitions.

The example 2-to-1 SC converter satisfies this condition easily 1 2 1 2

+ Iload

since it only has a single flying capacitance. More complicated

Vin

SC converters have multiple flying capacitors connected in 2 1

a number of different configurations. Thus, it is of great

interest to determine whether this proposed technique can be C2

broadly applied to other SC converter topologies. To answer Fig. 9: 4-to-1 Dickson topology.

this question, a general method is derived in this section to

determine if an arbitrary SC converter topology can operate

in resonance or soft-charging operation with the addition of an

output inductor [43]. Since resonance with the inductor at the

output can be viewed as soft-charging operation at a special C3 C2

switching frequency, only the term, soft-charging, is used in +

C1

this section for convenience. Vin Iload C3 Iload

C2 C1

In essence, the proposed method examines the charge flow

characteristics of an SC converter topology and observes the

(a) Phase 1. (b) Phase 2.

change in capacitor voltage subject to Kirchhoffs Voltage Law

(KVL) constraints. In each phase of the SC converter, the Fig. 10: 4-to-1 Dickson topology in each phase.

voltage across a capacitor changes according to the charge

flow in the given phase. When the converter switches to the

next phase, KVL poses new constraints on each component.

Complete soft-charging is achieved if and only if the ideal where Ai is called the reduced loop matrix of the ith phase

capacitor network satisfies KVL at all times, including at [46] and the voltage vector v is defined as

phase transitions. If during any period, the KVL constraint

v = [vin vc1 vc2 vc3 vout ]T (9)

is not satisfied, the voltage discrepancy will appear across the

series resistances, resulting in a charge transfer impulse. The

T

= [vin vc vout ] T

(10)

KVL constraint is present whether soft-charging or resonant In this analysis, the entries of the loop matrices are positive if

operation is of interest, and thus the analysis presented in this the circuit element is traversed from the negative terminal to

section applies to both operations. the positive terminal and vice versa. Combining the definitions

in (8) (9) and the KVL equations in (6) (7), the loop matrices

are found to be

A. General analysis using Dickson converter as an example

1 0 0 1 1 0 0 1 1 1

The analysis method in this work is illustrated with a 4-to-1 A1 = and A2 = .

0 1 1 0 1 0 1 0 0 1

SC converter in Dickson configuration [5], [44], [45] shown

in Fig. 9. To simplify the analysis, a constant current source Denoting the voltage vector at the start of phase 1 as v1 , KVL

is used as the load for this and all following examples, while analysis yields

we note that a practical implementation would use a magnetic- A1 v1 = 0, (11)

based converter or an inductor. The two phases of the Dickson

which captures the KVL constraints given by (6) at the

topology are shown in Fig. 10a and Fig. 10b respectively. In

moment when the converter has begun phase 1 operation. At

each phase of Fig. 10, the circuit consists of a number of closed

the end of phase 1, the voltage vector becomes v1 + v1 ,

loops, and a KVL equation can be written for each loop. For

creating a second KVL constraint:

example, the following two independent KVL equations can

be written for phase 1 of the Dickson converter (Fig. 10a): A1 (v1 + v1 ) = 0, (12)

(

Vin VC3 Vout = 0 where v represents the change in voltage due to charge

(6)

VC2 VC1 Vout = 0 being delivered to the load, and is in the form of

[vin vc T vout ]T , similar to the voltage vector in (9)

and for phase 2 (Fig. 10b): . Since both (11) and (12) must be satisfied, a resulting

constraint is that the vector v must satisfy

(

VC3 VC2 Vout = 0

(7)

VC1 Vout = 0 A1 v1 = 0. (13)

These KVL equations can be written in a matrix-vector- From a circuit intuition point of view, (13) describes the fact

product form as while the individual node voltages can (and will) change as a

Ai vi = 0, (8) result of charge transfers, the sum of the changes in a KVL

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loop must be zero. Similarly for phase 2, we have However, with soft-charging operation, the SC stage output

node is connected to an inductor, and the inductor voltage is

2

A2 v = 0. (14)

allowed to change instantaneously during phase transitions, as

Note that the vin component of vi is typically zero since opposed to the capacitor voltages, which must be continuous.

the input voltage is considered constant. This information can Stated in another way, the parameter vout defined previously

be included in the loop matrices by adding a row of [1 0 0 0 0] is no longer a state variable in a switch-linear circuit, and can

to both A1 and A2 , resulting in A1m and A2m respectively, be discontinuous. As a result, the change in output voltage in

where the subscript m indicates a modified reduced loop phase 1 due to the current load, vout 1

, does not necessarily

matrix. Correspondingly, (13) and (14) become equal vout . Therefore, the inductor introduces one more

2

A1m v1 = 0 (15) this additional degree of freedom, the basis w and u can be

A2m v = 0 2

(16) modified by removing the last element in each column (the

entry that represents vout ), resulting in the new basis w and

The solution to (15) and (16) represents the set of permissible

. Now, replacing the basis in (21) with the newly formed w

u

voltage changes that satisfy KVL and vin = 0. This solution

and u , we obtain for the soft-charging converter:

is the nullspace of A1m and A2m , by definition. Let w and

u be the collective basis for nullspaces of A1m and A2m a1

respectively. It follows that any solution to (15) and (16) can a2

(22)

w1 w 2 u 1 u 2 b1 = 0 .

be represented by a linear combination of the basis:

b2

v1 = a1 w1 + a2 w2 (17)

Mathematically. the matrix in (22) has a reduced rank com-

v = b1 u1 + b2 u2

2

(18)

pared to the one in (21), and thus a non-zero solution can be

In the case of the 4-to-1 Dickson converter, such basis can be found. Solving (22) for the Dickson converter, we obtain

found1 as

a1 0.120

0 0 0 0

a2 0.697

0.607

0.482

0.362

0.518 b1 0.607 .

= (23)

w = 0.763 0.131 and u = 0.398 0.664 .

0.157 0.613

0.761 0.146

b2 0.364

0.157 0.613 0.362 0.518

The voltage change vectors in each phase can then be found

For conventional SC converters, we have the additional using (17) (18), yielding

constraint that

v1 = v2 , (19) 0 0

0.408 0.408

from the condition of periodic steady-state operation. This is v = 0 and v =

1 2

(24)

0 .

because in a capacitive network, the voltage changes must sum 0.4088 0.408

up to zero in a full switching cycle. Combining (17) (18) and 0.408 0.408

(19), we have

Note that the original basis are used to obtain the voltage

a1 w1 + a2 w2 + b2 u1 + b2 u2 = 0 . (20) change at each node. From (24), it can be seen that the net

change in the capacitor voltages is zero (i.e., each column adds

Note that (20) can be written in a matrix form as

to zero), except for the last entry. This entry represents vout ,

which is the node that can be discontinuous owing to the soft-

a1

a2 charging operation. Having obtained the change in capacitor

(21)

w1 w2 u1 u2 b1 = 0 . voltage required to satisfy KVL in each phase, we can then

For the conventional Dickson SC converter, no solution for as:

(21) can be found, except for the trivial case of zero. This Cj = qj /vcj , (25)

means that no voltage change exists for the circuit that satisfy for each capacitor j. Equation (25) requires the charge that

KVL at all times. This result is reassuring and consistent flows into each flying capacitor to be found for each phase.

with the behavior of conventional SC converters, where it is For any well-posed switched-capacitor topology, a charge flow

well-known that this instantaneous voltage mismatch at phase vector can be obtained for each phase either by inspection [11]

transitions is what gives rise to the power loss from charge or Kirchhoffs Current Law [36]. In this work, the charge flow

redistribution [11]. Hence, conventional SC converters have to vector is defined as the vector of charge that flows into the

rely on high switching frequency or larger capacitor values positive terminal of each element in the circuit and is given

to minimize the voltage mismatch and the associated power in the form of

loss.

q = qin qc1 qc2 qc3 qout .

1 For example, by using the command null in Matlab, which will yield a

The charge flow vectors for the Dickson converter of this

set of orthonormal basis.

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100

example are found to be Hard-charging

Soft-charging 1

q1 = 1 1 1 1 2 and q2 = 0

1 1 1 2 . Soft-charging 2

capacitor values are obtained using (25) and are simplified as

follows.

C1 1

C2 = 101

C3 1

It can be seen that the Dickson topology can achieve complete

soft-charging only when C2 = and C1 = C3 . In practice, 105 106

Frequency (Hz)

this means that it can approach soft-charging with a C2 large

enough compared to C1 and C3 . As can be seen from (24), the Fig. 11: Power loss of Dickson converter at different frequen-

output voltage ripple has the same magnitude as the voltage cies.

ripple of C1 and C3 under soft-charging operation. Thus, for

soft-charging operation with the Dickson converter, a designer

would want to minimize the charging/discharging loss by as switching frequency increases, while leveling off at high

maintaining a relatively large C2 /C1 ratio while keeping the frequency, showing the transition from SSL to FSL. In soft-

output ripple of the SC stage tolerable with a second-stage charging operation, a significant reduction in power loss at

converter or an inductor. lower frequencies is seen when the capacitors are such that

To summarize, the following steps are used to determine C1 = C2 = C3 , as in the hard-charging case. However, a

whether any given SC topology is compatible with soft- more prominent reduction is seen when the capacitor values

charging or resonant operation using a single inductor con- are chosen such that C2 /C1 = 4, plotted in Fig. 11 as Soft-

nected to the output of the SC stage: charging 2. This confirms that the Dickson converter can

1) Obtain the reduced loop matrix for each phase (A1 and approach full soft-charging by maintaining a high C2 /C1 ratio,

A2 ) using KVL analysis. as predicted by the analysis in this work.

2) Add a row of [1 0 0 ... 0] to A1 and A2 , obtaining The currents through the capacitor C2 of the Dickson SC

A1m and A2m . converter (Fig. 9) in hard-charging and soft-charging oper-

3) Find the collective nullspace basis of A1m and A2m ations with the converter switching at 250 kHz are shown

(w and u respectively). in Fig. 12. The different waveforms are shifted apart in the

4) Remove the last row of w and u to obtain w and u. time axis for clearer observation. It can be seen that under

5) Use (22), (17) and (18) to find the change in capacitor hard-charging condition, the capacitor current resembles the

voltages. exponential discharge, as expected. With soft-charging 1, both

6) Find the charge transfer vector for each capacitor [11], the magnitude and the width of the impulse are reduced,

[36]. while the tail of the exponential decay is raised. In the soft-

7) Use (25) to find the capacitance values required for soft- charging 2 case, with capacitor values selected according to

charging. the analysis result, the height and the width of the impulse

As demonstrated in this section, for a two-phase SC dc-dc is further reduced and current waveform resembles more of a

converter, if a capacitor voltage change vector, vc , can be square wave. The transient effect is not completely eliminated,

found to satisfy KVL at all times, and the resultant capacitor

values required are practical (finite and positive), the given

topology is able to perform soft-charging and resonant opera- TABLE I: Simulation parameters.

tion and will exhibit no charging/discharging loss. Otherwise,

Vin 5V

at least one loop of the circuit will not be able to perform

Iload 2A

soft-charging, and the benefit will be limited.

Ron 10 m

B. Simulation verification RESR 1 m

To verify that the analytical method is correct, the Dickson Co,hardcharging 100 F

converter shown in Fig. 9 is simulated using LTSpice with Co,sof tcharging 0.1 F

simulation parameters given in Table I and Table II. A total

capacitance of 30 F is used for the flying capacitors. In TABLE II: Flying capacitor values.

hard-charging (conventional) operation, an additional 100 F

output capacitor is added in parallel to the current load while Configuration C1 (F) C2 (F) C3 (F)

there is no output capacitance in the soft-charging simulation.

Hard-charging 10 10 10

The converters are operated at a fixed duty ratio of 0.5.

Soft-charging 1 10 10 10

The simulated power losses are plotted in Fig. 11. It can

Soft-charging 2 5 20 5

be seen that the hard-charging power loss decreases linearly

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to satisfy KVL. Thus, the single-output ladder topology is

10 not compatible with soft-charging without modification, and a

limited improvement is expected. As for the doubler converter,

5 both C1 and C2 have to be infinite for complete soft-charging,

indicating a partial soft-charging capability similar to that of

Current (A)

To verify the analysis results, the circuits shown in Fig.

5 13 are simulated with the same parameters as those of the

Dickson converter. Equal flying capacitors are used in all

10 Hardcharging cases. Again, a constant current source is used as the load

Softcharging 1 instead of an inductor to simplify the simulation and remove

Softcharging 2

15

the effect of resonance, since in practice, operation below the

1 2 3 4 5 6 7 8 critical frequency is to be avoided as shown in Section III.

Time (s) The corresponding power loss curves are plotted in Fig. 15.

Fig. 12: Current waveform of capacitor C2 of the Dickson SC It should be noted that the power loss values are not intended

converter. for cross-comparison between different SC topologies. Rather,

it is the reduction of the power loss by changing from

TABLE III: The RMS and average current of capacitor C2 in hard-charging operation to soft-charging operation that is of

a single phase. key interest here. For both the series-parallel converter and

the Fibonacci converter, soft-charging operation results in a

Configuration RMS current (A) Average current (A) significantly lower power loss in SSL region than in the

Hard-charging 2.19 1.00 hard-charging case, and the loss is almost independent of

Soft-charging 1 1.40 1.00 the frequency. The ladder configuration only receives very

Soft-charging 2 1.11 1.00 limited benefit from soft-charging and a strong frequency

dependency is still seen on the power loss plotted in Fig. 15b.

The doubler converter shows moderate improvement with soft-

charging. These simulation results agree with the prediction of

due to the fact that perfect soft-charging cannot be achieved.

the analytical technique presented earlier.

To quantify the change in the current waveform, the RMS

Since the Fibonacci converter is shown to be able to achieve

and the average currents through the capacitor for one phase

full soft-charging operation, it is useful to examine the current

duration are calculated and tabulated in Table III. It can be

waveform of the Fibonacci converter, as shown in Fig. 16. It

seen that while in all cases the capacitor supplies the same

can be seen that the waveform in soft-charging operation is a

average current over a phase duration, the RMS value of

square wave, confirming that the current transient associated

the current decreases from hard-charging operation to soft-

with capacitor charge redistribution has been eliminated. Ta-

charging operation. Again soft-charging 2 is an improvement

ble IV shows the RMS and average of the absolute values of

over soft-charging 1. Thus, the soft-charging operation reduces

the current through capacitor C3 of the Fibonacci converter. It

the impedance in the SSL region due to the improvement in

can be seen that now the RMS current is almost equal to the

the charging and discharging current waveform.

average current in the soft-charging case, ensuring the lowest

power loss.

C. Application to other topologies

The general analysis method proposed is applied to four TABLE IV: The RMS and average of the absolute current of

additional commonly used two phase switched-capacitor con- capacitor C2 of the Fibonacci converter.

verter topologies - series-parallel, ladder, Fibonacci and dou-

bler. The schematics are shown in Fig. 13a, 13b, 13c and 13d Configuration RMS current (A) Average current (A)

respectively. The same analysis is repeated for each of them hard-charging 1.45 0.800

and the results are shown in Fig. 14. soft-charging 0.816 0.800

It can be seen that for the series-parallel converter, a simple

requirement for soft-charging is that all the flying capacitors

have the same value. Under soft-charging condition, the output

voltage ripple is shown to be equal to N 1 times the change V. R ESONANT O PERATION WITH A S INGLE I NDUCTOR

in any of the capacitor voltages, where N is the conversion Resonant SC converters [15][25] have been proposed as an

ratio. These observations agree with the experimental work in alternative that offers higher power density and lower switch-

[30]. In addition, the Fibonacci converter is also found capable ing loss compared to conventional SC converters. Resonant

of soft-charging operation with equal capacitors. On the other SC converters achieve ZCS operation by adding one or more

hand, for the ladder configuration, one can see that a negative inductors to a known SC topology [15][20], or in some cases

capacitance is needed on C2 for soft-charging operation, which making use of distributed inductance to shape the charge and

is not achievable. This means that the change in capacitor discharge current [21][25]. While the inductor placement

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2 Iload

2

2

C2 Co

1 C3 1 C2 1 C1 1 1 2 1 2 1 2

+ 2 2 2

+

Vin

Co Iload Vin C3 C1

1 2 1 2 1 2 1 2

C3 C2 C1 C3 C1

+ +

Vin 1 2 1 Co Iload Vin 1 C2 1 Co

2 2 Iload

2 1 2

v

in " #

vc1 C1

v = vc2 , C = C2

vc3 C3

vout

(a) General.

0 0 0 0

" # " #

1 11 2 1 1

1

1

2

1 1

v = , v = 1 , C = 1 v = 1 , v = 1 , C = 2

1 1 1 1 1 1

3 1 2 1

0 0 0 0

" # " #

1

2

2 2 1

1

1

2 1 1

v = , v = 1 , C = 1 v = , v = 0 , C =

1 0

1 1 1 0 0

3 2 1 1

Fig. 14: Voltage change vectors and relative capacitor values for soft-charging operation.

varies, typically it is preferable to have only one additional placed at the output node and is connected to the capacitor

inductor to reduce the complexity and parameter matching branches at all times, the same terminal voltage appears in all

difficulty, and thus achieving ZCS operation with a single the capacitor branches. Provided that there is no current tran-

inductor is of interest in this paper. As was demonstrated sient during phase transitions among the capacitor branches,

in section III, ZCS resonant operation can be accomplished which is guaranteed by soft-charging operation, sinusoidal

for the 2-to-1 example converter, at a switching frequency of inductor current ensures sinusoidal current in the capacitors

fcrit , by adding one inductor at the output node. However, and thus in the switches. To illustrate this concept, the currents

the basic 2-to-1 topology is simple to analyze and has already through all the switches of a resonant Fibonacci converter

been exploited by many existing work [15], [17]. To date, it (as shown in Fig. 17) are plotted in Fig. 18. It can be seen

has not been clear whether resonant operation is possible with that, since the Fibonacci converter is compatible with full soft-

only one inductor, for a general SC converter with multiple charging operation, indeed all the switches turn on and off at

charge transfer paths. the zero crossings of the current waveforms and thus sinusoidal

It is postulated here that full ZCS on all switches can be inductor current ensures ZCS for all switches. A similar case

achieved with a single inductor if the topology is compatible can be shown for the series-parallel SC converter. Therefore,

with full soft-charging operation. Since the single inductor is two new ZCS resonant two-phase SC converter based on the

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100

hard-charging hard-charging

Power loss (W) soft-charging 100 soft-charging

101

101

Frequency (Hz) Frequency (Hz)

100 100

hard-charging hard-charging

soft-charging soft-charging

Power loss (W)

Frequency (Hz) Frequency (Hz)

Fig. 15: Power loss of hard-charging and soft-charging SC converters from LTSpice simulation.

6

SW10 SW7 SW4 SW1 L

C3 C2 C1

4 +

Vin SW8 SW5 SW2 Co Iload

2 SW9 SW6 SW3

Current (A)

at the output.

2

hardcharging

softcharging significant, operating at resonance with ZCS would yield the

6 highest efficiency.

0 1 2 3 4 5 6 7 8

Time (s) x 10

6

Fig. 16: Current waveform of capacitor C3 of the Fibonacci

converter. A hardware prototype is implemented for the soft-charging

Dickson SC converter, but extended to a voltage conversion

ratio of 8 to 1. The schematic is shown in Fig. 19. A total of 12

GaN switches are used, together with seven flying capacitors

series-parallel and the Fibonacci structures are possible, based of various voltages and one inductor. The design specification

on the technique presented in this work. can be found in Table V while a full component listing is

Whether one should choose soft-charging operation or ZCS provided in Table VI. A photograph of the hardware prototype

operation often depends on the load conditions. At heavy is shown in Fig. 20. All the components are placed on the

load, where conduction loss dominates, it would be beneficial top side of the PCB for clear illustration. A prototype of

to operate at higher frequencies in soft-charging mode to the conventional Dickson SC converter is also built for the

minimize the current ripple. On the other hand, at light load purpose of comparison, with the same set of switches. The

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2 Isw1

Isw2

1 Isw3

Current (A)

Isw4

0

Isw5

1 Isw6

Isw7

2 Isw8

Isw9

3

Isw10

4

0 2 4 6 8 10 12 14

Time (s)

SW1 SW3

SW5 SW7

SW9

Time (s) prototype, with a U.S. penny added for perspective.

SW2 SW4

SW6 SW8 output impedance. The efficiency represents an approximate

SW10 2x power loss reduction at 53 W. For both cases, the measured

0 2 4 6 8 10 12 14 efficiencies do not include the power loss due to control circuit

Time (s) and gate drivers. The combined loss of these components

Fig. 18: Current waveform of all the switches in the Fibonacci are approximately 0.5 W, which is mainly attributed to the

converter as shown in Fig. 17. poor efficiency of the level-shifting circuit used to power the

gate drivers. Overall, the experimental results demonstrate that

the soft-charging SC converter simultaneously achieves higher

C7 efficiency and higher power density than the conventional SC

C5

C3 converter.

C1 To see the similarity between resonant and soft-charging

operations, the current through the inductor is shown in Fig.

S4 S1

Co

S12 S11 S10 S9 S8 S7 S6 S5 Rload 21 at three different switching frequencies. As can be seen,

+

Vin

+ Vsc - for fsw = fcrit (Fig. 21b), the current is sinusoidal and

S3 S2 reaches zero at each phase transition, and thus ZCS operation

C2 is achieved. For fsw > fcrit (Fig. 21a), the current has a

C4

C6

Fig. 19: Schematic of the proposed soft-charging Dickson SC TABLE V: Tested specifications.

converter.

Vin 200 V DC

Conversion ratio 8:1

only difference is that in the conventional Dickson converter, Pout 53 W

there is no inductor and the flying capacitors are all of value fsw 250 kHz

2.2 F. The volume of the passive components of the two

converters are shown in Table VII. The total volume of the TABLE VI: Component listing of the proposed converter.

passive components of the SC converter with the inductor is

Component Part number Parameters

454 mm3 while that of the pure SC converter is 682 mm3 . It

can be seen that even with the additional inductor, the volume S12 , S5 - S1 EPC2014 40 V, 16 m, 10 A

S11 - S6 EPC2007 100 V, 30 m, 6 A

of the proposed converter is still smaller than that of the pure

SC converter, thanks to the improved utilization of capacitors C7 , C5 C1812X224K2RACTU 250 V, 0.22 F

C6 , C4 C2220C225MAR2CTU 250 V, 2.2 F

due to soft-charging. C3 C0805C224K1RACTU 100 V, 0.22 F

The measured efficiencies of the proposed converter as well C2 C3216X7S2A225K160AB 100 V, 2.2 F

as the conventional SC converter at various load currents C1 C1608X7R1H224K080AB 50 V, 0.22 F

Co C3216X5R1V226M160AC 35 V, 22 F

are plotted in Fig. 22. It can be seen that not only is the

Inductor XAL5030-332 3.3 H

efficiency of the soft-charging converter always higher than

that of the conventional hard-charging converter, but it also Level-shifters ADUM5210

Micro-controller STM32f051

drops at a slower pace as the current increases, due to the lower

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(a) fsw = 250 kHz > fcrit (b) fsw = 90 kHz = fcrit (c) fsw = 50 kHz < fcrit

Fig. 21: SC stage voltage (Vsc in Fig. 19) (upper) and inductor current (lower).

TABLE VII: Passive components volume comparison. frequency. In addition, we proposed a formal and general

method to determine the conditions for soft-charging operation

Conventional Soft-charging

of an arbitrary two-phase switched-capacitor converter and

Capacitor volume (mm ) 3

681.8 378.9 the method is illustrated with a Dickson SC converter. It

Inductor volume (mm3 ) - 75.0 has been shown that the Dickson converter can approach

Total volume (mm3 ) 681.8 453.9 complete soft-charging by appropriately selecting the flying

capacitor values. The technique was verified with a discrete

8-to-1 Dickson converter. The hardware prototype in soft-

charging operation has shown to exhibit higher efficiency with

much smaller ripple and the converter operates near FSL. For smaller passive component sizes compared to a conventional

fsw < fcrit (Fig. 21c), the current goes negative in each phase. Dickson converter. The analysis is also applied to four other

These experimentally obtained waveforms closely resemble SC topologies and the results agree with simulation results and

the simulated waveforms in Fig. 7, with some voltage spikes as published experimental work. It is found that both the series-

a result of switching dead-time in the practical implementation. parallel and Fibonacci SC converters are able to achieve soft-

Therefore, the hardware not only shows that soft-charging charging or resonant operation using the proposed technique.

operation is able to achieve a high efficiency with smaller The proposed method expands the family of both resonant and

passive component footprint, but also confirms that resonant soft-charging SC converters and makes SC converters suitable

operation can be achieved at the specified frequency using the for an increasing number of applications.

same technique.

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Mcgraw-Hill College, 1987.

degrees in Electrical and Information Science from

University of Cambridge, UK, in 2012. He is cur-

rently pursuing a Ph.D. degree at University of

Illinois, Urbana-Champaign. His research focus is

on high performance dc-dc switched-capacitor con-

verters.

in Hedemora, Sweden. He received dual B.S. de-

grees in physics, electrical engineering and computer

science in 2005, the M.Eng. degree in electrical

engineering and computer science in 2007, and the

Ph.D. degree in electrical engineering in 2012, all

from the Massachusetts Institute of Technology.

He is currently an Assistant Professor in the

Electrical and Computer Engineering Department at

the University of Illinois, Urbana-Champaign, and is affiliated with the Power

and Energy Systems group. He performs research in the area of power

electronics. His research interests include renewable energy applications,

energy harvesting, CMOS power management, and advanced control of power

converters. Dr. Pilawa-Podgurski received the Chorafas Award for outstanding

MIT EECS Masters thesis, the Google Faculty Research Award, and the

Richard M. Bass Outstanding Young Power Electronics Engineer Award of

the IEEE Power Electronics Society. He is co-author of three IEEE prize

papers.

0885-8993 (c) 2013 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See

http://www.ieee.org/publications_standards/publications/rights/index.html for more information.

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