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AbstractNoise analysis for comparator-based circuits is pre- switched-capacitor pipeline analog-to-digital converter (ADC)
sented. The goal is to gain insight into the different sources of noise [1], [2]. Section II discusses why nonstationary noise analysis
in these circuits for design purposes. After the general analysis is necessary and how it differs from traditional WSS noise
techniques are established, they are applied to different noise
sources in the comparator-based switched-capacitor pipeline analysis. Section III presents a systematic approach to the
analog-to-digital converter (ADC). The results show that the nonstationary noise analysis for linear time-invariant (LTI)
noise from the virtual ground threshold detection comparator circuits emphasizing the results for white noise signals. The
dominates the overall ADC noise performance. The noise from the issues of input-referring noise, noise bandwidth, and noise
charging current can also be significant, depending on the size of initial conditions are also addressed. Section III concludes with
the capacitors used, but the contribution was small in the proto-
type. The other noise sources have contributions comparable to the nonstationary noise analysis of a transconductance ampli-
those in op-amp-based designs, and their effects can be managed fier. In order to handle the analysis of both white and flicker
through appropriate design. In the prototype, folded flicker noise noise sources, Section IV introduces the periodic filtering noise
was found to be a significant contributor to the broadband noise model for sampled data systems that allows for the power
because the flicker noise of the comparator extends beyond the spectral density (PSD) analysis of a series of samples using
Nyquist rate of the converter.
classical noise aliasing concepts [5][9]. Section V applies the
Index TermsComparator-based switched-capacitor circuits noise analysis techniques to a previously reported prototype
(CBSCs), comparators, noise analysis, switched-capacitor circuits,
1.5-bit/stage CBSC pipeline ADC [1], [2]. Section VI compares
zero-crossing-based circuits (ZCBCs).
the measured and predicted noise PSD of the prototype con-
verter. Finally, Section VII summarizes and makes concluding
I. INTRODUCTION remarks.
Fig. 1. Overview of time domain and frequency domain analyses. (a) Time (3)
domain noise analysis input and output variables. (b) Frequency domain noise
analysis input and output variables.
where is the system impulse response. Ultimately, the vari-
ance or standard deviation of the output noise amplitude is of
interest because the standard deviation can be measured as the
rms value of the noise voltage or current. The variance of the
output as a function of the autocorrelation is
(4)
has resulted in a series of papers applying this technique for sub- (5)
sampling [14], [17][20]. As shown in Section IV, the sampling
model and resulting mathematics also apply to the analysis of where is the one-sided white noise PSD of the underlying
noise sources in comparator-based systems if the periodic inte- noise process and the delta function means that the noise at dif-
gration is generalized to periodic filtering. Similar mathematical ferent times is uncorrelated. The output variance simplifies to
tools have also been employed to analyze phase noise and jitter
in CMOS ring oscillators [21].
(6)
III. NONSTATIONARY NOISE ANALYSIS
Consistent with all other signal analysis problems, noise anal-
ysis can be performed in either the time domain or the fre- Therefore, to solve for the white noise step response, all that is
quency domain. Fig. 1 shows both the frequency domain and required is the input white noise PSD and the impulse response
time domain representations of an arbitrary system with input from the noise source to the output. A frequency domain inter-
and output variables defined. Although it is possible to analyze pretation is presented in Section III-E.
nonstationary noise problems in the frequency domain, a time
A. Time Versus Ensemble Averages
domain analysis is often more natural because the variance of
the output noise is a function of time. As a simple example, con- The conventional view of noise voltages and currents in
sider that the step noise input is constructed from an underlying circuit analysis is that they represent the time-averaged rms
WSS process applied at time zero, as shown in Fig. 2 value of the noise. This interpretation is appropriate for WSS
noise processes because the statistics (mean and variance) do
not change as a function of time, but for nonstationary noise
(1) processes, the statistics, by definition, are a function of time.
The time-varying statistics have averages taken over a set
where is the unit step function. This is a nonstationary (ensemble) of many possible noise waveforms at each instant
random process because the mean and variance of are func- in time [10]. For example, consider a noisy current source
tions of time. The autocorrelation is then charging a capacitor; the capacitor voltage may look like that
shown in Fig. 3. Because the system is linear and superposition
(2a) applies, the composite waveform can be separated into the
(2b) average ramp that the dc current causes and a noise voltage that
the noise current integrating on the capacitor causes. At any
which is the autocorrelation of the underlying random process point in time, a statistical distribution describes the possible
when both time points are after the noise input was applied. In values of the noise waveform. A time-varying noise variance
SEPKE et al.: NOISE ANALYSIS FOR COMPARATOR-BASED CIRCUITS 543
Fig. 3. In transient noise analysis, it is ensemble averages and not time averages where is the dc gain, is the amplifier
that are most important. (a) Ramp voltage plus random walk noise. (b) Average
ramp voltage. (c) Random walk noise voltage showing 3 bounds.
time constant, and is the input ramp rate. The
impulse response from the noise current source to the output
voltage is
implies that the standard deviation of the voltage distribution is
changing with time. (10)
B. Noise Initial Conditions Substituting (10) into (6) and modeling the noise current PSD
as the thermal noise from an equivalent noise
Another issue with time domain noise analysis is the handling
conductance , the noise at the output of the amplifier is
of capacitor and inductor initial conditions due to noise. The
nonstationary noise analysis equations given in (3) and (4) deter-
mine the noise response for zero initial conditions, also known (11)
as the zero-state response. Assuming that the initial conditions
are statistically independent of the noise input, the system can
This result simplifies into two interesting special cases
be analyzed for zero-state and initial condition responses sepa-
rately, and their variances add. The assumptions of independent
initial conditions should be valid for both white and flicker noise (12a)
sources. For white noise sources, no correlation exists between (12b)
noise at different time points, and for flicker noise, nonoverlap-
ping time segments are independent [22], [23].
where (12a) is the usual steady-state noise result for a broad-
band amplifier, and (12b) is a random walk [10] resulting from
C. Example: Transconductance Amplifier integrating a white noise current onto the load capacitance
for an ideal transconductance amplifier.
As an example of nonstationary noise analysis techniques, In order to input-refer the output noise voltage, the noise gain
the noise and ramp response of a transconductance amplifier of the amplifier must be calculated. Modeling a finite-bandwidth
representing the first stage of a threshold detection comparator threshold detection comparator as a cascade of an amplifier and
[1], [2] are presented. The equivalent circuit and step ramp input an ideal threshold comparator, the output noise voltage of the
amplifier results in jitter of the output threshold crossing through
(7) the rate of change of the amplifier output voltage, as shown in
Fig. 5(a). To refer the output voltage noise to the input of the
amplifier, it is desired to have an input noise voltage that results
are shown in Fig. 4. The impulse response for the transconduc- in the same comparator jitter when the input voltage crosses the
tance amplifier is input threshold voltage , as shown in Fig. 5(b).
The conversion of noise voltages to timing jitter happens
when a threshold detection device senses a noisy signal [24]. To
(8)
see how this occurs, consider Figs. 5 and 6. The signal crosses
the threshold at the output of the preamplifier at some
and the response of this amplifier to the step ramp input (7) is average rate and has a noise voltage distribution at
the average crossing time , as shown on the right of Fig. 6.
Assuming that the noise voltage variations are small over the
(9) range of possible crossing times, the standard deviation of the
544 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMSI: REGULAR PAPERS, VOL. 56, NO. 3, MARCH 2009
upper limit on the noise gain for a given bias current. Using this
definition of noise gain for the amplifier in Fig. 4 with a ramp
input, the noise gain is
(17)
(20)
(13)
and the following two limits are of interest:
(27)
(23)
is the system impulse response, and is a rectangular where is the rectangular window function of unit height
window function of unit amplitude from time zero to time and and duration . Realizing that the second integral is the convo-
zero otherwise. Using Parsevals theorem lution of the input to a time-shifted impulse response of a
finite-duration integrator , the procedure is easily extended
to finite-duration filtering of an arbitrary impulse response
(24)
(28)
where the Fourier transform of the windowed impulse
response is the transfer function from the noise source
to the output. Given the transfer function , the effective where is the windowed impulse response (23). It should
noise bandwidth can be defined as the equivalent brick wall filter be noted that it is the zero-state response that is found from the
in the usual manner convolution of the input with an impulse response. Therefore,
this procedure assumes that the output is reset between oper-
ations. Because the noise from the reset can be treated as an
(25) independent random initial condition, the total noise is the su-
perposition of the initial condition (zero-input) response and the
zero-state response. Continuing with the model derivation, the
where . However, this fre- series of periodically filtered samples can be expressed as the
quency domain interpretation only applies to the nonstationary infinite sum of samples
noise analysis of white noise inputs due to the assumption of
a white noise autocorrelation in deriving (6) from the more (29)
general relationships in (3) and (4).
IV. PERIODIC FILTERING FREQUENCY DOMAIN MODEL which is the impulse train sampling of the output, where the
usual shorthand notation for the sampling impulse train
Nonstationary noise analysis is useful for understanding the
circuit response to a step noise input as a function of the re-
sponse time , but sampled data systems operate on the series
of discrete-time samples taken at the end of the sampling period. (30)
Therefore, it is the statistics of the series of samples that are of
interest. Although the details of the processing during each pe- has been used. The output samples of the periodic filtering
riod result in nonstationary noise voltages and currents, the same system can be modeled, as shown in Fig. 8, according to
operation is performed each clock cycle, resulting in the same
signal statistics each clock cycle. This means that the process
is wide-sense cyclostationary. The periodically sampled values (31)
then all have the same statistics and form a WSS discrete-time
series. To analyze this discrete-time series of samples, a peri- where is the windowed impulse response of the system.
odic filtering model is presented as an extension of the periodic The model in Fig. 8 reduces to that originally suggested in
546 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMSI: REGULAR PAPERS, VOL. 56, NO. 3, MARCH 2009
Fig. 8. Periodic filtering sampler model: The output samples can be modeled
as the impulse train sampling of the input filtered by the Fourier transform of
the windowed impulse response.
[16] and used in [18] and [19] for a periodic integrating system
.
To apply the periodic filtering model to existing noise
aliasing techniques, the frequency domain transfer function
from the noise source to the output is
more useful. The procedure for determining the filter transfer Fig. 9. First two stages of pipeline ADC. Note that the first-stage sampling and
function is to find the Laplace -domain transfer function from bit-decision clocking are controlled by the system clock, but for the second and
subsequent stages, the sampling and bit-decision clocking are controlled by the
the noise source to the output. The inverse Laplace transfer comparator of the previous stage.
yields the system impulse response . The Fourier transform
of the windowed impulse response produces
the desired filter function. Summarizing mathematically Measurements of the output codes for a dc input signal to the
ADC can be used to obtain an input-referred noise PSD estimate
(32a) for the ADC including quantization noise. Because the proto-
(32b) type pipeline was implemented as a cascade of identical stages,
the total input-referred noise from the residue amplifiers has a
The one-sided noise PSD of the sampled output can then be particularly simple form. Referring to Fig. 10, the input-referred
found from the sum of the filtered and shifted two-sided input noise PSD of an -bit ADC due to noise in the residue calcu-
noise PSD [5][8], [10] lations is
(33) (34)
Fig. 10. Pipeline ADC model that resolves 1.5 b/stage. The noise added at each stage contributes to uncertainty in the output residue voltage of the stage.
Fig. 11. Schematic of preamplifier for the comparator used in the prototype [1], [2].
(40)
(41)
(43) using the ideal transconductance amplifier noise gain (41). The
total input-referred noise for the preamplifier is then the sum of
The preamplifier noise simplifies into two interesting special (40) and (46)
cases for a broadband preamplifier and an ideal transconduc-
tance preamplifier
(44a) (47)
. (44b)
For the broadband case (44a), the transfer function simplifies If the preamplifier noise gain is relatively large
to the expected steady-state result which is independent of
the response time and has a constant noise bandwidth. For
the case of an ideal transconductance preamplifier (44b), the (48)
transfer function simplifies to a sinc function. Using (25), it can
be shown that the effective noise bandwidth of the sinc transfer the preamplifier noise dominates.
function is inversely proportional to the response time. These The noise contribution of the comparator is similar to that of
two results are identical to the effective noise bandwidths for the op-amp in an op-amp-based design. From (45), a potential
white noise sources (21a) and (21b) described in Section III. A advantage of comparator-based designs is apparent in the noise
plot of the transfer function versus frequency for bandwidth that is a function of the preamplifier integration time.
three different response times is shown in Fig. 13. Assuming that can be made longer than the required time con-
Assuming only thermal noise contributions from an ideal stant in an op-amp-based system, the noise from the comparator
transconductance preamplifier , the input-referred is lower than that of the op-amp for the same power [2].
noise contribution is 2) Charging Current Noise: The second source of noise to be
considered during the charge transfer phase is the contribution
from the fine-phase charging current source shown in Fig. 14.
(45)
The noise from the charging current only adds noise to the
SEPKE et al.: NOISE ANALYSIS FOR COMPARATOR-BASED CIRCUITS 549
(49)
(50)
Fig. 15. Charging current noise analysis with correlated sampling jitter. where the transformations from noise voltage to jitter and jitter
(a) Open-loop random walk noise voltage y (t ) on C after response time t .
(b) Noise voltage z (t ) sampled on C due to jitter in comparator decision to sampled noise voltage are accomplished with the rate at
only. which the preamplifier output crosses the comparator threshold
and the ramp rate on the load capacitance ,
respectively. The second equality follows from (16) and
sampled output value after the preamplifier input threshold is
crossed. The noise added to the capacitor network before this
time does not effect the final value and only changes the time (51)
that it takes to reach the preamplifier input threshold. The noise
contribution from the charging current consists of the random where is related to because the average ramp
walk deviation on the external capacitor network during two rates are the same in both copies of the circuit in Fig. 15(b).
independent time intervals. The first interval is the preamplifier The -domain transfer function from the charging current
response time from Fig. 12, and the second interval is the noise to the sampled output voltage noise referred to the input
delay time from the threshold detection to the sampling switch of the gain stage is
opening .
The preamplifier filters the random walk on the capacitor (52)
network during the preamplifier response time and results in a
jitter in the comparator decision. This jitter is negatively cor- The periodic filtering transfer function can be ob-
related with the random walk deviation during the preamplifier tained using the sequence of transforms described in (32).
response time and partially cancels the sampled random walk To understand the properties of this transfer function, the lim-
deviation. For example, consider a larger than average random iting cases of a wide-bandwidth preamplifier and
walk deviation at the preamplifier input. This larger than average an ideal integrator for a preamplifier are consid-
deviation results in a larger than average preamplifier output and ered. The dc gain and noise bandwidth of the transfer function
a shorter than average time to reach the comparator threshold are
voltage. Therefore, the shorter than average comparator delay
partially cancels the larger than average random walk deviation. (53a)
To derive the periodic filtering transfer function for the
charging current noise that accounts for the cancellation due to (53b)
the negatively correlated jitter, consider the open-loop random
walk deviation at the output in Fig. 15(a) and the sampled (54a)
noise voltage at the output due only to the sampling jitter . (54b)
in Fig. 15(b) separately. The total noise voltage on the
sampled output is the difference between these two voltages Plots of the transfer function are shown for three
. values of preamplifier response time in Fig. 16.
550 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMSI: REGULAR PAPERS, VOL. 56, NO. 3, MARCH 2009
(56)
(57)
where
(61)
and is the series combination of and . This formu-
lation assumes that the time constant of the switch and ca-
pacitor network is smaller than the preamplifier response time. Fig. 18. Theoretical and measured noise PSD: f = 2:4576 MHz, average of
30 FFTs.
The preamplifier filters the switch noise and results in jitter in
the comparator decision. The transfer function to refer this noise
source to the input of the stage is similar to the preamplifier re-
sponse noise should be lower than that of the preamplifier .
The noise is similar to the switch noise that feeds
(62) directly to the output in an op-amp-based implementation for
frequencies beyond the closed-loop bandwidth of the gain stage.
Therefore, the noise places a limit on how small the
where is defined in (43). The response for the lim-
capacitances can be made. Assuming a gain of two
iting cases of preamplifier bandwidth are the same as (44a) and
in the first stage and a load capacitance equal to half the input
(44b) for the preamplifier noise, except for the factor of .
sampling capacitance , the input-referred
After the preamplifier output reaches the comparator
noise contribution of the output sampling noise is only
threshold, the threshold comparator trips. During the threshold
one-sixth that of the input sampler .
comparator delay, the input no longer responds to the noise
at the input of the preamplifier. Therefore, the switch and
capacitor network is open loop during time . The VI. MEASUREMENTS
switch noise results in noise sampled onto the series
combination of , , and Measured results from the prototype pipeline ADC presented
in [1] and [2] are compared with the analysis presented in
(63) Section V. An average periodogram estimate of the input-re-
ferred PSD of the ADC can be made from the fast Fourier
transform (FFT) of several data records for a dc input to
The noise voltage on is the noise of through the
the ADC. For a sampling frequency of 2.45 MHz, both the
voltage divider from to the load capacitance . Therefore,
measured and theoretical noise PSD estimates are shown in
the input-referred noise is
Fig. 18 on a loglog scale. The theoretical breakdown of the
noise contributions is shown in Fig. 19(a), which shows that
(64) the aliased flicker noise is a significant contributor to the ap-
parent white noise of the ADC. Fig. 19(b) shows the top-four
where is the series combination of and . Because this is contributors to the apparent white noise of the ADC and shows
a white noise source, its noise PSD is constant over the Nyquist that the folded flicker noise of the preamplifier dominates,
range, and the sampled noise PSD is followed by the preamplifier thermal noise, the input sampler
noise, and the ADC quantization noise. Table I shows
a complete breakdown of all possible apparent white noise
(65) sources and their relative contributions according to the theo-
retical estimates obtained using the transfer functions derived
Note that this result could also have been obtained using the in Section V. Note that the folded flicker noise and thermal
steady-state transfer function for the switch and capacitor net- noise contributions from the clamp state of the preamplifier
work and the periodic filtering model. were negligible because the desired condition of for
The contribution of the filtered switched noise is similar to the preamplifier was not satisfied in the prototype design.
that in an op-amp-based implementation where the op-amp In the prototype design, the aliased flicker noise of the input
bandwidth filters the switch noise [26]. To keep this noise contri- pair in the preamplifier dominates the ADC noise performance.
bution small, the equivalent noise resistance from the switches In order to lower the flicker noise of the preamplifier, the input
552 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMSI: REGULAR PAPERS, VOL. 56, NO. 3, MARCH 2009
VII. CONCLUSION
ACKNOWLEDGMENT
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vol. 36, no. 1, pp. 92101, Jan. 2001. Charles G. Sodini (S80M82SM90F94) re-
[14] G. Xu and J. Yaun, Performance analysis of general charge sampling, ceived the B.S.E.E. degree from Purdue University,
IEEE Trans. Circuits Syst. II, Exp. Briefs, vol. 52, no. 2, pp. 107111, West Lafayette, IN, in 1974 and the M.S.E.E. and
Feb. 2005. Ph.D. degrees from the University of California,
[15] A. A. Abidi and R. G. Meyer, Noise in relaxation oscillators, IEEE Berkeley, in 1981 and 1982, respectively.
J. Solid-State Circuits, vol. SSC-18, no. 6, pp. 794802, Dec. 1983. He was a Member of the Technical Staff with
[16] L. R. Carley and T. Mukherjee, High-speed low-power integrating HewlettPackard Laboratories from 1974 to 1982,
CMOS sample-and-hold amplifier architecture, in Proc. IEEE Custom where he worked on the design of MOS memory.
Integr. Circuits Conf., 1995, pp. 543546. He joined the faculty of the Massachusetts Institute
[17] G. Xu and J. Yuan, Comparison of charge sampling and voltage sam- of Technology, Cambridge, in 1983, where he is cur-
pling, in Proc. 43rd IEEE Midwest Symp. Circuits Syst., Aug. 2000, rently the LeBel Professor of Electrical Engineering.
pp. 440443. His research interests are focused on mixed-signal integrated circuit and system
[18] S. Kaworten, T. Riley, and J. Kostamovanra, A low noise quadrature design. Along with Prof. R. T. Howe, he is the coauthor of an undergraduate
subsampling mixer, in Proc. IEEE Int. Symp. Circuits Syst., 2001, pp. textbook on integrated circuits and devices entitled, Microelectronics: An
790793. Integrated Approach (Prentice-Hall, 1997). He was a cofounder of SMaL
[19] S. Karvonen, T. A. D. Riley, and J. Kostamovaara, A CMOS quadra- Camera Technologies, a leader in imaging technology for consumer digital still
ture charge-domain sampling circuit with 66-dB SFDR up to 100 cameras and machine vision cameras for automotive applications.
MHz, IEEE Trans. Circuits Syst. II, Exp. Briefs, vol. 52, no. 2, pp. Dr. Sodini has served on a variety of IEEE conference committees, including
292304, Feb. 2005. the International Electron Device Meeting, where he was the 1989 General
[20] K. Muhammad and R. B. Staszewski, Direct RF sampling mixer with Chairman. He has served on the IEEE Electron Device Society Administrative
recursive filtering in charge domain, in Proc. IEEE Int. Symp. Circuits Committee and was President of the IEEE Solid-State Circuits Society from
Syst., 2004, pp. 577580. 2002 to 2004. He is currently the chair of the Executive Committee for the VLSI
[21] A. A. Abidi, Phase noise and jitter in CMOS ring oscillators, IEEE Symposia.
J. Solid-State Circuits, vol. 41, no. 8, pp. 18031816, Aug. 2006.
[22] M. S. Keshner, Renewal process and diffusion models of 1=f noise,
Ph.D., MIT, Cambridge, MA, 1979.
[23] N. J. Kasdin, Discrete simulation of colored noise and stochastic pro-
cesses and 1=f power law noise generation, Proc. IEEE, vol. 83, no. Hae-Seung Lee (M85SM92F96) received the
5, pp. 802827, May 1995. B.S. and M.S. degrees in electronic engineering
[24] J. Phillips and K. Kundert, Noise in mixers, oscillators, samplers, and from Seoul National University, Seoul, Korea, in
logic: An introduction to cyclostationary noise, in Proc. IEEE Custom 1978 and 1980, respectively, and the Ph.D. degree
Integr. Circuits Conf., 2000, pp. 431438. in electrical engineering from the University of
[25] B. J. McCarroll, C. G. Sodini, and H.-S. Lee, A high-speed CMOS California, Berkeley, in 1984, where he developed
comparator for use in an ADC, IEEE J. Solid-State Circuits, vol. 23, self-calibration techniques for analog-to-digital
no. 1, pp. 159165, Feb. 1988. (A/D) converters.
[26] T. Sepke, Comparator design and analysis for comparator-based Since 1984, he has been on the faculty of the
switched-capacitor circuits, Ph.D., MIT, Cambridge, MA, 2006. Department of Electrical Engineering and Computer
[27] B. Ginetti and P. G. A. J. Vandemeulebroecke, A CMOS 13-b cyclic Science, Massachusetts Institute of Technology
RSD A/D converter, IEEE J. Solid-State Circuits, vol. 27, no. 7, pp. (MIT), Cambridge, where he is currently a Professor and the Director of the
957965, Jul. 1992. Center for Integrated Circuits and Systems. From 1985 to 1999, he acted as a
[28] H.-S. Lee, A 12-b 600 ks/s digitally self-calibrated pipelined algo- consultant to Analog Devices, Inc., Wilmington, MA, and MIT Lincoln Lab-
rithmic ADC, IEEE J. Solid-State Circuits, vol. 29, no. 4, pp. 509515, oratories. He is on the Technology Advisory Board for Sensata Technologies
Apr. 1994. and served the Technology Advisory Committee for Samsung Electronics
[29] J. K. Fiorenza, A comparator-based switched capacitor pipelined and Cypress Semiconductor from 2004 to 2007 and from 2005 to 2007,
analog-to-digital converter, Ph.D., MIT, Cambridge, MA, 2007. respectively. In 1999, he cofounded SMaL Camera Technologies, which was
[30] S. Christensson, I. Lundstroem, and C. Svensson, Low frequency later acquired by Cypress Semiconductor in 2005. His research interests are in
noise in MOS transistorsI Theory, Solid State Electron., vol. 11, no. the areas of analog integrated circuits with an emphasis on A/D converters in
9, pp. 797797, Sep. 1968. scaled CMOS technologies.
[31] A. van der Ziel, Dependence of flicker noise in MOSFETs on geom- Prof. Lee was a recipient of the 1988 Presidential Young Investigators
etry, Solid State Electron., vol. 20, no. 3, pp. 267267, Mar. 1977. Award and a corecipient of the ISSCC Jack Kilby Outstanding Student Paper
Award in 2002 and 2006. He has served a number of technical program
committees for various IEEE conferences, including the International Electron
Todd Sepke (S01M07) was born in Detroit,
MI, in 1975. He received the B.S.E.E. degree from Devices Meeting, the International Solid-State Circuits Conference, the Custom
Michigan State University, East Lansing, in 1997 and Integrated Circuits Conference, and the IEEE Symposium on VLSI Circuits.
the M.S. and Ph.D. degrees in electrical engineering He is an elected AdCom member of the Solid-State Circuits Society.
from the Massachusetts Institute of Technology,
Cambridge, in 2002 and 2006, respectively.
He is currently with Marvell Semiconductor, Inc.,
Santa Clara, CA. His research interests include RF,
analog, and mixed-signal circuit design.