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Dispersion
Rx
T-Line
Segment
Split Diff.
Diff. Vias T-Line T-Line Receiver Rx
crossing Vias
Model Segment Segment Package port
discontinuity Model
Multiport S-parameter
models for via-hole
transitions and Via-hole S-parameter or equivalent distributed
discontinuities models are required for successful analysis of
multi-gigabit channels!
9/28/2007 2007 Simberian Inc. 6
Agenda
Introduction
Multiport parameters
Electromagnetic analysis of via-holes
Analysis of single via-holes
Analysis of differential via-holes
Examples of differential via-hole optimization
Conclusion
Impedance EM
[Z ]
Analysis
Scattering
[S ]
VNA
Admittance
[Y ]
Z 02
I2 Vi
- + Impedance parameters: V = Z I , Z C N N , Zi, j =
V2
+
- I2
Port 2 Ij
I k =0 k j
.
. [ Z ] or [Y ] Ii
Admittance parameters: I = Y V , Y C N N , Yi , j =
. Z0 N
Vj
Vk = 0 k j
IN
Conversion: Y = Z 1 , Z = Y 1
- +
+
VN I N Port N
-
. bi
Z0 N a b = S a, S C N N , Si , j =
-+
N IN aj
ak = 0 k j
+
bN VN IN
Port N
S = (U YN ) (U + YN ) , YN = Z 01/ 2 Y Z 01/ 2
- 1
S = ( Z N U ) (U + Z N ) , Z N = Z 01/ 2 Z Z 01/ 2
1
reflection transmission
coefficient coefficient
b1 b2
S1,1 = S2,1 =
Vi + = Z 0 ai a1 a1
voltage of incident a2 = 0 a2 = 0
wave
2
Vi = Z 0 bi voltage of reflected Pi + = ai power of incident wave
wave
2
+
Vi = Vi + Vi total voltage Pi = bi power of reflected wave
1
I i = (Vi + + Vi ) total current
2
b1
2
P 2 b2 P2
S1,1 =
2
= 1 S2,1 = = +
Z0 a1
2
P1
+
a1
2
P1
Si , j = Re ( Si , j ) + Im ( Si , j )
2 2
magnitude
(
Si , j = arctan Im ( Si , j ) Re ( Si , j ) ) phase
Si , j
dB
(
= 20 log Si , j ) magnitude in dB
i = 1, 2; j = 1, 2;
Multiport
S-parameters Hybrid 2D
Simple lumped or transmission plane
distributed LC + circuit solvers
models
System-level simulator
Impedance and admittance per square for broadband models are derived in
Y. Shlepnev, Transmission plane models for parallel-plane power distribution system and signal integrity analysis, - 22nd
Annual Review of Progress in Applied Computational Electromagnetics, 2006, p. 382-389.
Top External
Circuit
I v1
Cv / 2 (1) (0) reference
Vv1 = 1V pp Top Plane node
(0) (0) h1
3 (3) T-Line 1 1 = h1
I z = n I vn Iv2 Cv / 2 h
n =1
V pp 2 =
h2
Vv 2 = 2V pp h T-Plane h
h2
Cv / 2
T-Line 2 (4)
I v3 h3
3 = h3
(0) (0) h
Vv 3 = 3V pp Bottom Plane (2) (0) reference
Cv / 2 node
Bottom
External Circuit
DeCap 3
Comp 2
2-plane PDN Rx
DeCap 2 via 2
with a slit
Hybrid system-level
Planes are terminated with the decoupling analysis only
capacitors and the return current is a BC BC
combination of the displacement currents
through capacitors and planes
Decaps have low impedance only in a narrow
band thus the problem again is non-
localizable for broadband EM analysis
Local 3D EM
Stitching vias are used to connect the analysis possible!
|S21|
|S11|
Frequency, Hz Frequency, Hz
9/28/2007 2007 Simberian Inc. 25
Example of a single via going through not
terminated planes (buried capacitance)
Port 1
165 mm by 165 mm rectangular PMC PMC
board with two metal planes Port 1
Port 2
Planes thickness 17.8 um, distance
between planes 50.8 um (2 mil) 2-port
Dielectric between the planes: model
Dk=4.2, Lt=0.018 at 1 GHz
Infinite plane assumption is good Port 2
approximation no system-level analysis
|S11|
Frequency, Hz Frequency, Hz
9/28/2007 2007 Simberian Inc. 26
Example of a single via through terminated
planes (widely spaced planes)
165 mm by 165 mm rectangular Port 1
board with two metal planes PMC PMC
Planes thickness 17.8 um, distance Port 2
between planes 1.524 mm
Dielectric between the planes: Port 1
Dk=4.2, Lt=0.018 at 1 GHz
VRM, 5 bulk capacitors and 50 medium 2-port
and high-frequency decoupling capacitors model
Good PDN design -> good via bypass
VRM
|S11|
Frequency, Hz
Frequency, Hz
9/28/2007 2007 Simberian Inc. 27
Single via-holes with stitching vias
All reference planes for connected layers have to be
connected in vicinity to the via
Only this type of vias can be locally simulated with any
boundary conditions at a sufficient distance (though PEC
are asymptotically correct and preferable)
|S21|
Example of analysis of a
single via-hole crossing
two parallel planes with |S11|
two stitching vias
2-port
model
Port 2
Port 2
Solver generates Touchstone s2p file with tabulated scattering (S) parameters
# Hz S MA R 50
!Touchstone multiport model file <Project1_DifVias_Simulation1.s2p>
!Created with Simbeor 2007.05
Vdt Port 1
.subckt DiffTransformer sp sn dif
e1 sp sn trans dif 0 1.0 Differential Model
f1 0 dif e1 1.0
.ends DiffTransformer Vdb Port 2
Ib = Idb
DiffTransformer
Idb Vb = Vdb
+ -
Bottom External
Circuit
Frequency, Hz
Frequency, Hz
|S11|
Port 2
S-parameters
normalized to
100 Ohm
U8 J11
J13 J12
1 s...d... U9
Port1 Port2 d...s...
s... 1
PCB6P_DifViasO... s...
2 DiffTranfo...
10gbps_differentia...dif_transf... DiffTranfo... 2
dif_transf...
diff_receiver
1000.0
500.0
V ol t ag e -mV -
0.00
-500.0
More reflection from sub-
-1000.0 optimal configuration
-1500.0
DifViasOptimal
DifViasOptimal2 with -27 dB
-2000.0 reflection (purple)
-2500.0
0.00 200.0 400.0 600.0 800.0
Time (ps)
1500.0
Waveforms are
1000.0
practically identical for
both configurations
500.0
V ol t ag e -mV -
0.00
-500.0
-1000.0
-1500.0
-2000.0
-2500.0
0.00 200.0 400.0 600.0 800.0
Time (ps)
Port 1 Port 2
Four-port model
Port 3 Port 4
9/28/2007 2007 Simberian Inc. 46
Reflection and transmission of differential
mode in time domain
OSCILLOSCOPE
Design file: OPTIMALDIFFVIAS.FFS Designer:
HyperLynx V7.7
1500.0
1000.0
DesignF ile:OptimalDiffVias.ffs
500.0 Hype rLynxLin eS im V7 .7
V ol t ag e -mV -
U11 J2 U12
0.00
1 Port1 Port3 1
Port2 Port4
-500.0
2 PCB6P_4PortOpt... 2
10gbps_differentia... diff_receiver
-1000.0
-1500.0
-2000.0
Slightly higher reflection than
in the case without transition
-2500.0
Port2 Port4
500.0 2 PCB6P_NotOptim... 2
V ol t ag e -mV -
10gbps_differentia... diff_receiver
0.00
-500.0
10-mil vias are 24 mil apart with 24 mil
-1000.0 anti-pads and 16 mil pads in all layers,
traces are 6 mil wide 10 mil apart
-1500.0
Pads in plane layers increase the
-2000.0 capacitance and decrease the effective
impedance of vias to 60 Ohm
-2500.0
0.00 200.0 400.0 600.0 800.0
Time (ps)