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Computation of Correlation and Cumulant 4 under FPGA Architecture
1 N 1
C4 ( 1 , 2 , 3 ) x0 (n) x1(n 1 ) x2 (n 2 ) x3 (n 3 )
N n 0
(2)
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International Journal of Engineering and Technical Research (IJETR)
ISSN: 2321-0869 (O) 2454-4698 (P), Volume-5, Issue-3, July 2016
data input with the shifted reference data, the second is Obtaining the fourth-order cross moments consist of
required to multiply the shifted data input with the shifted computing the entries for matrix Mi for different values of i.
reference data. The third is needed to multiply the results of These entries can be calculated by executing the matrix
the two first multipliers. An adder is necessary to sum the multiplication XYiZ. The block diagram for the computation
results of the third multiplier. The basic principle of this of fourth-order cross moments is shown in figure 5.
design is given in figure 4.
x0 (0).x3 (i)
x0 (1). x3 (1 i )
Yi
0
(5)
0
x0 (n ). x3 ( N 1 i ) Fig. 6: 2D systolic Architecture of MUL1
0 0 x2 (0) x2 (1) x2 ( q )
0 x2 (0) x2 (2q 1)
Z x2 (0) x2 (1) x2 (2q) (6)
x2 (1) x2 (2)
x2 ( N q 1) x2 ( N q) x2 ( N 1) 0 0 Fig. 7: 2D systolic Architecture of MUL2
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Computation of Correlation and Cumulant 4 under FPGA Architecture
89 www.erpublication.org
International Journal of Engineering and Technical Research (IJETR)
ISSN: 2321-0869 (O) 2454-4698 (P), Volume-5, Issue-3, July 2016
A. Correlation
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