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ABET Course Objectives and Outcomes Form

Course number and title: EEM16 Logic Design of Digital Systems

Credits: 4
Instructor(s)-in-charge: D. Cabric (danijela@ee.ucla.edu)
Course type: Lecture
Required or Elective: Required.
Course Schedule: Lecture: 4 hrs/week. Meets twice weekly.
Dicussion: 2 hrs/discussion section. Multiple
discussion sections offered per quarter.
Outside Study: 6 hrs/week.
Office Hours: 2 hrs/week by instructor. 2 hrs/week by
each teaching assistant.
Course Assessment: Homework: 8 assignments.
Quizzes: 3 quizzes.
Exams: 1 midterm and 1 final.
Grading Policy: Typically 20% homework, 10% quizzes, 30% midterm, 40% final.
Course Prerequisites:
Catalog Description: Introduction to digital systems. Specification and
implementation of combinational and sequential systems.
Standard logic modules and programmable logic arrays.
Specification and implementation of algorithmic systems: data
and controls sections. Number systems and arithmetic
algorithms. Error control codes for digital information.
Textbook and any related course M. Ercegovac, Tomas Lang, and J. Moreno, Introduction
material: to Digital Systems, John Wiley & Sons.
Course Website
Topics covered in the course and Introduction to digital systems, and specification of combinational 4 hrs.
level of coverage: systems.
Combinational integrated circuits: characteristics and capabilities. 4 hrs.
Description and analysis of gate networks. 4 hrs.
Design of combinational systems: Minimal two-level networks. 6 hrs.
Specification, analysis, and design of sequential systems and sequential 8 hrs.
networks.
Standard combinational and sequential modules. 6 hrs.
Arithmetic combinational modules and networks. 6 hrs.
Course objectives and their relation
to the Program Educational
Objectives:
Contribution of the course to the Engineering Topics: 0%
Professional Component: General Education: 0%
Mathematics & Basic Sciences: 0%
Expected level of proficiency from Mathematics: Not Applicable
students entering the course: Physics: Not Applicable
Chemistry: Strong
Technical writing: Some
Computer Programming: Some
Material available to students and department at end of course:

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 Available to Available to Available to Available to
students department instructor TA(s)
Course Objectives and Outcomes Form: X X X X
Lecture notes, homework assignments, and solutions: X X X X
Samples of homework solutions from 2 students: X
Samples of lab reports from 2 students: X
Samples of exam solutions from 2 students: X
Course performance form from student surveys: X X
Will this course involve computer assignments? NO Will this course have TA(s) when it is offered? YES

Level of contribution of course to Program Outcomes

(a) Strong Strong: (a) (m)
(b) Average Average: (b) (c) (i)
(c) Average
(i) Average
(m) Strong

:: Upon completion of this course, students will have had an opportunity to learn about the following ::
Specific Course Outcomes Program
Outcomes
1.To convert numbers from/to Decimal to/from Binary and other Radix systems. a
2.To derive equivalent switching expressions by applying transformations allowed in Boolean Algebra. a
3.To determine the sum of minterms and product of maxterms that are equivalent to a given expression. a
4.To analyze a given gate network and obtain a reduced switching expression for its outputs and to give its truth a bi
table.
5.To obtain a minimal sum of products of a given switching function by using K-maps. ac
6.To determine the state diagram and the minimized state table for a given sequential system. ac
7.To determine the minimum delay of a given combinational network. ab
8.To design sequential networks using SR flip-flops, and/or T flip-flops, and/or JK flip-flops and/or D flip-flops. acm
9.To design sequential (bit-serial) adder/subtractor networks. ac
10.To design a network of standard combinational modules with decoders, encoders, and shifters. acm
11.To design arithmetic combinational modules and networks using full adders and multipliers. acm
12.To represent signed integers in various ways including in two-complement format. ab
13.To design multimodule networks using registers, shift registers, and counter modules. acm
14.Several homework assignments reinforcing core concepts and skills learned in class. ai
15.Opportunities to interact weekly with the instructor and the teaching assistant(s) during office hours and i
discussion sections in order to further their learning experience and their interest in the material.

Program outcomes and how they are covered by the specific course outcomes
(a) To convert numbers from/to Decimal to/from Binary and other Radix systems.
To derive equivalent switching expressions by applying transformations allowed in Boolean Algebra.
To determine the sum of minterms and product of maxterms that are equivalent to a given expression.
To analyze a given gate network and obtain a reduced switching expression for its outputs and to give its truth table.
To obtain a minimal sum of products of a given switching function by using K-maps.
To determine the state diagram and the minimized state table for a given sequential system.
To determine the minimum delay of a given combinational network.
To design sequential networks using SR flip-flops, and/or T flip-flops, and/or JK flip-flops and/or D flip-flops.
To design sequential (bit-serial) adder/subtractor networks.
To design a network of standard combinational modules with decoders, encoders, and shifters.
To design arithmetic combinational modules and networks using full adders and multipliers.
To represent signed integers in various ways including in two-complement format.
To design multimodule networks using registers, shift registers, and counter modules.
Several homework assignments reinforcing core concepts and skills learned in class.
(b) To analyze a given gate network and obtain a reduced switching expression for its outputs and to give its truth table.
To determine the minimum delay of a given combinational network.

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 To represent signed integers in various ways including in two-complement format.
(c) To obtain a minimal sum of products of a given switching function by using K-maps.
To determine the state diagram and the minimized state table for a given sequential system.
To design sequential networks using SR flip-flops, and/or T flip-flops, and/or JK flip-flops and/or D flip-flops.
To design sequential (bit-serial) adder/subtractor networks.
To design a network of standard combinational modules with decoders, encoders, and shifters.
To design arithmetic combinational modules and networks using full adders and multipliers.
To design multimodule networks using registers, shift registers, and counter modules.
(i) To analyze a given gate network and obtain a reduced switching expression for its outputs and to give its truth table.
Several homework assignments reinforcing core concepts and skills learned in class.
Opportunities to interact weekly with the instructor and the teaching assistant(s) during office hours and discussion
sections in order to further their learning experience and their interest in the material.
(m) To design sequential networks using SR flip-flops, and/or T flip-flops, and/or JK flip-flops and/or D flip-flops.
To design a network of standard combinational modules with decoders, encoders, and shifters.
To design arithmetic combinational modules and networks using full adders and multipliers.
To design multimodule networks using registers, shift registers, and counter modules.

:: Last modified: February 2013 by J. Lin ::

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