FAKULTI TEKNOLOGI KEJURUTERAAN

UNIVERSITI TEKNIKAL MALAYSIA MELAKA

ELECTRONICS FUNDAMENTAL

BETE 1323 SEMESTER 2 SESI 2016/2017

LAB 4: FIELD EFFECT TRANSISTOR

NAME OF GROUP 1.HARIRAJAN NAIDU A/L KRISHNAN B071610870

MEMBERS &
MATRIX NUMBER
2.THEVAND A/L RAVENDA B071610793

3.YALINI A/P KANASAN B071610166

COURSE BETT 1/1

DATE 28 APRIL 2017

NAME OF INSTRUCTOR PN.AZIEAN BT AZIZE

EXAMINERS COMMENT VERIFICATION STAMP

TOTAL MARKS

1
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1.0 OBJECTIVES

To observe and explain the characteristic of FET configuration and the characteristic curve.
1.1 EQUIPMENT/COMPONENTS

1. Multimeter
2. Transistor 2N5486 JFET N-Channel
3. Resistor 470
4. Set of patching wires and breadboard

1.2 SYNOPSIS & THEORY

The JFET (Junction Field-Effect Transistor ) is a type of FET that operates with a reverse-
biased pn junction to control current in a channel. JFETs fall into two categories, n channel and
p channel. Illustrated in figure 1.

Figure 1 Type of JFET

JFET CHARACTERISTIC

Figure 2 shows the drain current characteristic of a JFET for gate-to-source voltage equal to
0V. i.e. VGS =0.

Figure 2. JFET drain characteristic curve for VGS =0

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Figure 2 shows the drain current characteristic of a JFET for gate-to-source voltage equal to
0V. Between point A and B, it is the Ohmic region of the JFET. It is the region where the
voltage and current relationship follows ohmss law. At point B, the drain current is at maximum
for
VGS =0 condition and is defined as IDSS. It is the pinch-off point, where there is no increase of
current as drain-to-source voltage VDS is further increased. The VDS voltage at this point is
called pinch-off voltage VP. It is also the voltage point where drain-to-gate voltage VDG
produces enough depletion thickness to narrow the channel so that the resistance of the
channel will increase significantly. Since VGS =0, VDS is also equal to VDG. Thus, in general the
pinch-off voltage VP is

VP= VDS(P) VGS (1)

At point C, the JFET begins to breakdown where ID increases rapidly and it is an irreversible
breakdown.

Active Condition (Pinch-off):

VDS(P) < VGS VGS(off) (2)

The pinch-off curve follows equations (3) which is

(3)
The squared term in the equation results in a nonlinear relationship between ID and VGS,
producing a curve that grows exponentially with decreasing magnitude of VGS, and also known
as a transfer curve. The transfer curve can be obtained using Shockleys equation or from the
drain characteristics as illustrated in Figure 3.

Figure 3: Obtaining the transfer curve from the drain characteristic

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1.3 PROCEDURE

PART 1: FET transfer curve

Figure 4

1. Construct the circuit as shown in Figure 4 both using Multisim and experimentally.
2. Set drain-to-source voltage (VDS) applied to the FET to 8V.
3. Set gate-to-source voltage (VGS) to 0V. Record the current, this is IDSS.
4. Decrease VGS until drain current (ID) become 0A. Record the voltage, this is VGS(off) = VP
(pinch-off voltage).
5. Increase VGS until 0V with steps of 1V and measure the corresponding ID.
6. Record your reading in Table 5.1 and plot the transfer curve.
7. Compare both experimental and simulation results.

PART 2: FET characteristic curve

1. Using the same circuit in Figure 4, set VGS to 0V.

2. Vary VDS from the value given in Table 5.2 and measure the corresponding drain current
(ID).
3. Record the corresponding values of ID for various values of VDS.
4. Repeat the same steps for various values of VGS. Tabulate your reading.
5. Plot the drain characteristic curves.
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1.4 EXPERIMENT RESULTS

Parameter Measured Value

Multisim Experimentally

IDSS [mA], (VGS=0) 10 mA

11.248 mA
VGS(off) [V], (ID=0) 3.7 V
2.713 V
IDSS [mA], (VGS=-1V) 7.13mA 7 mA

IDSS [mA], (VGS=-2V) 3.132mA 3.5 mA

IDSS [mA], (VGS=-3V) 679.456uA 0.7 mA

IDSS [mA], (VGS=-4V) 888.178nA 0A

Table 5.1

ID (mA) VGS = 0V VGS = -1V VGS = -2V VGS = -3V VGS = -4V
VDS=0V 0 mA 0 mA 0 mA 0 mA 0 mA
VDS=0.5V 0.70 mA 0.65 mA 0.50 mA 0.32 mA 0.10 mA
VDS=1V 1.69 mA 1.40 mA 1.10 mA 0.55 mA 0.15 mA
VDS=2V 3.00 mA 2.50 mA 2.05 mA 0.70 mA 0.20 mA
VDS=3V 5.10 mA 3.45 mA 2.60 mA 0.75 mA 0.25 mA
VDS=4V 6.05 mA 5.00 mA 2.60 mA 0.81 mA 0.31 mA
VDS=5V 7.50 mA 5.40 mA 2.60 mA 0.81 mA 0.36 mA
VDS=10V 11.50 mA 5.98 mA 3.00 mA 0.90 mA 0.45 mA
VDS=11V 11.59 mA 5.98 mA 3.00 mA 0.90 mA 0.45 mA
VDS=12V 11.59 mA 5.98 mA 3.00 mA 0.90 mA 0.45 mA

Table 5.2
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Part A(multisim)

when Vgs=0V

when Ids = 0A
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When VGS=-1V

When VGS=-2V

When VGS=-3V
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When VGS=-4V

GRAPH
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TABLE 5.1

TABLE 5.2
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QUESTION

1) The value of IDSS can be found out from the graph ID versus VGS where IDSS is the
y-intercept of the graph. Besides, we can also find IDSS from the graph ID versus VDS
where the value of IDSS is the maximum current of ID at VGS=0.
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DISCUSSION

In this experiment, we had done experiment on JFET ( Junction Field Effect

Transistor) circuit. In a JFET, the current was never pinched off totally but it reached a
saturation level instead .During the experiment, the equipment and component that's been
used were Multisim Software, Power Supply, transistor 2N5486 (NPN) ,Multimeter and
Resistors.
Then we identified each pin in datasheet before started the experiment. Then,
circuit was constructed using Multisim software and experimentally. Next, the circuit has
been turned on the power to measure the voltage ( VGS) and ID (mA) using a multimeter.
After that all the values we have been measure recorded in the table given .Lastly, both
experiment and simulation have been compared. The data between Multisim and
experiment are almost same value for Table 5.1. The transfer curve graph plotted for
experimental and Multisim values.

After we complete the table 5.1, we continue with table 5.2. To find the value in the
table, we use the same circuit. By set the VGS to 0V then vary the VDS value give at the
table to measure corresponding drain current(ID). After that, the values of experimental
recorded in table. Lastly, the drain characteristics curves were plotted based on the values
obtained. From graph, we can see the relationship between ID and VGS, whereby this graph
produce a curve that grows exponentially with decreasing magnitude of VGS which also
known as a transfer curve of drain characteristics. The graph plotted was not straight
because of the not accurate measurement values that obtained.

On doing this experiment we have faced lot of problems such as the transistor not
enough, the transistor pin broken, multimeter not functioning and also connection
problem. even we faced lot of problem we still able to troubleshoot the problem and get
the output.
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CONCLUSION

At the end of the lab session the students are able to observe and explain the characteristics
curve of FET which is the FET transfer curve and FET characteristic curve. Students are
also able to explain the plots of the FET characteristic curve graph of ID versus VDS when
VGS is zero. Students are also able to identify the configuration of FET which is the gate
to source FET and source to gate FET.