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Module 1 : Fundamentals of Power System Protection

Lecture 1 : Introduction

Objectives

In this lecture:

We will provide an overview of electrical energy systems.

Make a case for protection systems.

Describe necessity of apparatus and system protection.

Define a relay element.

Discuss evolution of relays from electromechanical to numerical relay.

Describe functioning of a circuit breaker.

1.1 Overview of Electrical Energy Systems


Electrical energy systems consists of various equipments connected together. Typically, power is
generated at lower voltages (a few kV) (3-phase ac voltage source) which is stepped up by a transformer
and fed into a transmission grid. Thermal power should be generated at pit heads and hydro power at
reservoirs. A transmission grid is a meshed network of high voltage lines and transformers. It can have
multiple voltage levels like 400 kV, 220 kV, etc. The power is delivered to load centers which may be far
off (even thousands of km's apart).

Fig 1.1 shows the western region grid of


India. It can be seen that large amount of
generation is concentrated in the eastern end
while large load centers are concentrated in
the western end. The power is transferred
through the ac network and HVDC lines. At
load centers, voltage levels are stepped
down by step down transformers in multiple
stages and finally power is delivered to the
end user by a distribution system which is
mostly radial (no loops) in nature.

A unique feature of electrical energy systems


is its natural mode of synchronous operation.
It implies that during steady state the
electrical frequency is same all through the
system irrespective of the geographical
location. This closely knits the system
together.

We can perceive all generators acting in tandem like the ballet dancers in a dance.

1.1 Overview of Electrical Energy Systems


They may occupy different angular positions, but all machines rotate at the same electrical speed. This
close knitting implies an embedded interaction of generators through the transmission network which is
governed by the differential and algebraic equations of the apparatus and interconnects. This aspect is
referred to as the system behavior. This system has to be protected from abnormalities which is the task
of protection system.
1.2 Why do we need Protection?
Electrical power system operates at various voltage levels from 415 V to 400 kV or even more. Electrical
apparatus used may be enclosed (e.g., motors) or placed in open (e.g., transmission lines). All such
equipment undergo abnormalities in their life time due to various reasons. For example, a worn out
bearing may cause overloading of a motor. A tree falling or touching an overhead line may cause a fault.
A lightning strike (classified as an act of God!) can cause insulation failure. Pollution may result in
degradation in performance of insulators which may lead to breakdown. Under frequency or over
frequency of a generator may result in mechanical damage to it's turbine requiring tripping of an
alternator. Even otherwise, low frequency operation will reduce the life of a turbine and hence it should be
avoided.

It is necessary to avoid these abnormal operating regions for safety of the equipment. Even more
important is safety of the human personnel which may be endangered due to exposure to live parts under
fault or abnormal operating conditions. Small current of the order of 50 mA is sufficient to be fatal!
Whenever human security is sacrificed or there exists possibility of equipment damage, it is necessary to
isolate and de-energize the equipment. Designing electrical equipment from safety perspective is also a
crucial design issue which will not be addressed here. To conclude, every electrical equipment has to be
monitored to protect it and provide human safety under abnormal operating conditions. This job is
assigned to electrical protection systems. It encompasses apparatus protection and system protection.
1.3 Types of Protection
Protection systems can be classified into apparatus protection and system protection.
1.3.1 Apparatus Protection
Apparatus protection deals with detection of a fault in the apparatus and consequent protection.
Apparatus protection can be further classified into following:

Transmission Line Protection and feeder protection

Transformer Protection

Generator Protection

Motor Protection

Busbar Protection

1.3.2 System Protection


System protection deals with detection of proximity of system to unstable operating region and
consequent control actions to restore stable operating point and/or prevent damage to equipments.
Loss of system stability can lead to partial or complete system blackouts. Under-frequency relays, out-
of-step protection, islanding systems, rate of change of frequency relays, reverse power flow relays,
voltage surge relays etc are used for system protection. Wide Area Measurement (WAM) systems are
also being deployed for system protection. Control actions associated with system protection may be
classified into preventive or emergency control actions.
1.3.2.1Analogy with Functioning of a Human being
A human being is a complex system that performs through various apparatus like legs, hands, eyes,
ears, heart, bones, blood vessels etc. The heart is analogous to an electrical generator and stomach to
the boiler. The eating process provides raw material to generate calories. The power generated is
pumped by heart through a complex network of blood vessels. The primary transmission is through
arteries and veins. Furthermore, distribution is through fine capillaries. The system operator is the brain
which works on inputs of eyes, ears, skin etc. Diagnosing abnormality in any of these organs and taking
remedial measures can be thought of as job of "apparatus protection". However, does this cover the
complete gambit of anomalies? Are fever, infection etc, a specific apparatus problem? Why does it
cause overall deterioration in functioning of the human being?

The answer lies in the fact that the system which encompasses body has also abstraction like the mind.
Overall health is not just an aggregation of apparatus. It is something much more complex. It involves
complex process and associated dynamics (biological, chemical, mechanical etc.) and control. Thus,
protecting a system is not just apparatus protection but something much more. Since we cannot define
this "much more" clearly, it is complex and challenging. Monitoring of system behavior, taking corrective
measures to maintain synchronous operation and protecting the power system apparatus from harmful
operating states is referred as system protection.
1.4 What is a Relay?
Formally, a relay is a logical element
which processes the inputs (mostly
voltages and currents) from the
system/apparatus and issues a trip
decision if a fault within the relay's
jurisdiction is detected. A conceptual
diagram of relay is shown in fig 1.2.

In fig 1.3, a relay R 1 is used to


protect the transmission line under
fault F1 . An identical system is
connected at the other end of the
transmission line relay R 3 to open
circuit from the other ends as well.

To monitor the health of the apparatus, relay senses current through a current transformer (CT), voltage
through a voltage transformer (VT). VT is also known as Potential Transformer (PT).
The relay element analyzes these
inputs and decides whether (a) there
is a abnormality or a fault and (b) if
yes, whether it is within jurisdiction
of the relay. The jurisdiction of relay
R 1 is restricted to bus B where the
transmission line terminates. If the
fault is in it's jurisdiction, relay sends
a tripping signal to circuit
breaker(CB) which opens the circuit.
A real life analogy of the jurisdiction
of the relay can be thought by
considering transmission lines as
highways on which traffic
(current/power) flows.

If there is an obstruction to the regular flow due to fault F1 or F2 , the traffic police (relay R 1 ) can sense
both F1 and F2 obstructions because of resulting abnormality in traffic (power flow). If the obstruction is
on road AB, it is in the jurisdiction of traffic police at R1; else if it is at F2 , it is in the jurisdiction of R 2 . R 1
should act for fault F2 , if and only if, R 2 fails to act. We say that relay R 1 backs up relay R 2 . Standard
way to obtain backup action is to use time discrimination i.e., delay operation of relay R 1 in case of doubt
to provide R 2 first chance to clear the fault.
1.5 Evolution of Relays
If we zoom into a relay, we see three different types of realizations:

Electromechanical Relays

Solid State Relays

Numerical Relays

1.5.1 Electromechanical Relays


When the principle of electromechanical energy
conversion is used for decision making, the relay is
referred as an electromechanical relay. These relays
represent the first generation of relays. Let us consider a
simple example of an over current relay, which issues a
trip signal if current in the apparatus is above a
reference value. By proper geometrical placement of
current carrying conductor in the magnetic field, Lorentz
force is produced in the operating coil.

This force is used to create the operating torque. If


constant 'B' is used (for example by a permanent
magnet), then the instantaneous torque produced is
proportional to instantaneous value of the current. Since
the instantaneous current is sinusoidal, the
instantaneous torque is also sinusoidal which has a zero
average value. Thus, no net deflection of operating coil is
perceived.

On the other hand, if the B is also made proportional to


the instantaneous value of the current, then the
instantaneous torque will be proportional to square of
the instantaneous current (non-negative quantity). The
average torque will be proportional to square of the rms
current. Movement of the relay contact caused by the
operating torque may be restrained by a spring in the
overcurrent relay. If the spring has a spring constant 'k',
then the deflection is proportional to the operating
torque (in this case proportional to ). When the
deflection exceeds a preset value, the relay contacts
closes and a trip decision is issued. Electromechanical
relays are known for their ruggedness and immunity to
Electromagnetic Interference (EMI).

1.5 Evolution of Relays


1.5.2Solid State Relays

With the advent of transistors, operational amplifiers etc, solid state relays were developed. They realize
the functionality through various operations like comparators etc. They provide more flexibility and have
less power consumption than their electromechanical counterpart. A major advantage with the solid state
relays is their ability to provide self checking facility i.e. the relays can monitor their own health and raise
a flag or alarm if its own component fails. Some of the advantages of solid state relays are low burden,
improved dynamic performance characteristics, high seismic withstand capacity and reduced panel space.

Relay burden refers to the amount of volt amperes (VA) consumed by the relay. Higher is this value,
more is the corresponding loading on the current and voltage sensors i.e. current transformers (CT) and
voltage transformers (VT) which energizes these relays. Higher loading of the sensors lead to deterioration
in their performance. A performance of CT or VT is gauged by the quality of the replication of the
corresponding primary waveform signal. Higher burden leads to problem of CT saturation and inaccuracies
in measurements. Thus it is desirable to keep CT/VT burdens as low as possible.

These relays have been now superseded by the microprocessor based relays or numerical relays.

1.5.3Numerical Relays
The block diagram of a numerical
relay is shown in fig 1.5.

It involves analog to digital (A/D)


conversion of analog voltage and
currents obtained from secondary of
CTs and VTs. These current and
voltage samples are fed to the
microprocessor or Digital Signal
Processors (DSPs) where the
protection algorithms or programs
process the signals and decide
whether a fault exists in the
apparatus under consideration or
not. In case, a fault is diagnosed, a
trip decision is issued. Numerical
relays provide maximum flexibility
in defining relaying logic.
1.5 Evolution of Relays
1.5.3Numerical Relays
The hardware comprising of numerical relay can be made scalable i.e., the maximum number of v and i
input signals can be scaled up easily. A generic hardware board can be developed to provide multiple
functionality. Changing the relaying functionality is achieved by simply changing the relaying program or
software. Also, various relaying functionalities can be multiplexed in a single relay. It has all the
advantages of solid state relays like self checking etc. Enabled with communication facility, it can be
treated as an Intelligent Electronic Device (IED) which can perform both control and protection
functionality. Also, a relay which can communicate can be made adaptive i.e. it can adjust to changing
apparatus or system conditions. For example, a differential protection scheme can adapt to transformer
tap changes. An overcurrent relay can adapt to different loading conditions. Numerical relays are both
"the present and the future". Hence, in this course, our presentation is biased towards numerical relaying.
This also gives an algorithmic flavour to the course.
1.6 What is a Circuit Breaker?
A Circuit Breaker (CB) is basically a switch used to interrupt the flow of current. It opens on relay
command. The relay command initiates mechanical separation of the contacts. It is a complex element
because it has to handle large voltages (few to hundreds of kV's) and currents (in kA's). Interrupting
capacity of the circuit breaker is therefore expressed in MVA.

Power systems under fault behave more like inductive circuits. X/R ratio of lines is usually much greater
than unity. For 400 kV lines, it can be higher than 10 and it increases with voltage rating. From the
fundamentals of circuit analysis, we know that current in an inductive circuit (with finite resistance) cannot
change instantaneously. The abrupt change in current, if it happens due to switch opening, will result in
infinite di/dt and hence will induce infinite voltage. Even with finite di/dt, the induced voltages will be
quite high. The high induced voltage developed across the CB will ionize the dielectric between its
terminals. This results in arcing. When the current in CB goes through the natural zero, the arc can be
extinguished (quenched). However, if the interrupting medium has not regained its dielectric properties
then the arc can be restruck. The arcing currents reduce with passage of time and after a few cycles the
current is finally interrupted.

Usually CB opening time lies in the 2-6 cycles range. CBs are categorized by the interrupting medium
used. Minimum oil, air blast, vacuum arc and SF 6 CBs are some of the common examples. CB opening
mechanism requires much larger power input than what logical element relay can provide. Hence, when
relay issues a trip command, it closes a switch that energizes the CB opening mechanism powered by a
separate dc source (station battery). The arc struck in a CB produces large amount of heat which also has
to be dissipated.
Review Questions

1. What are the two types of protection?

2. Why is system protection required?


3. What are the functions of a relay and a circuit breaker?
4. Describe various generation of relays.

5. In fig 1.5, why is a resistor connected across CT secondary?


Recap

In this lecture we have learnt the following:

Necessity of a protection system.

Three generations of relays.

Role of Circuit Breaker.

Types of protection i.e. apparatus protection and system protection.


Module 1 : Fundamentals of Power System Protection

Lecture 2 : Protection Paradigms - Apparatus Protection

Objectives

In this lecture we will introduce the following:

Principle of overcurrent protection.

Principle of directional overcurrent protection.

Principle of distance protection.

Principle of differential protection.

For simplicity in explaining the key ideas, we consider three phase bolted faults. Generalization of different
fault types

will be discussed in subsequent lectures.

2.1 Overcurrent Protection

This scheme is based on the intuition


that, faults typically short circuits,
lead to currents much above the load
current. We can call them as
overcurrents. Over current relaying
and fuse protection uses the principle
that when the current exceeds a
predetermined value, it indicates
presence of a fault (short circuit). This
protection scheme finds usage in
radial distribution systems with a
single source. It is quite simple to
implement.
Fig 2.1 shows a radial distribution system with a single source. The fault current is fed from only one end
of the feeder. For this system it can be observed that:

To relay R 1 , both downstream faults F1 and F2 are visible i.e. I F1 as well as I F2 pass through CT of R 1 .

To relay R 2 , fault F1 , an upstream fault is not seen, only F2 is seen. This is because no component of I F1
passes

through CT of R 2 . Thus, selectivity is achieved naturally. Relaying decision is based solely on the
magnitude of fault current. Such a protection scheme is said to be non-directional.

2.2 Directional Overcurrent Protection


In contrast, there can be situations where for the purpose of selectivity, phase angle information (always
relative to a reference phasor) may be required. Fig 2.2 shows such a case for a radial system with source
at both ends. Consequently, fault is fed from both the ends of the feeder. To interrupt the fault current,
relays at both ends of the feeder are required.

In this case, from the magnitude of the current seen by the relay R 2 , it is not possible to distinguish
whether the fault is in the section AB or BC. Since faults in section AB are not in its jurisdiction, it should
not trip. To obtain selectivity, a directional overcurrent relay is required. It uses both magnitude of current
and phase angle information for decision making. It is commonly used in subtransmission networks where
ring mains are used.
2.3 Distance Protection
Consider a simple radial system, which is fed from a
single source. Let us measure the apparent impedance
(V/I) at the sending end. For the unloaded system, I =
0, and the apparent impedance seen by the relay is
infinite. As the system is loaded, the apparent
impedance reduces to some finite value (ZL +Z line)
where Z L is the load impedance and Z line is the line
impedance. In presence of a fault at a per-unit
distance ‘m', the impedance seen by the relay drops
to a mZline as shown in fig 2.3.

The basic principle of distance relay is that the apparent impedance seen by the relay, which is defined as
the ratio of phase voltage to line current of a transmission line (Zapp ), reduces drastically in the presence
of a line fault. A distance relay compares this ratio with the positive sequence impedance (Z 1 ) of the
transmission line. If the fraction Z app /Z1 is less than unity, it indicates a fault. This ratio also indicates the
distance of the fault from the relay. Because, impedance is a complex number, the distance protection is
inherently directional. The first quadrant is the forward direction i.e. impedance of the transmission line to
be protected lies in this quadrant. However, if only magnitude information is used, non-directional
impedance relay results. Fig 2.4 and 2.5 shows a characteristic of an impedance relay and ‘mho relay'
both belonging to this class. The impedance relay trips if the magnitude of the impedance is within the
circular region. Since, the circle spans all the quadrants, it leads to non-directional protection scheme. In
contrast, the mho relay which covers primarily the first quadrant is directional in nature.

Thus, the trip law for the impedance relay can be written as follows:

, then trip; else restrain. While impedance relay has only one design parameter, Z set ;

'mho relay' has two design parameters Z n , . The trip law for mho relay is given by if
, then trip; else restrain. As shown in the fig 2.5 ' ' is the angle of transmission

line. Based upon legacy of electromechanical relays ' ' is also called 'torque angle'.

2.3 Distance Protection

2.3.1 Example
Find out the value of Zn for a mho relay with torque angle which has to give 100% protection to a
1. (a)
50 km long
110kV transmission line with impedance per km and angle .
Ans: The two design parameters of a mho relay are Zn and . Here the torque angle, of the relay has
been selected as .
The transmission line impedance as on primary

where Rc, CT ratio = 200


Rv, VT ratio = 1000

where angle of transmission line

, this value is to be set on the mho relay.

If the maximum load on this line is 1000A at lagging, is there any possibility of relay tripping on
(b)
load? CT ratio is
1000:5
Ans: Maximum Load current = 1000A

Since this value will not fall within the operating circle, the mho relay will not trip for this load.
2.4 Principle of Differential Protection
Differential protection is based on the fact that any fault within an electrical equipment would cause the
current entering it, to be different, from the current leaving it. Thus by comparing the two currents either
in magnitude or in phase or both we can determine a fault and issue a trip decision if the difference
exceeds a predetermined set value.
2.4.1 Differential Protection for Transmission Line
Fig 2.6 shows a short
transmission line in which
shunt charging can be
neglected. Then under no
fault condition, phasor sum
of currents entering the
device is zero i.e.

Thus, we can say that


differential current under no
fault condition is zero.
However in case of fault in
the line segment AB, we get
i.e. differential current in
presence of fault is non-
zero.

This principle of checking the differential current is known as a differential protection scheme. In case of
transmission line, implementation of differential protection requires a communication channel to transmit
current values to the other end. It can be used for short feeders and a specific implementation is known
as pilot wire protection. Differential protection tends to be extremely accurate. Its zone is clearly
demarcated by the CTs which provide the boundary.
2.4 Principle of Differential Protection

2.4.1 Differential Protection for Transmission Line (Tapped Line)

Differential protection can be used for tapped lines (multiterminal lines) where boundary conditions are
defined as follows:

Under no fault condition:

Faulted condition:

2.4 Principle of Differential Protection


Differential protection for detecting faults is an attractive option when both ends of the apparatus are
physically located near each other. e.g. on a transformer, a generator or a bus bar.
2.4.2 Differential Protection for Transformer
Consider an ideal
transformer with the CT
connections, as shown in
fig 2.8. To illustrate the
principle let us consider
that current rating of
primary winding is 100A
and secondary winding is
1000A. Then if we use
100:5 and 1000:5 CT on
the primary and
secondary winding, then
under normal (no fault)
operating conditions the
scaled CT currents will
match in magnitudes. By
connections the primary
and secondary CTs with
due care to the dots
(polarity markings), a
circulating current can be
set up as shown by dotted
line.
No current will flow through the branch having overcurrent current relay because it will result in violation
of KCL. Now if an internal fault occurs within the device like interturn short etc., then the normal mmf
balance is upset i.e. . Under this condition, the CT secondary currents of primary and
secondary side CTs will not match. The resulting differential current will flow through overcurrent relay. If
the pick up setting of overcurrent relay is close to zero, it will immediately pick up and initiate the trip
decision.

In practice, the transformer is not ideal. Consequently, even if , it is the magnetization


current or (no load) current. Thus, a differential current always flows through the overcurrent relay.
Therefore overcurrent relay pick up is adjusted above the no load current value. Consequently, minute
faults below no load current value cannot be detected. This compromises sensitivity.
2.4 Principle of Differential Protection
2.4.3Differential Protection for Busbar
Ideally, differential protection is the solution for the bus-bar protection.

Figure 2.8 illustrates the basic idea. If the fault is external to the bus, it can be seen that algebraic sum of
the currents entering the bus is zero.
On the other hand, if fault is on the bus (internal fault), this sum is not zero.

Thus, differential protection can be used to protect a bus.

Review Questions

1. Why is phase angle information required to protect a radial system with source at both ends?

2. Discuss the basic principle of distance protection.

3. How is differential protection scheme used in the following:

(1) Transmission line protection.

(2) Transformer protection.

(3) Busbar protection.

For the tapped line (fig 2.6), no relays are provided at the tapping point. Can you explain reasons for the
4.
same?

Recap

In this lecture we have learnt the following:

Principle of overcurrent protection.

Principle of distance protection.

Principle of directional overcurrent protection.

Differential protection.

Applications to apparatus protection.


Module 1 : Fundamentals of Power System Protection

Lecture 3 : Protection Paradigms - System Protection

Objectives

In this lecture we will:

Overview dynamics in power systems.

Introduce system protection relays like underfrequency relays, rate of change of frequency relays, reverse
- power flow

relays etc.

Give a brief introduction to lightning protection.

3.1Overview of Power System Dynamics


Usually, system protection requires study of the system dynamics and control. To understand
issues in system protection, we overview dynamical nature of the power system. Power system
behavior can be described in terms of differential and algebraic system of equations. Differential equations
can be written to describe behaviour of generators, transmission lines, motors, transformers etc. The
detailing depends upon the time scale of investigation.

Figure 3.1 shows the various time scales involved in modelling system dynamics. The dynamics involved in
switching, lightening, load rejection etc have a high frequency component which die down quickly. In
analysis of such dynamics, differential equations associated with inductances and capacitances of
transmission lines have to be modelled. Such analysis is restricted to a few cycles. It is done by
Electromagnetic Transient Program (EMTP).

At a larger time scale (order of seconds), response of the electromechanical elements is perceived. These
transients are typically excited by faults which disturb the system equilibrium by upsetting the generator-
load balance in the system. As a consequence of fault, electrical power output reduces instantaneously while
the mechanical input does not change instantaneously. The resulting imbalance in power (and torque) excites
the electromechanical transients which are essentially slow because of the inertia of the mechanical elements
(rotor etc).

Detection and removal of fault is the task of the protection system (apparatus protection). Post-fault, the
system may or may not return to an equilibrium position. Transient stability studies are required to
determine the post fault system stability. In practice, out-of-step relaying, under frequency load shedding,
islanding etc are the measures used to enhance system stability and prevent blackouts. The distinction
between system protection and control (e.g. damping of power swings) is a finer one. In the today's world of
Integrated Control and Protection Systems (ICPS), this distinction does not make much sense. In this
lecture, we discuss these issues from distribution system perspective. In the next lecture, a transmission
system perspective will be discussed.
3.2 System Protection Relays
Consider a medium voltage distribution
system having local generation (e.g., captive
power generation) as shown in fig 3.2 which
is also synchronized with the grid. During
grid disturbance, if plant generators are not
successfully isolated from the grid, they also
sink with the grid, resulting in significant loss
in production and damage to process
equipments. The following relays are used to
detect such disturbances, its severity and
isolate the inplant system from the grid.

Underfrequency and over frequency relays.

Rate of change of frequency relays.

Under voltage relays.

Reverse power flow relays.

Vector shift relays.

3.2 System Protection Relays


3.2.1 Underfrequency Relay and Rate of Change of Frequency Relay

In case of a grid failure (fig. 3.3), captive


generators tend to supply power to other
consumers connected to the substation. The
load-generation imbalance leads to fall in
frequency. The underfrequency relay R
detects this drop and isolates local generation
from the grid by tripping breaker at the point
of common coupling. After disconnection from
the grid, it has to be ascertained that there is
load-generation balance in the islanded
system. Because of the inertia of the
machines, frequency drops gradually. To
speed up the islanding decision, rate of
change of frequency relays are used.

3.2.2 Undervoltage Relay


Whenever there is an uncleared fault on the grid close to the plant, the plant generators tend to feed the
fault, and the voltages at the supply point drops. This can be used as a signal for isolating from the grid.
3.2.3 Reverse Power Relay
Distribution systems are radial in nature. This holds true for both utility and plant distribution systems. If
there is a fault on the utility's distribution system, it may trip a breaker thereby isolating plant from the
grid. This plant may still remain connected with downstream loads as shown in fig 3.4 and 3.5.
Consequently, power will flow from the plant generator to these loads.

If in the prefault state, power was being fed to the plant, then this reversal of power flow can be used to
island the plant generation and load from the remaining system. This approach is useful to detect loss of
grid supply whenever the difference between load and available generation is not sufficient to obtain an
appreciable rate of change of frequency but the active power continues to flow into the grid to feed the
external loads.

Example
In fig 3.4, consider that the plant imports at all times a minimum power of 5 MW. Studies indicate that for
various faults in utility side, minimum power export from the plant generator is 0.5 MW. Deduce the
setting of reverse power relay. If the plant generator is of 50 MW capacity, what is likelihood of
underfrequency or rate of change of frequency relay picking up on such faults?
Ans: Reverse power flow relay can be set to 0.4 MW. Since minimum reverse power flow is 1% of plant
capacity, it is quite likely, that utility disconnection may not be noticed by underfrequency or the rate of
change of frequency relays.
Vector shift relays and system protection schemes in transmission systems will be discussed in more
details in later lectures.

3.3 Lightning Protection


Many line outages result from lightning strokes that hit overhead
transmission lines. Lightning discharges normally produce
overvoltage surges which may last for a fraction of second and are
extremely harmful. The line outages can be reduced to an
acceptable level by protection schemes like installation of earth wires
and earthing of the towers.
Lightning overvoltages can be classified as follows:
Induced overvoltages which occur when lightning strokes reach the ground near the line.

Overvoltages due to shielding failures that occur when lightning strokes reach the phase conductors.

Overvoltages by back flashovers that occur when lightning stroke reaches the tower or the shield wire.

The most commonly used devices for protection against lightning surges are the following:

Shielding by earth wires: Normally, transmission lines are equipped with earth wires to shield against
lightning

discharges. The earthwires are placed above the line conductor at such a position that the lightning
strokes are intercepted by them. In addition to this, earthing of tower is also essential.

Lightning Arrestors: An alternative to the use of earthwire for protection of conductors against direct
lightning strokes is

to use lightning arrestors in parallel to insulator strings. Use of lightning arrestors is more economical
also.
ZnO varistor is commonly used as lightning arrestor because of its peculiar resistance characteristic. Its
resistance varies with applied voltage, i.e, its resistance is a nonlinear inverse function of applied voltage.
At normal voltage its resistance is high. But when high voltage surges like lightning strokes appear across
the varistor, its resistance decreases drastically to a very low value and the energy is dissipated in it,
giving protection against lightning.

Review Questions

1. Describe various system protection relays in use.

2. What are the functions of an underfrequency relay?

3. Explain the functioning of reverse power flow relay.

4. How transmission lines are protected against lightning?

5. Explain the functioning of ZnO varistor.

Recap

In this lecture we have learnt the following:

Dynamics in power systems.

Various system protection relays like underfrequency relays, rate of change of frequency relays, reverse
power flow
relay, under voltage relay etc.

Lightning protection.
Module 1 : Fundamentals of Power System Protection

Lecture 4 : Desirable Attributes of Protection

Objectives

In this lecture we will learn the following desirable attributes of protection system viz:

Dependability.

Security.

Sensitivity.

Selectivity.

Reliability.

Necessity of speed in relaying.

Speed vs. accuracy conflict.

A protection system is characterized by following two important parameters:

Dependability

Security

4.1 Dependability
A relay is said to be dependable if it trips only when it is expected to trip. This happens either when the
fault is in it's primary jurisdiction or when it is called upon to provide the back-up protection. However,
false tripping of relays or tripping for faults that is either not within it's jurisdiction, or within it's purview,
compromises system operation. Power system may get unnecessarily stressed or else there can be loss
of service. Dependability is the degree of certainty that the relay will operate correctly:

Dependability can be improved by increasing the sensitivity of the relaying system.


4.1.1 Sensitivity
For simplicity, consider the case of overcurrent protection. The protective system must have ability to
detect the smallest possible fault current. The smaller the current that it can detect, the more sensitive it
is. One way to improve sensitivity is to determine characteristic signature of a fault. It is unique to the
fault type and it does not occur in the normal operation. For example, earth faults involve zero sequence
current. This provide a very sensitive method to detect earth faults. Once, this signature is seen,
abnormality is rightly classified and hence appropriate action is initialized.
4.2 Security
On the other hand, security is a property used to characterize false tripping on the relays. A relay is said
to be secure if it does not trip when it is not expected to trip. It is the degree of certainty that the relay
will not operate incorrectly:
False trips do not just create nuisance. They can even compromise system security. For example, tripping
of a tie-line in a two area system can result in load-generation imbalance in each area which can be
dangerous. Even when multiple paths for power flow are available, under peak load conditions, overloads
or congestion in the system may result. Dependability and security are contrasting requirements.
Typically, a relay engineer biases his setting towards dependability. This may cause some nuisance
tripping, which can in the worst case, trigger partial or complete blackout! Security of the relaying system
can be improved by improving selectivity of the relaying system.
4.2.1 Selectivity
Like sensitivity, selectivity also
implies an ability to discriminate. A
relay should not confuse some
peculiarities of an apparatus with a
fault. For example, transformer when
energized can draw up to 20 times
rated current (inrush current) which
can confuse, both overcurrent and
transformer differential protection.
Typically, inrush currents are
characterized by large second
harmonic content.

This discriminant is used to inhibit relay operation during inrush, there by, improving selectivity in
transformer protection. Also, a relay should be smart enough, not just to identify a fault but also be able
to decide whether fault is in it's jurisdiction or not. For example, a relay for a feeder should be able to
discriminate a fault on it's own feeder from faults on adjacent feeders. This implies that it should detect
first existence of fault in it's vicinity in the system and then take a decision whether it is in it's jurisdiction.
Recall that directional overcurrent relay was introduced to improve selectivity of overcurrent relay.

This jurisdiction of a relay is also called as zone of protection . Typically, protection zones are classified
into primary and backup zones. In detecting a fault and isolating the faulty element, the protective
system must be very selective. Ideally, the protective system should zero-in on the faulty element and
only isolate it, thus causing a minimum disruption to the system. Selectivity is usually provided by (1)
using time discrimination and (2) applying differential protection principle. With overcurrent and distance
relays, such boundaries are not properly demarcated (see fig 4.1). This is a very important consideration
in operation of power systems.
4.2 Security (contd..)
4.2.1Selectivity

However with a differential protection the CT location provides 'crisp' demarcation of zone of protection of
CT (see fig 4.2). The fault F1 is in the relay's zone of protection, but fault F2 is not in its jurisdiction.
Because differential protection scheme do not require time discrimination to improve selectivity, they are
essentially fast. These aspects will be discussed in more detail in the later lectures.

4.3 Reliability

A relaying system has to be reliable. Reliability can be achieved by redundancy i.e. duplicating the
relaying system. Obviously redundancy can be a costly proposition. Another way to improve reliability is
to ask an existing relay say, protecting an apparatus A to backup protection of apparatus B. Both the
approaches are used (simultaneously) in practice. However, it is important to realize that back-up
protection must be provided for safe operation of relaying system. Redundancy in protection also depends
upon the criticality of the power apparatus. For example, a 400 kV transmission line will have independent
(duplicated) protection using same or a different philosophy; on the other hand, a distribution system will
not have such local back-up. A quantitative measure for reliability is defined as follows:

4.3 Reliability (contd..)


4.3.1 Example
The performance of an overcurrent relay was monitored over a period of one year. It was found that the
relay operated 14 times, out of which 12 were correct trips. If the relay failed to issue trip decision on 3
occasions, compute dependability, security and reliability of the relay.
Number of correct trips = 12
Number of desired trips = 12 + 3 = 15

Note that even though dependability and security are individually above 80%, overall reliability much
poor (only 70.55%).
4.3 Reliability

Note that number of desired trips can be greater than or equal to number of correct trips. A desired trip
may not happen for various reasons like, the fault level being below the relaying sensitivity, stuck circuit
breaker, incorrect setting of relays poor maintenance of circuit breaker etc.

Zone of Protection
A relay's zone of protection is a region defined by relay's jurisdiction (see fig 4.3). It is shown by
demarcating the boundary. This demarcation for differential protection is quite crisp and is defined by
CT's location. On the other hand, such boundaries for overcurrent and distance relays are not very crisp.
It is essential that primary zones of protection should always overlap to ascertain that no position of the
system ever remains unprotected. It can be seen in fig 4.3. This overlap also accounts for faults in the
circuit breakers. To provide this overlap additional CTs are required.
4.4 Necessity of Speed in Relaying

To maximize safety, and minimize equipment damage and system instability, a fault should be cleared as
quickly as possible. This implies that relay should quickly arrive at a decision and circuit breaker
operation should be fast enough. Typically, a fast circuit breaker would operate in about two cycles. A
reasonable time estimate for ascertaining presence of fault is one cycle. This implies approximately three
cycle fault clearing time for primary protection. On the other hand, if five cycle circuit breaker is used,
fault clearing time increases to six cycles. So long as short circuit fault exist in a transmission system, the
electrical output of generator remains below the mechanical input. If a bolted three phase fault occurs
close to generator terminal (fig 4.4), P e = 0. Thus, as per equation (1) with input P m; the generator
accelerates.

--- (1)

4.4 Necessity of Speed in Relaying (contd..)


Fig 4.5 shows the pre and post fault
characteristics for the single machine
infinite bus system shown in fig 4.4. Initial
operating point A is on the pre fault
characteristic. Occurrence of fault reduces
P e to 0. The power generation imbalance
accelerates generator and hence its
(power angle) increases. At point C the
fault is cleared by tripping the faulted line
and the system moves to post fault
characteristics. The power output jumps to
point D. Now P e > P m and the machine
decelerates.
At point E, is equal to zero
and the extreme point of swing is reached.
As P e > P m, the deceleration continues
and hence the rotor starts retarding. At
point O, P e = P m the acceleration is zero,
but machine speed is lower than nominal
speed . Consequently, the
angle continues to fall back.

However, as reduces further, P e also


reduces, therefore P m - P e > 0 and the
generator starts accelerating. This arrests
the drop in at point F and the swing
reverses, again a consequence of
acceleration. In absence of damping, these
oscillations will recur just like oscillation of
a simple pendulum. However, because of
damping provided by generator, the
oscillations reduce in magnitude and finally
system settles to equilibrium at point O.
Click Here for Simulation

4.4 Necessity of Speed in Relaying (contd..)

It should be obvious that interval BC is


dependent on fault clearing time of the
protection system. The shaded area
ABCC 1 is the acceleration area and
area C 1 DEE 1 the deceleration area. As
per equal area criteria, the post fault
system reaches stable equilibrium if
accelerating area equals to the
decelerating area. The limit point for
deceleration is defined by point G the
intersection point of P m0 and the post
fault characteristic.
If the swing of generator exceeds beyond point G, the generator moves from deceleration to acceleration
region. Then, its angle continues to rise indefinitely, and the machine is said to go out-of-step. If any
machine goes out-of-step with rest of system it has to be islanded. Out-of-step condition in a multi
machine system can be simulated by transient stability program. Detection in real-time is a much more
challenging task and it is dealt by ‘out-of-step relaying' schemes. When a multi machine system is
islanded in to different sub-systems, then for stable operation of each sub-system, it is necessary that
each sub-system should have generation load balance. Fig 4.6, however it should be obvious by now that
from the stability perspective, transmission system protection should be made as fast as possible. As the
fault clearing time increases, the stability margin (area EE 1 G) reduces. The fault clearing time at which
the stability margin reduces to zero is called the critical clearing time.
4.4.1 Speed Vs. Accuracy Conflict
Intuition tells us that quickness is an invitation to disaster. The possible consequences of quick tripping
decisions are:

Nuisance Tripping

Tripping for faults outside the relay jurisdiction.

Nuisance tripping is the tripping


when there is no fault, e.g. an
overcurrent relay tripping on load. It
compromises faith in the relaying
system due to unnecessary loss of
service. On the other hand, tripping
on faults that are outside the relay's
jurisdiction also cause an
unwarranted loss of service in the
healthy parts of the system.

It has to be mentioned that speed


and accuracy bear an inverse
relationship. The high-speed systems
tend to be less accurate for the
simple reason that a high speed
system has lesser amount of
information available at it's disposal
for making decision.
Thus, the protection engineer has to strike a balance between these two incompatible requirements.
Innovations in protection are essentially driven by such requirements. The ways to tackle this conflict will
become clear as we proceed into future lectures.
Review Questions
1. How is reliability achieved in a protective system?
2. Distinguish between dependability and security of a relay.
3. How is selectivity criteria provided in
(a) Overcurrent protection scheme
(b) Differential protection scheme.
4. Why is high speed system said to be less accurate?
The performance of a distance relay was monitored over a period of 2 years. It was found that it operated
5.
15 times,
12 were desired trips due to faults in its jurisdiction. It was found that relay failed to issue trip decision on
2 occasions.
Compute dependability and security for the relay.
6. Define the following terms
(a) % Dependability
(b) % Security
(c) % Reliability

Recap

In this lecture we have learnt the following desirable attributes of protection system viz:
Dependability

Security

Sensitivity

Selectivity

Reliability

Necessity of speed in relaying

Speed vs. accuracy conflict

Congratulations, you have finished Lecture 4. To view the next lecture select it from the left hand side
menu of the page
Module 2 : Current and Voltage Transformers

Lecture 5 : Introduction to CT

Objectives

In this lecture we will

Introduce CT.

Derive equivalent circuit of CT.

Discuss classifications of CTs.

5.1 Introduction

Practically all electrical measurements and relaying decisions are derived from current and voltage signals.
Since relaying hardware works with smaller range of current (in amperes and not kA) and voltage (volts
and not kV), real life signals (feeder or transmission line currents) and bus voltages have to be scaled to
lower levels and then fed to the relays. This job is done by current and voltage transformers (CTs and
VTs). CTs and VTs also electrically isolate the relaying system from the actual power apparatus. The
electrical isolation from the primary voltage also provides safety of both human personnel and the
equipment. Thus,

CT and VTs are the sensors for the relay.

CT and VT function like ‘ears' and the ‘eyes' of the protection system. They listen to and observe all
happening in the

external world. Relay itself is the brain which processes these signals and issues decision commands
implemented by circuit breakers, alarms etc.

Clearly, quality of the relaying decision depends upon ‘faithful' reproduction on the secondary side of the
transformer. In this module, we will learn a lot more about these devices. In particular, we will answer the
following questions:

How is a CT different from the normal transformer?

How to decide the CT specifications?

How to ascertain that CT is functioning as desired i.e., performance analysis?

5.2 Equivalent Circuit of CT

To begin with, equivalent circuit


of a CT is not much different
from that of a regular
transformer (fig 5.1). However, a
fundamental difference is that
while regular power transformers
are excited by a voltage source,
a current transformer has current
source excitation. Primary
winding of the CT is connected in
series with the transmission line.
The load on the secondary side is
the relaying burden and the lead
wire resistance.

Total load in ohms that is


introduced by CT in series with
the transmission line is
insignificant and hence, the
connection of the CT does not
alter current in the feeder or the
power apparatus at all. Hence
from modeling perspectives it is
reasonable to assume that CT
primary is connected to a current
source. Therefore, the CT
equivalent circuit will look as
shown in fig 5.2. The remaining
steps in modeling are as follows:
As impedance in series with the current source can be neglected, we can neglect the primary winding
resistance and
leakage reactance in CT modeling.

For the convenience in analysis, we can shift the magnetizing impedance from the primary side to the
secondary side of

the ideal transformer.


5.2 Equivalent Circuit of CT

After application of the above


steps, the CT equivalent circuit
is as shown in the fig 5.3. Note
that the secondary winding
resistance and leakage
reactance is not neglected as it
will affect the performance of
CT. The total impedance on the
secondary side is the sum of
relay burden, lead wire
resistance and leakage
impedance of secondary
winding. Therefore, the voltage
developed in the secondary
winding depends upon these
parameters directly.

The secondary voltage developed by the CT has to be monitored because as per the transformer emf
equation, the flux level in the core depends upon it. The transformer emf equation is given by,

where is the peak sinusoidal


flux developed in the core. If
corresponding to this flux is
above the knee point, it is more
or less obvious that the CT will
saturate. During saturation, CT
secondary winding cannot
replicate the primary current
accurately and hence, the
performance of the CT
deteriorates.

Thus, we conclude that in


practice, while selecting a CT we
should ascertain that it should
not saturate on the sinusoidal
currents that it would be
subjected to.

Use of numerical relays due to their very small burden vis-a-vis solid state and electromechanical relays,
improves the CT performance. CT is to be operated always in closed condition. If the CT is open circuited,
all the current I p /N, would flow through X m. This will lead to the development of dangerously high level of
voltage in secondary winding which can even burn out the CT.

We can further, simplify the equivalent circuit of a CT by transferring the current source (through the ideal
transformer) to the secondary side. Thus, the equivalent circuit of the CT is as shown in fig 5.4.
5.2 Equivalent Circuit
5.2.1Equivalent circuit of saturated CT

One of the major problems faced by the protection


systems engineer is the saturation of CT on large ac
currents and dc offset current present during the
transient. When the CT is saturated, primary current
source cannot be faithfully reflected to the secondary
side. In other words, we can open circuit the current
source in fig 5.4. Also, the magnetizing impedance falls
down during saturation. Then the transformer behaves
more like an air core device, with negligible coupling
between the primary and secondary winding. The high
reluctance due to the air path implies that the
magnetizing impedance (inductance) falls down. The
corresponding equivalent circuit is shown in fig 5.5.

5.3 Classification of CTs

The CTs can be classified into following types:

Measurement CTs

Protection CTs

A measurement grade CT has much lower VA capacity than a protection grade CT. A measurement CT has
to be accurate over its complete range e.g. from 5% to 125% of normal current. In other words, its
magnetizing impedance at low current levels. (and hence low flux levels) should be very high. Note that
due to non-linear nature of B-H curve, magnetizing impedance is not constant but varies over the CT's
operating range. It is not expected to give linear response (secondary current a scaled replica of the
primary current) during large fault currents.

In contrast, for a protection grade CT, linear response is expected up to 20 times the rated current. Its
performance has to be accurate in the range of normal currents and upto fault currents. Specifically, for
protection grade CT's magnetizing impedance should be maintained to a large value in the range of the
currents of the order of fault currents.
When a CT is used for both the purposes, it has to be of required accuracy class to satisfy both accuracy
conditions of measurement CTs and protection CTs. In other words, it has to be accurate for both very
small and very large values of current. Typically, CT secondary rated current is standardized to 1A or 5A
(more common).

However, it would be unreasonable to assume that the linear response will be independent of the net
burden on the CT secondary. For simplicity, we refer to the net impedance on the secondary side
(neglecting magnetizing impedance) as the CT burden. It is quite obvious that the driving force
required to drive the primary current replica will increase as this burden increases. If this voltage exceeds
the designer's set limits, then the CT core will saturate and hence linear response will be lost. Hence,
when we say that a CT will give linear response up to 20 times the rated current, there is also an implicit
constraint that the CT burden will be kept to a low value. In general, name-plate rating specifies a voltage
limit on the secondary (e.g., 100 V) up to which linear response is expected. If the CT burden causes this
voltage to be exceeded, CT saturation results.

5.3 Classification of CTs


5.3.1 ANSI / IEEE classification
ANSI/IEEE standards classify CTs into two types:

Class T CT

Class C CT

5.3.1.1Class T CTs

Typically, a class T CT is a wound type CT with one


or more primary turns wound on a core. It is
associated with high leakage flux in the core.
Because of this, the only way to determine it's
performance is by test. In other words,
standardized performance curves cannot be used
with this types of CTs.

Figure 5.6 shows one such experimentally


calibrated curve for a CT. The letter ‘B' indicates
the burden in ohms to which the CT is subjected. It
is seen that when burden is less than say 0.1
ohms, CT meets the linear performance criterion.
However, as the burden increases to 0.5 ohms, the
corresponding linearity criteria is not met till the
end. At 4 ohms burden, there is significant
deviation from the linear response. A general rule
of thumb is that, one should try to keep the CT
burden as low as possible.
Ratio Error: CT performance is usually gauged from the ratio error. The ratio error is the percentage
deviation in the current magnitude in the secondary from the desired value. In other words, if the
current measured in the secondary is I s , true or actual value is I p /N, where N is nominal ratio (e.g. N

for a 100:5 CT is 20) and I p is the primary current then ratio error is given by . When

the CT is not saturated ratio error is a consequence of magnetizing current I E since

. Therefore, % ratio error is equal to .

When the CT is saturated, coupling between primary and secondary is reduced. Hence large ratio errors
are expected in saturation. The current in the secondary is also phase shifted. For measurement grade
CTs, there are strict performance requirements on phase angle errors also. Error in phase angle
measurement affects power factor calculation and ultimately real and reactive power measurements. It
is expected that the ratio error for protection grade CTs will be maintained within .
5.3 Classification of CTs

5.3.2Class C CT

Letter designation 'C' indicates that the leakeage flux is negligible. Class C CTs are the more accurate bar
type CTs. In such CTs, the leakage flux from the core is kept very small. For such CTs, the performance
can be evaluated from the standard exciting curves. Also, the ratio error is maintained within for
standard operating conditions. For such CTs, voltage rating on the secondary is specified up to which
linear response is guaranteed. For example, a class C CT specification could be as follows: 200:5 C 100.
The labeling scheme indicates that we are dealing with a 200:5 class C CT which will provide linear
response up to 20 times rated current provided the burden on the secondary is kept below
ohm. Similarly, a corresponding class T CT may be labeled as 200:5 T 100.
For class C CTs, standard chart for versus excitation current on the secondary side is available.
This provides the protection engineer data to do more exact calculations (refer fig 5.7). e.g., in
determining relaying sensitivity.

Review Questions

1. What are the functions of a CT?

2. Derive equivalent circuit of a CT.

3. What are the consequences of CT saturation on large AC current? How can it be avoided?

4. What are the differences between:

(a) Measurement CTs and Protection CTs.


(b) Class T CTs and class C CTs.

By mistake someone has interchanged the terminals of measurement CT and protection CT. Both CT are
5.
at the same

place and having same current ratings. What will happen in normal condition and abnormal condition?

Recap

In this lecture we have learnt the following:

Functions of CT and VT.

Equivalent circuits of CT.

Classifications of CTs .
Module 2 : Current and Voltage Transformers

Lecture 6 : CT Tutorial

Objectives
In this lecture we will solve some tutorial problems on CT and analyse:

The performance of a class C CT based on standard excitation curve.

Maximum limit for secondary burden of a CT.

Accuracy limit of a class C CT based on IEEE standards.

Example 1:
A , C400 CT with excitation curves shown on above fig 5.7, is connected to a 2.0 burden. Based
on the accuracy classification, what is the maximum symmetrical fault current that may be applied to this
CT without exceeding a 10% ratio error?

Answer:
CT ratio = 1200/5
Secondary resistance = 0.61
Relay burden = 2
For 20 times rated secondary current, i.e., 100A
Secondary voltage = 100 x (2 + 0.61) = 261 Volts which is less than knee point of the CT. Since this
voltage is less than 400V, from electrical perspective, linearity will not be lost at even higher currents.

Approximate limit on secondary current is given by . Hence maximum symmetrical

fault current = 36720A.

More exact calculation requires usage of fig 5.7. This would involve 'cut and try' approach.

Example 2:
A , C400 CT is connected on the tap. What is the maximum secondary burden that can
be used and we can maintain rated accuracy at 20 times rated symmetrical secondary current?

Answer:

The secondary voltage corresponding to the tap 1000/5, = 333V

Secondary current

, from calibration curve.


333 = 100(0.51+RB)
Secondary burden = 3.33 - 0.51 = 2.72

Example 3:
Assume that secondary burden of a 300:5 class C CT is 5 . The relay setting is 2A and the CT ratio is
. Using fig 5.7, calculate the primary current required to operate the relay?

Answer:
Secondary burden = 5
Secondary resistance for 300/5 CT = 0.15
Relay setting,
V s = 2 x (5 + 0.15) = 10.3V
Corresponding exciting current = 0.04A
Total secondary current = 2 + 0.04 = 2.04A
Note that, strictly, phasor addition of currents has to be done. However, algebraic addition simplifies work
and usually leads to conservative estimate of voltages. Hence, this practice is considered acceptable.

Primary current to operate the relay = = 122A

Example 4:
A relay is expected to operate for 7000A primary current. The class C CT ratio is (see fig 5.7).
Secondary burden is 3.5 . Will the CT saturate at this burden? Also, comment on the ratio error.

Answer:

Secondary current

V s = 58.33 (3.5 + 0.31) = 222.25V.


From the excitation curve (fig. 5.7) of 600/5 CT, we can see that the CT will be in deep saturation and %
ratio error will exceed the limits.

Example 5:
What will be the approximate % error if a 500:5 class C CT is connected to a secondary burden of 2.5
and the secondary current is 68A.

Answer:
For a 500/5 CT, secondary resistance R s = 0.25
Secondary burden R B = 2.5

= 187V
Corresponding exciting current I E = 6A (fig 5.7) (approximate)

% ratio error =

= 8.82%

Example 6:
If a 300:5 class C CT (fig 6.1) is connected to a meter with resistance and secondary current in
the CT is 4.5A find out the primary current, voltage developed across the meter and % ratio error. Lead
wire resistance secondary resistance of a 300:5 CT

Answer:

Total secondary resistance

Secondary voltage

= 5.0265V
From Fig 5.7,
Exciting current I E for 5.265V
= 0.03A (approximate)
Turns ratio N = 300/5 = 60

= 60(4.5 + 0.03)
= 271.8A
Voltage across meter
= 4.5V

Ratio error

= 0.67%
Review Questions
Note: Use fig 5.7 wherever necessary.
A circuit has a 1200:5 C 400 CT with characteristics as shown in fig 5.7. The maximum symmetrical fault
1.
for which the
associated relays are to operate is 17,800 Amp. Find out the approximate % error if the secondary burden
is:
(1) 2 (2) 4
The secondary burden in a relay circuit is 4 . The overcurrent relay set to pick up at 3 Amp and CT ratio
2.
is 400:5.
Calculate the minimum primary current to just operate the relay?
Find out the maximum secondary burden that can be used and still maintain rated accuracy at 20 times
3.
rated
symmetrical secondary current if a 1200:5 C 400 CT is connected on 800/5 tap.
If the secondary burden of 1200:5 C 400 CT connected to 300:5 tap is 2 , find out. Find out the
4.
maximum symmetrical
fault current that may be applied to this CT without exceeding 10% ratio error.
5. Let the primary fault current in the primary side of a CT be given by

(a) Show that this equation can be rearranged as follows.

For u(t) where u(t) is the unit step function.


(b) Consider the simplified equivalent circuit of CT as shown in fig 6.2

Let be the angle as shown in fig 6.3 and . Then show that secondary reflected current

components for the primary are given by

Primary Fault current Secondary reflected current

1)
(Sine Component)

2)
(Cosine Component)

3) (d c component)
Recap

In this lecture we have learnt the following by solving the tutorial problems:

Ratio error of a CT can be worked out from its excitation curve.

The ratio error in a class C CT should not exceed 10%.

Ratio error increases with secondary burden and there is a maximum limit for secondary burden of a CT.
Module 2 : Current and Voltage Transformers

Lecture 7 : CT Saturation and DC Offset Current

Objectives

In this lecture we will discuss:

Origin of DC offset current.

CT saturation due to DC offset current.

Cautions for CT selection.

7.1 Origin of DC Off-set Current

Typically, fault current consists of


symmetrical ac component and a dc
offset current. To understand this
issue, consider an unloaded
transmission line excited by a voltage
source. The fault strikes at time
. This can be simulated by

closing the switch at in fig 7.1.

If or
models the line impedance, then the
fault current in the line is given by
the following expressions.

where is the time constant of the line = Lline/Rline. Fig 7.2 shows a typical wave form of fault current
containing DC offset current. The fault current can be decomposed into two components. The first
component models the steady state sinusoidal ac response while the second component is the dc offset
current due to the presence of inductance in the circuit. Recall that current in an inductance can not
change instantaneously. DC offset current is a consequence of maintaining initial condition .
While the dc offset current in theory, would persist till infinity, it's trace in the actual wave form would not
be seen beyond a few time constants. Table - 1 illustrates the values of up to 10 time constants.
7.1 Origin of DC Off-set Current

Table 1
Time t=0 t= t=2 t=4 t=6 t=8 t = 10

1 0.3678 0.1353 0.0183 0.0024 0.0003 0.00004

It is more or less obvious that, dc offset is not seen in the waveform after 5 time constants. The peak
value of dc offset current I 0 can be worked out by setting the current i(t 0 ) to zero.

This implies that

Thus

(1)
Clearly, the peak value of dc offset current
depends upon the following parameters:
Time at which fault strikes,
Phase angle of ac voltage and
|Zline| and of transmission line.
Voltage V m

7.1 Origin of DC Off-set Current

It can be seen that severity of dc offset component in fault current is maximum when from equation (1)
a)
and

b)

For example, if angle of transmission line is , then with and = sec =

5msec, the severity of dc offset current would equal , which is also the peak value of

symmetrical ac component of the current. This leads us to an important conclusion. viz.,

Peak value of dc offset current can be as high as the symmetrical ac peak.

Polarity wise the dc offset current can be positive or negative.


Dc offset current may be totally absent eg. If , .

While, in above analysis, we have considered a single phase current, a 3 phase fault on a 3 phase
transmission line

would always induce dc offset current in at least two phases. DC offset has adverse impact on the CT
performance.
In the remaining lecture, we analyze effect of the dc offset current on CT performance.

7.2 CT Saturation due to DC - Offset Current

We now plan to show that CT can saturate on dc offset current. Also, we plan to show that the resulting
distortions in the CT secondary current can be unacceptably high. While doing this analysis, we will
neglect ac symmetrical component.
Note that when a CT core is saturated, it cannot replicate the ac component as the strong mutual coupling
between primary and secondary is lost.

First consider an ideal CT excited by the dc


offset current source. An ideal CT will
faithfully replicate the primary current
waveform on the secondary side. Hence,
the secondary current would be given by

and the voltage developed across CT


secondary would be given by

Typical voltage waveform is shown in fig


7.4.

7.2 CT Saturation due to DC - Offset current

For simplicity, let us assume that the initial flux in the transformer core at t = 0 is .
Then, we can compute the flux in the transformer core by using Faraday's law,

--- (2)
(3)
Fig 7.5 shows the plot of the flux due to dc offset current as a function of time with . It can be

seen that flux in the core increases exponentially to a peak value of as , Since,

maximum value of I 0 is , it implies that can be as high as .

7.2 CT Saturation due to DC - Offset current


Note that unlike ac voltage induced
flux, which is sinusoidal in nature, this
flux (2) is unidirectional. AC voltage
induced flux has zero average value.
However, dc offset induced flux does
not have this nice feature. The total
instantaneous flux in ideal CT core is a
summation of ac flux and dc flux (see
fig 7.6)
The voltage developed across the CT
secondary by the steady state i.e.,
sinusoidal component of the fault
current is given by,

The sinusoidal ac flux in the CT core


can be obtained by substituting

operator by in equation (2).

Hence,

or

Thus, the peak value of ac flux is given by the following relationship.

Hence, the peak value of instantaneous flux in the core is given by,

In practice, if this flux exceeds the knee-point flux in the core (see fig 7.7), then the CT core will saturate.

7.2 CT Saturation due to DC - Offset current

As a consequence of CT core saturation,


the secondary current would not faithfully
replicate the primary current. In fact, in
practice it is observed that CT secondary
current is clipped as shown in fig 7.8. The
clipping of CT current leads to “blinding” of
the relay which cannot function any
further. Hence, CT saturation in presence
of dc offset current is a serious problem
which relay designers have to face.

Note that dc flux accumulates gradually. In


fact it depends upon the transmission line
time constant ( ). It is apparent that
saturation should not occur immediately
after the inception of the fault. Thus, if the
relay is fast enough in decision making, it
is likely that a relaying decision would be
undertaken before the CT fully saturates.
This is another important reason for
demanding speed from the relaying
system.
For bus-fault protection, where the CT
saturation due to dc offset current can be
a significant contributing factor, quarter
cycle operations specification are imposed.
Similarly, a distance relay is expected to
operate within cycle time.

7.3 CT Oversizing Factor

Typically, an efficient design of transformer would correspond to choosing the core cross section such that
should be near the knee point of B - H curve. One obvious way of avoiding CT saturation on dc flux is

to oversize the core so that for flux , corresponding B is below the knee-point. Hence, the

factor is called core-oversizing factor.

Core-oversizing factor =
Note that X/R in above equation is the transmission line X/R ratio. For a 220KV line with X/R 10, this
would imply that transformer core should be oversized by a factor of 11. For a EHV line, with X/R 20,
this would imply an oversizing requirement of about 21 times the usual design. Clearly, this high amount
of oversizing is not practical. Thus, an important conclusion is that, protection engineers have to live with
the saturation problem. Under the situation one should try to quickly reach the decision, before CT
saturates. However, this brings in the picture, the well discussed 'speed vs accuracy conflict'. We will have
more to say on the accuracy aspect of relaying in later lectures.

7.4 Cautions in CT Selection

While choosing a CT for a particular application, it is necessary to observe following precautions.

The CT rating and continuous load current should match. For example, if maximum load current is 90A, a
100:5 CT may

be acceptable but 50:5 is not acceptable.

The maximum fault current should be less than 20 times the CT rated current. For example, 100:5 CT can
be used, so

long as burden on the CT is within the rated values and maximum primary fault current is below 2000A.

The voltage rating of CT should be compatible. For example, 100:5 C100 would give linear response, upto
20 times

rated current provided CT burden is kept below(100/20 x 5 = 1 ). With 2 burden, this CT can be used
only if maximum current is limited to 1000A.
Paralleling of CT's e.g. in differential protection, or with SLG fault can create significant errors in CT
performance. One

should generally ascertain that magnetizing current is kept much below the pick up value.
7.4.1Exercise Problems
If the current ratio is adequate for a protection, but CT burden is high; then the performance of CT may
1.
deteriorate due to

large magnetizing current and/or saturation problem (see fig 7.9). The CT performance can be improved
by connecting the CT's in series (see fig 7.10).

Show the dotted terminals for correct secondary series connection in fig 7.10.

What is the VA of CT in fig 7.9 and 7.10 respectively?


2. Mark the following statements as true or false:

Electromechanical relays tend to saturate at high currents. This reduces the relay burden on CT, and so
that the CT

performance at moderately high currents may be considered better than at relay's rated burden at 5A.

Use of instantaneous over current relays has the potential to overcome this problem of saturation of CT's.

Differential protection can operate on external faults due to the unequal saturation of CT's.

Review Questions

1. What are the factors on which the peak value of DC offset current depends?

2. How does the DC offset current affect the performance of a CT?

3. Derive the equation for peak value of total flux developed in a CT core.

4. What is meant by core oversizing factor?

5. What are the precautions to be taken while selecting CTs?

Recap

In this lecture we have learnt the following:

DC offset current.

CT saturation due to DC offset current.

CT core oversizing factor.

Cautions in CT selection.
Module 2 : Current and Voltage Transformers

Lecture 8 : Introduction to VT

Objectives

In this lecture we will learn the following:

Derive the equivalent circuit of a CCVT.

Application of CCVT in power line communication.

Transient response of a CCVT.

Classification of CCVT.

Design of CCVT.

8.1 Voltage Transformers

Many relaying applications like


distance relays, directional
overcurrent relays require
measurement of voltages at a
bus. This task is done by a
voltage transformer (VT).
The principle of a voltage
transformer is identical to the
conventional transformer. Hence,
its equivalent circuit can be
represented as shown in fig 8.1.

Typically, the secondary voltage


of the VT is standardized to 110
V (ac). Hence, as the primary
voltage increases, the turns ratio
N1 :N 2 increases and transformer
becomes bulky.

To cut down the VT size and cost,


a capacitance potential divider is
used (fig 8.2). Thus, a reduced
voltage is fed to primary of the
transformer. This reduces the
size of VT. This leads to
development of coupling
capacitor voltage transformers
(CCVT).

8.1 Voltage Transformers


8.1.1Role of Tuning Reactor
Assuming, the transformer to be ideal, the Thevenin's equivalent circuit of CCVT is shown in fig 8.3.
It is now obvious that Z th due to the capacitance
divider, affects the voltage received by the relay. To
achieve high level of accuracy, it is therefore
necessary to compensate for this voltage drop by
connecting a tuning inductor. The tuning inductor‘s
value is so chosen that it compensates for the ‘net C'
at power frequency (50Hz in India). The phasor
diagram across resistive load, is as shown in fig
8.4(a). (See fig 8.4).
From the corresponding equivalent circuit, it is

apparent that, if , then voltage

drop across C is neutralized and the relay sees the


actual voltage to be measured. (See fig 8.5).
8.2 CCVT in Power Line Communication

The capacitance potential divider also


serves the dual purpose of providing a
shunt path to high frequency signal used in
power line carrier communication.
Normally, CCVT is used in HV/EHV systems
where carrier line communication is used.
High frequency i.e. Radio Frequency (RF)
signals (50 - 400 kHz) can be coupled to
power line for communication. At high
frequency, the capacitive shunt impedance
is very small and hence these signals can
be tapped by the potential divider. To block
the path to ground for the RF signal, a
small drainage reactor is connected in
series with the capacitance divider. At
power frequencies, it has a very small
impedance. Thus, the role of capacitance
potential divider at power frequency is not
compromised. On the other hand, at RF,
the impedance of drainage reactor is large
and it blocks the RF signal.

Also, compensating reactor and transformer leakage reactance by their inductive nature, block the path of
RF signal. This signal is then tapped by a tuning pack which provides low impedance to the RF signal.
8.2.1Ferro Resonance Problem in CCVT

The iron cores of the reactor and transformer will not only introduce copper and core losses but it can also
produce ferroresonance caused by the nonlinearity of the iron cores. Hence a ferroresonance suppression
circuit is also included in the secondary of the transformer. The dangerous overvoltages caused by
ferroresonance are eliminated by this circuit. Unfortunately, it can aggravate CCVT transients.

8.3 Transient Response of CCVT


As can be seen in the fig 8.5, CCVT equivalent circuit is a R-L-C circuit. If transformer is considered ideal,
it can be described by integro differential equation of the type,

. The corresponding differential equation is given by

For a solid 3 - phase fault say near the CCVT bus at t=t 0 . v(t) = 0 for . Thus, during fault the

governing differential equation is given by .

This equation is expressed in standard form as follows: where is natural

frequency in radians per second and is the damping constant. Thus, and .

Because of the property of tuning reactor, = 50 or 60 Hz. We know from the

background in network analysis that response of such a circuit to step excitation, depends upon .

Because R is quite small, . If ; then we expect underdamped response. The response depends

upon the damping and and point on the voltage waveform where the fault strikes. Such transients
are known as subsistence transients. Fig 8.7 shows subsistence transients of CCVT. It can be seen that
subsistence transients can reduce the accuracy of distance relays.

8.4 Classification of CCVTs

CCVTs can be classified into following two types:

Class 1
Class 2

Table 8.1 shows the maximum limit for the ratio and phase angle errors. It can be seen that errors of
Class 2 type are double than that of class 1 type.

Table 8.1 : Limits for Ratio and Phase Angle Errors

VT Class Maximum ratio error Maximum phase angle error

Class 1

Class 2

Review Questions

1. Derive the equivalent circuit of a CCVT.

2. What is the function of a tuning inductor?

3. How can CCVT be used in Pilot wire communication?

4. What is the function of ferroresonance suppression circuit?

Recap

In this lecture we have learnt the following:

Role of VT.

The equivalent circuit of a CCVT.

Use of CCVT in Pilot wire communication.

Ferroresonance problem in CCVTs.


Module 2 : Current and Voltage Transformers

Lecture 9 : VT Tutorial

Objectives

In this lecture we will solve tutorial problems to:

Design a CCVT.

Find out the value of tuning inductance.

Find out ratio error and phase angle error.

Performance analysis of VT.

Example 1 :
Design a CCVT for a 132kV transmission line using the following data. Resistive Burden = 150VA,
frequency deviation to be subjected to , phase angle error = 40 minutes. Consider four
choices of V 2 as 33 kV, 11 kV, 6.6 kV and 3.3 kV. Transmission line voltage V = 132 kV. The standardized
VT secondary voltage is 110 volts (L - L).

Answer:
Let V 2 (L - N) be the voltage to be produced by the capacitive potential divider with capacitance values C 1
and C 2 . Let L be the value of tuning inductor. Our first task is to come up with a value of L. Here the
specification for phase angle error is 40 minutes. Variation in frequency can be upto
approximately. Phase angle error for change in from by in the above equivalent circuit can be
calculated as follows:

At tuning frequency,
Substituting

Example 1: (contd..)

From figure 9.3, . For small enough , tan = and hence from

its % phase angle error x 100 --- (1)

Using this equation the value L for different values of V 2 is found out.
(1) Let V 2 be 33kV (L - N) Then;

From eqn (1)

Example 1 : (contd..)

(2)

(3)
(4)

Example 1 : (contd..)
The values of L, for different values of V 2 are tabulated below.

V2 L in H

33 kV 6722.2 0.00151

11 kV 747.2 0.0136

6.6 kV 269 0.0377

3.3 kV 67.25 0.151

From the above table it is clear that smaller the value of V 2 , the smaller is the value of L and higher the
value of C 1 and C 2 for tuning condition. If we select too low value of V 2 and L then capacitance values
will be beyond available limits, and if we select higher value of V 2 and L, then CCVT's inductor will
become bulky. So a compromise solution is necessary and let us select V 2 = 6.6 kV
For V 2 = 6.6 kV
L = 269 H

Now,

In this design, we have explained the basic concept for CCVT design and we assumed the transformer to
be ideal. However in real life design, the value of magnetizing impedance of transformer, resistance of
reactor etc have to be taken into account, as the ratio error and the phase angle error will also
get affected by these values. The next example brings out these issues.
Example 2:

The equivalent circuit of a CCVT


is shown in fig 9.4. The values of
C 1 and C 2 are 0.0018 and
0.0186 respectively. Tuning
inductor has an inductance of
497H and resistance of 4620 .
X m of the VT referred to 6.6 kV
side is 1M , core loss = 20
watts per phase, VA burden =
150VA per phase. Value of C m for
compensating the current drawn
by X m is equal to .

(a) Verify the appropriateness of choice of L and C m.


(b) Find out the nominal value of V/V2
(c) If the frequency drops from 50Hz to 47Hz, what would be the values of ratio error and phase angle error?
Answer (a):
If and then the value L of tuning inductor is given by

where and = nominal frequency. Thus,

= 496.7 H which is equal to the given value of L.


Now, C m has to be in parallel resonance with X m. Therefore,

The value is also same as the selected value of C m. Hence, the selection of both L and C m is appropriate.
Answer (b):

= 11.33

V = 11.33 x 6.6

Thus, this VT is connected to a 132 kV bus.


Example 2: (contd..)
Answer (c):
Core loss = 20 W

VA burden = 150VA (resistive)


The equivalent circuit can be represented as shown below.

at = 50 Hz

Example 2 : (contd..)

The frequency of interest is 47Hz. Hence values of X m and other impedance can be calculated at 47Hz.
Figure 9.5 can be simplified as figure 9.6.

Where
Amplitude or ratio error of a CCVT is equal to where V th is the Thevenin equivalent voltage

source is nothing but open circuit emf. V T is the terminal voltage on load. Hence % ratio error

=1.81%
Phase angle error .
Clearly, the phase angle error is on the higher side.

Review Questions

Assume that the primary voltage of a CCVT is 400 kV and the voltage to be produced by the capacitive
1.
potential divider is

3.3 kV. If C 2 is taken as 0.02 , determine the value of tuning inductance at frequency of 50Hz.

In figure 9.4 if V = 230 kV, V 2 = 6.6 kV (L-N) C 1 = 0.001 and X m = 1.2 M , then find out the
2.
values of tuning

inductance and capacitance to be connected across CCVT's secondary for compensating X m. Standardized
secondary voltage of a VT is 110V (L-L).

Design a CCVT for a 400 kV transmission line using the following data. Secondary resistive burden (3 )
3.
= 300VA.

Core loss (3 ) = 50W. . Consider 3 choices of V 2 = 3.3 kV, 6.6 kV, 11 kV. Take phase

angle error = 40 min. and standard VT secondary voltage =110 V (L-L).

Recap

In this lecture by solving the tutorial problems we have learnt the following:

How to decide V 2 .

How to choose .
How to decide C 1 and C 2 .

How to evaluateperformance of VT.


Module 3 : Sequence Components and Fault Analysis

Lecture 10 : Sequence Components

Objectives

In this lecture we will

Introduce sequence components.

Extract positive, negative and zero sequence components from unbalanced phasors.

Synthesize a unbalanced phasor using sequence components.

Analyze , S-L-G, L-L and L-L-G faults using sequence components.

10.1 Introduction

Electrical systems occasionally experience short circuits. These short circuits are hazardous to the safety
of both equipment and people. Though the protective devices will isolate the faults safely, the parts of the
system should withstand the resulting mechanical and thermal stresses. Fault impedance and fault current
estimates also form input for the setting and coordination of protective devices like overcurrent relay,
distance relay etc. Hence it is very important to estimate the magnitude of the fault currents. The
equipment rating are decided based on this value. Fault currents can be estimated either by hand
calculation or by fault analysis program.

Sources of Fault Current

The fault current in a system can be contributed by any of the following.

Synchronous Motors and Condensers

Induction Machines

Synchronous Generators

Electrical Utility System

Distributed Generation

10.2 Sequence Components

Faults in a 3 phase system can be single line to ground, double line to ground, line to line or three phase.
Power system operation during any of these faults can be analyzed using sequence components. The
method of sequence component was discovered by Charles L. Fortescue in 1918. He came up with the
following intuition that any unbalanced system has 6 degrees of freedom; whereas, a balanced
system has only 2 degrees of freedom. Hence an unbalanced system having 6 degrees of freedom can
be synthesized by 3 sets of balanced system each having 2 degrees of freedom.
Note: This idea can be easily extended to N-phase system where .
For a three phase system with phase sequence a-b-c, the three sets of balanced phasors are called
positive, negative and zero sequences.

10.2 Sequence Components (contd..)


10.2.1Positive Sequence Component

It represents a set of balanced phasors , and . If we choose 'a' phase as reference phasor.

(1)

(2)

Where
‘a' is cubic root of unity. Multiplying a phasor by ‘a'
causes a rotation of in the anticlockwise
direction (lead of ). Similar usage of a 2 results in
in the anticlockwise direction or equivalently a
lag of . The positive sequence of phasors is the
same balanced set of phasors that we expect in steady
operation of an ideal power system. Thus, a, b and c
phasors are nothing but V a1 , V b1 and V c1 respectively.
The sequence phasors are shown in fig 10.1. If the
stator of an induction motor is subjected to positive
sequence voltage, it should cause rotation in
anticlockwise direction. Note that placement of V a1
can be done arbitrarily in the x-y plane. But once, V a1
is fixed both V b1 and V c1 are fixed.
Thus, a positive sequence set of phasors have 2 degrees of freedom i.e. we can decide placement of
|Va1 | (magnitude) and arbitrarily.

10.2 Sequence Components (contd..)

10.2.2Negative Sequence Component

Negative sequence phasors are used to represent a balanced set of phasors (each of equal magnitude
and phase difference of ) but in which the order of V b and V c has been reversed with respect to the
positive sequence phasor. Thus,

(3)

(4)
This is illustrated in fig 10.2. Note that placement of V a2 in x – y plane can be done arbitrarily. However,
once V a2 is fixed both V b2 and V c2 are automatically fixed. Thus, negative sequence component have
exactly two degrees of freedom which is to fix magnitude and angle of V a2 .
If stator of a induction motor is subject to negative sequence voltage the rotor will rotate in a
clockwise direction. i.e. in exactly opposite direction to that obtained with the positive sequence voltage.
10.2.3Zero Sequence Component
The zero sequence phasors V a0 , V b0 and V c0 are a set of balanced phasors defined as follows.

(5)

10.2 Sequence Components (contd..)

10.2.2Zero Sequence Component (contd..)


Again there are two degrees of freedom in placing the zero sequence phasors. Application of zero
sequence does not create any rotation to the rotor of an induction machine. This is because the net mmf
induced in the air gap is zero.
An unbalanced set of phasors can be synthesized by linear combination (superposition of positive,
negative and zero sequence phasors).
For example,
10.3 Mathematical description of sequence components
So far we have seen that,

Using equation (1) to (5), we get

(6)

or stated more compactly,

where and

Matrix [T] defines a linear transformation of phasors from sequence domain to phase domain. Matrix [T]
enjoys some interesting properties. For example, every pair of rows or columns of matrix [T] are
orthogonal. For example,
If c 1 = (1, 1, 1) t and c 2 = (1, a 2 , a)t
Then, (c1 ) H c 2 = (c2 ) H c 1 = 0 where H is Hermitian operator defined as transpose and conjugate of a
vector or matrix.
Similarly,
In other words, T H T = T T H = D, where D is a diagonal matrix

With

It can be verified that

and (7)

10.3 Mathematical description of sequence components (contd..)

10.3.1Geometrical interpretation
We illustrate the inverse transformation for phase to sequence domain by geometrical method. We are
given a set of unbalanced phasors and we have to compute the sequence components from it.
Algebraically, it is simply application of equation (7). Geometrically, it can be interpreted by noting that
'a' represents rotation of phasor in anticlockwise direction and a 2 is rotation of phasor in
anticlockwise direction.
10.3 Mathematical description of sequence components (contd..)

10.3.2Significance of Transformation

One should understand the significance of linearity in sequence component transformation clearly.

Sequence transformation matrix [T] provides a methodology to convert sequence domain phasors to
phase domain

phasors.

Conversely, inverse transformation matrix [T -1 ] provides a mechanism to convert phasors in a-b-c


domain to sequence
domain. This is typically required for analysis purpose. Also, the mapping between phase domain and
sequence domain is 1:1.
There is no loss of information in either domain. In other words, both domains have identical information
content.

The transformations [T] and [T-1 ] are linear i.e. if and are two sets of three phase phasors
in a-b-c domain,
then superposition and in phase domain is equivalent to corresponding superposition in
sequence domain. Conversely, if we superpose phasors in sequence domain, then in a-b-c domain also it
amounts to equivalent superposition of phasors. Thus,

Where , and and are complex numbers.

Similarly,

Sequence components provide a methodology to view unbalanced phasors as a set of balanced phasors.
If a network is balanced, then the resulting analysis gets extremely simplified. This is because we are
able to break a three phase network into three decoupled sequence networks (under some acceptable
symmetry assumptions). We now elaborate on this concept of decoupled sequence networks.
10.4 Modeling Network in Sequence Components
We now show that corresponding network modeling can also be simplified in sequence domain. If the
three phase network elements enjoy a particular symmetry (circulant structure) then, application of
sequence component transformation diagonalizes three phase impedance or admittance matrix. Thus, we
achieve decoupling in positive, negative and zero sequence networks, provided that network is balanced.
Hence, sequence component analysis is used when network is balanced but phasors or loads are
unbalanced. To begin with, consider a transposed transmission line whose three phase model is given by
the following equation. Z s is the self impedance of transmission line and Z m is the mutual impedance
between two phases. These quantities can be evaluated from GMD and GMR of transmission line. ,

and is the drop in phase voltage across the line due to currents I a , I b and I c respectively then,

(8)

Applying the transformation,

and

with phase 'a' as reference phasor.

we get,

Where

Hence,

(9)

10.4 Modeling Network in Sequence Components (contd..)


Let Z 0 = Z s + 2Zm
Z 1 =Z s - Z m
Z2 = Zs - Zm
Then equation (8) can be decoupled into three separate equations one for each sequence component as
follows.
, and

Also, note that , and are the eigen values of the phase-impedance matrix . Reference
phasor subscript 'a' has been dropped for convenience.
Thus, we see that positive, negative and zero sequence networks are decoupled. In general, if Z matrix
has following circulant symmetry we can decouple the positive, negative and zero sequence networks by
sequence transformation T. It can be shown that if,

, then
where

(10)

Thus, all the sequence components can be determined from the above equations.
10.4.1Advantages of Sequence Transformation
It is used when the network is balanced. For a n - node system a linear system solver
can

be decoupled into three linear system solvers, and . Hence it


provides decoupling of the network.
It can be applied for both balanced and unbalanced loads. However, simplicity and elegance of sequence
component

approach reduces when network is unbalanced.

Zero sequence current is used to provide sensitive earth fault detection technique.

10.5 Fault Current Calculation in Sequence Domain


Consider a transposed transmission line connected to an ideal voltage source E. The fault appears at the
remote end of transmission line. We now derive sequence network interconnections for different fault
types. We begin with a three phase fault.
10.5.1Three phase fault: Three phase faults are considered to be symmetrical and hence sequence
components are not
necessary for their calculation.
It can be easily shown that for a three phase
fault, fault currents are balanced with,
I 2 = I 0 = 0 and I 1 = I a
(Hint : I 012 = T -1 I abc with I b = a 2 I a and I c
= aI a ).
Thus, for a Three Phase Fault only Positive
Sequence Network is considered. The fault
currents are given by the following equations

(solid fault)

(Fault through impedance

Z f)
10.5.2Single Line to Ground Fault (SLG):
On an unloaded system (fig 10.7), let there
be 'a' phase to ground fault with a fault
impedance Z f . Then, the faulted system is
described by,
I a = I f , I b = 0 and I c = 0. Applying sequence
transformation, we get
Thus, I 0 = I 1 = I 2 =Ia /3. Let V f represent the
voltage of the transmission line at the
receiving end of the line where fault is
created.
Further, from equation,
(10)

Equivalent in the sequence domain we get by


premultiplying (9) by T -1
i.e.

or
(11)

(12)

(13)
10.5 Fault Current Calculation in Sequence Domain (contd..)
Since for SLG fault at phase 'a' we can add equations 11, 12 and 13. In

addition when we invoke the condition that I 0 = I 1 = I 2 = I a /3 we get,

The SLG fault can be visualized by a series connection of positive, negative and zero sequence networks
with three times the fault impedance.
The positive sequence, negative sequence and Zero sequence fault currents are given by following
equations.

(Solid Fault)

(Fault through impedance Z f )

On similar lines following equations can be derived for LL and LLG faults.
LL fault:
The Zero Sequence Data is not required for this
fault.

(solid fault)
(fault through impedance

Z f)

10.5 Fault Current Calculation in Sequence Domain (contd..)


10.5.3Line to Line Ground Fault (LLG):
1. Bolted Fault:

2. Fault current through impedance Z f

Fault current in phases b and c:


I b = I 0 + a 2 Ia 1 + aIa 2
I c = I 0 + aIa 1 + a 2 Ia 2
I F = I b + I c = 3I0

Z f is fault impedance between the lines, while Z FG is the fault impedance to Ground.

Review Questions
1. What are sequence components?
2. Derive the sequence transformation matrix using 'c' phase as reference phasor.
3. Show that sequence transformation is linear.
If Z s is the self impedance and Z m mutual impedance of a transmission line, show that Z 0 = Z s + 2Zm
4.
and Z 1 and
Z 2 = Z S - Z m.
5. Derive the equation for fault current in (a) L-L fault with fault impedance Z f . (b) L-L-G fault.
If we do not want to lose information during a transformation 'f' from domain say A to B, then it is
6.
required that 'f' should
be invertible. In addition, to simplify analysis, we prefer linear transformations. List out some other
transformations that
you have come across in electrical engineering.
7. Clarke's transformation with 'a' phase as reference phasor is defined as follows:

Show that the transformation matrix is invertible. Hence, define the inverse transformation from
Clarke's components to phase components.
8. Using Clarke's transformation show that
1) for a - g fault

2) b - c - g fault

3) b - c fault

4) 3 - phase fault

Suppose that in an DSP implementation of relay, we have to choose between the sequence
9.
transformation and Clarke's
transformation suggest your choice and justify it from computational requirement and ability to
correctly detect a fault.

Recap

In this lecture we have learnt the following:

Sources of fault current.

Method to extract sequence components from unbalanced phasor.

Advantages of sequence transformation.

Derivation of sequence transformation matrix.

Fault current formulae and interconnection of sequence network for three phase, S-L-G, L-L and L-L-G
faults.
Module 3 : Sequence Components and Fault Analysis

Lecture 11 : Sequence Components (Tutorial)

Objectives

In this lecture we will solve some tutorial problems to

To extract sequence components from an unbalanced phasor.

Define sequence transformation with 'b' as reference phasor.

Analyze the effect of changing reference phasor.

Find out fault currents for S-L-G, L-L and L-L-G faults.

1. The currents in a unbalanced system are given by

, ,

Calculate the zero, positive and negative sequence currents.

Ans:

where
1.
b – phase
Ans:

c – phase

The zero, positive and negative sequence voltages of phase ‘a' are given below. Find out the phase
2. voltages ,

and .

, ,

Ans:

2.
Ans:
A 20MVA, 6.6kV 3-phase generator has a positive sequence impedance of j1.5 , negative sequence
3.
impedance of

j1.0 and zero sequence impedance of j0.5 . and P m = 0 (a) If a single phase to ground fault occurs
on phase ‘a' find out the fault current. (b) If the fault is through an impedance of j2 , what will be the
fault current?

Ans: The fault has occurred on ‘a' phase. Taking ‘a' phase as reference,

(a)

For a single line to ground fault,

Fault current

(b) If the fault is through an impedance of j2

In a system, if the per unit values of positive, negative and zero sequence reactances are given by
4.
,

and respectively. Determine the fault current, if the fault is (a) L-L-G (b) L-L.

Ans: (a) For L-L-G fault involving phases b & c.

Let V = 1pu

i.e.,
since or

i.e., Fault current

4.
(b) L-L fault
Ans:
For line to line fault between ‘b' and ‘c'

Fault current

i.e.,

i.e., Fault current = -9.36pu

Calculate the positive, negative and zero sequence impedance of a feeder if its self impedance is j1.67
5.
and mutual
impedance is j0.67 .

Self impedance , mutual impedance

Ans: Positive sequence impedance

= 1.67 – 0.67
=1
Negative sequence impedance
= 1.67 – 0.67
=1
Zero sequence impedance

= 3.01

6. Assuming b – phase to be reference phasor define the sequence transformation matrix.


Ans: With ‘b' phase as reference phasor, the transformation matrix can be defined as follows.

Justifications:
Now, if , i.e. only zero sequence excitation is present, then we get

, thus we see that all the zero sequence components are extracted.

If i.e., only positive sequence excitation is present, then,

[ being reference phasor]

[i.e., lags by ]

[i.e., lags by ]
Thus, the positive sequence component is properly extracted. Similarly, if
, only negative sequence excitation is present.
i.e., we will get

[i.e., lags by ]

[i.e., lags by ]

Comment if the two – sequence transformations obtained by taking ‘a' phase and ‘b' phase as reference
7.
are identical or

not.

Ans: With ‘a' phase as reference phasor, the sequence transformation is defined as,

(1)

or

With ‘b' phase as reference phasor, the sequence transformation is defined as,

(2)

Now, rearranging the equation (2) to follow the same order as (1) we get,

or

Clearly, and are not identical.


In problem No. 2 if the data represented sequence components with ‘b' phase as reference phasor, instead
8.
of ‘a'

phase, compute , and . Comment on the result.

Ans: With ‘b' phase as reference phasor, the sequence transformation is given by,

We will get

Hence, we can conclude that changing of reference phasor causes renaming of phasors and hence a
different result.

Analyze a bolted S-L-G fault on phase ‘b' of an unloaded transmission line using sequence components
9.
with b – phase

as reference phasor.
Ans: With b- phase as reference phasor we have

Now, for a bolted S-L-G fault ;


Therefore,

i.e.,

Based on 3 phase model of balanced circuit

Applying sequence transformation,

or
where

9.
The terminal voltages are given by,
Ans:

Applying sequence transformation with b – phase as reference phasor,

Now for a bolted fault on b - phase,

i.e.,

or

Thus, to analyze S-L-G fault on b - phase or a - c L-L fault or L-L-G fault we should take b – phase as
reference phasor in sequence computation.

Derive the relationship between zero, positive and negative sequence phasors defined with ‘b' as
10.
reference phasor and
corresponding sequence phasors defined with ‘a' as reference phasor.

Ans: With ‘a' as reference phasor, the sequence transformation is defined as,

With ‘b' as reference phasor,

10.
For zero sequence phasor,
Ans:
Therefore,
Positive sequence phasor,

Since ,

or,

i.e., positive sequence current with ‘b' as reference phasor lags by with positive sequence current
with ‘a' as reference phasor.

Negative sequence phasor,

i.e., negative sequence current with ‘b' as reference phasor leads the negative sequence current with ‘a'
as reference phasor, by .

Review Questions
Derive the relationship between the transformation matrices T a and T c with 'a' and 'c' as reference
1.
phasors respectively.
Derive the relationship between positive, negative and zero sequence phasors with 'c' as reference phasor
2.
with
corresponding sequence phasor with 'b' as reference phasor.
Out of the four fault types (S-L-G, L-L, L-L-G and ) magnitude of which fault current will be the
3.
highest and why?
4. Find the symmetrical components if , and .
The zero, positive and negative currents of phase ‘a' are given by (5+j1)A, (7.5 – j1.2)A and (6+j2)A
5.
respectively. Find out.
, and .

A , 20MVA, 11kV generator with positive, negative and zero sequence impedance j2 , j1.8 and
6.
j0.6 is
connected to a feeder with sequence impedance j1.5 , j1.5 and j4.5 . If a S-L-G fault occurs at the
remote end of the feeder, calculate the fault current.
Find out the ratio of fault currents for S-L-G fault to bolted fault of a generator with ,
7.

and . Comment on your findings.


In a system, the pu values of positive, negative and zero sequence impedances are given by j1.5,
8.
j1.25 and j0.6
respectively. The fault impedance is given by j1 . Determine the fault current for L-L fault and L-L-G
fault.

Recap

In this lecture we have learnt the following:

To calculate sequence components for an unbalanced set of phasors.

To find out the unbalanced phasors from a given set of sequence components.

Relationship between sequence transformation matrices with 'b' and 'c' as reference phasors.

To find out fault currents for different types of faults.

To calculate the sequence impedance of a feeder.


Module 3 : Sequence Components and Fault Analysis

Lecture 12 : Sequence Modeling of Power Apparatus

Objectives
In this lecture we will discuss

Per unit calculation and its advantages.

Modeling aspects of static apparatus like transmission line and transformers.

Modeling of rotating machine like synchronous machines and induction machines.

Formation of sequence admittance matrices.

Evaluation of Thevenin's equivalent.

We begin with a brief review of per unit calculation used in power system analysis.
12.1 Review of Per unit Calculation and Modeling of Apparatus

Per unit value of any quantity is the ratio of that quantity to its base value.

Quantities like voltage, current, power, impedance etc can be expressed in per unit. In the per unit
system, there are four base quantities: base apparent power in volt-amperes, base voltage, base current
and base impedance.
The following formulae apply to three phase system, where the base voltage is the line-to-line voltage in
volts or kilovolts and the base apparent power is the three phase apparent power in kilovolt-amperes or
megavolt-ampere (MVA).

Briefly, the advantages of doing computation in per unit are as follows.

1. Manufacturers usually provide equipment data with name plate rating as base.

2. Range for acceptable % or p.u. values can be easily fixed.


3. Especially useful in networks with multiple voltage levels interconnected through transformers.
4. P.U impedance of transformer is independent of the kV base.
5. Standard base conversion (scaling with MVA Base) formulae are available.

Note: Many books in first course on power system analysis cover per unit in detail. Readers who wish to
go into more details can look into these references.
We now begin discussing on the sequence modeling of power apparatus.

12.2 Modeling Aspects of Static Apparatus

We first consider modeling of transmission lines and transformers.

12.2.1Modeling of Transmission Line


A balanced three phase transmission line model is given by (fig 12.1). The voltage drop across the line in
phase coordinates is given by,

(1)

Applying sequence transformation, we get , and

Where, and
Thus, for a transposed transmission line, the positive and negative sequence impedances are equal. A
commonly used approximation for is to assume it to be three times .

12.2 Modeling Aspects of Static Apparatus


12.2.2Modeling of Mutually Coupled Lines
If a pair of 3 - transmission lines are far enough, then
mutual coupling between them is negligible (or zero). Fig
12.2 shows two three phase transmission lines running
parallel and close to each other. As per Ampere's law,
if the lines , and carry a positive
or negative sequence currents, then flux linking in circuit 2
is zero. The reason for this is
. However, for zero
sequence currents in circuit 1, flux linking in circuit 2 is not
zero. Thus, we see that for parallel coupled lines, mutual
coupling is seen predominantly in the zero sequence
circuit. However, it is not modeled for positive and
negative sequence circuits. The same result can be
mathematically derived as follows.

Consider two three phase transmission lines on the same tower. Assume that both lines are transposed.
Then, all the mutual impedances between the two circuits are equal. Let mutual impedance of phase
with phases , and be equal to . Then the model of such transmission line in phase coordinates
is given by,

Applying sequence transformation we will get,


It can be seen that mutual coupling between positive and negative sequence network of parallel
transmission lines is zero. But, mutual coupling in zero sequence network is not zero. Hence, three phase
faults and line to line faults will not be affected by mutual coupling. However, for all faults involving
ground, fault current will be affected by mutual coupling. This can affect the performance of relays.

12.2.3Modeling of Ground
With positive or negative sequence currents, the ground potential at the two distinct ends of say a
transmission line can be taken as zero. If there is a neutral conductor, no-current flows through it
because phasor summation of such balanced currents is zero. However, the story with zero sequence
currents is a bit different. The summation of zero sequence currents in the three phases does not add to
zero unless, the current itself is zero. Thus, there will be a drop in voltage across the two ground
terminals which depends upon resistance of ground or ground wire. For simplicity, of analysis, this
ground impedance (with a scaling factor of 3) is incorporated in the transmission line impedance of zero
sequence network.

12.2 Modeling Aspects of Static Apparatus


12.2.4Modeling of Transformer
The equivalent sequence diagram for a 2
winding three phase transformer depends
upon (1) magnetic circuit design and (2)
transformer connection. By magnetic circuit
design, we imply different designs like three
phase three limb core, three phase 5 limb
shell, a bank of three single phase
transformers or three phase auto
transformers. For modeling of transformers,
the magnetization branch is usually
neglected because magnetizing current is
very small when the transformer core is not
saturated. Hence, only leakage impedance is
taken into consideration.

The leakage impedance is not affected appreciably by a change in phase sequence (a-b-c or b-a-c) as
the transformer is a static device. Therefore, for transformers, positive sequence impedance and
negative sequence impedance are identical.
However, excitation for zero sequence flux of the transformer depends on the type of core used. For a
core type (fig 12.3) transformer, . This follows from the analogy of KCL. Now, if the

windings of the transformer are provided with zero sequence excitation, then .

Substitutiting it in above equation we get . Practically, the flux, , and will not be zero.
Rather a leakage flux would exist in the high reluctance path through air and transformer tank. Since,
transformer tank is not stacked, it leads to heating of the tank. Hence, - core transformers should
not be preferred for use in systems where load is unbalanced e.g. a distribution system. In contrast,
for a shell type transformer (fig 12.4) there exists a low reluctance path through side limbs for zero
sequence flux. Hence, there is no over heating of transformer tank.

In studies typically involving transformer protection, e.g. estimation of inrush current computation and
overfluxing, saturation of transformer core cannot be neglected. However, such elaborate studies are not
carried out with short circuit analysis programs. Rather, time domain simulation Electro Magnetic
Transient Program (EMTP) is used.
12.2 Modeling Aspects of Static Apparatus
12.2.4Modeling of Transformer (contd..)
In case of a bank of three single phase
transformers, it can be easily argued that for
such a configuration, independent low
reluctance zero sequence flux path exists and
hence appreciable zero sequence flux can stay
in the core. Therefore, zero sequence
impedance of three phase transformer bank
can be as high as the positive sequence
impedance. It should be mentioned that actual
impedance will also include resistance of the
windings. However, ratio of transformers

can be quite high.

To summarize, the positive and negative


sequence reactances of all transformers are
identical. Zero sequence reactance is the
transformer leakage impedance. In 3-phase
core-type transformers the construction does
not provide an iron path for zero sequence.
For these, the zero-sequence flux must pass from the core to the tank and return. Hence, for these
types X 0 usually is 0.85 to 0.9 X 1 , and when known the specific value shall be used. For shell type
transformers which are preferred in distribution systems, zero sequence impedance is same as positive
and negative sequence impedance.
Role of Circuit Connection

So far we have discussed design issues that characterize the zero sequence impedance of a three phase
transformer. However, this impedance may not always appear between the H (HV) to L (LV) bus. In case
of positive or negative sequence currents, there is always a path for line currents from H to L through
the sequence leakage impedance. This is irrespective of the transformer connection (D/Y or Y/Y etc)
because, there is always a path for positive and negative sequence line currents to flow.

However, zero sequence line currents for a transformer depend not only on zero sequence impedance
but also on the type of transformer connection. For example, a star ungrounded winding does not
provide any path for flow of zero sequence current. The neutral current is given by
. Since, neutral is ungrounded and hence is also zero. Delta winding
permit circulating zero sequence currents which cannot appear in the line. (fig 12.5).

12.2 Modeling Aspects of Static Apparatus


12.2.4Modeling of Transformer (contd..)
Fig 12.6 summarizes the effect of winding connections on positive, negative and zero sequence circuit for
3 transformer. N1 indicates neutral bus for positive sequence, N2 indicates neutral bus for negative
sequence and N0 for zero sequence networks.
12.2 Modeling Aspects of Static Apparatus
12.2.4 Modeling of Transformer (contd..)

12.2 Modeling Aspects of Static Apparatus


12.2.4 Modeling of Transformer (contd..)

12.3 Modeling of Rotating Machines

12.3.1 Modeling of Synchronous Machines


12.3.1.1Positive sequence Impedance of Synchronous Generators
The subtransient reactance determines the current during the first cycle after fault occurs. In

about 0.1sec, reactance increases to transient reactance . In about 0.5sec to 2sec reactance

increases to , the synchronous reactance; this is the value that determines the current flow after a
steady state condition is reached.
Synchronous generator data available from manufacturers.

12.3.1.2Positive Sequence Impedance of Synchronous Motors and Condensers


Typically, motors are used in distribution systems. Hence, fault current analysis for distribution
systems requires explicit modeling of electrical motors. During a fault, motor acts as a generator to
supply fault current. The rotor carrying the field winding is driven by the inertia of the rotor and load.
Stator excitation is reduced due to drop in voltage. The fault current diminishes as the rotor
decelerates. The generator equivalent circuit is used for synchronous motor. The constant driving
voltage and three reactance , and are used to establish the current values at three points
in time. Synchronous condensers can be treated in same manner as synchronous motors.

12.3 Modeling of Rotating Machines

12.3.1 Modeling of Synchronous Machines

12.3.1.3Negative Sequence Impedance of Synchronous Machines


For a synchronous machine, positive and negative sequence impedances cannot be equal. In case of a
synchronous machine, negative sequence currents create a rotating mmf in opposite direction to the
rotor mmf. Hence, double frequency emf and currents are induced in rotor. Negative sequence
impedance is 70-95% of subtransient reactance. It can be approximated by subtransient reactance.
For a salient pole machine, it is taken as a mean of and .

12.3.1.4Zero Sequence Impedance of Synchronous Machines


Zero Sequence currents cannot create rotating mmf. In fact, with sinusoidally distributed three phase
windings, the net flux at any point in the air gap is zero. Hence, zero sequence impedance is only a
small % (0.1-0.7) of the positive sequence impedances. It varies so critically with armature winding
pitch that an average value can hardly be given. Since synchronous machines only generate positive
sequence voltage, the internal voltages used with negative sequence and zero sequence networks are
zero. If star point is grounded through impedance , then will have to be added to zero
sequence impedance of generator.
12.3.2 Sequence Modeling of Induction Machines

In asynchronous machines, transient state of current is damped quickly i.e. within 1-2 cycle. During a
fault, rotor is driven by inertia of load and rotor itself. There is no dc field excitation on rotor. Rotor
winding is short circuited. Hence, whatever rotor excitation is present, it is due to the induced fields in
the rotor from the rotating stator mmf. As stator excitation is lost and rotor slows down, this field is
lost quickly.

The current contribution of an induction motor to a terminal fault reduces and disappears completely
after a few cycles. As a consequence, only the sub transient value of reactance is assigned for
positive and negative sequence. This value is almost equal to the locked rotor reactance.

Subsequently, machine behaves as a passive element with impedance of value where rated

LL voltage and 3 phase MVA rating is used. Zero Sequence modeling can be treated in similar lines as
synchronous machines because rotor plays no significant role.

For fault calculations an induction generator can be treated as an induction motor. Wound rotor
induction motors normally operating with their rotor rings short circuited will contribute fault current in
the same manner as a squirrel cage induction motor. Occasionally, large wound rotor motors operated
with some external resistance maintained in their rotor circuits may have sufficiently low short circuit
time constants. Hence, their fault contribution is not significant and may be neglected.

12.3 Modeling of Rotating Machines

12.3.3Modeling of Electrical Utility Systems

The generator equivalent circuit can be used to represent a utility system. Usually, the utility generators
are remote from the industrial plant. The current contributed to a fault in the remote plant appears to be
merely a small increase in load to the very large central station generators, and this current contribution
tends to remain constant. Hence, it is represented at the plant by single valued equivalent impedance
referred to the point of connection.

12.3.4Load Modeling
One approximate way of accounting prefault load flow condition in short circuit analysis associated with
transmission system is to model load as positive sequence shunt impedance.

The shunt load impedances are added into diagonal of .

12.3.5Modeling of Series Capacitors


In many utilities, series capacitors or Thyristor
Controlled Series Compensation (TCSC) as shown in
fig 12.7 is used to boost the transmission line
power flow capacity. The series capacitors have a
negative value of reactance and hence should
increase the fault current levels in their vicinity.
However, across every capacitor, a metal oxide
varistor (MOV) is also connected to limit over
voltages during fault.

Typically, during a fault MOV conducts, and reduces


the capacitive reactance contribution to the
transmission line impedance. Hence, it also reduces
fault current values. Since, the behaviour of MOV is
non-linear i.e., its V-I characteristics are non-
linear, short circuit analysis with series capacitors
becomes an iterative process.
Modeling in three phase domain is usually preferred.
12.4 Sequence Network Admittance Matrix Formulation

Now, that, we have necessary information about apparatus modeling, we can start assembling the
sequence network. A three phase admittance matrix model for power system in phase coordinates can be
expressed as follows:

In the above equation, each entry in the Y-matrix is itself a matrix with a cyclic structure,

. refers to the voltage of a node 'i' and refers to the

current injection at a node i. The sequence transformation on nodal voltages can be expressed as follows:

Similar transformation is defined for current vector. Thus, in the sequence coordinates, the admittance
model is given by the following equation,

12.4 Sequence Network Admittance Matrix Formulation (contd..)


It can be verified that if matrix enjoys a cyclic structure, then

In other words, there is no coupling between the zero, positive and negative sequence components of a
balanced network because matrices and are diagonal matrices. By permuting the
rows and columns in such a way that all the zero sequence, positive sequence and negative sequence
quantities are grouped together, a three phase admittance matrix can be described by three decoupled
sequence matrices as follows,

In the above equation, each of the sequence admittance matrix represents the corresponding sequence
network.
Differences between Y BUS Modeling in Short Circuit Analysis and Load Flow Analysis
Load flow analysis uses only positive sequence
admittance matrix while short circuit analysis requires
positive, negative and zero sequence admittance
matrix. The admittance matrix formulation used in load
flow analysis and short circuit analysis have some
subtle differences. In load flow analysis, the voltage at
generator terminal is assumed to be fixed. Hence,
source impedance and internal generator voltages are
not modeled.
In contrast, in short circuit analysis, the generator
model is an internal emf source (open circuit source
voltage) behind a transient reactance (see fig 12.8)
which leads to equivalent Norton circuit as shown in fig
12.9. Hence, machine sequence impedances admittance
have to be added to the corresponding diagonal entries
of Y BUS in short circuit analysis. Similar remarks hold
for load modeling. Hence, positive sequence Y BUS of
load flow analysis and short circuit analysis are not
identical.

12.5 Short Circuit Analysis Using Sequence Components


Let the prefault network be described by the following model, where 's' can be 0, 1
or 2, are the sequence components under consideration. Typically, for a balanced system representing a
prefault transmission network, . Hence, in the prefault condition, the only equation of

interest is . We use subscript old to indicate the prefault value. Hence, prefault

equation is given by

12.5.1Construction of Thevenin's Equivalent


Estimation of the fault current requires construction of Thevenin's equivalent circuit at the faulted
busses. Interconnection of thevenin's equivalents in sequence domain will depend upon fault type. Faults
in a power system can be classified into shunt faults and series faults. Shunt faults are typically, bus
faults viz. L-L-L, L-L, L-G and L-L-G. An example of series fault is opening of a phase conductor in a
transmission line. A simultaneous fault involves multiple occurances of fault at the same time instant. For
example, a phase conductor breaking and falling to ground is a simultaneous fault which is mix of both
shunt and series faults. Most of above faults can be analyzed in sequence components.

For simplicity, we restrict analysis to bus fault which is created at a bus i . Faults on intermediate points
of transmission line can be modeled by introducing phantom buses. The prefault load flow analysis
(typically carried out on the positive sequence network) provide the Thevenin's (open circuit) voltage
, while the fault impedance is treated as the “load impedance” on the bus.

To compute the Thevenin's impedance at faulted bus 'i' , all the current sources are open circuited (made
zero) and then 1 p.u. of current is injected at bus 'i' . In the vector notations, this process is represented
by current injection vector e i where e i is the column of identity matrix. Then, the equation

is solved by sparse LU factorization and forward backward substitution. The


element of the resulting voltage V i gives the Thevenin's impedance. The computation of Thevenin's
impedance for negative and zero sequence networks proceed on similar lines. The fault currents are
computed by well known sequence network interconnections, discussed in the lecture no. 10.
12.5 Short Circuit Analysis Using Sequence Components
12.5.2Calculation of Short Circuit MVA
When short circuit analysis program is used to determine the rating of circuit breakers, short circuit MVA
at the fault bus is specified. Typically, it is computed for a three phase fault. The following equations
summarize its calculation.

Since, from design considerations, the maximum fault MVA is of interest, the faults considered are
bolted faults. Short circuit MVA is also used to specify the strength of the utility interconnection, while
carrying out fault analysis for distribution system. For example, if short circuit MVA level is specified as
500MVA at the point of interconnection, then on a 100kVA system base, it implies a source impedance of

. A bus with high value of fault MVA is said to be a strong bus and conversely a bus

with low fault MVA, is said to be a weak bus.


12.6 Closing Remarks:
Fault analysis involves quasi-sinusoidal-steady-state modeling of a dynamical system involving fault. It
assumes that (a) the system is stable and (b) network natural transient are neglected. Evaluation of the
system stability i.e. whether post-fault system will retain synchronism or not requires transient stability
analysis. The justification for such approximation in fault analysis is that, it is used to determine rating of
circuit breakers, and pickup settings for relays which depend on fault currents. A more involved analysis
of transient behaviour immediately after a fault (a few cycles) requires usage of Electro Magnetic
Transient Program (EMTP). EMTP models fast transients but usually neglects electromechanical transients
which are essentially slower due to inertia of rotors. Thus, fault current levels can as well be extracted
by EMTP. However, data requirement of EMTP modeling is quite high. In absence of data for such
detailed modeling, short circuit analysis program provide a fast and conservative estimate of fault
currents. However, fault analysis programs cannot model onset of dc offset current.

Many standards like IEC, ANSI/IEEE, VDE specify empirical multiplication factors to obtain the maximum
asymmetrical fault current levels. For industrial systems, an approximate value that can be used is 1.6
i.e. maximum asymmetrical fault current can be taken to be 1.6 times maximum symmetrical fault
current. At transmission system level, this value can increase further. It can be of the order of 2.7-3.0.
Finally, when setting for time delayed relays have to be evaluated (example, setting of backup relays),
then the values of source impedances also have to be altered. Standards specify the requisite
multiplication factors. Considering, all such issues, we conclude that fault analysis is a flavour of both
"science and art".

Review Questions

1. What are the advantages of per unit computation?

2. How does mutual coupling between transmission lines affect the fault current?

Why is the zero sequence impedance of a shell type transformer different than that of a core type
3.
transformer?
The zero sequence impedance of a synchronous machine is small compared to its positive sequence
4.
impedance.

Why?

A fault MVA of an industrial power system at the point of connection with utility system is 50kVA .
5.
On a 100kVA

base, determine the sequence impedances for utility system.

Recap

In this lecture we have learnt the following:

The advantages of per unit calculation.

Modeling of static apparatus.

Effect of mutual coupling on the zero sequence impedance of transmission line.

Modeling of synchronous machines and induction machines.


Sequence network admittance matrix formulation.
Module 3 : Sequence Components and Fault Analysis

Lecture 13 : Sequence Modeling (Tutorial)

Objectives

In this lecture we will solve tutorial problems on fault analysis in sequence domain

Per unit values of all element impedance in the given system.

Reduction of the circuit for the given fault locations.

S-L-G fault current for the given system.

Fig 13.1 shows the single line diagram of a 13.8kV system connected to a 480V bus through a
1.
13.8kV/480V

transformer. Two motor loads of 400hp and 600hp are connected to the bus through three parallel three
core copper cables. If a 3 phase bolted fault occurs at , compute the fault currents. Repeat the
calculations for fault at .

Ans: Let us take base power as 1000kVA and base voltage as 480V.

Then base current

Base impedance

Now, we have to convert all impedances


element into per unit values on a common
base. Here the impedance base is 0.2304
.
Short circuit contribution from 13.8kV
source = 600MVA.
Source Modeling
Short circuit current

ratio = 15
or

1. i.e.
Ans:

i.e. in pu = 0.00011 + j0.00165


1000kVA Transformer Modeling.
= 5.75% = 1.21%

The per unit value of

Per unit value of

i.e. in pu = 0.0121 + j0.0562

Cable Modeling
Length of cable ,
Resistance of one conductor per km = 0.178
Reactance of one conductor per km = 0.108
Since, three conductors are in parallel, equivalent resistance and reactance for 500m length is given by,

Converting and , into per unit,

in pu

= 0.129

in pu

i.e. in pu = 0.129 + j0.078

Cable
1. Ans:
Modeling

Length of cable
Resistance of one conductor per km is given as 0.181 and reactance / km is given as 0.124 . Since,
three conductors are in parallel, equivalent resistance and reactance for 300m cable is given by,

Converting into pu
in pu pu

in pu pu

i.e. in pu = 0.0786 + j0.0538

Motors
Note that 1hp = 746watts; if we assume a
motor power factor of 0.746, then
equivalent motor kVA will be unity. Hence,
we will assume that 1hp is equivalent to
1kVA.
Subtransient reactance = 25%
Ratio = 6

Per unit reactance of motor 1

pu

pu

For motor 2

pu

pu

in pu = 0.069 + j0.416
The equivalent circuit of the system used to calculate the Thevenin's equivalent at node A is shown in fig
13.2. The dotted lines indicate the ground potential.
1. Ans: Fault at
We now desire to compute Thevenin's
impedance at node A.
For fault at , the network as shown in fig
13.2 can be reduced to network as shown
in fig 13.3. Hence, Thevenin's impedance,
is given by,
Therefore, three phase fault current at fault F1

Fault at
1. Ans: F
2

For fault at F2 , the network shown in fig


13.2. can be reduced as shown in fig
13.4.
Calculation of Z

1. Ans:

i.e.,

Therefore, the total three phase fault current at F2

Fig 13.5 shows the single line diagram of a 3 bus system. The sequence data for transmission lines and
2.
generators

are given in table 1. If a bolted single line to ground fault occurs at F, calculate the fault current. If the
fault impedance is j0.1 pu; what will be the fault current?

Ans: Let us take E as 1 pu. For a SLG fault,


Fault current

where Z 0 = Zero sequence impedance


Z 1 = Positive sequence impedance
Z 2 = Negative sequence impedance
We have to find out the Thevenin's
equivalent zero, positive and negative
sequence impedances with respect to
fault F.

Sequence Data in pu
Description
Zero Positive Negative
Generator - A j0.03 j0.25 j0.15
Generator - B j0.02 j0.20 j0.12
Transmission Line 1 j0.14 j0.08 j0.08
Transmission Line 2 j0.17 j0.13 j0.13
Transmission Line 3 j0.10 j0.06 j0.06
Transmission Line 4 j0.12 j0.06 j0.06
2. Ans: Zero Sequence Impedance

For calculating Z 0 , the circuit shown in fig 13.5 is reduced as shown in fig 13.6.
2. Ans: Positive Sequence Impedance

Similarly, positive sequence impedance Z 1 can be found out by reducing the circuit as shown in fig 13.7.
i.e. Z 1 , positive sequence impedance = j0.01 + j0.124
= j0.134 pu

2. Ans: Negative Sequence Impedance


Negative sequence impedance Z 2
For negative sequence impedance the circuit can be as shown in fig 13.8.
i.e. negative sequence impedance
= j0.09 pu

Now, fault current

If fault impedance , then

Review Questions

1. Calculate the symmetrical fault currents at locations F1 and F2 of fig 13.9.


2. For the system shown in example no. 2 , find out the fault current for
a) SLG fault with j0.1fault impedance.
b) L-L fault and L-L-G fault between b - c phases.
L-L fault and L-L-G fault with j0.1fault impedance. Single line diagram of this question is shown in fig
c)
13.5.
Single line diagram of a system is shown in fig 13.10. The base value is taken as 30MVA, 34.5kV. The
3.
positive and
negative sequence impedances of load are , respectively. Load voltage is
kept at 1.0 pu. Calculate the fault current for fault at F. Assume that zero sequence reactance of
generator is zero.

Recap

In this lecture we have learnt the following:

To calculate per unit values of different elements in a system.

Reduction of the given complex circuit for different fault locations.

Three phase symmetrical fault current calculation.


Fault current calculation of the given system.
Module 4 : Overcurrent Protection

Lecture 14 : Fuse Protection

Objectives

In this lecture we will learn the following:

Abnormality and faults.

Source for fault currents.

Fuse for overcurrent protection.

Melting time and total clearing time of Fuse.

Very inverse characteristic of Fuse.

Physics of ARC interruption.

Types of HV fuses viz, expulsion, vacuum and non-expulsion fuses and their functionality.

14 .1 Abnormality and Faults


When an equipment (e.g. transmission line, transformer, generator, motor) is operating within the rated
specifications (speed, voltage, current etc.), we say that it is in the normal state. Therefore, abnormal
state pertains to deviation from the rated operating point. It may refer to overcurrent, under voltage, over
or under frequency. If the apparatus continues to operate in this state for long enough time, it can lead to
damage or reduction in life of the equipment. On the other hand, it may be also unsafe to operate in this
region. A fault refers to a serious abnormality which typically requires immediate deenergization of the
equipment.

Usually, faults are considered dangerous because of overcurrent that they create. This can damage the
apparatus and it endangers the human safety. Three phase faults, Line to Line faults (LL), Single Line to
Ground fault (SLG), Line to Line Ground faults (LLG) are some standard faults considered in our analysis.
Three phase faults and Line to Line faults are also known as phase faults while Single Line to Ground and
Double Line to Ground faults are also known as ground faults. However, not all faults create large
overcurrents. For example, earth faults which may result due to partial insulation failure may not create
large currents. However, it makes operation of the equipment unsafe from human safety perspective and
further, if the fault is left unattended it can aggravate.

Fig 14.1 illustrates various aspects


in this process. In the normal
state, all system variables are
within the normal range.
Abnormal state reflects an
increase in possibility of a
disturbance. Severe disturbance
results in a faulty state. If the
fault is temporary then the
system returns to normal state.
Permanent fault requires isolating
the equipment. Post-fault
maintenance (restorative state),
of the equipment can be
recommenced.
Typically, power system
protection, refers to fault
detection and deenergization of
the equipment. In contrast,
condition monitoring refers to
monitoring the equipment to
detect possibility of equipment
failure. Condition monitoring and
good maintenance can reduce a
number of potential faults.
14.2 Sources of Fault Current

This lecture deals with overcurrent protection for radial distribution systems. In a radial system with single
source, the magnitude of fault current depends upon the following:

Source contribution (Source voltage and impedance).

Transformer impedance.

Motor contribution (Back emf and impedance of induction and synchronous motors).

Distance of fault from the source.

Meshed system or a system with multiple sources require directional relays discussed in subsequent
lectures. The first step in the overcurrent protection is estimation of the fault current. If the system is
radial and fed from a single or equivalent source, this job is simplified. For conservative calculation, utility
source impedance should be considered as zero (unlimited MVA supplying capacity). The reason for this
assumption is that, changes in utility system, addition of generators, strengthening of transmission
network etc. can reduce the source impedance. Consequently, the maximum fault current is limited by the
impedance of the distribution transformer. In a single source radial system, typically fault current reduces
as we move away from the source (an exception being a system with large motor loads at the remote
ends). The transformer short circuit current can be calculated from this formula,

Isc = [( Transformer Full Load current ) x 100 / (% z)]


Any motor e.g. induction, synchronous condenser or motor etc. must be considered as a source for
calculating fault current in the first few cycles. For the sake of simplicity and because of its large usage,
we consider only induction motor load. Further, when calculating short circuit current it is a common
practice to lump all motors that are grouped together. In other words, they are treated as if they are on a
common bus. Assuming a group motor subtransient reactance (X") of 25 %, the typical contribution is 4
times full load current.
14.3 Introduction to Fuse

Terminology ‘Fuse' does not require any introduction. A ‘fuse' refers to a device that opens a circuit with
fusible part, which is heated and severed by current flowing through it. The fusible part is also called the
“Element”. When current flows in a fuse, heat is generated and the element temperature rises. If the
current is within (less or equal to) its continuous rated value, then the steady state temperature is such
that the fuse does not melt. However, if the current has large enough magnitude, it will lead to the fuse
element to melt before the steady state temperature conditions are achieved. After melting, an arc may
be struck. The fault current will be finally interrupted when the arc is de-ionized. Thus, fuse operation
involves two phases viz. melting and current interruption.

An enormous variety of fuses are available today. In terms of quantity, fuses outnumber any other over
current protection devices. They provide economy in protection as well as flexibility in rating and time
current characteristic. They are used for overcurrent protection of transformers, capacitors and lateral
taps in distribution systems.

Fig 14.2 shows location of fuses in a distribution system. Each transformer and capacitor bank has fuse
protection to selectively disconnect the device in case of a fault in the device. Transformer fuses can also
provide overload protection. The sectionalizing fuses are used to divide the system into smaller sections
which can be then isolated from the rest of the system. For the fault F1 or F2 it is the responsibility of
fuse A to operate. Thus, only customers connected to this line are affected. In absence of fuse A, fuse B
would have to be operated but this would lead to a interruption in service to larger number of customers.
Role of reclosers will be discussed in later lectures.
14.4 Fuse Characteristics

Fuses are characterized by ‘thermal' and 'interrupting' characteristics. Thermal characteristic are quite
intuitive and relate to the following:

Current rating.

Melting characteristics.

Interrupting characteristics refer to the following:

Voltage rating.

Interrupting rating.

14.4.1Thermal Characteristics

As the magnitude of the current increases, melting time


reduces. It should be obvious that larger magnitude
currents will lead to higher power dissipation (I 2 R) in
the fuse and hence faster rise in temperature of the
element. This would imply that melting time of the fuse
should be inversely proportional to magnitude of square
of current. The relationship between the magnitude of
the current that causes melting and the time needed for
it to melt is given by the fuse's melting time current
characteristics (TCC). To cover a wide range of currents
and operating time, TCC is plotted on a log-log paper.

The current is the symmetrical current. The current on


x-axis is the symmetrical current. It does not involve dc
offset current. Further, fuse does not carry initial current
and ambient temperature is between C and C
(IEEE Std 37.41-1994). Since, the melting time vary in
a range, minimum melting time curve is plotted as
shown in fig 14.3 .

The severing of fuse element is a primary consequence


of thermal effect. It does not depend upon mechanical
forces, inertia etc. Thus there is no limit on how short
the melting time can be. This extremely small melting
(fast operation) of a fuse at very high currents tends to
distinguish it from most other protective devices.

14.4 Fuse Characteristics

14.4.2Interrupting Characteristics

It is important to realize that power apparatus and


systems contain inductive elements. Hence, melting of a
fusing element is not sufficient to interrupt the current.
Consequently, there is always some period of arcing
before the current is interrupted. During this period, fuse
must withstand any immediate transient voltage condition
and subsequent steady state recovery voltage. Addition
of melting time and this arcing overhead gives the total
clearing time.

Total clearing TCC curve (fig 14.4) describes this


information. For lower currents, melting time can be
large and arcing time small because of lower stored

energy in induction circuit. In contrast, for large

currents, melting time is small but the arcing time is


large. Hence, TCC for melting time and total clearing time
diverges as increases.

Both of these characteristics are required to coordinate


back up fuse or overcurrent relay or any other protective
devices. Back up device should provide sufficient
'opportunity window' (time) to primary fuse to clear the
fault. This ensures selectivity. Recall that selectivity
minimizes loss of service.

14.4.3 Very Inverse Melting Characteristic


Fuse melting time characteristic is usually described in literature as “very inverse”. To understand this,
we need to address the physics of the problem. When overcurrents are smaller in magnitude, rate of
heat generated in the element is low and only slightly higher than rate of dissipation. As a consequence,
temperature of the element increases gradually. As the current increases, melting time reduces at a rate
which is more than expected increased rate of heat generation (I 2 R). This is because, heat which is
generated in reduced cross section and/or centre of element, cannot be removed as fast as it is
produced. This gives fuse a very inverse characteristics. At very short melting times, no heat is lost
from the smaller cross section of the element.
14.4 Fuse Characteristics

14.4.4Voltage Rating

So far we have not broached the subject of voltage rating of a fuse. However, even a fuse has a
maximum rated voltage. It is the highest voltage at which fuse is designed to operate and it is important
that a fuse should not be asked to interrupt current above this voltage. Faults can be line to ground or
line to line. When applied phase to ground on three phase systems, the voltage rating of the fuse should
equal or exceed the phase to ground system voltage. When applied in the line on the same system, the
conservative approach is to choose the fuse voltage to be equal to system phase to phase voltage.
Sometimes, for a fuse both maximum and minimum interrupting currents are specified.

14.5 Types of Fuses

Fuse can be classified into two types (see the chart below)

14.5 Types of Fuses


1. Non-Current Limiting Fuses (Expulsion type)
The expulsion type fuse is used where expulsion gases cause no problem such as in overhead circuits and
equipment. These fuses can be termed as current awaiting types; and the function of interrupting medium
is similar to that of an ac circuit breaker. The temperature of arc is of the order of 4000-5000K. At this
temperature special materials located in close proximity to fuse element rapidly create gases. Preferred
gas generating materials are fiber, melamine, boric acid and liquids such as oil or carbon tetrachloride.
These gases help to create a high pressure turbulent medium surrounding the arc, thus when the current
does reach to zero and the arc channel reduces to a minimum; the ablated gases rapidly mix with
remaining ionized gas and thereby deionize them as well as remove them from ‘arc area'. In turn, this
leads to rapid build up of dielectric strength that can withstand the transient recovery voltage (TRV) and
steady state power system voltage.

TRV for expulsion fuse is shown in fig 14.5. Note that in an inductive circuit, current zero occurs at
lag to voltage i.e. when voltage is at maximum value. The action of interrupting medium causes TRV to be
seen in this region.
14.5 Types of Fuses
2. Vacuum Fuse
Vacuum fuse is a non expulsive fuse but still a current zero awaiting type. The design, operation and
current-voltage-time relationship of this fuse closely matches with that of an expulsion fuse. The main
difference is that it is a completely sealed unit and no expulsion action. Interruption occurs because of
rapid dielectric build up that occur in a vacuum after current zero is reached.

3. Current Limiting Fuse

Suppose that an overcurrent protective element could insert a large resistance in series during fault
current. This would then improve the power factor in the fault circuit which otherwise is more or less
inductive. Thus, the zero crossing of the current and voltage would be in phase. This implies that when
the arc is extinguished temporarily at current zero, the applied voltage across it will also be zero. This
should be contrasted with expulsion type or current awaiting type fuse where typically, I(t) = 0, V = V m. (
phase lag in an inductive circuit). If at current zero, V(t) = V m, then the presence of a large electric
field does not help in quick de-ionization. In contrast, when the current zero and voltage zero are in
phase, then when the temporary arc is extinguished, the dielectric medium will be quickly de-ionized.
(This also reduces TRV. Inclusion of higher resistance also reduces peak value of current.)
This leads to speeding in fuse action. The
primary question however, is how to insert
the high resistance in series. Basically, the
current limiting fuses attempt to constrict
the arc and it is cooled by sand.

A typical current limiting fuse is shown in fig


14.6 . In this case, the fusible element is
very long. The element is completely
surrounded with filler material, typically
silica sand, to contain the arc as well as
maintain a very high pressure in the long
restricted arc area caused by the practically
simultaneous melting of the full length of
element. This then allows the fuse to
produce a very high resistance in the circuit
in a very short period of time (typically
hundreds of µsec).

14.5 Classification of Fuses

3. Current Limiting Fuse


The current – voltage time relationship is shown in fig
14.7. We now conclude this lecture, by briefly
discussing the physics of arc interruption. Simplified
fault current circuit is shown in fig 14.8.

E arc (t) is the arc voltage and V(t) is the source


voltage, then differential equation governing the circuit
is:

14.6 Physics of Fuse Interruption


The equation brings out the following concepts;
The current is proportional to the area under the difference of source and arc voltage. The inductance
1.
provides a stored
energy and the necessary voltage to sustain the current even if the instantaneous arc voltage of the fuse
momentarily exceeds the source voltage.
2. Thus, a higher source voltage will adversely affect the interruption of current.
3. Conversely, a high fuse arc voltage, sustained over time will help in greater limitation of the fault current.
4. Lower the inductance, higher the available prospective fault current.
14.6 Physics of Fuse Interruption
Fig 14.9 and fig 14.10 shows the
function of expulsion type and current
limiting fuses. Notice that in expulsion type
fuses, arc voltage is low, the peak first cycle
current is not limited and current is
interrupted after one or two loops at near
nominal current zero. In contrast, in current
limiting fuse, high arc voltage resulting in
substantial current limiting capacity with
advanced current zero. This condition is

achieved at time ti, when

14.7 Power class and Distribution class fuses :


Fuses can also be classified by their domain of application. Based on this approach they are classified into
following types:

Power class.

Distribution class type.

Power fuses are tested to TRVs and X/R ratio values more likely to be encountered in or near the
generating station or substation for three phase circuits. Distribution fuses have specifications more
closely matched to distribution system which is further away from source or substation on a single phase
or three phase system.
Review Questions
1. Differentiate between abnormal state and faulty state.

2. What are the advantages and disadvantages of fuse?

3. Define the following terms:


a) Available fault current.

b) Interrupting rating.

c) Voltage rating.

4. Explain the physics of arc interruption in a fuse.

Explain how does a current limiting fuse, insert a high series resistance in the fault circuit? What benefits
5.
does it

achieve?

Recap

In this lecture we have learnt the following:

Available Fault Current: This is the maximum rms short circuit current that flows to a faulted node or
point. The

magnitude is limited by the ac impedance to that specific point. The impedance is the sum of the utility
source impedance and the in-plant circuit impedance.
Continuous Current Rating: As with all overcurrent devices, most fuses are limited to a continuous loading
of 80% of

their label rating. This is due to the mutual heating between switch, fuse and adjacent devices.

Current limiting Fuse: First generation fuses, e.g. expulsion type, only limit the duration (time) of the
fault. The modern

current-limiting fuse, however, not only limits the duration of the fault, but also limits the magnitude of
the fault.
Interrupting Rating: This is the maximum current that overcurrent device can safely interrupt at a
stated voltage,

frequency, and short circuit power factor. Interrupting ratings are expressed in rms symmetrical amperes.
It is common for a device rated 200 000 A to have an abbreviated marking such as 200 KA IR.
Voltage Rating: The rms alternating current voltage at which the fuse is designed to operate. Fuses of
the 600 V class

will always function safely on a lesser voltage. For example 600 V fuses are typically used on 480 and 208
V.

Congratulations, you have finished Lecture 14. To view the next lecture select it from the left hand side
menu of the page
Module 4 : Overcurrent Protection

Lecture 15 : Fundamentals of Overcurrent Protection

Objectives

In this lecture we will

Discuss the fundamental principle of operation of an overcurrent relay.

Define PSM and TMS of a relay.

Classify overcurrent relays based on its TCC.

Discuss backup protection and relay coordination.

15.1 Fundamental Principle of Overcurrent Relay


15.1.1 Limitations of a Fuse
Advantage of fuse based protection is its simplicity and cheapness. However, with fuses it is difficult to
control the time to trip. This creates difficulty in primary-backup coordination activity. Also, once a fuse
melts, unless it is replaced, the equipment cannot be energized again. Thus, it is not possible to have
remote operation. This motivates development of an overcurrent relay.

15.1.2Model Algorithm for Overcurrent Relay


Whenever, we discuss overcurrent, it should be realized, that there is an implicit upper limit on current
which is considered healthy. Typically, this reference is the maximum load current that an equipment
can endure during continuous operation. Also, faults (short circuits), lead to overcurrents. Thus, a simple
protection philosophy that could be easily implemented by a microcontroller or microprocessor would be
as follows:
Algorithm A : Model Algorithm for Overcurrent Relay

Set reference or threshold for discriminating overcurrent I ref.

Measure the device current I. This may correspond to the rms value of the fundamental
component of the current.

Compute ratio abs(I / I ref).

Since currents are measured through current transformer, both I ref and I should be referred to
either primary or secondary of the CT. This ratio abs(I / I ref) is called the Plug Setting
Multiplier (PSM). The value of PSM indicates the severity of the fault as seen by the relay.
Trip the device, if PSM is above the threshold. The threshold should be strictly greater than 1,
e.g. 1.5.

Usually the rated secondary current is standardized to 5A. Typical, CT rating are 100:5, 500:5, 1000:5
etc. The primary rated current is chosen in such a way that under load conditions CT current is a bit
lower than 5A. If the full load current is much below 5A, it indicates under-utilization of CT (Vice-Versa).
Because of the above CT ratio selection philosophy, many times we may find I ref to be 5A.
15.1 Fundamental Principle of Overcurrent Relay

15.1.3Plug Multipier Setting


The principle of overcurrent relaying is as shown in fig 15.1. The first step is to read the device current.
Device current is scaled down by a CT and then digitized by an A/D converter. The magnitude of the
fundamental component can be estimated from current samples by using various parameter estimation
methods. These methods will be discussed in more details in subsequent lectures. In the next step, the
input current is compared with the reference current. If sign of is positive, then it indicates possibility
of a fault. The ratio I / I ref is also known as Plug Setting Multiplier (PSM).
15.1 Fundamental Principle of Overcurrent Relay
15.1.4Time Multipier Setting

Overcurrent relays have to play dual


roles of both primary and backup
protection. For example, in a radial
distribution system, there may be
more feeders downstream. If the
downstream fuse or relay R 1 or
circuit breaker fails to detect the
fault and/or isolate the equipment,
upstream relays/CBs R 2 have to be
opened. (see fig 15.2).

In the previous lecture, we have


seen that in a distribution system,
the primary protection at lateral
point is provided by a fuse. The fuse
has inverse time-current
characteristics. The back up
protection to fuse is provided by
overcurrent relays at feeder point.
So to replicate fuse behaviour, an
overcurrent relay also has an in-
built inverse nature.
The upstream relay action (e.g. R 2 )
should be initiated if and only if
downstream relay (e.g. R 1 ) has
failed. Thus, back up action requires
a wait state. Note that a fuse did
not have this flexibility of providing
the wait state. For this purpose, in
an overcurrent relay, an additional
feature of Time Multiplier Setting
(TMS) is provided. The basic idea is
that by increasing or decreasing the
TMS, the relay operating time can
be increased or decreased
proportionately.
Fig 15.3 illustrates the characteristics of a overcurrent relay. The characteristic is inverse as in case of a
fuse. By increasing or decreasing the TMS, we can move the characteristic up or down. Formally, TMS is

defined as the ratio where, for a given PSM T is the desired relay operating time and Tm is the

corresponding operating time at TMS of 1.0. TMS is also referred to as TDS (Time Dial Setting).

15.1 Fundamental Principle of Overcurrent Relays


15.1.4Time Multipier Setting
Two fundamental requirements of protection are as follows:
1. Primary protection should be fast.
Back up protection should act if and only if primary protection has failed. Hence, it is intentionally slow.
2.
This provides
selectivity.
For relays which do not have co-ordination responsibility (e.g. relays at the leaf nodes), usually TMS can
be set to the minimum. With the knowledge of PSM and TMS, the desired relay operating time is
calculated. Consequently, in fig 15.1, which depicts a numerical overcurrent relay, a down counter is
initialized. If the overcurrent persists even after the counter reaches zero, a trip decision is issued. If the
fault is cleared by some other relay or there is a transient or if fault itself is temporary; then current I
may reduce below I ref before the counter resets. Then, the timer is decremented until it reaches zero but
no trip decision is issued.
15.2 Types of Overcurrent Relay
Various Time Current Characteristics (TCCs) for overcurrent relay are used in practice. Salient features
are described below:
Instantaneous Relay (no intentional time delay) : The operating time of an instantaneous relay is of
the order of a few milliseconds. Traditionally, such a relay has only the pick-up setting and it does not
have any TMS. As the name indicates, it's action is fast. It is used when it is obvious that large fault
currents are the consequence of fault on the equipment being protected by the relay e.g., close-in fault
on a long feeder. This relay is not suitable for backup protection.
15.2 Types of Overcurrent Relay
Time delayed Definite Time Relay : A definite time over-current relay can be adjusted to issue a trip
output after a specified delay when the relay picks up (PSM>1). This delay is fixed and it is independent of
PSM value. Thus, it has a adjustable time setting as well as a pick up adjustment. It is used for short
length feeders where the fault current does not change significantly with the location of the fault across
the feeder.
Fig 15.4 illustrates an overcurrent protection scheme for radial distribution system of fig 15.2, with definite
time relays. Relay R 1 does not have any coordination responsibility and hence it can trip without any
intentional time delay. Relay R 2 has to coordinate with relay R 1 and hence its time of operation is delayed
by time equal to Coordination Time Interval (CTI). Relay R 3 has to back up R 2 . Hence its time of
operation is delayed by another CTI. Thus, we see that as we move along towards source, the relaying
action slows down. Typically, there is an upper limit on any fault clearing time in the system and it equals
approximately 1sec. This limit would be hit near the relay close to source.

Example: Consider a CTI of 0.3sec. Then what is the maximum length of a radial system of a feeder that
can be protected by overcurrent relay. Assume, that primary protection uses DT relays and primary
protection time should not be more than 1sec.

Answer: Let 'n' be the maximum number of feeder sections that can be protected by overcurrent relays

and let TOC max be the upper limit on the speed of primary protection. Then . Thus

overcurrent relays should be used over a limited length in the 3 feeder sections.
15.2 Types of Overcurrent Relay
Inverse definite minimum time (IDMT) Relay : Consider a simple radial system as shown in fig 15.5.
In this case the relay R 1 would have
to backup the fuse. Now, if we use a
definite time relay to coordinate R 1
with fuse, the coordination.
characteristics would appear as
shown in fig 15.6.

In this case, it is seen that after


point X, the relay acts faster than the
fuse for fault in the section XB.
Thus, it is not the fuse but the relay
that operates to clear fault in this
section. This, unnecessarily leads to
lack of service to a load at node A.
This lack of coordination is a
consequence of the fact that fuse
and definite time relay having
different characteristics. The problem
can be solved if the relay
characteristics are also shaped
similar to the fuse. It will have the
dual advantage of clearing larger
fault current quickly and easily
coordinating with the fuse. This leads
to development of an inverse
characteristic for overcurrent relay.

This is probably the most widely used


characteristic. It is inverse in the
initial part and tends to approach a
definite minimum operating time
characteristic as the current becomes
very high.

Various inverse current operating


time characteristics of a relay are
shown in fig 15.7. They are normal
or standard inverse, very inverse and
extremely inverse characteristics.
15.2 Types of Overcurrent Relays

Very inverse time


The inverseness of this characteristic is higher than that of the normal inverse characteristic (fig 15.7).

Extremely inverse time


The inverseness of this characteristic is even higher than that of the very inverse characteristic (fig 15.7).

These relays are preferred where less time of operation of relay is required. Table - A summarizes the IEC
standard equations governing inverse characteristic. Similar equations are also described by other
standards like ANSI/IEEE. Also with many electromechanical relays, the inverse characteristic does not
follow any of the standard equations. Then , the manufacturer supplies experimentally determined curves
for the specified relay.
Table - A : IEC Inverse Characteristic Equations
IEC SI (Standard Inverse) IEC VI (Very Inverse) IEC EI (Extremely Inverse)

As PSM approaches unity, it is clear from above equations that relay operating time increases to infinity.
With electromechanical relays, usually manufacturers do not guarantee accuracy of the relay operating
time in the PSM range 1 to 1.5. Hence, traditionally PSM of an overcurrent relay is set above 1.5.
However, in principle, such restrictions do not apply to numerical relays. Our next task would be to
understand the methodology of setting Is and TMS of overcurrent relays. Hence, we now discuss
guidelines for setting overcurrent relays. We begin with the classification of the faults.
15.2 Types of Overcurrent Relays

Table - A : IEEE Inverse Characteristic Equations (Source : MiCOM P540/ALSTOM)


IEEE Moderately Inverse IEEE Very Inverse IEEE Extremely Inverse

US CO8 Inverse US CO2 Short Time Inverse

Normal range of TD is 0.5 to


15

15.3 Guidelines for Setting pick up current for phase fault protection
Faults are classified into two types:
a. Phase Faults: They do not involve ground.
e.g. three phase and Line to Line fault.
b. Earth Faults: As the name indicates earth
faults involve ground e.g. Single Line to
Ground, Double Line to Ground.
For electromechanical relays we require a
separate CT for ground fault detection as
shown in fig 15.8. For numerical relays
only three CTs and one relay are
necessary.
Guidelines to be followed for phase fault
protection are discussed below:
(1) Pickup current should be above maximum
load current seen by the feeder. This
ensures that relay does not trip on load.
Typical norm is to set I ref > 1.25 I Lmax .

(2) Pick up current should be below the


minimum fault current i.e; I ref < If min.
This ensure that protection system
operates for low as well as high fault
current. During this condition, in the
utility least number of generators are in
service. Hence, this coordination occurs at
light load condition and at the remote end
of the feeder.
Pick up current should also be below the minimum fault current of the feeder that it has to backup.
(3)
Otherwise, a relay's
backup protection responsibility will not be fulfilled.

Remark: If (1), (2) and (3) can not be satisfied simultaneously, then overcurrent relays cannot be used
for protection. Alternatives are distance or pilot protection.

For a fault on the feeder being backed up, the relay should provide sufficient time for the corresponding
(4)
primary relay to
act before it issues tripping command. This interval is called CTI (co-ordination time interval). Typically,
CTI is about 0.3 sec. It consists of
CB operating time+ Relay operating time+ Overtravel (time for electromechanical relay) + Factor of
safety.
Guidelines for earth fault protection would be discussed in a subsequent lecture.
15.4 Back up protection by time discrimination
We now discuss the problem of relay setting and coordination. Relay setting and coordination involves
primarily following steps:

Identify all possible Primary-Back-up relay pairs.

Decide the correct sequence for coordination of relays.

Decide the pickup value and hence PSM for relays.

Compute the TMS to meet the coordination.

Validation of the results.

Overcurrent relays are used in distribution


systems which are radial in nature (no
loops). Thus, they can be modeled by a
directed tree having typically one source.

Fig 15.9 shows a coordination tree. Actual


system is shown in fig 15.10. Except at the
leaf nodes, the topology of the graph is
identical to that of disribution system; the
mapping from distribution system to tree
is self explanatory. Each node in the tree
indicates a relay. An edge exists between
two nodes of the tree if, the corresponding
relays have a primary backup coordination
relationship. The source node is also called
as the "root node". The terminal nodes
except the source node are referred as leaf
nodes.

In a directed tree, nodes have parent child


relationship. Parent node of a node A
refers to the adjacent node which supplies
power to node A. In a tree, each node
except source node has a unique parent.
Conversely, a node fed by the parent is
called a child. Root node has children but
no parent. Similarly, leaf nodes have
parent but they do not have any child.
Note that except at leaf nodes, a relay
plays the dual role of primary and back up
protection.

15.5 Identification of primary backup relay pairs


Model algorithm for identifying primary - backup relay pairs is as follows:
Intialization: Identifying, leaf nodes and root node. Set step counter k to 1. List leaf node relays as
primary relays. Record the relays in row 1 of table called relative sequence matrix. Set active child nodes
to leaf nodes. Set these relays in the first row of a table called relative sequence matrix.
Main Step: While there exist a parent node that is not equal to source node; do the following
(a) Find parents of the active child nodes.
(b) The corresponding relays back up the leaf node relays. Store, the relays in row k + 1 of RSM.
(c) Update active child nodes to corresponding parent nodes in step - a.
(d) Update k = k + 1.
For this particular example, there are 5 steps required in relay coordination. Identification of primary back
relay pairs begins at leaf nodes. There is no constraint involved in setting the relay at leaf node, as they
have no backup protection responsibility. Their sole role is to do primary protection, as quickly as possible.
Therefore, these relays can be set first (step 1 in fig 15.10). The reader should step through the
interactive example to obtain the feel of these steps. The relays to be coordinated at each step are
summarized in Table B.

Table B : Relative Sequence Matrix

Step Set Relays Coordinate with relays

Step 1 R 1 , R 2 , R 3 , R 4 , R 5 NIL

R 6 with R 1 , R 7 with R 2 , R 8 with R 4 , R 9 with R 5 , R 10


Step 2 R 6 , R 7 , R 8 , R 9 , R 10
with R 3

Step 3 R 11, R 12, R 13 R 11 with R 8 , R 12 with R 9 , R 13 with R 6 , R 7

Step 4 R 14, R 15 R 14 with R 10, R 13 and R 15 with R 11, R 12

Step 5 R R with R and R


16 16 14 15

This table is also referred as Relative Sequence Matrix (RSM). The sequence for relay coordination is
recorded in the above table.
15.6 Identification of primary backup relay pairs

15.7 Setting and Coordination of Overcurrent Relays in a Radial system


Once, the primary and backup relay pairs have been unidentified along the sequence of setting as in Table
B, we can start determining to relay setting (PSM setting) and coordination (TMS) activity. The relay
setting or co-ordination begins at the leaf node. This is because, there are no relays to be backed up. For
the relays in the first row of RSM, TMS is set to the minimum value.

If the PSM or relays has not been set so far, we set the PSM. At the same time we set the PSM of the
backup relays. Then, the TMS of the back-up relays is computed so that they maintain at least a time
delay equal to CTI with all primary relays. Note that a relay may have to back up multiple relays. Then,
we delete the leaf nodes, update the coordination tree and this process is repeated until we hit the source
node. Algorithm B, describes the steps in relay coordination.

Algorithm B : Setting and Coordination of Overcurrent Relays in a Radial system

Step 1 Initialize the coordination tree.

Step 2 Are there any leaf nodes except the root? If yes, go to step - 3, else to step - 7.

Step 3 Identify the leaf nodes in coordination tree.

Step 4 If the PSM and/or TMS of these relays have not been set so far, set them.

Identify the parents of leaf-nodes in step - 3. Compute their PSM and TMS for backup protection and
Step 5
co-ordination.

Step 6 Delete the leaf nodes. Update the co-ordination tree and go back to step - 2.
Step 7 The co-ordination activity is now complete.

Review Questions

1. What are the main advantages of overcurrent relay over fuse?

2. Explain the principle of operation of an overcurrent relay.

3. Distinguish between PSM and TMS of a relay.

4. How is backup protection provided in a radial system?

5. What are the various Time Current Characteristics available for an overcurrent relay?

Recap

In this lecture we have learnt the following:

Advantages of overcurrent relay over fuse.

Principle of operation of an overcurrent relay.

Primary protection and backup protection.

Time current characteristics of a relay.

Setting and coordination of overcurrent relay in a radial system.


Module 4 : Overcurrent Protection

Lecture 16 : PSM Setting and Phase Relay Coordination (Tutorial)

Objectives
In this lecture we will solve tutorial problems for

PSM setting and relay coordination for phase fault.

Providing backup protection by time discrimination.

Evaluating the performance of CTs and relays.

Effect of fault type on CT burden.

16.1 PSM setting for primary and back-up protection

To explain intricacies of the problem, let us consider a radial system in the fig 16.1. Fault under
consideration is a 3 - phase fault. Relays used have Normal Inverse, IEC standard characteristics.
Coordination time interval CTI is 0.3sec. It is required that primary protection should fulfill its
responsibility within 1.0sec of the occurrence of fault.

The relays along with Circuit Breaker are labeled as R 1 , R 2 , R 3 , R 4 . The bus loads and fault currents are
tabulated in Table 1. It is obvious that pick up current settings for the relays should be above the feeder
load currents and not the bus load currents. In fact, one should consider the maximum possible loading
conditions, to decide conservatively pick-up current settings. A rule of thumb is to set the pick-up current
at 1.25 times maximum load current. Another 'rule of thumb' is to limit pick-up current to 2/3rd of the
minimum fault current. This decides the range available for setting relay pick-up.

Table 2 details the calculations associated with setting of overcurrent relays. It shows both the minimum
fault current and the maximum load current. Now ideally, one can set the pick up current of the
overcurrent relay anywhere within the maximum feeder load current (column 2) and minimum fault
current (column 3). However, as explained in the previous lecture, with electromechanical relays, we
should not allow PSM to be below 1.5. Since I p = If min/PSM, upper limit on PSM sets lower limit on I p ,
which is equal to If min at PSM = 1.5. For example, pick up of relay R 1 can be set between 62.5 A

to 167A. In this example, we choose pickup of R 1 to be 160A.


16.1 PSM setting for primary and back-up protection (contd..)

Table 1 : Data for Phase Relay Setting and Coordination

Bus Maximum Load Minimum Fault Current Maximum Fault Current

bus A 50 250 500

bus B 50 650 1200

bus C 100 1100 2000

bus D 50 1600 3500

Now to decide the pick-up current of relay R 2 , it is not adequate to just look at the minimum fault current
of section CB. This is because, relay R 2 also has to back up the section BA in case relay R 1 or the its CB
or the associated circuitry fails. Hence, minimum fault current to be protected by relay R 2 is also 250 A.
Now one can choose pick up current of R 2 to be equal to R 1 . However, if we use same TMS setting for R 2
as R 1 then it leads to a serious conflict of interest between relays R 1 and R 2 with both of them competing
to clear the fault. If R 1 clears the fault F1 first, then there is absolutely no problem. But if R 2 clears the
fault first then, there is an unwanted loss of service to load at node B. This brings out another additional
requirement for relay R 2 viz. it should give preference to relay R 1 for faults on section BA. This can be
achieved in two ways:
1. The relay R 1 sends a blocking signal to relay R 2 .
2. Relay R 2 conservatively waits for a specified time for relay R 1 to act (time discrimination principle).
In the absence of the communication channel availability, alternative 2 is the only viable option.
16.2 Relay coordination for Phase fault Relay
In this example, we will use IEC - SI characteristic for all relays R 1 - R 4 . Various steps of PSM setting are
summarized in Table 2.

(1) Used for evaluating TMS of R 2 .


This interactive table works out the relay setting and
(2) Used for evaluating TMS of R 3 . coordination in fig 16.1. It is visualized by fig 16.2.
The descriptive explanation of various steps follows:
(3) Used for evaluating TMS of R 4 .

Step 1
In this step, we will set relay R 1
Choose for relay R 1 TMS = 0.025. No intentional time delay is provided because R 1 does not have backup
responsibility.
Relay 1 (R1 )
As explained before, pickup current of R 1 = 160A.
For fault on section AB (Ifmax = 500 A):
PSM = Fault Current / Actual Pick up = 500/160 = 3.125
TMS = 0.025
Operating time using IEC SI TCC.

= 0.15sec

The corresponding point 'a' is marked on fig 16.2 (step 1). Now, the back-up protection for section AB is
given by relay 2. Setting of relay -2 is explained in the next step.
16.2 Relay coordination for Phase fault Relay (contd..)
Step 2
Relay 2 (R2 )
Let, Actual Pick up = 167 A. The PSM setting of R 2 has been already explained and summarized in row 2
of table 2.
We co-ordinate R 2 with R 1 for close in fault for relay R 1 . This leads to large PSM. Other alternative would
be to perform relay co-ordination at minimum fault current on remote feeder (Ifmin). However, co-
ordination at If max of remote feeder is preferred because it is observed that TCC for say TMS1 and TMS2
(TMS 2 > TMS1 ) tend to come closer for large PSM. Conversely, as PSM reduces, they separate out. Thus,
if we co-ordinate relays at large PSM, then co-ordination at lower values is automatically ascertained.
PSM = Fault Current / Actual Pick up = 500/167 = 2.99
Expected operating time for relay 2 = Operating time of relay 1+ CTI
= 0.15 + 0.3 = 0.45sec.

TMS = 0.07
Now for maximum fault current on section BC (1200A)
PSM = Fault Current / Actual Pick up = 1200/167 = 7.185
with TMS = 0.07 operating time of relay 2

Operating time of relay 2 = 0.24sec.


In the similar way all relays can be coordinated. Details of PSM setting are given in Table 1. Reader,
should in an interactive mode single-step through the example in Table - 1. Similarly for TMS, readers
should single step through fig 16.2.

It is clear that slowest relay in the system is R 4 . To compute its worst case performance, we should
evaluate its fault clearing time with minimum fault current at remote bus D for primary protection and bus
C for backup protection.
Time of operation for fault current of 1600A (bus D) = 0.82sec.
Time of operation for fault current of 1100A (bus C) = 1.5sec.
Since primary protection is always cleared within 1sec, we can consider the protection system to be
satisfactory.
16.2 Relay coordination for Phase fault Relay (contd..)
We have emphasized earlier that CT and PT play a critical role in determining performance of relaying
system. We now evaluate their effect in performance of overcurrent relaying application.
16.3 Fault Type and CT burden

In the previous lectures on CT, we have discussed the effect of CT burden on the performance of CTs. But
in real life application, in three phase CT connection, the burden on individual CTs will vary with the type
of connection and the type of fault. This is summarized in Table 3.

Table 3 : Fault Type and Its Effects on CT burden

Type of fault
3 - Phase or Phase to
Connection Phase to Ground
Phase
Wye (connected at Z = R + R + Z Z = R S+ 2RL + Z R
S L R
CT)
Delta (connected at Z = R + 3R +3Z
S L R Z = R S+ 2RL + 2ZR
CT)

Z is the effective impedance seen by the CT

RS is the CT secondary winding resistance and CT lead resistance; also includes any
relay impedance that is inside the delta connection (ohms)

RL is the circuit one-way lead resistance (ohms)

ZR is the relay impedance in the CT secondary current path (ohms)

Consider a three phase fault in Wye connected CT.


For a three phase fault as shown in fig 16.3.
, hence the current does not
require an explicit return path. Therefore, only
single lead wire resistance R L is taken into account.
Then effective impedance seen by CT, Z = R S + R L
+ Z R.

Now, take the case of a phase to ground fault.


Here, the fault current requires an explicit return
path and hence the lead wire resistance R L has to
be doubled. Then the effective impedance seen by
the CT, Z = R S + 2RL + Z R.
Similar calculations for delta connected CTs are also
shown in Table 3.

16.4 Example
1.A 8 MVA, 138/13.8 KV
transformer is connected to an
infinite bus. If a bolted three
phase fault occurs at F, find out
the fault current. The
impedance of the transformer
is 10% and location of the fault
is close to the bus as shown in
fig 16.4.
2.If the distribution feeder has
600/5 C 200 CT with a knee
point 100 Volt, calculate the
voltage developed across CT
and comment on its
performance. CT secondary
resistance is 0.414 .
Assume that (1) CTs are star connected (2) Lead wire resistance is 0.411 and relay impedance is 0.259
.
3. If the existing 8 MVA transformer is replaced with a new 28 MVA transformer with 10% leakage
impedance, find out the
new fault current. Will this new fault current lead to CT saturation?
4. In case CT saturates, comment on the performance of
(a) Primary relay (b) back up relay (c) co-ordination between primary and back up relay pair.

Solution:

1. With 8 MVA transformer, Full load current

= 334.7A
% Impedance of transformer X = 10

Fault current

= 3347A
16.4 Example
Solution:
2. CT secondary current ( CT turns ratio = 600/5 = 120)

To obtain conservative estimate of CT performance we will use this value. This amounts to assuming
bolted SLG fault current to be comparable to bolted 3 phase fault current. In comparison to three phase
fault, CT phases larger burden with S-L-G fault.
CT burden for three phase fault,
Z B = 0.414 + 0.414 + 0.259 = 1.084
For S-L-G fault it is
= 0.414 + (0.411 + 0.259) + (0.411 + 0.259) = 1.754
Effective impedance seen by the CT, Z = R S + 2RL + Z R
= 0.414 + 2(0.411) + 0.259
= 1.495

Since the secondary voltage, V S is less than knee point voltage the CT will not saturate.

3.
When the 8 MVA transformer is replaced with similar 28 MVA transformer

Full load current =

New Fault current = 11715 A

CT secondary current

= 97.6 1.754 = 171.19 V


Since, the knee point is 100 V the CT will saturate at 171.19 V.

4. Because of CT saturation, the secondary current will be clipped. Thus, CT secondary current will reduce.
Hence, PSM will reduce and primary relay operation time will increase. This will slow down the operation of
primary overcurrent relay. But typically, the back up relays in a radial system will have higher ratio CTs
than the primary. Consequently, knee point voltage is also higher. This implies that the back up relay,
which does not saturate can act before the primary since, these CTs are generally less likely to saturate.
Hence, relay co-ordination may be lost.

This can be minimized by one of the following methods.


a. Additional co-ordination time can be included in the settings.
b. Set the instantaneous relay units below the current at which saturation begins.
Relays with less inverse time characteristics can be used upstream from the relay which has saturated
c.
CTs. This
ensures a greater time margin at high currents when saturation is more likely.

Review Questions

In a radial system if minimum fault current is less than or equal to maximum load current, can
1.
overcurrent relay be used?

Why?

2. How does CT saturation affect the performance of an overcurrent relay?

3. Calculate the burden on a delta connected CT for a three phase fault and S-L-G fault.

Recap
In this lecture we have learnt the following:

Setting and coordination of relays in a radial system for phase faults.

Effect of CT saturation on relay coordination.


Fault type effects on CT burden.
Module 4 : Overcurrent Protection

Lecture 17 : Earth Fault Protection using Overcurrent Relays

Objectives

In this lecture, we will learn

Overcurrent protection against earth faults.

Relay coordination for earth fault relays.

Need for adaptive relaying.

Automatic reclosing.

17.1 Earth-fault Relays

Earth-fault relay is used to


protect feeder against faults
involving ground. Typically, earth
faults are single line to ground
and double line to ground faults.
For the purpose of setting and
coordination, only single line to
ground faults are considered.

Consider a radial system as


shown in fig 17.1. For a fault
near the source, the maximum
fault current for a-g fault is given

by .

If we model the utility system with identical values for all the sequence impedances then, . This

value is identical to the bolted three phase fault current. If however, Z S0 < Z S1 then the bolted single line
to ground fault current can be higher than the three phase fault current. As we move away from the
source, for a bolted fault, fault current reduces due to larger feeder impedance contribution to the
denominator. Since, for a feeder, zero sequence impedance can be much higher than the positive or
negative sequence impedance, it is apparent that fault current for bolted fault reduces significantly as we
go away from source. Thus, as we go away from the source, the bolted three phase fault current will be
higher than corresponding ground fault current as it does not depend upon zero sequence impedance of
the feeder. In addition, if the single line to ground fault has an impedance Z F, then the fault current can

fall even below the bolted a-g fault value, . In contrast, for a balanced

system, three phase fault current is independent of the value of Z F.


17.1 Earth-Fault Relays (contd..)
Thus, we conclude that there can be significant variation in the earth fault current values. They
can be even below the load current due to large impedance to ground. Hence, to provide
sensitive protection, earth fault relays use zero sequence current rather than phase current for
fault detection. Note that the zero sequence component is absent in normal load current or
phase faults. Hence, pickup with zero sequence current can be much below the load current
value, thereby providing sensitive earth fault protection. In what follows, we will discuss the
setting and coordination of earth fault relays.

In practice, distribution systems are inherently


unbalanced. Thus, load current would also have a
small percentage of zero sequence due to
unbalance. Hence, it is mandatory to keep the pick
up current above the maximum unbalance
expected under normal conditions.

A rule of thumb is to assume maximum unbalance


factor to be between 5 to 10%.

It should be also observed that earth fault relays


will not respond to the three phase or line to line
faults. One earth fault relay is adequate to provide
protection for all types of earth fault (a-g, b-g, c-g,
a-b-g etc). Three phase relays are required to
provide protection against phase faults (three
phase, a-b, b-c, c-a). Thus with four relays as
shown in fig 17.2 complete overcurrent protection
can be provided.
17.2 Relay Co-ordination for Earth-fault Relay
Example

Consider a feeder as shown in fig 17.3 with earth fault relays R 1 and R 2 . Relay R 1 is used for providing
protection against earth fault at the secondary side of 2.5MVA, 11/3.3kV transformer, whereas, relay R 2
has to provide protection at bus B.
Two CTs are used for protection. 200:5 CT is connected to instantaneous relay and 500:5 is connected to
inverse current characteristic relay.

Compute the setting of instantaneous and standard inverse units at relay at R 1 . Assume that
1) maximum system unbalance is 20% and
2) SLG fault current at bus A is 480 A and at bus B it is 650A.
3) Compute the time required by relay R 2 to clear SLG fault at bus B.
Use coordination time interval (CTI) of 0.3sec.
17.3 Relay Co-ordination for Earth-fault Relay (contd..)
Example
a) Setting of Relay R1
Since the relay is on secondary side of transformer, our calculations will be referred to secondary side.
From fig 17.3,

Full load secondary current of 2.5MVA transformer = . Earth fault relay should not

pick up for the unbalance current 20% of 437A = 87.47A. Hence choose a pick up value of 100A.
Thus, instantaneous relay will pick up at 100 × 5 / 200 = 2.5A

Typical range available for setting is 1-4A. We choose the pick up at 3A.
If standard inverse relay is also set to pick up at the same current in primary, which is 100A, then with
500:5 CT, pick up current of relay R 1 referred to secondary is 1A.
Since R 1 has no back up responsibility, we choose its TMS to minimum, i.e. 0.1.
Now, for a L-G fault current of 480A at bus A,
PSM for R 1 = fault current / actual pick up = 480/100 = 4.8.
From standard inverse TCC,

Time of operation of earth fault relay R 1 , = 0.439sec.

b) Setting of Relay R2
The coordination time interval, CTI = 0.3 sec.
Then time of operation of earth fault relay R 2 , which has to provide back up protection to bus A
= 0.439 + 0.3 = 0.739sec
Since this relay is on primary side of transformer, our calculations will be now referred to primary side.

Full load current at primary side of transformer =

R 2 should not trip for the unbalance current. i.e. 20% of full load current = 26A.
Let us, choose safely the pick up value to be 30A.
Pick up current of R 2 referred to secondary of 200:5 CT = 30 × 5 / 200 = 0.75A.
Fault current of 480A referred to 11kV side = 480 x 3.3/11 = 144A.

PSM for NI current = 144/30 = 4.8.


Desired time of operation of earth fault relay R 2 , TR2 = TR1 + CTI = 0.439 + 0.3 = 0.739sec

Substituting in equation, , we will get TMS of relay R 2 = 0.168.

PSM for a fault current of 650A at bus B = 650/30 = 21.67.

Substituting in equation, , time of operation for relay R 2 = 0.37sec.

The results are visualized in fig 17.3.


17.3 Adaptive Relaying in Overcurrent Protection

We now briefly introduce the concept of adaptive relaying. Adaptive relaying is a protection scheme in
which settings can adapt to the system conditions automatically, so that relaying is tuned to the
prevailing power system conditions. Traditionally, relaying settings are computed conservatively. For
example, in overcurrent fault protection, one would like to choose pick-up current to be above the
maximum possible load current and below minimum possible fault current. Sometimes, it may be quite
difficult to obtain such 'comfort zones'. for relay settings. If one accepts that load currents vary
significantly from 'light loads' to 'peak load' conditions, one can increase 'sensitivity' of a overcurrent relay
under light load conditions by safely reducing corresponding overcurrent pick up value. Such, adjustments
makes relaying' adaptive'.

In the present era, generation is being added to the distributed system directly. This also changes the
fault level in the system directly. Presence or absence of grid and/or distributed generator will alter fault
current levels drastically, and it would be impossible to achieve a single acceptable setting for distributed
generators. However, if for example, overcurrent relay could be made aware through communication that
grid and/or DG is connected, it could choose the settings from a set of a present values and 'adaptive' to
new load condition. Adaptive protection has not yet realized its full potential, and hence provides new
opportunities for bright and innovative research in relaying.

17.4 Automatic Reclosing

Many faults (80-90%) in the overhead distribution system like flash over of insulators, crow faults,
temporary tree contacts , etc are temporary in nature. Thus, taking a feeder or line permanent outage
may lead to unnecessary long loss of service to customers. Hence, many utilities use fast automatic
reclosers for an overhead radial feeder without synchronous machines or with minimum induction motor
load. Presence of synchronous machines will require additional problem of synchro-check to be addressed.
The almost universal practice is to use three and occasionally four attempts to restore service before lock
out (see fig 17.4).

17.4 Automatic Reclosing (contd..)

Subsequently, energization is by manual intervention. The initial reclosure can be high speed (0.2 -
0.5sec) or delayed for 3 - 5 seconds. This allows for de-ionization time for fault arc. If the temporary fault
is cleared, then the service is restored. Otherwise, the relay again trips the feeder. Then one or two
additional time delayed reclosures are programmed on the reclosing relay. Typical schedule might be
instantaneous, followed by 30sec, or 35sec, followed by 15sec. If the circuit still continues to trip, the fault
is declared as permanent and the recloser is locked out. Reclosers use three phase and single phase oil or
vacuum circuit breakers for overhead distribution lines.

With underground network, faults tend to be more often permanent and reclosers are not recommended.
In case of large synchronous motors, distributed generators or induction motor loads, it is recommended
that sufficient time is allowed for underfrequency relays to trip these sources of back emf out-of-the-
circuit.
17.4 Automatic Reclosing (contd..)

Application of reclosers in distribution systems requires selection of its ratings such as minimum trip
current, continuous current, symmetrical interrupting current etc.

For a single phase system, single phase reclosers can be used whereas for a three phase system, one
three phase recloser or three single phase reclosers can be used. Reclosers have to be selected by
considering the following factors.

Voltage Rating.
Continuous current Rating : This is the maximum load current the recloser has to carry.
Maximum Symmetrical Interrupting Rating: The maximum symmetrical fault current should not exceed
this rating.
Minimum Tripping current : This is the minimum fault current that a recloser will clear. It is equal to two
times the
continuous current rating. Usually tolerance is ±10%. This decides the sensitivity of the recloser.
The following example will explain the selection of reclosers in a simple distribution system.

Example

Consider a three phase


distribution system with a single
phase tap as shown in fig 17.5.
Maximum load on this single
phase tap is 40A and that on
three phase line is 200A. Fault
currents at F1 ,F 2 , F3 and F4 are
also shown in the fig 17.5. Table
1 shows the available standard
rating of single phase and three
phase reclosers. Select the ratings
of reclosers at A and B.

17.4 Automatic Reclosing (contd..)


Example

Answer

Recloser at B
Maximum load current on this single phase line = 40A.
Continuous current rating of this recloser must be 1.25 - 1.5 times the maximum load current to account
for anticipated load growth.
i.e. Continuous current rating of this recloser at B = 40 × 1.5 = 60A.

From the table 1, any recloser with continuous current rating of 100A and above is acceptable.
Maximum fault current at B = 1750A.
Interrupting current rating must be greater than 1750A. From the table 1, we see that recloser with 100A
continous current rating has 2000A symmetrical rms short circuit current rating. Hence, we can choose
this recloser.
Minimum tripping current = Continuous current rating × 2 ± 10% tolerance
= 100 × 2 ± 10% of 100 = 220A
Since the minimum trip current 220A is less than the minimum fault current 250A at the line end, it can
protect the entire line.
Voltage rating of the line is 11kV. So we can select the maximum voltage rating of 15.5kV (from the
table).

Recloser at A
This recloser has to protect the three phase line. Hence a three phase recloser can be used here.
Maximum load current in this line = 200A.
Hence continuous rating of recloser at A = 200 × 1.25 = 250A.

From the table let us choose recloser with a continuous rating of 280A.
Maximum fault current at A = 3500A.
From the table , symmetrical interrupting capability of recloser A with 280A continous rating is 4000A
which is more than maximum fault current of 3500A. Hence, this recloser meets our requirements.
Minimum tripping current = Continuous current rating × 2 ± 10% tolerance
= 280 × 2 ± 10% of 560 = 616A.

Since the minimum fault current at the end of this line is 280A, recloser at A cannot protect the entire
line. Hence, in order to increase sensitivity ground relay can be added here.

17.4 Automatic Reclosing (contd..)


Example

Answer

Table 1 (Source : IEEE Tutorial Course 80EH0157 - 8 - PWR)


Current Rating (Amperes)
Rated Maximum Voltage kV
rms Symmetrical Interrupting Rating
Continous Current Rating
at Maximum Volts
15.0 50 1250
15.5 100 2000
15.5 280 4000
15.5 560 8000
27.0 100 2500
27.0 280 4000
38.0 560 8000

15.0 50 1250

15.5 100 2000

15.5 280 4000

15.5 400 4000

15.5 560 8000

15.5 560 16000

Review Questions

1. Give reasons:

(a) The magnitude of earth fault current can vary over a wide range.

(b) The fault current for bolted S-L-G fault reduces as we go away from source.

2. What is meant by adaptive relaying?

3. Describe the role and action of auto reclosers.

Recap

In this lecture we have learnt the following:

Earth fault can be detected by the presence of zero sequence component.

Earth fault current can vary over a wide range.

Setting and coordination of earth fault relays.

Adaptive relaying in overcurrent protection.

Role and action of autoreclosers.


Congratulations, you have finished Lecture 17. To view the next lecture select it from the left hand side
menu of the page
Module 5 : Directional Overcurrent Protection

Lecture 18 : Directional Overcurrent Relaying

Objectives

In this lecture we will learn

The discrimination problem in a radial system with multiple sources and parallel paths.

Overcurrent relays with directional feature improves its selectivity.

The operation of directional unit with voltage as reference phasor.

Voltage polarization and current polarization in earth fault relays.

18.1 Necessity
In the overcurrent protection scheme considered in previous lectures, we had implicitly assumed that,
1. System is radial.
2. There is a single source.

This is quite true for traditional distribution systems but it does not hold true for sub-transmission or
transmission system with multiple sources. Fig 18.1 shows a system which is radial but it has two sources
connected to it. If relays for protection are installed only at one end of transmission line say towards
source A end, it is obvious that after opening of relay in red, the fault will continue to be fed from source
B. Hence, relays are also installed at other end of line to detect fault and disconnect transmission line
from the other end as well. Similar situation will exist even for a single source system if parallel paths
exist (fig 18.2). Hence, system which have multiple paths to source require relays at both ends. However,
installing relays at both ends does not provide a complete relaying solution. To understand the reason,
consider the action of red relay in fig 18.1 with respect to two likely faults F1 and F2 .

If the fault is at
F1 then it is
responsibility of
red relays to
open. If fault is
at F2 , then it is
the green relays
which should trip
the line.
However, it is
quite likely that
for fault F2 , the
circled red relay
may trip before
circled green
relay opens to
disconnect feed
from the source
B, the reason
being that both
relays are
subjected to
same fault
current.
In other words, circled red relay competes with circled green relay to clear fault. Opening of circled red
relay unnecessarily causes loss of service to load at bus P and it should be classified as wrong operation.

18.1 Necessity (contd..)


To overcome this limitation, the relay element has to be provided with additional discrimination feature to
distinguish between faults that it should respond to, and others that it should not respond to. Further, this
'selectivity' will not be sufficient if it is based upon magnitude of pick up current (or fault currents). In the
previous lectures, we had used time discrimination to provide selectivity. From the fig 18.3, it is apparent
that such discrimination will hold between relay sequences R 1 R3 R 5 and R 6 R4 R2.

However, it is not possible to provide such time discrimination between relays like R 2 and R 3 . Now
consider two possible fault locations with respect to relay R 3 as shown in fig 18.4. The relay R 2 should
operate if fault is at F1 because it is on primary feeder but not behind i.e. at F2 . With polarity of CT
connection as shown in fig 18.5, it is apparent that for fault F1 current I 1 seen by the relay lags V p by 90
degrees (fig 18.6). This is under the assumption of bolted fault and reactive nature of circuit impedance.
However, when the fault is in the position F2 , then relay current leads the bus voltage 'V p '.
18.2 Fundamental Principle

Thus, if we measure the bus voltage phasor V p and compute the


phase angle of relay current with respect to bus voltage, then we can
use the following logic to provide selectivity. If the relay 'detects fault'
and current lags V R (= V p ), then permit relay tripping. If the relay
'detects fault' and current leads V R (= V p ), then inhibit the relay
tripping. The 'discrimination principle' based on phase angle
comparison between a set of phasors, one of which is used as
reference is called 'directional discrimination principle'. Relays with
this principle are called directional relays.

For example, overcurrent relays can be made directional by adding


above discrimination logic to well known overcurrent logic. Such
relays are called as directional overcurrent relays. They are used in
distribution system or subtransmission system where 'ring main'
configuration is used to provide more reliability of service. Cost of this
relaying scheme is higher than 'non-directional' overcurrent due to
additional cost of VT.
We now discuss the choice of reference phasor for various type of phase and ground faults. Recall that
phase relays are used to protect against phase fault (3 phase and L-L).

Now, with traditional overcurrent relays, a directional overcurrent relay can be visualized as a cascade
connection of 'one directional unit' and one overcurrent unit. If the polarity of the current is appropriate,
then directional unit picks up. If the current magnitude is above pickup, then the overcurrent unit also
picks up and when both units pickup, the trip coil is energized and CB tripping is ensured. In a numerical
relay, this can be programmed by a simple 'AND' logic.

Any fault involving ground is called a ground fault. Traditionally, three phase relays and one ground relay
have been used to protect a feeder or a transmission line. However, in a numerical relay, all these
functions can be integrated into a single relay which acquires 3-phase voltages and 3-phase currents.

Design of Directional Units for Phase Fault


Let us first consider, a three phase fault. In this case, choice of the reference phasor can be the phase
voltage itself. For a purely reactive circuit, the fault current in the correct direction lags the reference
phasor by . With respect to reference phase 'V a ', we can draw operating line (also called as zero
torque line due to legacy of electromechanical realys) which separates the plane into two regions marked
as 'operate' and 'Do not operate'. If the fault is in the operating region, then I a lags V a and we issue trip
decision. In case, fault is behind the relay, the fault current leads V a and hence lies in the "do not
operate" region.
18.2 Fundamental Principle

Thus, if we measure the bus voltage phasor V p and compute the


phase angle of relay current with respect to bus voltage, then we can
use the following logic to provide selectivity. If the relay 'detects fault'
and current lags V R (= V p ), then permit relay tripping. If the relay
'detects fault' and current leads V R (= V p ), then inhibit the relay
tripping. The 'discrimination principle' based on phase angle
comparison between a set of phasors, one of which is used as
reference is called 'directional discrimination principle'. Relays with
this principle are called directional relays.

For example, overcurrent relays can be made directional by adding


above discrimination logic to well known overcurrent logic. Such
relays are called as directional overcurrent relays. They are used in
distribution system or subtransmission system where 'ring main'
configuration is used to provide more reliability of service. Cost of this
relaying scheme is higher than 'non-directional' overcurrent due to
additional cost of VT.
We now discuss the choice of reference phasor for various type of phase and ground faults. Recall that
phase relays are used to protect against phase fault (3 phase and L-L).
Now, with traditional overcurrent relays, a directional overcurrent relay can be visualized as a cascade
connection of 'one directional unit' and one overcurrent unit. If the polarity of the current is appropriate,
then directional unit picks up. If the current magnitude is above pickup, then the overcurrent unit also
picks up and when both units pickup, the trip coil is energized and CB tripping is ensured. In a numerical
relay, this can be programmed by a simple 'AND' logic.

Any fault involving ground is called a ground fault. Traditionally, three phase relays and one ground relay
have been used to protect a feeder or a transmission line. However, in a numerical relay, all these
functions can be integrated into a single relay which acquires 3-phase voltages and 3-phase currents.

Design of Directional Units for Phase Fault


Let us first consider, a three phase fault. In this case, choice of the reference phasor can be the phase
voltage itself. For a purely reactive circuit, the fault current in the correct direction lags the reference
phasor by . With respect to reference phase 'V a ', we can draw operating line (also called as zero
torque line due to legacy of electromechanical realys) which separates the plane into two regions marked
as 'operate' and 'Do not operate'. If the fault is in the operating region, then I a lags V a and we issue trip
decision. In case, fault is behind the relay, the fault current leads V a and hence lies in the "do not
operate" region.
18.3 Phase Fault Protection
Fig 18.7 shows vector diagram and relationship between different phasors. The threshold or maximum
torque line is a line perpendicular to the zero torque line. Again this terminology is because of the legacy
of electromechanical relay. The threshold or maximum torque line can be placed at an angle with respect
to V a also. This does add complexity to electromechanical relay design. But same placement is a simple
programming job in a numerical relay. For example, the common practice is to place the maximum
torque line at an angle of 60 degrees lag or 45 degrees with respect to ' V a ' (fig 18.8).

As shown in the fig 18.8, since V bc is in phase


quadrature with V a , it is possible to use V bc as the
reference phasor and locate the maximum torque line
at 30 degrees leading it. This is what traditionally
practiced in legacy directional overcurrent relays (see
fig 18.9). With this placement we now show that
directional unit will pickup for both 3-phase and L-L
faults.

Now consider a line fault involving phase 'a' and 'b'.


Then, using 3-phase line model we get,
V a - V f = Z s I a + Z m(-I a ) = (Zs - Z m) I a = Z 1 I a
Similarly,
V b - V f = Z s I b + Z mI a = - (Zs - Z m) I a = - Z 1 I a
V a - V b = 2(Z s - Z m) I a

Since, (Zs - Z m) = Z 1 = Z 2 of a feeder

If for simplicity we assume Z to be purely reactive, then from fig 18.9 we get that I f ab will be at an angle
of 60 degrees lagging to V an . Thus, unit with V bc as reference phasor will pickup on both 3-phase
fault and L-L fault. For a L-L fault involving phases 'a' and 'c' , V ac lags V an by . Assuming purely
reactive circuit, the phase current Ia will lag V bc by . As seen in the figure, I ac will be again in the
operate region and the directional unit will pickup. Thus, this unit ( lead with V bc as reference
phasor) will pickup for all phase faults involving phase 'a'. In contrast, for L-L fault involving phases 'b'
and 'c', I bc will lag V bc by . Hence, it will lie outside the tripping region of the directional unit.
Therefore, directional unit will not pick up.

To summarize, the key feature in obtaining directional discrimination is the placement of zero torque line
which separates the R-X plane into two regions viz. operate and do not operate. It is apparent that in
numerical relays, this placement is quite flexible and can be specified with respect to any one reference
voltage phasor. This placement can be made programmable.
18.4 Earth Fault Protection
Typically, earthfaults are SLG and LLG faults. Earthfaults are distinguished by presence of zero sequence
currents 'I 0 '. Since, except for unbalance, normal system operation is devoid of I 0 component, much more
sensitive pickup is possible for earthfault by using component I 0 = (I a + I b + I c ) / 3 and declaring a fault
if "I 0 " exceeds a threshold.

However, in a system with multiple sources or parallel paths, we will require earthfault relays to be
directional. The reference phasor is sometimes called as "polarizing quantity". Also both voltage and
current polarizing signals are used with ground fault relaying.
18.4 Earth Fault Protection
18.4.1Voltage Polarization

Let the system be initially unloaded and a ground fault


occur on phase a. Then if I a = 3I0 and I b = I c = 0. It
is observed that corresponding drop in voltage of phase
a while 'b' and 'c' voltages remain unchanged. Fault
current is shown in fig 18.10. Fig 18.11 shows the
computation of "3V 0 ". Fig 18.12 shows the
appropriateness of -3V0 as a reference phasor. "V0 " is
not present during normal conditions but available only
during fault. Let the maximum torque be drawn at 60
degrees lag with respect to "-3V0 " phasor.

It is then clear that zero torque line which separates


the plane into operate and do not operate zone leads -
3V0 by 30 degrees. Thus, for fault in the correct region,
3I0 lags -3V0 hence falls in operate region. If fault is
behind the relay, 3I0 will lead -3V0 by about 45 to 60
degrees and hence will lie in do not operate region.
Hence, earth fault directional unit will not pick-up.

18.4.2Current Polarization
An alternative to voltage polarization is current polarization. It does not require an additional VT. We
briefly introduce its principle. When the system is balanced, 3I0 = I a + I b +I c = 0. During ground fault
say at phase 'a', at F1 3I0 flows from ground to neutral of a wye-delta power or distribution transformer
bank. If we assume for simplicity that I b = I c = 0, then 3I0 and I a are in phase. This indicates that
directional unit for ground relay should pick-up as 'I a ' is in phase with '3I0 '.Thus we place maximum
torque line at zero degrees with respect to I 0 phasor. The corresponding trip, no trip relay are marked in
fig 18.13. If however fault is behind the relay, then the I a will fall in do not operate region and hence
relay will not pickup as and will be in phase opposition .

Review Questions

1. A single source system with parallel paths requires directional relays. Why?
2. What is meant by directional discrimination principle?

3. How is directional discrimination feature provided in 3 phase relays?

4. Earth fault relays in a multiple source system must be directional. Why?

5. What is a polarizing quantity? Differentiate between voltage polarization and current polarization.

6. Show that a directional unit with V ab as reference phasor will pick up on a - c and b - c phase faults.

Recap

In this lecture we have learnt the following:

A system with multiple sources or parallel paths requires directional relays.

Directional feature can be incorporated in an overcurrent relay and it improves its selectivity.

A directional unit with V bc as reference phasor will pick up on a - b and a - c phase faults.

Directional earth fault relays using voltage and current as polarizing quantity.
Module 5 : Directional Overcurrent Protection

Lecture 19 : Directional Overcurrent Relay Coordination (Tutorial)

Objectives
In this lecture we will solve a tutorial on directional relay coordination and see that

In a mesh system both clockwise and anticlockwise loops have to be coordinated separately.

Directional relay coordination in a mesh system is iterative.

The relay setting converges after a couple of iterations.

19.1 Introduction
Coordination of directional
overcurrent relays involves
setting of relays one by one
so that at each stage the relay
coordinates with its primary
relay. But in a loop as shown
in fig 19.1, the last relay to be
set is the very first, in which
initial setting were assumed.
This makes the relay
coordination activity in a mesh
system iterative. This should
be contrasted with a radial
system where the relay
coordination is completed in
one pass. The iterative nature
of relay setting and
coordination converges when
on revisiting the same relay, if
we do not have to change the
relay settings and TMS.

As shown in fig 19.1, a typical


transmission line is protected
by directional relays at both
ends. Hence we have to
consider two loops, i.e. one
loop formed in clockwise
direction and the another in
anticlockwise direction.

In this case clockwise loop is given by R 5 R6 R7 R8 R 5 and anti clockwise loop is given by
R1 R2 R3 R4 R 1 where arrow ‘ ' should be read as ‘backs up'.

Now, let us consider the anticlockwise loop for setting. We can start setting from any one of the four
relays, i.e. R 1 , R 2 , R 3 and R 4 . Let us start from R 2 , i.e. setting in relay R 2 is assumed appropriately.
Typically this implies that some value of TMS within the limits is taken. Limit points should be avoided at
initial stage. PSM can be calculated using the guidelines outlined in the previous lectures. R 1 will be set to
coordinate with R 2 , since R 1 has to back up R 2 . Now R 4 has to coordinate with R 1 , R 3 with R 4 and R 2
with R 3 . Thus we can see that the setting of R 2 has changed from what it was initially to coordinate with
R 3 . After first iteration, we update the setting of R 2 to the corresponding new setting, to coordinate with
R 3 , thus closing the loop. If the setting of the R 2 has changed significantly, then we repeat the above
process by fine tuning the settings of all the relays in the loop again.

As every iteration improvises the relay settings (TMS), we expect the settings to converge in a few
iterations. We have to repeat the same process with the clockwise loop also. Then all the relays will be set
and relay coordination activity is complete.

19.2 Example
The following example will illustrate this process in detail. In the fig 19.1, the remote bus fault currents
seen by each primary and back up relay pairs are tabulated below (Table 1).
Table 1 : Fault Current seen by Primary - Back up Relay Pairs

Anti clockwise loop Clockwise loop

Remote Bus Fault Current seen by Current seen by Current seen by Current seen by back
at primary relay back up relay primary relay up relay

F1 R 2 (639A) R 1 (152A) R 6 (1365A) R 5 (272A)

F2 R 1 (1652A) R 4 (391A) R 7 (868A) R 6 (240A)

F3 R 4 (1097A) R 3 (140A) R 8 (1764A) R 7 (287A)

F4 R 3 (937A) R 2 (142A) R 5 (553A) R 8 (197A)

For the relays in table 1, if the pick up values are as tabulated in table 2, find out the TMS.

Table 2 : Pick up Values of Relays

Relay R1 R2 R3 R4 R5 R6 R7 R8

Pick up
60 80 60 160 80 160 128 100
setting (A)

19.2 Example (contd..)


Answer
We can assume relay setting for any one of the four relays. Let us start setting from relay R 2 .
Iteration 1

For relay R 2 , assume a TMS of 0.05 (Normal range is 0.025 to 1.2). The reason to initialize TMS to 0.05
and not the minimum value i.e. 0.025 is that further iterations may reduce TMS. If to begin with 0.025
then the problem becomes infeasible.
For fault at F1 where R 2 acts as primary,

Time of operation of standard inverse relay, (where Is = 80A, I = 639A)

= 0.165sec

For fault at F1 , R 1 will back up R 2 .


Hence time of operation R 1 = + CTI (where CTI is the coordination time interval and CTI = 0.3sec.)

= 0.165 + 0.3 = 0.465sec

i.e. (where I = 152A, Is = 60A)

= 0.0623
For fault at F2 , where R 1 acts as primary,

(where I = 1652A, Is = 60A)

= 0.127sec

19.2 Example (contd..)


Answer
Iteration 1 (contd..)

Relay R 4 will back up R 1 for fault at F2 . Hence, time of operation of R 4 = + CTI = 0.127 + 0.3 =

0.427sec

i.e., (where I = 391A, Is = 160A)

Then, = 0.055

For fault at F3 , where R 4 acts as primary relay, we have

(where I = 1097A, Is = 160A)

= 0.196sec
Since relay R 3 has to back up R 4 , time of operation of relay R 3 = + CTI = 0.496sec

For a fault at F3

i.e., (where I = 140A, Is = 60A)

= 0.0605

Now for fault at F4 , where R 3 acts as primary,

(where I = 937A, Is = 60A)

= 0.15sec

19.2 Example (contd..)


Answer
Iteration 1 (contd..)

For fault F4 , R 2 has to back up R 3


i.e., Time of operation of R 2 = + CTI = 0.45sec

(where I = 142A, Is = 80A)

= 0.037

We had assumed a value of 0.05 for , but now the value has changed to 0.037. Therefore, let us

update the TMS of R 2 to 0.037.

Iteration 2
Repeating the same process as above,

For fault at F1 , time of operation

= 0.122sec
Time of operation of R 1 = + CTI

= 0.3 + 0.122 = 0.422sec

i.e., 0.422 or = 0.0565

For fault at F2 , where R 1 acts as primary,

= 0.1154

R 4 backs up R 1 for fault at F2

19.2 Example (contd..)


Answer
Iteration 2 (contd..)

Time of operation of R 4 = + CTI = 0.1154 + 0.3

= 0.4154

i.e. 0.4154

= 0.0535

Now, for fault at F3 , where R 4 acts as primary,

= 0.191sec

Since, relay R 3 backs up R 4 , time of operation of relay R 3 = + CTI = 0.191 + 0.3 = 0.491

i.e. 0.491 =

= 0.0599

For fault at F4 , where R 3 acts as primary,

Time of operation = 0.1484sec

R 2 backs up R 3 ; Therefore,
Time of operation of R 2 = + CTI = 0.3 + 0.1484

= 0.4484sec

i.e. 0.4484

= 0.0369

Now, let us update the TMS of R 2 to this new value, i.e., 0.0369 and repeat iteration.
19.2 Example (contd..)
Answer
Iteration 3

For fault at F1 ,

= 0.1217sec
For relay R 1 , which has to back up R 2
Time of operation = 0.3 + 0.1217 = 0.4217sec

i.e. 0.4217

= 0.0565

Then for fault at F2 , = 0.1154sec

Since R 4 backs up R 1 , time of operation of R 4


= 0.1154 + 0.3 = 0.4154sec

i.e. 0.4154

= 0.0535

For fault at F3 , where R 4 acts as primary, we have

= 0.191sec

19.2 Example (contd..)


Answer
Iteration 3 (contd..)

R 3 backs up R 4
Time of operation of R 3 = 0.3 + 0.191 = 0.491sec

i.e. 0.491 =

= 0.0599

For fault at F4 ,

= 0.1484sec
Now R 2 backs up R 3

i.e. time of operation of R 2 = 0.3 + 0.1484 = 0.4484

= 0.0369 which is same as the result of iteration 2.

Therefore no more iteration is required. Hence, setting and coordination of all the four anticlockwise relays
are complete.
Coordination of all primary and back up relay pairs R 2 - R 1 , R 1 - R 4 , R 4 - R 3 and R 3 - R 2 for faults at F1 ,
F2 , F3 and F4 respectively are visualized in fig 19.2.

19.2 Example (contd..)


Answer
Iteration 3

For fault at F1 ,

= 0.1217sec
For relay R 1 , which has to back up R 2
Time of operation = 0.3 + 0.1217 = 0.4217sec

i.e. 0.4217

= 0.0565

Then for fault at F2 , = 0.1154sec

Since R 4 backs up R 1 , time of operation of R 4


= 0.1154 + 0.3 = 0.4154sec

i.e. 0.4154

= 0.0535

For fault at F3 , where R 4 acts as primary, we have

= 0.191sec

19.2 Example (contd..)


Answer
Iteration 3 (contd..)

R 3 backs up R 4
Time of operation of R 3 = 0.3 + 0.191 = 0.491sec

i.e. 0.491 =

= 0.0599

For fault at F4 ,

= 0.1484sec
Now R 2 backs up R 3
i.e. time of operation of R 2 = 0.3 + 0.1484 = 0.4484

= 0.0369 which is same as the result of iteration 2.

Therefore no more iteration is required. Hence, setting and coordination of all the four anticlockwise relays
are complete.
Coordination of all primary and back up relay pairs R 2 - R 1 , R 1 - R 4 , R 4 - R 3 and R 3 - R 2 for faults at F1 ,
F2 , F3 and F4 respectively are visualized in fig 19.2.

19.2 Example (contd..)

19.2Example (contd..)
Answer
Setting and Coordination of Clockwise Relays

Iteration 1

Now let us start setting all the clockwise relays. Let us start from relay R 5 for fault at F4 .

Assume a TMS of 0.05 for relay R 5 . Then, time of operation of relay R 5 ,

i.e. Time of operation of back up relay R 8 = + CTI

= 0.1775 + 0.3
= 0.4775sec

Now, 0.4775 =

= 0.04656
For a fault at F3 , where R 8 acts as primary,

= 0.11sec

Now relay R 7 will back up R 8 . Then time of operation of R 7 = 0.11 + 0.3 = 0.41sec

i.e., 0.41

= 0.0477

R 7 acts as primary relay for fault at F2 .

= 0.1711sec

19.2 Example (contd..)


Answer
Setting and Coordination of Clockwise Relays
Iteration 1 (contd..)

R 6 backs up R 7 ,
i.e. Time of operation for R 6
= 0.1711 + 0.3 = 0.4711

i.e. 0.4711

= 0.0274

For fault at F1 , R 6 acts as primary,

i.e., = 0.0875sec

R 5 backs up R 6
i.e. Time of operation of R 5 = 0.0875 + 0.3 = 0.3875

i.e., 0.3875

= 0.0686

i.e. after 1st iteration TMS of R 5 has been changed from 0.05 to 0.0686. Let us update TMS of R 5 to
0.0686 and begin iteration 2.

19.2 Example (contd..)


Answer
Setting and Coordination of Clockwise Relays
Iteration 2

= 0.0686

For fault F4 , = 0.2436


For fault at F4 , R 8 backs up R 5
i.e. Time of operation of R 5 = + CTI = 0.2436 + 0.3

= 0.5436sec

i.e. 0.5436 =

= 0.053

For fault F3 , where R 8 acts as primary,

= 0.1256sec

Relay R 7 backs up R 8
Time of operation of R7 = 0.1256 + 0.3 = 0.4256sec

i.e. 0.4256

= 0.0495

19.2 Example (contd..)


Answer
Setting and Coordination of Clockwise Relays
Iteration 2 (contd..)

For fault at F2 , R 7 acts as primary,

i.e. = 0.1776sec

R 6 backs up R 7 ,
i.e. Time of operation for R 6 = 0.1776 + 0.3 = 0.4776sec

i.e. 0.4776

= 0.0278

For fault at F1 , R 6 acts as primary,

i.e. = 0.0888sec

R 5 backs up R 6 ,
i.e. Time of operation of R 5 = 0.0888 + 0.3
= 0.3888sec

i.e. 0.3888

= 0.0688

Now let us set TMS of R 5 to 0.0688 and repeat iteration.


19.2 Example (contd..)
Answer
Setting and Coordination of Clockwise Relays
Iteration 3

= 0.0688

For fault at F4 = 0.2443

R 8 backs up R 5 ,
i.e. Time of operation of R 8 = + CTI = 0.2443 + 0.3

= 0.5443sec

0.5443 =

i.e. = 0.0531

For fault at F3 , R 8 acts as primary,

Then = 0.1258sec

Relay R 7 backs up R 8
i.e. Time of operation of R 7 = 0.3 + 0.1258 = 0.4258sec

0.4258

= 0.0495

19.2Example (contd..)
Answer
Setting and Coordination of Clockwise Relays
Iteration 3 (contd..)
For fault at F2 , R 7 acts as primary,

i.e. = 0.1776sec

R 6 backs up R 7 , Time of operation of R 6 ,


= 0.3 + 0.1776 = 0.4776sec

i.e. 0.4776

= 0.0278

For fault at F1 , R 6 acts as primary,

= 0.0888sec

Since R 5 backs up R 6 for fault at F1 , time of operation of R 5 = 0.3 + 0.0888sec = 0.3888sec


i.e., 0.3888

= 0.0688.

Since, the result of iterations 2 and 3 are the same, the iteration is complete. Thus, all the clockwise relays
are set. The settings are tabulated in table 3. Coordination of all clockwise relay pairs R 6 - R 5 , R 7 - R 6 , R 8
- R 7 and R 5 - R 8 for faults at F1 , F2 , F3 and F4 are visualized in fig 19.3.

19.2Example (contd..)

19.2 Example (contd..)


Answer
Setting and Coordination of Clockwise Relays
Table 3 TMS Setting for Relay

Relay 1 st Iteration 2 nd Iteration 3 rd Iteration

R1 0.623 0.0565 0.0565

R2 0.05 0.0369 0.0369

R3 0.0605 0.0599 0.0599

R4 0.055 0.0535 0.0535

R5 0.05 0.0686 0.0688

R6 0.0274 0.0278 0.0278

R7 0.0477 0.0495 0.0495

R8 0.04656 0.053 0.0531


Review Questions

1. Explain the process of the directional relay coordination in a mesh system.

In the given example if the standard inverse relays are replaced with very inverse relays. Find out
2.
whether relay

coordination is achievable and comment on the selection of relays.

3. Develop a program for the given example.

Recap

In this lecture we have learnt the following:

The directional relay coordination problem in a meshed system.

In a meshed system both clockwise and anticlockwise loops have to be considered separately.
Module 5 : Directional Overcurrent Protection

Lecture 20 : Directional Overcurrent Relay Coordination in Multi-loop System

Objectives
In this lecture we will

Discuss the directional relay coordination problem associated with multiple loop system.

Identify all possible clockwise and anticlockwise loops for the given systems.

Define minimum break point relays.

20.1 Introduction

In the previous lecture, we discussed the coordination problem associated with single loop system. But the
complexity of coordination problem increases in multiple loop system which share some relays. Hence we
have to find one common acceptable setting for relays which share multiple loops so that their
coordination in individual loops is achievable. The number of such relays should be kept to minimum, so
that we make minimum assumptions on relay setting in coordination of loops. Such relays are called
Minimum Break Point Relays. For example, it can be verified that R 6 , R 14 and R 9 are such relays in the fig
20.1. By opening these relays, we are able to break any clockwise or anti clockwise relay loops and it
should be checked that no other relay set exists which achieves the above criteria with lesser number of
relays. If you open R 1 , R 13, R 4 and R 10 all loops are broken. But we now require four relays. Therefore,
the first choice is more acceptable than the second because we have to assume lesser number of TMS to
start the coordination process. There can be multiple choices to minimum break point relays. For example
an alternative choice is R 12, R 7 and R 3 .

Computation of minimum break point set of relays is a involved problem which requires combinatorial
optimization techniques.

20.1 Introduction (contd..)


Now let us analyze the system in more detail. There are 3 simple loops in the fig 20.1. So the three
clockwise coordination problems are given by,

1. R8 R 14 R 12 R 13

2. R9 R 10 R 11 R7

3. R8 R9 R 10 R 11 R 12 R 13

Similarly, 3 anti clockwise loop coordination problems are given by,

4. R1 R2 R7 R6

5. R 14 R3 R4 R5

6. R1 R2 R3 R4 R5 R6

Now these loops are not exclusive and they share relays. For example, loop 1 and loop 3 share R 8 , R 12
and R 13. Therefore, it implies that individual loops cannot be coordinated independently. So the crux of
the problem is to find acceptable setting at relays which are shared by multiple loops. Now, take the
example of R 6 , R 14 and R 9 . These relays feature in all loops and by opening them we can open all
clockwise and anti clockwise loops. Similar statement can be made for R 3 , R 7 and R 12. This set also
appears in all loops.

Another such set is R 1 , R 13, R 4 and R 10. Now it is better to begin by assuming setting in R 6 , R 14 and R 9
or R 12, R 7 and R 3 , because they involves lesser number of relays than R 1 , R 13, R 4 and R 10. Thus
amount of assumptions are reduced which should reduce the number of iterations in relay coordination.
Such a set of minimum number of relays which when opened break all loops in the system are called
Minimum Break Point Relay set. There are multiple choices, but each of such sets has same (minimum)
number of relays.

So the relay coordination process is as follows.

1. Identify all simple loops and relay sequence to be coordinated.


2. Identify a minimum break point relay sets.
3. Set them as primary relay.
4. Record in the first row of RSM.
5. Find the set of relays which back up the primary relays in above step.
6. Record them in the next row of RSM.
7. All relays exhausted. If yes, RSM is complete else set current back up relays as primary relay and go to 5.
8. From the graph and RSM work out set of sequential primary back up pairs (SSP) for coordination.
9. From the short circuit analysis, find primary back up current pairs.
10. Coordinate the primary back up relays in the order of SSP.
Test the primary back up coordination for all relays in the first row of RSM. If any primary back up relay
11.
pair does not
satisfy the coordination criteria, coordination fails, so select the first primary back up pair from the SSP
and return to step 10.
20.2 Example
Consider a transmission network system as shown in fig 20.2. Identify all possible clockwise and
anticlockwise loops and also minimum breakpoint relays.
In the above figure, there are 12 loops, i.e., 6 in the clockwise direction and 6 in the anticlockwise
direction.
The clockwise loops are given by

1. R1 R9 R4

2. R2 R3 R 10

3. R1 R2 R3 R4

4. R 13 R 21 R 16

5. R 14 R 15 R 22

6. R 13 R 14 R 15 R 16

20.2 Example (contd..)


The anticlockwise loops are given by
1. R5 R 10 R8

2. R6 R7 R9

3. R5 R6 R7 R8

4. R 17 R 22 R 20

5. R 18 R 19 R 21

6. R 17 R 18 R 19 R 20
Hint: One set of minimum break point relays are given by,
R 8 , R 9 , R 2 , R 20, R 21, R 14.

Course Projects
20.2 Example (contd..)
For a transmission system as shown in fig 20.3, the pick up currents and the fault currents seen by the
primary and back up relay pairs for remote bus faults at F1 , F2 , F3 , F4 , F5 and F6 are tabulated in table 1
and 2 respectively.
Table 1 : Pick up Current

Relay R1 R2 R3 R4 R5 R6 R7 R8 R9 R 10 R 11 R 12 R 13 R 14

Pick up
120 192 80 120 160 80 160 240 80 160 128 128 120 160
Current

Table 2 : Primary Pick up Relay and Current Pairs

Clockwise Loop Anti Clockwise Loop


Remote Bus
Fault at Current seen by Current seen by Current seen by Current seen by
Primary Relay Back up Relay Primary Relay Back up Relay

F1 R 13 (861A) R 12 (0) R 6 (977A) R 7 (576A)

F2 R 8 (3422A) R 13 (56A) R 7 (1764A) R 2 (1477A)

F5 R 14 (1483A) R 8 (1119A) R 2 (4589A) R 1 (307A)

F6 R 12 (767A) R 14 (469A) R 1 (601A) R 6 (0)

F2 R 7 (1764A) R 11 (287A) R 5 (1074A) R 4 (0)

F3 R 9 (553A) R 7 (157A) R 4 (946A) R 3 (114A)

F4 R 10 (1365A) R 9 (0) R 3 (639A) R 14 (152A)

F5 R 11 (868A) R 10 (240A) R 14 (1483A) R 5 (364A)

F3 R 9 (553A) R 8 (396) -- --
F6 R 12 (767A) R 11 (298A) -- --

F1 -- -- R 6 (977A) R 5 (401A)

F4 -- -- R 3 (639A) R 2 (487A)

The inverse characteristic of the relays is modelled by the following equation.

where b 0 = 0.03443, b 1 = 0.08071, b 2 = 1.95010, b 3 = 0.05773, b 4 = -0.69961, b 5 = -0.06793 and b 6


= 0.01989
Write a program to coordinate the relays. Identify the minimum break point relays. There may be some
relays whose coordination is not possible. Identify such relays. This equation corresponds to CO-8
Westinghouse relay characteristic as shown in fig 20.4.
Review Questions

1. What is meant by break point relays?


2. Define minimum break point relays.
For the transmission system as shown in fig 20.4, identify all possible clockwise and anticlockwise loops
3.
and
minimum break point relays.
4. Develop an algorithm for computing SSP from RSM.
Develop an algorithm for coordination of sequential primary back up current pair. It should account for
5.
limits of the
setting (TMS, PSM) of relays and also identify current pairs which cannot be coordinated
Recap
In this lecture we have learnt the following:

Break point relays and minimum break point relays.

Directional relay coordination in a multiple loop system.


Clockwise and anticlockwise loops coordination problems for the given systems.
Module 6 : Distance Protection

Lecture 21 : Introduction to Distance Relaying

Objectives
In this lecture we will

Introduce distance protection.

Discuss advantages of distance protection.

Fault modeling of balanced transmission line for 3 phase faults, L-L fault.

Show that ground fault relays require different configuration.

21.1 Introduction

Overcurrent protection scheme is essentially a simple protection scheme. Consequently, its accuracy is not
very high. It is comparatively cheap as non-directional protection does not require VT. However, it is not
suitable for protection of meshed transmission systems where selectivity and sensitivity requirements are
more stringent. Overcurrent protection is also not a feasible option, if fault current and load currents are
comparable. We now discuss about distance protection scheme which provides both 'higher' sensitivity
and selectivity.

Distance protection provides the following features:

More accurate as more information is used for taking decision.

Directional, i.e. it responds to the phase angle of current with respect to voltage phasor.

Fast and accurate.

Back-up protection.

Primarily used in transmission line protection. Also it can be applied to generator backup, loss of field and
transformer

backup protection.

21.2 Phase Fault Protection

21.2.1Three Phase Fault Protection


Consider a balanced (transposed) transmission line (fig 21.1)
(1)

Let T = (sequence transformation matrix) (2)

Then, (3)

Similarly, (4)

Applying sequence transformation matrix,

21.2 Phase Fault Protection (contd..)

21.2.1Three Phase Fault Protection (contd..)


Where Z 0 = Z s + 2Zm; [zero sequence impedance]
Z 1 = Z s - Z m; [positive sequence impedance]
Z 2 = Z s - Z m; [negative sequence impedance]

Thus,

Now let a bolted fault occur at percentage (%) distance, x of the line (fig 21.2)

Then the fault model is given by


For a solid fault, V n = 0. Thus,

21.2 Phase Fault Protection (contd..)

21.2.1Three Phase Fault Protection (contd..)


In the sequence domain

For a 3-phase fault,


Ib = a2 Ia
I c = aI a
From equation (4), we get
I 0 = 0; I 1 = I a ; I 2 = 0;
So only positive sequence network is excited. Hence,

(5)

By using equation (5), we can locate the fault on a transmission line. Also, for the case of
fault, it can be easily verified that,

(6)

It then follows that, a relay which monitor line current and phase voltages can locate fault by
using equation (6). In the absence of fault currents I a , I b and I c are smaller in magnitude.
Consequently, apparent impedance seen by the relay is much higher. Hence, a simple logic to locate
fault is provided by equation (6).

It can be easily seen that for a fault, equation (6) is equivalent to the following equation.

[Hint: Substitute I b = a 2 I a , V b = a 2 V a , I c =
(7)
aI a , V c = a V a ]
Notice that, if equation (7) is used for locating fault, then the relay input voltage is the line voltage and
not the phase voltage. Similarly, current input is the difference of line currents and not actual line
currents. Thus, equation (7) provides an alternate way of locating fault. Note that per unit
distance to fault is given by ratio of apparent impedance seen by the relay to the positive sequence
impedance of the line.

21.2 Phase Fault Protection (contd..)

21.2.2Line to Line Fault Protection


Consider a bolted L-L fault on the phase b-c of the system (fig 21.3).

Again, system is considered unloaded for simplicity. Then the governing equations in 3-phase
coordinates given by

(8)

where

Further

21.2 Phase Fault Protection (contd..)

21.2.2Line to Line Fault Protection (contd..)


Simplifying equation (8), we get
(9)

(10)

(11)
Now, subtract equation (11) from equation (10)

(12)

From equation (7) and (12) we conclude that a relay input configured as per equation (7) can measure
both 3-phase fault and L-L fault.
Similarly, for a-c L-L fault

And for a-b L-L fault

Therefore, traditionally the distance relays are configured as per equation (7) to detect and locate both

L-L and 3-phase faults. Therefore, distance to fault is given by

where, l is length of line and Z app is the impedance seen by the relay.
This is the fundamental principle of distance relaying.

21.3 Earth Fault Protection

21.3.1Single Line to Ground Fault


We now derive the governing equation for S-L-G fault case. Consider a single line to ground fault in
phase 'a' on a unloaded transmission line at a per unit distance . (fig 21.4)

Then 3-phase model is given by

Then governing equation is given by

(13)

Thus, ratio equals and not . A fundamental requirement of distance relaying is that the

relay input voltages and currents have to be configured in such a way that for any type of bolted fault
(Zf = 0), the apparent impedance seen by relay is given by . Therefore, it follows that we should
modify equation (13) suitably.

(14)
21.3 Earth Fault Protection (contd..)

21.3.1Single Line to Ground Fault (contd..)

(15)

Now,

Hence, (16)

Substituting in equation (15) we get,

(17)

Since , let

equation (17) can be written as

(18)

21.3 Earth Fault Protection (contd..)

21.3.1Single Line to Ground Fault (contd..)


where m is called compensation factor for zero sequence current. Similarly, it can be shown for b-g and
c-g faults.

(19)

and

(20)

It is clear that traditionally the ground fault relays require a different input configuration from phase fault
relays (3-phase and L-L)
21.4 Overall Distance Protection Scheme
A L-L-G fault can also be detected by the S-L-G relay equations. There are 10 types of shunt faults
against which a system has to be protected. They are:
1. 3-phase fault 1
2. L-L faults 3
3. S-L-G faults 3
4. L-L-G faults 3
The relaying units configured by equation (7) and (18,19,20) do this job satisfactorily.
We had so far assumed bolted and unloaded faults.
Therefore, there would be errors introduced when the
fault has some impedance . Hence, the apparent
impedance seen by the relay will not exactly lie on
transmission line impedance AB. Rather it would lie in
a region shown by trapezoid in fig 21.5. Also, note that
arcing faults are primarily resistive in nature.

Usually, distance relay characteristics are visualized by


drawing the relay characteristics in R-X plane. If the
apparent impedance seen by the relay falls inside the
trip region (enclosed region), then relay declares a
fault and issues a trip decision. This decision making
can be done in about 1/2 - 1 cycle time, if no
intentional time delays are introduced, e.g, for backup
protection.
While trapezoid or quadrilateral characteristics are
quite popular with the numerical relays, previous
generation of electromechanical and solid state relays
used other characteristics like 'mho' characteristics
(see fig 21.6), which were easier to derive. Mho relay
circles usually enclosed a larger area than the
quadrilateral characteristics for identical line
impedance and arcing impedance parameters. Thus,
they are more susceptible to nuisance tripping. Hence,
these characteristics have been superceded by the
trapezoidal characteristics.

Review Questions

1. What are the advantages of distance relays over overcurrent relays?


Show that for a bolted fault per unit distance to a fault in a transmission is the ratio of apparent
2.
impedance seen by the
relay to the positive sequence impedance of line.
3. Derive an equation for locating a-b fault in a transmission line.
4. Why does the distance ground fault relay require a different configuration?
Recap
In this lecture we have learnt the following:

The advantages of distance protection.

To derive an equation to locate and L-L fault in a transmission line.

Distance relays can be used for protecting the system from all kinds of fault.
Module 6 : Distance Protection

Lecture 22 : Setting of Distance Relays

Objectives
In this lecture we will explain

Setting of distance relays

Zone 1 setting and the reason for keeping zone 1 setting at 80% of primary line length.

Zone 2 and zone 3 setting.

Outfeed and Infeed effect.

Load encroachment.

Zone 1 of Protection
Distance relays can be classified into phase relay and ground relays. Phase relays are used to protect the
transmission line against phase faults (three phase, L-L) and ground relays are used to protect against
ground faults (S-L-G, L-L-G). In this lecture, we will learn the ways to set distance relay. Just like an
overcurrent relay, a distance relay also has to perform the dual task of primary and back up protection.
For example, in fig 22.1, the distance relay R 1 has to provide primary protection to line AB and back up
protection to lines BC, BD and BE.

The primary protection


should be fast and hence
preferably it should be
done without any
intentional time delay,
while back up protection
should operate if and only
if corresponding primary
relay fails. In fig 22.1, R 1
backs operation of relays
R 3 , R 5 and R 7 . Typically,
distance relays are
provided with multiple
zones of protection to meet
the stringent selectivity
and sensitivity
requirements. At least
three zones of protection
are provided for distance
relays.

Zone 1 is designated by Z 1 and zones 2 and 3 by Z 2 and Z 3 respectively. Zone 1 is meant for protection
of the primary line. Typically, it is set to cover 80% of the line length. Zone 1 provides fastest protection
because there is no intentional time delay associated with it. Operating time of Z 1 can be of the order of 1
cycle. Zone 1 does not cover the entire length of the primary line because it is difficult to distinguish
between faults at all of which are close to bus B. In other words, if a fault is close to
bus, one cannot ascertain if it is on the primary line, bus or on back up line. This is because of the
following reasons:

CTs and PTs have limited accuracy. During fault, a CT may undergo partial or complete saturation. The
1.
resulting errors
in measurement of apparent impedance seen by relay, makes it difficult to determine fault location at the
boundary of lines very accurately.

Derivations for equations of distance relays made some assumptions like neglecting capacitance of line,
2.
unloaded

system transposed lines and bolted faults. In practice none of these assumptions are valid. Fault on a line
will also destroy effect of transposing. Such factors affect accuracy of distance relaying. Further,
algorithms for numerical relays may use a specific transmission line model. For example, a transmission
line may be modeledas a series R – L circuit and the contribution of distributed shunt capacitance may be
neglected. Due to model limitation and because of transients accompanied with the fault, working of
numerical algorithm is prone to errors.
Zone 1 of Protection (contd..)
With only local measurements, and a small time window, it is difficult to determine fault impedance
3.
accurately. For
example, if the fault has an impedance ( ),
then the derivations of previous lectures are no
more exact. The impedance seen by the relay R 1
(fig 22.2) for fault F also depends upon the current
contribution from the remote end, thus

There are infeed and outfeed effects associated with working of distance relays. Recall that a distance
4.
relaying

scheme uses only local voltage and current measurements for a bus and transmission line. Hence, it
cannot model infeed or outfeed properly.

Zone 2 and Zone 3 for Protection

Usually zone 2 is set to 120% of primary line impedance Z 1 . This provides sufficient margin to account
for non-zero fault impedance and other errors in relaying. Also one should note that Z 2 also provides
back up protection to a part of the adjacent line. Therefore, one would desire that Z 2 should be extended
to cover as large a portion of adjacent line as possible.

Typically, Z 2 is set to reach 50% of the shortest back up line provided that where
Z P and Z B are the positive sequence impedance of primary and the shortest back up line respectively. If
the shortest back up line is too short then, it is likely that Z P + 1.5ZB will be less than 1.2ZP . In such a
case, Z 2 is set to 1.2ZP . Since, back up protection has to be provided for entire length of remote line, a
third zone of protection, Z 3 is used.
Zone 2 and Zone 3 for Protection (contd..)

It is set to cover the farthest (longest) remote lines (BD in fig 22.3(a) for relay R 1 acting as a back up
relay). Since its operation should not interfere with Z 2 operation of relays , it is set up to
operate with a time delay of 2 CTI where CTI is the coordination time interval. The settings of relay R 1 on
an R-X plane is visualized in fig 22.3(b). The timing diagrams are shown in fig 22.3(c).
Overlap Problem for Z2
There is a specific reason as to why Z 2 is not set to reach beyond 50% of the shortest remote line. As
shown in fig 22.4 (a), if the reach of Z 2 of a relay R 1 is extended too much, then it can overlap with the
Z 2 of the relay R 3 .
Under such a situation, there exists following conflict. If the fault is on line BC (and in Z 2 of R 3 ), relay R 3
should get the first opportunity to clear the fault. Unfortunately, now both R 1 and R 3 compete to clear
the fault. This means that Z 2 of the relay R 1 has to be further slowed down by CTI. This leads to timing
diagram (fig 22.4 (b)).
Overlap Problem for Z2 (contd..)
Thus, it is clear that fault clearing time in 20% region of line AB is delayed a bit too much, thereby
degrading performance of Z 2 of relay R 1 . Hence, a conscious effort is made to avoid overlaps of Z 2 of
relay R 1 and R 3 . Setting back zone Z 2 of R 1 to maximum of 120% of primary line impedance or primary
line impedance plus 50% of smallest back up impedance usually works out as a good compromise to
reach as much of back up lines by Z 2 without getting into Z 2 overlap problem.

However, under certain conditions, when the shortest line to be backed up is too short, it may not be
possible to avoid Z 2 overlap. Similarly, one may even encounter Z 3 overlap problem. On such small line
segments, alternative way to improve speed characteristic of relay is to use pilot relaying. This aspect will
be discussed in later lectures.
Example
1. Consider a protection system shown in fig 22.5. Identify the primary relays for back up relay R 1 .
Relay R 1 not only backup's line BC but also parallel line AB. Therefore, for relay R 1 acting as back up, the
Ans:
primary relays
are R 5 and R 4 .
Now assuming that pu impedance of all transmission lines in above fig 22.5 is pu /km, determine
2.
the setting of

zone 1, zone 2 and zone 3 relays of R 1 .

Ans:

[because BA is the shortest back up line]

[because BC is the longest back up line]

This approach for setting of distance relays presented is known as kilometric distance approach because
the set values of impedances are proportional to lengths. In doing so, we have neglected effect of load
currents and as well as the effect of change in operating condition in the system. More accurate settings
can be computed by evaluating fault impedance seen by the relay for a fault by using short circuit
analysis programs.

Outfeed and Infeed Effect


Consider the operation of distance relay R 1 for a fault F close to remote bus on line BC (fig 22.6).
Due to the configuration of generators and loads, we see that

Hence,

(1)

Thus, we see that the distance relay at R 1 does not measure impedance . If there is an

equivalent generator source at bus E, then it feeds the fault current. Thus and are
approximately in phase. This is known as infeed effect. From equation (1), it is clear that infeed causes
an equivalent increase in apparent impedance seen by the relay R 1 .

From the relay's perspective, the fault is pushed beyond its actual location. Thus, a fault in zone-2 may
be pushed into zone-3, thereby compromising selectivity of zone-2. However, infeed effect does not
compromise selectivity of zone-1. In other words, relay R 1 perceives fault to farther away from than its
actual location.

However, if there is an equivalent load at bus E, then I AB and I EB are in phase opposition. This causes an
apparent reduction in the impedance seen by the relay R 1 . In other words, the relay R 1 perceives fault to
be at a point closer than its actual location. If this perceived point falls well in the section AB, the relay R 1
will operate instantaneously for a fault on the back up line, thereby compromising selectivity. Hence,
instantaneous primary protection zone (Z1 ) of distance relay is always set below 100% line impedance.
Typically, zone 1 is set to cover 0.8 to 0.9 times the primary line length. In other words, we expect errors
in measurements of fault impedance to be within 10-20% accuracy. The remaining portion of the primary
line is provided with a time delayed protection known as Z 2 . The zone 2 protection is delayed at least by
the coordination time interval, CTI to give first opportunity to relays to clear a close in fault if
it falls into its primary protection zone. Note that, relay R 3 in fig 22.6 is immune to infeed or outfeed
effect for fault F.
Problem of Load Encroachment
Consider the steady state positive
sequence model of a transmission line
shown in fig 22.7.
Then, it can be shown that apparent
impedance seen by relay R is given by,

=
(2)

Thus from equation (2), we can derive following conclusions;

1. Quadrant of Z R in the R - X plane correspond to the quadrant of apparent power (S ij ) in (Pij - Q ij ) plane.

The apparent impedance seen by the relay is proportional to square of the magnitude of bus voltage. If
2.
the bus voltage

drops say to 0.9 pu from 1 pu, then Z R reduces to 81% of its value with nominal voltage. Further, if the
bus voltage drops to say 0.8 pu, then the apparent impedance seen by the relay will drop to 64% of its
value at 1 pu.

The apparent impedance seen by the relay is inversely proportional to the apparent power flowing on the
3.
line. If the
apparent power doubles up, the impedance seen by relay will reduce by 50%.

During peak load conditions, it is quite likely that combined effect of (2) and (3) may reduce the apparent
impedance seen by the relay to sufficiently small value so as to fall in Z 2 or Z 3 characteristic. This is quite
likely in case of a relay backing up a very long line. In such a case, Z 3 impedance setting can be quite
large. If the impedance seen by relay due to large loads falls within the zone, then it will pick up and trip
the circuit after its time dial setting requirement are met. Under such circumstances, the relay is said to
trip on load encroachment . Tripping on load encroachment compromises security and it can even
initiate cascade tripping which in turn can lead to black outs.

Thus, safeguards have to be provided to


prevent tripping on load encroachment. A
distinguishing feature of load from faults is
that typically, loads have large power
factor and this leads to with large

ratio. In contrast, faults are more or

less reactive in nature and the ratio

is quite high.

Thus, to prevent tripping on load


encroachment, the relay characteristic are
modified by excluding an area in R – X
plane, which corresponds to high power
factor. A typical modified characteristic to
account for load encroachment is shown in
fig 22.8.

The conditions of low value of Z R discussed


in (1) and (2) can also arise due to
voltage

instability or transients associated with electromechanical oscillations of rotors of synchronous machines


after a major disturbance like the faults. This can also induce nuisance tripping. Such tripping is known as
“tripping on power swings” and it will be studied in the later lectures.

Review Questions

1. Why is zone 1 protection of distance relays always set below 100% line length?

2. What is meant by infeed effect? How will it affect the performance of a distance relay?

3. What is the effect of overlap in Z 2 of relay?

4. How can the relay overlap problem in Z 2 be solved?

5. What is meant by load encroachment?

6. How can tripping of a relay on load encroachment be prevented?

Recap
In this lecture we have learnt the following:

Setting of distance relays for zone 1 protection.


Zone 2 and zone 3 settings.

Overlapping problem.

Outfeed and Infeed effects.

Solution for load encroachment.


Module 6 : Distance Protection

Lecture 23 : Pilot Protection with Distance Relays

Objectives
In this lecture we will introduce the basic principle of different directional comparison schemes like:

Directional comparison blocking system.

Directional comparison unblocking pilot system.

Directional comparison overeaching transfer trip pilot system.

Directional comparison under reaching transfer trip pilot system.

These schemes are used to improve speed and selectivity of the conventional distance relaying.

Introduction
We have seen that distance relays provide fast protection upto 80% of the primary line length. However,
primary protection for remaining 20% is deliberately slowed down by coordination time interval. Pilot
protection is used for lines to provide the high speed simultaneous detection of phase and ground faults
for 100% of the primary line. Since distance relays are directional relays, the corresponding schemes are
known as directional comparison schemes. Following directional comparison schemes are in use.
1. Directional comparison blocking.
2. Directional comparison unblocking.
3. Overreaching transfer trip.
4. Under reaching transfer trip:

a) Non-permissive. b) Permissive.

The basic idea behind all these schemes is to obtain the response of the distance relay element at other
end to speed- up decision making. This requires additional communication signals. If relay R 1 could obtain
the response of relay R 2 regarding the location of fault, then uncertainity in locating faults close to
boundary is no more significant and it can quickly clear the fault anywhere on the primary line (internal
fault).
We now briefly describe each of these schemes.

23.1 Directional Comparison Blocking

Basic Principle

1. Use directional fault detectors to detect faults in the direction of primary line.
Use blocking signal from the remote end in case the fault is not on the primary
2.
line.

23.1 Directional Comparison Blocking (contd..)


Consider the requirement of protecting line AB. If the fault is at F1 (anywhere on the line AB), fast
protective action is required from relays R 1 and R 2 . To achieve this action, relays R 1 and R 2 are enabled
with two units each called fault detectors (FD 1 and FD 2 ) and carrier starts S 1 and S 2 . Typically, the fault
detectors correspond to Z 2 of distance relays at respective locations as shown in fig 23.1. They overreach
the primary line. The carrier start relays look for fault in opposite sense to respective FD. They are called
carrier starts because the channel signals between A and B are initiated by them.

Imagine a scheme where FD issues a trip signal after identifying a fault unless it is quickly blocked by an
external agent (carrier starters). For example, if the fault is in F1 , both FD 1 and FD 2 will pick up. Since
neither carrier starts S 1 nor S 2 will pick up, fault F1 will be cleared quickly. In contrast, suppose that fault
is at F2 . Then FD 1 will pick up and so will S 2 . The S 2 will initiate channel and send blocking signal to FD 1 .
The FD 1 will be blocked from tripping action until its timer runs out. In this interval, either the primary
relay R 3 will clear the fault or else it is cleared by R 1 as a back up measure.

In other words, in this scheme, the relays are set for fast clearing action. They do not care whether the
fault is in primary line or the back up line. Blocking from the other end is used to prevent fast tripping for
faults on backup line.

23.2 Directional Comparison Unblocking Pilot System


The directional comparison unblocking pilot system is explained below:
Basic Principle
1. After detecting a fault in the right direction, put the relays in ‘block mode' for CTI.
2. Use unblock signals from the remote if the fault is on the primary line.

In this scheme as shown in fig 23.2, Z 2 of R 1 and R 2 remain in ‘block mode' for a specified time after
seeing the fault. Of course, if there is no fault in the system anywhere, neither fault detectors will pick
up. In case, relay R 2 observes a fault in the direction of bus A, it sends an unblock signal to relay R 1 (and
vice- versa). If the fault is in the primary line AB (F 1 ), both R 1 and R 2 detect the fault, and also receive
unblock signal from the opposite end. The unblocking signal helps in immediate action of both relays R 1
and R 2 leads to fast tripping of line. In case, the fault is at F2 , then the relay R 2 will not send unblock
signal to R 1 . While relay R 1 sees the fault, its FD also initiates a down counter set to CTI. If the FD
detects fault even after counter has run down, then a trip signal is issued by R 1 for back up fault clearing
action in the adjacent line.

The advantage of directional comparison unblocking pilot system is that it eliminates need of carrier
starts S 1 and S 2 . Typically, it is implemented using frequency shift keying (FSK) channels.
To summarize, the relays or more appropriately their fault detectors detect fault in the appropriate
direction. Unblock signal from the remote end is used to quickly clear the faults on the primary line.

23.3 Directional Comparison Overreaching Transfer Trip Pilot System

We now explain the principle of directional comparison overreaching transfer trip pilot system:

Basic Principle

1. If fault is detected from both ends of the line, initiate trip.


2. Else, initiate back up protection.

This scheme is shown in fig 23.3. In this scheme, for internal fault both FD 1 and FD 2 operate to shift
respective transmitters to trip mode. A logical AND-ing of trip of both FD 1 and FD 2 provides the trip
output at both ends of the line. In case of external fault either FD 1 or FD 2 will not pick up and hence
relays R 1 and R 2 will not operate.

In case there is no fault, neither FD 1 nor FD 2 operate. In case of external fault either FD 1 or FD 2 will pick
up depending upon whether fault is on right side of node B or left side of node A. This over reaching
initiates a timer. If external fault persists beyond CTI, then a back up trip decision is initiated by Z 2 of
the respective relays.

23.4 Directional Comparison under Reaching Transfer Trip Pilot System

We now discuss the directional comparison under reaching transfer trip pilot system. The under reaching
terminology implies that the FDs are to be set so as always to overlap but not over reach any remote
terminal under all operating condition. The schematic diagram of this scheme is given in fig 23.4.

Phase directional distance relay zone1 unit meets this requirement. Two types of such implementation
exist. They are known as a) non permissive b) permissive. With external faults, neither FD 1 nor FD 2 picks
up. For internal faults in the overlap area of FD 1 and FD 2 both FD 1 and FD 2 pick up. To clear internal
faults quickly which are not in the overlap region, OR-ing of the trip decision of FD 1 and FD 2 is used at
both ends. This system is not very much in use.

Review Question
1. Describe the working principle of the following:

a) Directional comparison blocking system.

b) Directional comparison pilot unblocking system.

c) Directional comparison overreaching transfer trip pilot system.

d) Directional comparison underreaching transfer trip pilot system.

Briefly explain how, the directional comparison schemes provide uniformly fast protection for faults on the
2.
primary line

while providing time discrimination for the backup action.

Recap

In this lecture we have learnt the following:

Direction comparison schemes that use communication from other end to speed the trip decision for fault
on the

primary line.

Various schemes which were discussed are:

Directional comparison blocking system.

Directional comparison unblocking pilot system.

Directional comparison overeaching transfer trip pilot system.

Directional comparison under reaching transfer trip pilot system.


The communication requirement in these schemes is not very high as only block/unblock signals are
communicated to
the other end.

Congratulations, you have finished Lecture 23. To view the next lecture select it from the left hand side
menu of the page
Module 7 : Out of Step Protection

Lecture 24 : Power Swings and Distance Relaying

Objectives

In this lecture we will learn the following:

Introduction to power swings.

Distance relaying perspective of power swings.

Characterization of power swings.

Electrical center and unstable power swings.

In this lecture, we will introduce the concept of power swings. It will be shown that the post fault power
swings may encroach the relay characteristics. This can lead to nuisance tripping of distance relays which
can sacrifice the system security.

Analysis of Two Area System


Power swings refer to
oscillation in active and
reactive power flows on a
transmission line
consequent to a large
disturbance like a fault.
The oscillation in the
apparent power and bus
voltages is seen by the
relay as an impedance
swing on the R-X plane. If
the impedance trajectory
enters a relay zone and if
stays there for sufficiently
long time, then the relay
will issue a trip decision on
power swing. Tripping on
power swings is not
desirable. We now
investigate this
phenomenon and then
discuss remedial
measures.

Let us consider a simple


two machines system
connected by a
transmission line of
impedance Z L as shown in
fig 24.1(a). E S and E R are
the generator voltages at
two ends and we assume
that the system is purely
reactive.

The voltage E S leads E R by an angle so that power flows from A to B during steady state. The relay
under consideration is located at bus A end. The power angle curve is shown in fig 24.1(b) . The system
is operating at initial steady operating point A with P mo as output power and as initial rotor angle.

From the power angle curve, initial rotor angle, is given by:

(1)
Analysis of Two Area System (contd..)
Now, suppose, that a self clearing transient three phase short circuit fault occurs on the line. During the
fault, the electrical output power drops to zero. The resulting rotor acceleration advances rotor angle

to . After a time interval , corresponding to angle , the fault is cleared and the operating point
jumps back to the sinusoidal curve. As per equal area criteria, the rotor will swing up to maximum rotor
angle , such that,
Accelerating Area (A1 ) = Decelerating Area (A 2 )
Rotor angle corresponding to fault clearing time can be computed by swing equation,

(2)

where H is the equivalent rotor angle inertia.


During fault, P e = 0, hence,

(3)

On integrating both the sides with respect to variable t,

(4)

Recall that prior to fault, is a stationary point. Hence, the initial condition of is specified as

follows:

Analysis of Two Area System (contd..)


Integrating equation (4) and substituting at time t = t1 , with ,

(5)

Thus, accelerating area A 1 is given by,


(6)

Substituting equation (5) in equation (6),

(7)

Similarly, decelerating area, A 2 , can be calculated as follows.

(8)

Since for a stable swing,

(9)

i.e.
(10)

Since, is a function of P mo from equation (1) and is function of P mo as well as from equation

(5), it follows from equation (10) that depends on P mo and .

i.e.
(11)

Analysis of Two Area System (contd..)


The variation of versus P mo for different values of is shown in fig 24.2.

Now that we have reviewed, the rotor angle dynamics, we proceed to discuss the relay's perception of
the dynamical system.
Determination of power swing locus

A distance relay may classify power swing as a phase fault if the impedance trajectory enters operating
characteristic of the relay. We will now derive the apparent impedance seen by the relay R on the R-X
plane. Again consider simple two machine system connected by a transmission line of impedance Z L as
shown in fig 24.1(a). For the sake of convenience machine B is treated as a reference and it's angle is
set to zero.

(12)

Where,
(13)

Determination of power swing locus (contd..)

Now, the impedance seen by relay is given by the following equation,

(14)

Let us define . Assuming for simplicity, both the voltages as equal to 1pu, i.e. k = 1. Then,

(15)

Determination of power swing locus (contd..)

From equation (15) at ,


There is a geometrical interpretation of above

equation. The vector component

in equation (15) is a constant in R – X plane.

The component lies on a

straight line, perpendicular to line segment

. Thus, the trajectory of the impedance

measured by relay during the power swing is


a straight line as shown in fig 24.3. The angle
subtended by a point in the locus on S and R
end points is angle . For simplicity, angle of
, and are considered identical.
The swing intersects the line AB, when
.

The corresponding point of intersection of


swing impedance trajectory on the impedance
line is known as electrical center of the swing.
(fig 24.4(a)). The angle, between two
sources can be mapped graphically as the
angle subtended by source points E S and E R
on the swing trajectory. At the electrical
center, angle between two sources is .
The existence of the electrical center is an
indication of system instability, the two
generators now being out of step.

If the power swing is stable, i.e. if the post


fault system is stable, then will be less

than . In such an event, the power

swing retraces its path at .

Determination of power swing locus (contd..)

If , then the power swing locus on the R – X is an arc of the circle. (See fig 24.4(b)).

It can be easily shown that

(16)

Then,
It is also clear from fig 24.4 (b), that the
location of the electrical center is dependent

upon the ratio. Appearance of electrical

center on a transmission line is a transient


phenomenon. This is because, during unstable
transient, is not stationary. As the rotor
angles separate in time electrical center arises
during out-of-step condition. When
, the rotors are said to have slipped a pole.
However, once past , the
corresponding phasors start coming closer to
each other. Thus, electrical center vanishes
after sometime. When = 0, another
transient point, the rotor is said to have
slipped by 2 - poles.

The voltage profile across the transmission


system at the point of occurrence of electrical
center is shown in fig 24.5.
At the electrical center, the voltage is exactly
zero. This means that relays at both ends of
the line perceive it as a bolted three phase
fault and immediately trip the line. Thus, we
can conclude that existence of electrical
center implies (1) system instability (2)
likelihood of nuisance tripping of distance
relay.

Determination of power swing locus (contd..)

Now consider a double-


end-fed transmission
line with three stepped
distance protection
scheme having Z 1 , Z 2
and Z 3 protection zones
as shown in fig 24.6.
The mho relays are
used and characteristics
are plotted on R-X
plane as shown in fig
24.7. Swing impedance
trajectory is also
overlapped on relay
characteristics for a
simple case of equal
end voltages (i.e. k =
1) and it is
perpendicular to line
AB.
From fig 24.6, ,

and are rotor


angles when swing just
enters the zone Z 1 , Z 2
and Z 3 respectively and
it can be obtained from
the intersection of
swing trajectory with
the relay
characteristics. Recall
that is the
maximum rotor angle
for stable power swing.
Following inferences can
be drawn.
If , then
swing will not enter the
relay characteristics.

If ,
swing will enter in zone
Z 3 . If it stays in zone -
Z 3 for larger interval
than its TDS, then the
relay will trip the line.

If , swing will enter in both the zones Z 2 and Z 3 . If it stays in zone 2, for a larger
interval than its TDS, then the relay will trip on Z 2 . Typically, TDS of Z 2 is less than TDS of Z 3 .
If , swing will enter in the zones Z 1 , Z 2 and Z 3 and operate zone 1 protection without any
intentional delay.
So far, we have discussed power swings for a 2-machine system. Evaluation of power swings on a
multimachine system requires usage of transient stability program. By using transient stability program,
during post fault the relay end node voltage and line currents can be monitored and then the swing
trajectory can be traced on a impedance plane.

Review Questions
1. Define a power swing and elaborate its consequences on distance relaying performance.

Derive the expressions for apparent impedance seen by a relay in a two area system as function of angle
2.
of separation

. Show that the locus is a straight line if |E A| = |E B| and a circle if |E A| |E B|.

3. What are assumptions made on the system behaviour in above derivation?

Recap
In this lecture we have learnt the following:

Characterized the swing locus seen by distance relay.

Defined electrical center.

Highlighted the possibility of distance relay tripping on power swing.


Module 7 : Out of Step Protection

Lecture 25 : Analysis of Power Swings in a Multi – Machine System

Objectives
In this lecture we will

Analyse a given transmission network.

Reduce it to a two source equivalent.

Determine whether the power swing in R-X plane cuts through any transmission line.

Now let the current in the transmission line AB,


when it is connected to the network be I ij from
the i th end and I ji at the j th end respectively.
Then, under the assumption of linearity, the
effect of the transmission line connection can be
evaluated by superimposing injected currents
and on the network in
which line i-j was disconnected. Thus,
. Since, we
are only interested in characterizing behavior at
busses i and j, we can ignore the remaining rows
in (2).

Thus,

(3)

Now if we assure a simple series model of the line, then,

where Y ij is the primitive admittance of the transmission line

Equivalently, (3) can be expressed as follows.


(4)

where matrix is the inverse of corresponding restricted Z bus matrix. Under usual

symmetry assumption, .

The equivalent circuit of fig 25.1 can be reduced as shown in fig 25.2. Now from the equivalent circuit of
fig 25.2 we get that,

Therefore, the incremental model is given by,

(5)

Equating (5) to (4) we get,

Thus the equivalent circuit is as


shown in fig 25.3.

Determination of Power Swing Locus for Multi Machine System


Impedance seen by relay on line L,

Determination of Power Swing Locus for Multi Machine System

where

Thus,

(6)

So, it has to be checked whether is less than or not. If it is less than then

electrical center is formed on line L. If it is greater than Z L , then electrical center lies outside the
transmission line L.
Example 1
For the system shown in fig
25.3, determine the two port
equivalent and find out whether
the power swing locus passes
through
(a) transmission line ‘c'
(b) transmission line ‘b'

Solution:

In order to analyze whether the power swing will pass through the transmission line ‘c', we need to
(a)
develop a two

machine equivalent across the line. For that, the transmission line ‘c' is disconnected from the network
and Z bus matrix is formed.
Let us form the nodal admittance matrix or Y bus for the given system with transmission line ‘c'
disconnected.

Now Z bus is obtained by inverting Y bus.

Example 1 (contd..)

Solution:
Since we are considering the transmission line ‘c' which is connected between buses 2 and 3, we can
ignore the first row and column of the Z bus matrix and the reduced model will be,
Therefore,

i.e.

Example 1 (contd..)

Solution:
Hence the network will be as shown in fig 25.4, with transmission line ‘c' connected across it.
The total impedance between the two sources is given by,

The swing impedance trajectory intersects the


impedance line at

, which is the location of electrical center


on R-X plane. From fig 25.5 it can be seen that
electrical center of the swing lies on the transmission
line ‘c'.

Example 1 (contd..)

Solution:
Now consider the transmission line ‘b'. For forming the two machine equivalent, transmission line ‘b' is
(b)
disconnected

from the system and Z bus is formed by inverting Y bus.

Since we are considering only the buses 1 and 2 across which line ‘b' is connected, we can ignore the third
row and third column of the Z bus matrix. Thus, the reduced system model is given by,
and

Since,

Example 1 (contd..)

Solution:

Solving the above, we get . Now, connect the transmission


line ‘b' across the network as shown in fig 25.6 and then the total impedance across the sources will be,

The swing impedance trajectory intersects the


impedance line at

. Since the line impedance is j0.2, we can


see from fig 25.7 we can see that the intersecting
point of swing impedance trajectory with impedance
line lies outside the transmission line ‘b'.
Review Questions

1. For the system shown in fig 25.3, determine whether swing locus passes through transmission line 'f'.

For the system shown in fig 25.8, find out whether power swing passes through any of the transmission
2.
lines?

Recap
In this lecture we have learnt the following:

Developed a two source equivalent of the power system.

Analysed the system to determine whether swing locus passes through any transmission line.

Found that swing locus passes through one of the transmission line.
Module 7 : Out of Step Protection

Lecture 26 : Power Swing Detection, Blocking and Out-of-Step Relays

Objectives

In this lecture, we will

Discuss the effect of unstable power swings in a two area system.

Explain differrent methods for detecting power swings such as:

1) Out of step blocking relays.

2) Out of step tripping relays.

Discuss the guidelines for setting out of step blocking relays and out of step tripping relays.

Introduction

We have so far seen that power swings can be classified as either stable or unstable. Basically, a relay
which is expected to issue trip decision on a fault should not pick up on a swing (either stable or
unstable). When a power swing is a consequence of stable disturbance, unwanted line tripping can
aggravate disturbance and lead to instability. On the other hand, when the power swing is a consequence
of disturbance, classified as unstable, then interconnected operation of the system is simply not possible.

This implies that the system has to be split into multiple islands each of which can have independent
existence i.e. each island can maintain synchronism of generators. Now to achieve stable operation in
each island, generator load balance has to be ascertained. If an island has excess generation, it should
be shelved and similarly if an island has excess load then load shedding is required. Load shedding is
usually initiated by underfrequency relays, as excess load tends to pull the frequency down. However, to
minimize the loss of service to consumers, the boundary of islands has to be selected carefully. To
illustrate this point, consider a simple two area system as shown in fig 26.1.

Now consequent to a disturbance, let the system be unstable and let the location of electrical center be
on line AB. Recall that at the electrical center, voltage zero point is created when the two generators are
out of step. Alternatively, electrical center appears when the power swing intersects the transmission line
characteristics. This implies that relays located at the two ends of the transmission line, perceive the out
of step condition as a bolted three phase fault on the transmission line. Consequently, relays R 1 and R 2
will issue a trip decision, thereby islanding the system. Now, the generator at A (PG = 0.666pu) islands
with a load of 0.333pu and generator at B (PG= 0.333pu) islands with a load of 0.666pu. The resulting
loss of load is 0.333pu in island B and loss of generation in island A is 0.333pu.

However, if we had islanded the system by tripping line BC then an ideal solution of zero load or
generation shedding would have been achieved. This suggests that during unstable swings, we should
block the relays from operation. Consequently, more selective tripping can be initiated to achieve the
desirable islands. We now, arrive at a thumb rule that under out of step condition, distance relays should
be blocked from operation on swings.

Introduction (contd..)

Let us now re-look, the case of a stable power swing. The resulting movement of apparent impedance
seen by relay on the R-X plane may encroach Z 2 or Z 3 of a relay. If the swing stays inside the zone for
long enough time, then the relay will issue a trip command. This is also not desirable. Hence, even under
stable swings, the distance relays have to be blocked from tripping.

To conclude this discussion, it is not desirable for distance relay to trip on power swing whether the swing
is stable or not. This implies that distance relay should be equipped with swing detection and blocking
mechanism. This aspect is elaborated in this lecture.
Power Swing Detection

The basic idea in detecting a power swing is that change in apparent impedance seen by relay due
to fault occurrence is instantaneous. In contrast, the change in due to power swing is a slow process
limited by inertia of generators. Thus, this time discrimination can be used to distinguish swings from
faults.

Out-of-Step Blocking Relays

Based upon the above


principle, fig 26.2 shows
out of step blocking
scheme with an offset
Mho unit.

The out-of-step
blocking unit is similar
to the Mho unit. It is a
circle concentric to mho
- tripping characteristic
but it has a larger
radius. In other words,
the tripping
characteristic is
embedded inside the
blocking unit. This
ascertains that any
power swing which
enters tripping will first
enter the out-of-step
blocking characteristic.
For the swing locus,
shown in fig 26.2, this
happens at point A.
After a short while, it
reaches the tripping
characteristics and
enters tripping region at
point B.

Introduction (contd..)

Out-of-Step Blocking Relays (contd..)


If the transit time,
from point A to B is
larger than a preset
interval of the order
of few cycles, the out
of step blocking unit
will operate auxiliary
relays to block
tripping of phase
relays.

In case, only blocking


of reclosing is
required, the blocking
unit will restrain
automatic reclosing
equipment. An out of
step blocking scheme
with an impedance
starting relay having
similar principle as
described above is
shown in fig 26.3.

Out-of-Step Tripping Relay

Out-of-Step tripping relay is required for controlled separation of the system into multiple islands. Out of
step condition is detected by out of step tripping relay which detects presence of an unstable power
swing. It then proceeds to either trip the local breaker or issue a transfer trip signal to remote breaker to
separate the system at a more convenient point.

Introduction (contd..)

Out-of-Step Tripping Relay (contd..)


As shown in fig 26.4
the basic scheme
consists of two
modified reactance
type units whose
characteristics are set
parallel to the system
impedance
characteristic SR with
one on each side of
line SR.

Consider an unstable
swing PQ as shown in
fig 26.2. It will cross
the first unit at point
X when it will pick up,
and emerge from
relay characteristic at
. The two
crossing, indicate that
swing has crossed the
impedance
characteristic and
hence is a loss of
synchronism
condition, leading to
an out of step trip
decision. The scheme
will equally well pick
up if swing movement
was from Q to .
The scheme would
also pick up even if
the unstable swing is
behind the relay.
For example, a swing from to . If the swing is far away from the line characteristic, then currents
involved are quite less. It is then associated with very low power reversals which do not characterize
unstable swings. To prevent tripping on such condition, the out of step relay is supervised by an
overcurrent relay unit. If the current signal is below a preset value, it inhibits the tripping signal of out of
step relay.

Introduction (contd..)

Guide lines for Setting Out-of-Step Tripping Relay


The primary question in setting the out of step relay discussed in previous section is to freeze the location
of the line segments L1 and L2 . i.e. decide the perpendicular distance MX and . In general, this
setting should be such that the swing locus will remain between for at least a preset interval
usually 0.005sec. This time is the operating time of the auxiliary relays which evaluates the sequence of
events and determines a loss of synchronism condition. Usually, this represents what is achieved in actual
system and hence does not pose any series rejection. Also, the characteristics L1 and L2 should not be set
so far apart to pick up on load conditions.

In other words, the angle subtended by X on R and S should be larger than and as maximum
loading condition will always have angle below . The maximum rate of slip can be estimated by
carrying out transient stability simulations.
Consider the system shown in fig 26.5a. In the case of out of step condition, optimum location to break
the system into multiple islands is at bus-B.
If during out of step condition, the
electrical center also appears in the line
segment BC, then the required
separation is achieved naturally.
However, as we know the location of
electrical center is not fixed and it
depends upon system conditions like
E S, E R, number of lines in service,
Thevenin's impedances Z S1 and Z S2
etc.

Now, if due to system conditions, the


electrical center location shifts to
section CD, then uncontrolled system
separation will take place at cut - 2,
where generation load balance is not
obtained.

Hence, it is desirable to block distance


relay operation on power swings and
install an out of step tripping relay at
Bus-C. The respective power swings
are shown in fig 26.5b. Now, for this
scenario, the loss of synchronism
requires a transfer trip signal to be
generated to breakers at bus B. In
general, the point of best separation is
not fixed and it depends upon loading
and generating conditions.
Thus, supervising control with system operator intervention may be required to decide the islanding
location. Now WAM (Wide Area Measurement) technology has opened up new options for system
protection.

Introduction (contd..)

Setting of Out-of-Step Blocking Relays


The guidelines to set an
out of step blocking
relay is that with
maximum slip between
systems, it will take an
impedance trajectory
more than 4 cycles to
traverse the distance
from out of step
characteristic to mho
tripping curve. The 4
cycle time is the
required pick up time of
auxiliary relay which
establishes blocking
function. As in case if
setting out of step
tripping relays,
precaution has to be
taken that out of step
blocking characteristic
does not encroach the
load impedance point
and establish increment
blocking of line tripping
relays.

Usually, blocking is
applied only to zone1
and zone2 and not to
zone3.
This enables clearing of fault which may arise during power swing block condition. The blocking function
setting for reclose blocking condition is also similar to that described for trip blocking setting. Blocking
automatic reclosing is a must for out of step condition. In case the OSB offset mho characteristic
encroaches into the load region, then it has to be appropriately modified. This is achieved by using
additional blinders, typically set at . Separation angle is as shown in fig 26.6.

Introduction (contd..)

Setting of Out-of-Step Blocking Relays (contd..)


When additional blinders as shown in fig
26.6 are used, the 4 cycle travel time
from OSB elements has to be monitored
with respect to the blinder elements. To
restrict the reach of relays, instead of
blinders and mho relays, lens type
characteristics as shown in fig 26.7 are
also used. Many of these functions like
tripping, blocking and fault detection can
be easily integrated into a single
numerical relay with a lot more flexibility
to shape characteristics of numerical
relays and upcoming WAM technology
which use synchronized PMU provide
many new options in out of step
relaying. However, these developments
are beyond the scope of this course.

Out of Step Protection for Generators

With large of generators, it is also likely that electrical center may lie within the generator. When
such a situation is detected it is advisable to avoid the knee jerk reaction of tripping the generator. A
more beneficial strategy would be to use transfer trip signal to achieve generator function with load
generator balancing.

Monitoring the Circuit Breaker Tripping

To avoid stress on the circuit breaker, it is advisable to delay CB trip until after the point of
separation is crossed over and the voltages are coming in phase. Tripping circuit breaker close to out of
step condition with separating phasors induces very large transient voltages on circuit breaker which is
not very advisable.

Review Questions

1. How can we distinguish a power swing from a fault?

2. Why is it necessary for equipping distance relays with swing detection and blocking mechanism?

3. Explain the basic principle of working of:

1) Out of step blocking relays

2) Out of step tripping relays

Recap
In this lecture we have learnt the following:

Disadvantages of stable and unstable power swings.

Different types of power swing detection mechanisms.

Guidelines for setting out of step tripping relays and out of step blocking relays.
Module 8 : Numerical Relaying I : Fundamentals

Lecture 27 : An Introduction

Objectives

In this lecture, we will learn the following:

Why Numerical relaying?

Relay hardware.

1) Sample and Hold circuit.

a) Nonsimultaneous Sampling.

b) Simultaneous Sampling.

2) Relay Hardware.

3) Open System relaying.

27.1 Why Numerical Relaying?

The first and foremost driving force for advances in relaying systems is the need to improve reliability. In
turn, this implies increase in dependability as well as security. This need to improve reliability propelled
the development of solid state relays. Solid state relays have inherent self checking facility which was not
available with electromechanical relays. This feature is also available with numerical relays (fig 27.1). For
example, when we boot a computer, it goes through a self checking phase where in it checks RAM, hard
disk, etc. Also, with the reduced cost of computer hardware, and an exponential growth in processing
capability, numerical relays can provide high performance at moderate costs.

Since, numerical relays are based on digital technology, they are more or less immune to variation or
drift in parameters of individual components like OP-AMPS etc. due to changes in temperature, ageing
etc. Numerical relays also help in reducing burden (volt-amperes) of Current Transformer (CT) and
Voltage Transformer (VT). This is desirable because ideally sensors should not consume any power. If a
sensor consumes energy from the measurand, it will automatically distort the signal. This problem is
further aggravated in CTs due to non-linearity of iron core. Numerical relays offer very low impedance to
the secondary of CT and hence reduce burden on CT.
27.1 Why Numerical Relaying? (contd..)

Numerical relays permit much more flexibility than their electromechanical and solid state counterparts.
In electromechanical relays, the constructional details like magnetic path, air gap etc., are used to design
various operating characteristics. Since, solid state relays mainly use analog circuit, they permit more
innovation than corresponding electromechanical relays which are no doubt robust. However, solid state
relays can not have the kind of flexibility that computer aided relaying can have. For example, providing
magnitude scaling and phase shift to a voltage signal to generate line to line voltage from phase to
neutral voltage is much simpler with computer aided relaying because it can be handled by the program.
A computer relay can be programmed. Further, due to the programming feature, it is possible to have
generic hardware for multiple relays, which reduces the cost of inventory.

Numerical relaying along with developments in fiber optic communication have pioneered development of
automated substations. Once, the analog signals from CTs and VTs are digitized, they can be converted
to optical signals and transmitted on substation LAN using fiber optic network. With high level of EMI
immunity offered by fiber optic cable, it has become the transmission medium by choice in substation
environment. Numerical relays can be nicely interfaced with a substation LAN. This in turn should be
contrasted with legacy substations (fig 27.1) where in lead wires have to run from each CT and VT to the
control panel (fig 27.2).This not only reduces wiring complexity in the substation but also reduces burden
on the CT as resistances of long lead wires are eliminated. Further, a single fiber optic LAN permits
multiplexing of multiple analog signals which is not possible with legacy arrangement.
27.1 Why Numerical Relaying? (contd..)

Numerical relays also permit development of new functions as well as development of adaptive relaying
schemes. Traditionally, relaying systems are designed and set in a conservative manner. They represent
compromise between:

economy and performance

dependability and security

complexity and simplicity

speed and accuracy

credible and conceivable

Adaptive relaying is meant to minimize such compromises and also allow relays to fine-tune to existing
system conditions. Specific adaptive relaying features will be discussed in the later lectures.

Numerical relays also permit storage of pre and post fault data (of the order of few cycles). This data can
also be time stamped, now-a-days by Geographical Positioning System (GPS). GPS systems (a cluster of
24 satellites of pentagon, USA) not only provides positional information but also a time pulse every
second for synchronization of sampling. Thus, in principle, every sample and every event like closing or
opening of breakers can be time stamped. This helps in postmortem analysis which is used to determine
whether (1) a relay operated correctly (or incorrectly) and (2) any other relaying system or device (like
circuit breaker) has failed to operate. Time stamping of relay operation allows us to capture the sequence
of relay operations. Thus, in a complex situation like catastrophic failure of the power system (brown out
or black out), it is now possible to precisely determine the sequence of relay operations. This helps
engineers to capture and simulate the disturbance using transient stability, (EMTP) programs.
Such simulation studies help in
understanding shortcomings of the
existing systems and thereby
improvising them. In this role, a
numerical relay is analogous to a
fault data recorder (FDR).

Numerical relays also simplify


interfacing with CTs and VTs.
Consider a protective function which
requires zero sequence voltage.
Traditionally, it would be generated
by open delta VT connection in fig
27.3 If zero sequence current is also
required, it is obtained by using an
additional CT in the ground wire.
With numerical relays, zero
sequence voltages and currents can
be derived inside the processor from
the phase voltage (Va , V b , V c ) and
line currents (I a , I b and I c ).

In differential protection e.g., three


phase transformer protection,
traditional protection schemes also
require additional care to handle
polarity, scaling and phase shifting
problems. This may even necessiate
use of an auxiliary CT.

Such complications can be resolved with ease when numerical relays are used. This aspect will be
discussed in more detail in the lectures on transformer protection.

27.2 Relay Hardware

27.2.1Block Diagram

Fig 27.4 shows the functional block diagram of a digital relay. It can be seen that a digital relay consists
of:

Analog input subsystem

Digital input subsystem

Digital output subsystem

A processor along with RAM (data scratch pad), main memory (historical data file) and power supply.
The 3-Ø voltage and current signals are analog in nature. Since, a computer works with digital data,
analog signals have to be sampled and discretized. Additionally, signal scaling and isolation to protect
the low voltage computer system and scale the voltage and current signals to proportionate voltage
signal (e.g., within ± 5V ) is necessary. This functionality is provided by the analog input subsystem.
Typically, it consists of sample and hold circuit, Analog to Digital Converter (ADC) and multiplexer
interfaced to the processor. The digital input data consists of Circuit Breaker (CB) status (open or close).
The digital output is relay's operate / do not operate decision.

Once, the data is acquired within RAM, it is filtered by a digital filter and processed by the relay logic.
The algorithms for extracting phasors and relay logic will be discussed in subsequent lectures.

27.2 Relay Hardware (contd..)

27.2.2 Analog Input Subsystem

There are two commonly used schemes for configuring the analog input subsystem. One is known as
the 'simultaneous' & other 'non-simultaneous' scheme.
27.2.2.1Non-Simultaneous Sampling Scheme
Fig 27.5 illustrates non-simultaneous sampling scheme. In this scheme, a multiplexer selects the
analog channel sequentially. Typically, power system applications involve more than one analog input.
To reduce the cost of the hardware, multiple channels are multiplexed through analog multiplexer to a
single ADC. An analog multiplexer permits a single output line to mirror the signal at the selected
input, say one of the 3 voltages/ 3 currents.
Thus, multiplexer is a collection of analog switches. Each channel can be selected by supplying
appropriate binary code to the multiplexer e.g. for 8-channel multiplexer, 3 bit address space is
required. A chip disable line permits parallel expansion if external logic is used to select desired
multiplexer. A multiplexer has two inputs (terminals) for a single channel. It provides better noise
immunity. Accuracy of the analog multiplexer depends on load impedance at the output terminal.
Typical recommended value is 10 7 to 10 8 . As Sample (S) and Hold (H) circuit has impedance in the
range 10 8 - 10 12 , no problem is encountered.

27.2 Relay Hardware (contd..)

27.2.2 Analog Input Subsystem

27.2.2.1Non-Simultaneous Sampling Scheme


There are two commonly used schemes for configuring the analog input subsystem. Fig 27.5 illustrates
one such scheme. In the first scheme, a multiplexer selects the analog channel. Typically, power
system applications involve more than one analog input. To reduce the cost of the hardware, multiple
channels are multiplexed through analog multiplexer to a single ADC. An analog multiplexer permits a
single output line to mirror the signal at the selected input, say one of the 3 voltages/ 3 currents.

Thus, multiplexer is a collection of analog switches. Each channel can be selected by supplying
appropriate binary code to the multiplexer e.g. for 8-channel multiplexer, 3 bit address space is
required. A chip disable line permits parallel expansion if external logic is used to select desired
multiplexer. A multiplexer has two inputs (terminals) for a single channel. It provides better noise
immunity. Accuracy of the analog multiplexer depends on load impedance at the output terminal.
Typical recommended value is 10 7 to 10 8 . As S and H circuit has impedance in the range 10 8 -
10 12 , no problem is encountered.

27.2 Relay Hardware (contd..)

27.2.3Sample and Hold Circuit

The analog information is held by


a Sample and Hold circuit (fig
27.6). Any A/D converter requires
a finite conversion time. A S & H
circuit which conceptually is a
shunt capacitor with a switch holds
the information (in terms of
voltage). While the conversion
takes place, switch is in open
position. This is known as the
`hold' state. When the switch is
closed, the V out of S and H follows
the V in .
In the scheme illustrated in fig
27.5, it can be observed that the
relative phasor information
between two signals is not
preserved.This is because the
samples from different inputs are
not obtained at same instant of
time. One way to overcome, this
hardware limitation is to
interpolate the value of the sample
from previous values.

Fig 27.7 illustrates the concept. Let


V a (t) be sampled first and then
V b (t) be sampled. The first two
samples of 'a' & 'b' phases are
given by points 'A' and 'C'. After
one sampling interval, samples 'B'
and 'D' are obtained, for phases 'a'
and 'b' respectively. The problem
is to estimate value of V b (t) at the
sampling instant for 'a' i.e. say at
sample 'B'. This can be obtained
by linear interpolation for samples
'C' and 'D' and corresponding to
point 'E'.

27.2 Relay Hardware

27.2.3Sample and Hold Circuit (contd..)

Simultaneous Sampling Scheme


Fig 27.8 shows a simultaneous sampling scheme. In this scheme, all S&H amplifiers are set to hold state
simultaneously. This preserves the relative phase information between multiple analog signals.Then, the
multiplexer selects the channel sequentially. Typically, digital relays use successive ADC which have a
conversion time of 15-30 µs. The sampling rate must satisfy Nyquist criteria. This issue will be discussed
in the later lectures.

Finally, an antialiasing filter is used after signal conditioning hardware. Anti aliasing filter is a low pass
filter (LPF) used to cut off the high frequency content (including noise) in the input signal. The cutoff
frequency of LPF and the sampling rate have to be properly matched. This issue is addressed in later
lectures.

27.2 Relay Hardware (contd..)

27.2.4Relaying hardware for Metering

In principle, the hardware setup shown in fig 27.8 can be used for both measurement and protection
function. However, considering the order of difference between current magnitudes in case of fault and
load, there can be loss of accuracy during metering applications. Consider a hypothetical case where in
maximum load current is 100A and maximum fault current is 20 times this load current (2000A). Let a
12 bit unipolar ADC be used for sampling current signal. This implies that resolution of ADC is
2000/(2**12-1)=0.488 A. This resolution may be inadequate for metering purposes. One solution is to
increase resolution i.e. the number of bits in ADC. For example, one may use 16 bit ADC in place of 12
bit ADC.

However, increasing the number of bits of ADC also affects the selection of processor. A good design
guideline is to choose a processor with double the number of bits of ADC. This ensures that truncation
and numerical precision problems associated with finite precsion arithematic do not cause significant loss
of accuracy. For example, with 16 bit ADC, 32 bit processor is the natural choice. Alternatively, a
variable gain amplifier can be used along with the ADC. At low currents, high gain setting is used and at
high currents low gain setting is preferred. However, during the change from one setting to another, loss
of information can take place. Therefore, a simple solution would be to keep metering and protection
functionality separate.
27.2.5Open System Relaying

Open system relaying motivated by experiences from energy management field where in a plethora of
manufacturers specific equipment has led to difficulty in expanding the system without changing the
entire existing SCADA (system control and data aquisition) system. Open system movement encourages
standard based development, thereby permitting incremental or evolutionary growth. This has to be
contrasted with proprietary solutions that required either a complete changeover or force the utility to a
vendor.

Consider a case of two vendors (A and B) supplying a Remote Terminal Units (RTUs) to a utility C. Let us
consider that initially, the utility had procured the SCADA system from the manufacturer A. At a later
date, the utility wants to add RTUs from the vendor B because it has cost and performance benefits. If
the initial solution provided by vendor A was proprietory, it will not be possible for RTUs of vendor B to
be interfaced with SCADA system supplied by vendor A. This restricts cross migration and hence it is
unfair. On the otherhand, if the initial SCADA system was based on open standards, then the device of
another vendor using the same standard could be interfaced with ease. This is the basic idea behind any
open systems movement. An open relay conceptually consists of two separate 'boxes'. The first box is
the well known standard computer. The second box encloses the scalable analog input subsystem. The
processing board which may have multiple DSPs is plugged onto PC motherboard and once programmed
can run independently of the PC. Such a relay may be interfaced with substaion LAN using standard
protocol.

Recap
In this lecture, following important reasons for advocating numerical relays were identified:

Cost: The processing power measured in Floating Point Operations Per Seconds (FLOPS) has been

steadily increasing. This is because of the technological advances in VLSI. Today, general purpose as well
as high speed Digital Signal Processors (DSP) are available at reasonable cost. As such, cost of numerical
relays is competitive with traditional electromechanical and solid state relays.

Self Checking and Reliability: A numerical relay just like a PC can check the health of its components
periodically. In

case of a failure, it can raise an alarm. No amount of periodic maintenance can provide this facility, which
goes a long way in improving the reliability of digital relay.

System Integration and Digital Environment: There is a trend towards automation in power systems.
Transmission

systems were automated first to improve the reliability of the overall transmission system by use of
SCADA and setting up of energy control centers. Today digital electronics has permitted automation at
substation level. Substation automation and distribution system automation have brought the digital
technology of computation and communication at the lower voltage levels. Numerical relays fit
appropriately in such an environment.
Functional Flexibility and Adaptive Relaying: Numerical relays are programmable. A multi-purpose
hardware can be

programmed with many relaying schemes. The complexity of the relaying logic is limited by the
imagination of the relay engineer and the processing capability of the processor. With the emergence of
the DSP based numerical relays, it is possible to incorporate a number of features in a relay. Further, such
relays can be equipped with communication facilities thereby, opening the possibility of adaptive relaying.
Congratulations, you have finished Lecture 27. To view the next lecture select it from the left hand side
menu of the page
Module 8 : Numerical Relaying I : Fundamentals

Lecture 28 : Sampling Theorem

Objectives
In this lecture, you will review the following concepts from signal processing:

Role of DSP in relaying.

Sampling theorem.

Role of anti-iliasing filter.

28.1 Why Digital Signal Processing?

Digital relaying involves digital processing of one or more analog signals. It involves following three
steps:

1. Conversion of analog signal to digital form.

2. Processing of digital form.

3. Boolean decision to trip or not to trip.


Usually in DSP, after processing information in discrete domain, it has to be converted back to analog
domain. However, for us the step- 3 does not involve conversion of processed signals back to analog
form.

In the previous lecture, we have discussed the step - 1 in detail. In this lecture we discuss the next step.
At this point, a worthwhile observation is that direct analog signal processing is conceptually much
simpler. However, advantages of digital processing far outweigh analog processing. Some of the
advantages of digital processing are as follows:
Operation of digital circuits do not depend on precise values of digital signals. As a result, a digital circuit
is less

sensitive to tolerances of component values.


A digital circuit has little sensitivity to temperature, aging and other external parameters.

In terms of economics of volume, a digital circuit can be reproduced easily in volume quantities. With
VLSI circuits, it is
possible to integrate highly sophisticated and complex digital signal processing systems on a single chip.
In DSP, accuracy of computation can be increased by increasing word length. With the availability of
floating point

arithmetic in digital signal processors, dynamic ranges of signal and coefficients can be increased.

A signal processor can process many signals, reducing processing cost per signal.

Digital implementation allows the realization of certain characteristics not possible with analog
implementation; such

as polygon in R-X plane for distance relaying.

Digital signals can be stored indefinitely without loss of accuracy.

There are also some disadvantages with DSP. One of them is that DSP contains active devices. Active
devices are less reliable than passive components. Passive components consume less power than active
devices. However, advantages of digital relays (i.e. relaying using digital signal processing) are far more
significant than the disadvantages. In what follows, we discuss digital signal processing for relaying.

28.2 Sampling

Consider a continuous time domain sinusoid signal as, x(t) = sin(2 ƒ 0 t) .The sine wave has frequency
ƒ 0 e.g. 50 Hz. Let the waveform x(t) be sampled at a rate of ƒ s samples/sec, i.e. with time period ts = 1/
ƒ s sec. Let the sampling process start at time . The samples of this sequence are given by

(1)
(2)
(3)
(4)
(5)
Because of periodicity of sine wave, it is not possible to distinguish two samples with a phase difference
equal to 2πm , where is an integer. Therefore,
(6)

(7)

If we choose to be an integer multiple of i.e. ; an integer and substitute t s = 1/ƒ s, the


above equation transforms into the following:

(8)

Note that in equation( 7) has to be varied from sample to sample, so as to maintain fixed
value of .

28.2 Sampling

Consider a continuous time domain sinusoid signal as, x(t) = sin(2 ƒ 0 t) .The sine wave has frequency
ƒ 0 e.g. 50 Hz. Let the waveform x(t) be sampled at a rate of ƒ s samples/sec, i.e. with time period ts = 1/
ƒ sec. Let the sampling process start at time .Then the first successive samples have the
s
values;

(1)
(2)
(3)
(4)
(5)
Because of periodicity of sine wave, it is not possible to distinguish two samples with a phase difference
equal to 2πm , where is an integer. Therefore,
(6)

(7)

If we choose to be an integer multiple of i.e. ; an integer and substitute t s = 1/ƒ s, the


above equation transforms into the following:

(8)

Note that in equation( 7) has to be varied from sample to sample, so as to maintain fixed
value of .

28.2 Sampling (contd..)

The equation (8), leads to a very interesting result viz.

When sampling at a rate of ƒ s samples/sec. if k is any positive or negative integer, we cannot distinguish
between sampled values of sine wave of ƒ 0 Hz and a sine wave of (f 0 +kf s) Hz.

Fig 28.2 shows a 7kHz signal


being sampled at 6khz with ƒ 0
= 7, ƒ s= 6 and k = -1, we
reach the conclusion that we
cannot distinguish between
signal of 7kHz and 1kHz with
sampling frequency of 6kHz.
This effect of 7kHz signal taking
an alias of 1kHz signal is called
aliasing. In this case, a high
frequency signal has taken an
alias of a low frequency signal.

28.2 Sampling (contd..)

An another example, consider a 50Hz signal sampled at 50Hz (see in fig 28.3). It can be seen that
signal is aliased to dc signal.
Similarly, sampling a 50 Hz signal at 51 Hz will alias it to 1 Hz.

28.2 Sampling (contd..)

Fig 28.4 shows a signal with frequency content between ±B Hz . Such signals are said to be band limited
signals. Note that because and magnitude
component of a real life signals have typically an even symmetry around dc signal. By the observation
made in the previous slide that a signal of ƒ 0 Hz can be aliased to (ƒ 0 ± ƒ s ) Hz { = ±1, ± 2,--- } , it
follows that post sampling in frequency domain, we will see repeating lobes (replicas) of original signal,
each lobe being displaced by ƒs Hz. In other words, after sampling we cannot distinguish the signal lobe
from other replicated lobes.

An interesting analog can be drawn by considering a room having many mirrors each reflecting image
from one to another. It is seen that if a person is standing in such a room, another observer cannot
distinguish him from his image. The difficulty can be resolved if the observer has an idea of location or
coordinates of the real person. In the same manner, we can identify the original lobe from replicated
lobes if we have an idea of the frequency content of original signal. In fig 28.5, notice that lobes are
distinctly separated because ƒs > 2B Hz . On the other hand, if ƒ s = 2B Hz , then as seen in fig 28.6,
lobes will just touch each other. If however, ƒ s < 2B Hz, then lobes will overlap (fig 28.7) and this will
lead to distortion of replicated frequency spectrum. Thus, it is necessary that ƒ s the sampling frequency
should atleast equal to 2B Hz.

28.2 Sampling (contd..)

Thus qualitatively, we can classify sampling frequency into three categories.


1. Sampling at a rate
2. Sampling at a rate
3. Sampling at a rate

28.2 Sampling (contd..)

When sampling frequency, ƒ s< 2B, then there is an overlapping effect around frequency ƒ s/2, known as
the folding frequency. As a consequence of superposition, the frequency domain information is
distorted. Thus, we should choose ƒ s > 2B. This important result is a part of sampling theorem stated
below in two equivalent ways.
1. A band limited signal of finite energy, which has no frequency component higher than Hz, is completely
described

by specifying the values of the signal at instants of time separated by seconds.

2. A band limited signal of finite energy which has no frequency component higher than Hz may be
completely
recovered from the knowledge of its samples taken at a rate of per sec.

The sampling rate of 2B samples per sec is known as Nyquist rate.


In practice, even a band limited signal will contain noise. Noise reflects as high frequency component in
the overall spectrum, (fig 28.8). Thus, even if we sample the signal at a rate say Hz, we cannot
reconstruct the correct frequency domain information. Noise is aliased to lower frequency. It distorts the
frequency domain information by superposing an alias of noise on the original signal. To avoid this, in
practice it is necessary to pass the continuous signal first through an analog low pass filter. Such a filter
is known as anti-aliasing filter. Fig 28.9 illustrates this concept.

28.2 Sampling (contd..)

28.2 Sampling
Review Questions

1. Derive the sampling theorem.

2. A 40 kHz signal is sampled at 49 kHz. What is the minimum frequency to which this signal will be aliased.

3. For the signal in fig 28.2, suggest appropriate sampling frequency.

Recap
In this lecture we have learnt the following:

Role of DSP in relaying.

Sampling theorem.

Role of anti-aliasing filter.


Module 8 : Numerical Relaying I : Fundamentals

Lecture 29 : Least Square Method for Estimation of Phasors - I

Objectives
In this lecture, we will formulate the phasor estimation problem

In particular we will learn 2-sample approach to estimation.

The role of noise in estimation will be brought out.

29.1 Phasor Estimation

Consider the problem of estimating the


impedance seen by a relay. In a
numerical relaying setup, voltage and
current signals would be sampled at
appropriate frequency and acquired by a
micro processor or a DSP. For relaying
decision making we need to estimate the
voltage and current phasor. For
simplicity, imagine a single phase circuit
as shown below. Also assume that the
frequency of the supply (e.g. 50/60Hz) is
known.

The voltage waveform can be represented by


(1)
and current waveform by
(2)

Let us concentrate on the problem of estimating voltage phasor ( ). Since there are two unknowns,
minimum number of samples required in a cycle to estimate unknowns is two.

Let us assume that a sample is acquired after every second. Let the first sample be obtained at
and the next one at . Then, voltage samples at and are given by,

where, and

29.1 Phasor Estimation (contd..)


Henceforth, we use the convention that first sample is obtained at and angle corresponding to j th
sample is given by

Now, treating and as unknowns, we get


(3)

(4)

and (5)

It is clear from eqns. (4) and (5) that if , m an integer, then , which
implies the singularity of coefficient matrix. In such an event, it is not possible to proceed with
estimation. For example, with , we get . Corresponding samples are shown in fig
29.2.

This corresponds to a sampling rate of two samples per cycle. If power system frequency is , this

implies that sampling rate should be higher than , so that . In fact, this is in agreement
with the well known sampling theorem (seen in previous lecture).

29.1 Phasor Estimation (contd..)


Henceforth, we use the convention that first sample is obtained at and angle corresponding to j th
sample is given by

Now, treating and as unknowns, we get

(3)
(4)

and (5)

It is clear from eqns. (4) and (5) that if , m an integer, then , which
implies the singularity of coefficient matrix. In such an event, it is not possible to proceed with
estimation. For example, with , we get . Corresponding samples are shown in fig
29.2.

This corresponds to a sampling rate of two samples per cycle. If power system frequency is , this

implies that sampling rate should be higher than , so that . In fact, this is in
agreement with the well known sampling theorem (seen in previous lecture).

29.1 Phasor Estimation (contd..)

Consequently and can be computed by following equations.

and

A generic form of the estimation is given by the following equation.

(6)

(7)
Infact, we have replaced the sample-2 by the most recent sample sample. Similarly sample-1 is
replaced by sample . We also say that sampling window has 2 samples per window (see fig 29.4).
In any relaying application, computations have to be completed before the arrival of next sample. Note
that, when uniform sampling is used with time space of sec. , a constant.

29.1 Phasor Estimation (contd..)

Example 1

Consider a signal , and a sampling time of 5 msec i.e. sampling rate 4

samples per cycle. Let the sampling be initiated at sec.

(a) Write down the sequence of first 10 voltage samples.

Ans: The sequence is summarized below.

t msec 0 5 10 15 20 25 30 35 40 45
V 5.00 8.66 -5.00 -8.66 5.00 8.66 -5.00 -8.66 5.00 8.66

(b) Compute the voltage phasor for 100 samples

Fig 29.3 shows the estimate of voltage magnitude as a function of samples. It is obvious that in the

absence of noise, estimate gives the right value of .


Fig 29.4 also introduces the concept of data window for estimation. This window contains the 'active' set
of samples which are currently being processed for phasor estimation. In the present case, we say that
we are using a 2-sample window. Each consecutive window, differs from the previous window by adding
a new sample and by removing the oldest active sample.

29.1 Phasor Estimation (contd..)

Example 2

In real life, the voltage signal will not be a


perfect sinusoid. Further, transducers like
voltage transformer, A/D converter etc.
introduce inaccuracies which we can model
as noise. The noise has a zero mean, and
it's standard deviation measures the
accuracy of the meter. Typically, noise is
modeled by zero mean Gaussian
distribution. Therefore, measurement value
will be within 36 around the true value, 99%
of the time. Consequently, if a 0-100V
voltmeter has a standard deviation of 1%,
then it implies that a measurement of a
signal having magnitude of 100V will be
measured any where between 97-103V,
99% of time.

For our simulations, let us model the voltage samples by

(8)

Function randn is obtained from a random number generator for normal distribution in MATLAB. E models
the standard deviation of noise. A smaller value of E implies lower level of noise and vice versa. Now we
conduct an experiment to estimate voltage phasor in presence of noise for 100 samples using 2-sample
method. The mean and standard deviation of for different levels of noise is shown in table 1. They are
calculated as per following equations. Let X 1 , X 2 ..... X N be N samples under consideration. Then, mean

and standard deviation

the square of standard deviation is called variance.

29.1 Phasor Estimation (contd..)

Example 2

In real life, the voltage signal will not be a


perfect sinusoid. Further, transducers like
voltage transformer, A/D converter etc.
introduce inaccuracies which we can model
as noise. The noise has a zero mean, and
it's standard deviation measures the
accuracy of the meter. Typically, noise is
modeled by zero mean Gaussian
distribution. Consequently, if a 0-100V
voltmeter has a standard deviation of 1%,
then it implies that a measurement of a
signal having magnitude of 100V will be
measured any where between 97-103V,
99% of time.
For our simulations, let us model the voltage samples by

(8)

Function randn is obtained from a random number generator for normal distribution in MATLAB. E models
the standard deviation of noise. A smaller value of E implies lower level of noise and vice versa. Now we
conduct an experiment to estimate voltage phasor in presence of noise for 100 samples using 2-sample
method. The mean and standard deviation of for different levels of noise is shown in table 1. They are
calculated as per following equations. Let X 1 , X 2 ..... X N be N samples under consideration. Then, mean

and standard deviation

the square of standard deviation is called variance.

29.1 Phasor Estimation (contd..)


Example 2
(contd..)
Table 1 : Effect of Gaussian Noise on Estimation of Phasors using 2-Sample Window

Randn multiplier(E) Mean Standard deviation


0.1 10.0069 0.1596
0.2 10.0162 0.3194
0.3 10.0282 0.4793
0.4 10.0426 0.6392
0.5 10.0596 0.7991
0.6 10.0791 0.9587
0.7 10.1011 1.1182
0.8 10.1256 1.2772
0.9 10.1527 1.4358
1.0 10.1824 1.5938
1.1 10.2146 1.7510
1.2 10.2495 1.9073
1.3 10.2871 2.0624
1.4 10.3275 2.2162
1.5 10.3707 2.3683
1.6 10.4169 2.5186
1.7 10.4662 2.6666
1.8 10.5188 2.8116
1.9 10.5750 2.9531
2.0 10.6346 3.0919
2.1 10.6975 3.2284
2.2 10.7638 3.3625
2.3 10.8336 3.4940
2.4 10.9065 3.6240
2.5 10.9825 3.7529
2.6 11.0613 3.8809
2.7 11.1430 4.0080
2.8 11.2277 4.1241
2.9 11.3152 4.2590
3.0 11.4055 4.3830

29.1 Phasor Estimation (contd..)


Example 2 (contd..)

Fig 29.6 shows the plot of estimated value of as a function of sample number for E = 0.5.

From fig 29.6 and table 1, it is evident that

1. As magnitude of zero mean noise increases, the standard deviation associated with magnitude increase.
2. Mean of is nearly 10.

3. Actual estimates seldom match with 10V.

This brings out an important fact that with bare minimum number of measurements, the noise affects the
accuracy. Therefore, in real-life, we have to device a procedure to filter noise and then estimate and

. To filter out noise, we need to consider redundant measurement. Redundancy in measurement is


defined as ratio of actual number of measurement used for estimation to minimum number of
measurement required for estimation. This issue is elaborated in the subsequent lecture.

Review Questions

1. Using MATLAB, repeat Example 1 and Example 2.

2. Derive two-sample estimation technique. Discuss it's limitation.


Recap
In this lecture we have learnt the following:

How to approach the phasor estimation problem in numerical relaying.

The significance of noise in estimation was brought out through 2-sample estimation method.
Module 8 : Numerical Relaying I : Fundamentals

Lecture 30 : Least Square Method for Estimation of Phasors - II

Objectives
In this lecture, we will learn 3-sample estimation

Method for phasor estimation.

Linear Least Squares (LS) probem will be formulated and solved.

Improvement, in the accuracy of estimation due to redundancy in measurements will be demonstrated.

30.1 Three sample technique

We now present a 3-sample technique for measurement of current and voltage which has better noise
elimination characteristic than the 2-sample technique discussed earlier. Three sample technique has a
redundancy of 1.5. In other words, we plan to show that standard deviation of the estimate reduces with
the use of a larger data window. For the voltage signal, consider three most recent samples given as
follows.

After doing the necessary trigonometric expansions, we get

Where . Arranging the equations in the matrix format, we get

(1)

Since, the real life signal has also noise in it, hence a more appropriate system model is given by

(2)

The above equations can be written in simple matrix format


It should be obvious by now that our job of estimating, unknown and is no-longer as
simple as solving the linear system equations in the 2-sample method.
Therefore, we now introduce a widely used technique for estimating the unknowns in presence of
redundant measurements. It is known as least square estimation.

30.2 Least Square Estimation

Consider the problem of solving the following linear system of equations.

(3)

(4)

(5)
30.2 Least Square Estimation (contd..)
It is quite easy to verify that the system of equations is inconsistent because left hand side of (5) is the
sum of left hand side of (3) and (4) but right hand side of (5) is not the sum of RHS of (3) and (4). If we
view linear system of equations in matrix algebra format ; then, we know that the system of
equations is consistent if and only if
rank (A) = rank (A, b).

In this case

rank (A) = 2 and rank (A, b) = 3

Some of you may be wondering as to what is the connection of this example with the problem at our
hand. Suppose that noise contribution in b(1) is 0.1, in b(2) is -0.1. Then the noise in the third
measurement is 1. It is now apparent that inconsistency in the linear system of equations is happening
because of noise. Thus, our job should be to estimate the noise and eliminate it. This can not be done
within the frame work of linear system of equations. It is for this purpose the method of least squares is
used.

Method of least squares is used for point estimation, curve fitting etc. It can be shown that even Fourier
series solves a least square estimation problem. So what is least square estimation problem? In some
sense, we want to find a vector such that is nearest to vector . For this purpose, we define a

residual vector as i.e. . The Eucledian length of the vector

gives a measure of closeness of to . Our aim now is to minimize the length of the residual vector.

min

Minimization of length of residual vector or square of length are equivalent in the sense, the minimum is
reached at same value of . However, working with squares eliminates the problem of square roots in
calculating derivatives. Hence, a least square problem is defined as

(6)

The scalar is introduced only for the sake of convenience. Again it does not affect the optimal .

Constant in the estimation problem can be neglected without affecting . Let us now work out the least
square solution for the example problem under consideration.

Substituting the values of A and b in (6), we get following least square problem.
i.e. min

i.e. min

Thus,

30.2 Least Square Estimation (contd..)


It is quite easy to verify that the system of equations is inconsistent because left hand side of (5) is the
sum of left hand side of (3) and (4) but right hand side of (5) is not the sum of RHS of (3) and (4). If we
view linear system of equations in matrix algebra format ; then, we know that the system of
equations is consistent if and only if
rank (A) = rank (A, b).

In this case

rank (A) = 2 and rank (A, b) = 3

Some of you may be wondering as to what is the connection of this example with the problem at our
hand. Suppose that noise contribution in b(1) is 0.1, in b(2) is -0.1. Then the noise in the third
measurement is 1. It is now apparent that inconsistency in the linear system of equations is happening
because of noise. Thus, our job should be to estimate the noise and eliminate it. This can not be done
within the frame work of linear system of equations. It is for this purpose the method of least squares is
used.

Method of least squares is used for point estimation, curve fitting etc. It can be shown that even Fourier
series solves a least square estimation problem. So what is least square estimation problem? In some
sense, we want to find a vector such that is nearest to vector . For this purpose, we define a

residual vector as i.e. . The Eucledian length of the vector

gives a measure of closeness of to . Our aim now is to minimize the length of the residual vector.

min

Minimization of length of residual vector or square of length are equivalent in the sense, the minimum is
reached at same value of . However, working with squares eliminates the problem of square roots in
calculating derivatives. Hence, a least square problem is defined as

(6)

The scalar is introduced only for the sake of convenience. Again it does not affect the optimal .

Constant in the estimation problem can be neglected without affecting . Let us now work out the least
square solution for the example problem under consideration.

Substituting the values of A and b in (6), we get following least square problem.
min

i.e. min

i.e. min

Thus,

30.2 Least Square Estimation (contd..)

At the minimum, partial derivative of with and should be zero. i.e.

Hence,

and

We can now generalize the method of least squares.


Consider system of equations given by

The number of unknowns (n) is less than number of knowns (m) i.e. redundancy >1. In other words,

b is a vector, A is a matrix. We know from the basics of the optimization theory that at the
minimum or maximum, the gradient of the objective function is zero. The gradient of the objective
function

is a vector given by

Setting this gradient to zero amounts to solving the following linear system of equations.
(7)
The solution of the above system of equations gives the optimal . It can be verified from the positive
definiteness property of that is the minimum. (see review questions)
30.3 3-sample technique continued

Thus applying the least square estimation methodology to eq(2), we can compute the estimate of
and by solving the following system of equations.

(8)

Example : 1

We now repeat the previous example with a 3-sample window. The analogous results to example 1 are
shown in table 1. It can be seen that as a consequence of using a larger data window, the accuracy of
voltage estimation improves significantly.

Table 1 : 3 - Sample Estimation

Randn multiplier(E) Mean Standard deviation


0.1 10.0061 0.0927
0.2 10.0130 0.1855
0.3 10.0207 0.2783
0.4 10.0293 0.3712
0.5 10.0387 0.4641
0.6 10.0490 0.5570
0.7 10.0601 0.6499
0.8 10.0719 0.7428
0.9 10.0846 0.8358
1.0 10.0982 0.9287
1.1 10.1125 1.0216
1.2 10.1277 1.1144
1.3 10.1436 1.2072
1.4 10.1604 1.3000
1.5 10.1780 1.3927
1.6 10.1964 1.4853
1.7 10.2156 1.5778
1.8 10.2356 1.6702
1.9 10.2564 1.7625
2.0 10.2781 1.8547
2.1 10.3005 1.9468
2.2 10.3238 2.0386
2.3 10.3479 2.1303
2.4 10.3727 2.2218
2.5 10.3985 2.3130
2.6 10.4250 2.4040
2.7 10.4524 2.4947
2.8 10.4807 2.5849
2.9 10.5099 2.6747
3.0 10.5400 2.7638

For example with E = 0.1, 2-sample technique had a of 0.1596 while with the 3-sample window, the
standard deviation reduces to 0.0927. Similarly with E = 3, standard deviation with 2-sample approaches
4.3830, which reduces to 2.7638 with 3-sample window. This shows that redundancy helps in filtering out
noise. However estimation spans a large data window.

Review Questions

1. Repeat Example 1 yourself.


A real symmetric square matrix Q is said to be positive definite. If for all .
2.
Now consider
where A is a full-column, rank matrix. Show that is positive definite.

Show that at the minimum of a function f(x), the matrix of second derivatives is at least
3.

positive semi
definite. Also, show that if H is positive definite, then we have a strict local minimum.
A symmetric real matrix Q is said to be positive semi definite, if for all .
4.
Hence, show
that if A is not at all full-column rank matrix, then is positive semi definite.
Show that a real symmetric matrix is positive definite, if and only if all its Eigen values are real and
5.
greater than
zero. Hence, comment on the positive definiteness of following matrices.
a) I n ( - identity matrix).

b) c) d)

Recap
In this lecture, we have formulated

The phasor estimation problem as a least squares estimation problem.

A 3-sample methodology for phasor estimation was discussed.

Improvements over 2-sample technique was demonstrated.


Module 8 : Numerical Relaying I : Fundamentals

Lecture 31 : Fourier Algorithms

Objectives
In this lecture, we will learn

Phasor estimation using least square method.

Half cycle and full cycle fourier algorithms.

Frequency response of algorithms.

Role of mimic impedance in distance relaying.

31.1 Full Cycle Fourier Algorithm


So far we have used number of sample points required in estimation method to define the length of data
window. Alternatively, length of data window can be characterized by it's time span. For example, for a 3-
sample data window, time span of data window is , thus, higher the sampling frequency, smaller the
time span. We now consider the case when length of the data window is one cycle, though we have a
freedom to choose number of samples in a window subject to the constraint N > 2.

Let the sampling frequency be such that (K>2) K samples be acquired in a cycle. With one cycle data
window the eq (5) can be simplified dramatically. For example, for the first cycle (samples 0, 1, 2……K-
1), LS estimation model with K samples per cycle in the data window is given by follows eqn.

The solution to the LS estimate problem is given by,

Now,

Since (1)

Equation (1) represent the numerical integral of over a time interval of (see exercise

1).
Since , it is not surprising to find out that above numerical integration is also zero.

Similarly, it can be shown that and are numerical equivalent of and

Consequently, they are non-zero and it can be shown that,

Thus, with one cycle data window, coefficient matrix in (15) becomes diagonal. Hence the equation
simplifies to

(2)

where

(3)

31.1 Full Cycle Fourier Algorithm (contd..)

The voltage signal is also represented in literature as

With these notation and

The estimating equations (1) and (2) can be generalized for data window as follows

(4)

(5)
Infact, these equations are identical to rectangular form of DFT to be discussed in later lectures.

Table 1 : Performance of Full Cycle Fourier Algorithm (K = 10)

Randn multiplier(E) Mean Standard deviation


0.1 10.0058 0.0441
0.2 10.0118 0.0882
0.3 10.0180 0.1323
0.4 10.0243 0.1764
0.5 10.0308 0.2205
0.6 10.0374 0.2646
0.7 10.0442 0.3087
0.8 10.0512 0.3528
0.9 10.0583 0.3969
1.0 10.0656 0.4409
1.1 10.0731 0.4850
1.2 10.0807 0.5290
1.3 10.0885 0.5730
1.4 10.0964 0.6170
1.5 10.1045 0.6610
1.6 10.1128 0.7050
1.7 10.1212 0.7489
1.8 10.1298 0.7928
1.9 10.1386 0.8367
2.0 10.1475 0.8806
2.1 10.1566 0.9244
2.2 10.1658 0.9682
2.3 10.1752 1.0120
2.4 10.1848 1.0558
2.5 10.1945 1.0995
2.6 10.2044 1.1432
2.7 10.2144 1.1869
2.8 10.2246 1.2305
2.9 10.2350 1.2740
3.0 10.2455 1.3176

Table 1 illustrates the results of the estimation when full cycle data window is used. It can be seen that
standard deviation associated with measurement reduces even further to 1.3176 for E = 3. This should
be contrasted with 3-sample data window where corresponding was 2.7638. This brings out an
important aspect of relaying discussed earlier that accuracy of estimation is improved by increasing the
length of data window. (see Exercise - 2)
Example : 1
The algorithm that we have discussed is known as Full Cycle Fourier Algorithm. In this example, we
evaluate the capability of full cycle Fourier algorithm to filter out harmonics. Input signal corresponds to
a 50 Hz square wave shown below. The harmonic spectrum of such wave form is given by
This signal is sampled at a rate of 10 samples per cycle and full cycle Fourier method is applied to
estimate the fundamental. In addition noise is introduced using random number generator. The true
value of fundamental component is = 12.7324.

Example : 1 (contd..)

Table 2 : Harmonic + noise filtering capability of full cycle algorithm

Randn
Mean Standard deviation
multiplier(E)
0.1 12.9512 0.0444
0.2 12.9583 0.0888
0.3 12.9655 0.1332
0.4 12.9728 0.1776
0.5 12.9802 0.2220
0.6 12.9878 0.2664
0.7 12.9955 0.3108
0.8 13.0033 0.3552
0.9 13.0112 0.3996
1.0 13.0193 0.4440
1.1 13.0275 0.4884
1.2 130358 0.5328
1.3 13.0442 0.5772
1.4 130527 0.6216
1.5 13.0614 0.6660
1.6 13.0702 0.7104
1.7 13.0791 0.7548
1.8 13.0881 0.7992
1.9 13.0972 0.8435
2.0 13.1065 0.8879
2.1 13.1159 0.9323
2.2 13.1254 0.9766
2.3 13.1350 1.0209
2.4 13.1448 1.0653
2.5 13.1546 1.1096
2.6 13.1646 1.1539
2.7 13.1747 1.1982
2.8 13.1849 1.2425
2.9 13.1953 1.2867
3.0 13.2057 1.3310

Table 2 summarizes the response of full cycle algorithm in the presence of harmonics. It is seen that the
full cycle algorithm also filters harmonics effectively. Note that mean and average are calculated over
100 consecutive estimation.

Example : 2

To improve speed, we can even restrict the data window to half a cycle. When this is done, we get half
cycle Fourier algorithm. With K number of samples per half cycle, the relevant equations are given by
(see exercise - 4)

(6)

(7)

Notice that our convention is that the latest sample corresponds to the window number. Therefore, first K
- window are incomplete because K - samples are not available with them. To complete the incomplete
windows, adequate number of zeros are padded in the beginning. Correct estimates are obtained only
after .
Table 3 : Performance of Half Cycle Fourier Algorithm

Randn
Mean Standard deviation
multiplier(E)
0.1 10.0058 0.0614
0.2 10.0119 0.1228
0.3 10.0183 0.1842
0.4 10.0251 0.2456
0.5 10.0322 0.3070
0.6 10.0396 0.3684
0.7 10.0474 0.4298
0.8 10.0555 0.4911
0.9 10.0639 0.5525
1.0 10.0727 0.6138
1.1 10.0817 0.6751
1.2 10.0912 0.7364
1.3 10.1009 0.7977
1.4 10.1110 0.8589
1.5 10.1214 0.9201
1.6 10.1321 0.9813
1.7 10.1431 1.0424
1.8 10.1545 1.1034
1.9 10.1662 1.1645
2.0 10.1783 1.2254
2.1 10.1906 1.2863
2.2 10.2033 1.3472
2.3 10.2163 1.4080
2.4 10.2297 1.4687
2.5 10.2434 1.5294
2.6 10.2574 1.5899
2.7 10.2717 1.6504
2.8 10.2864 1.7108
2.9 10.3014 1.7711
3.0 10.3168 1.8314
Table 3 summarizes the performance of half cycle algorithm for the standard sinusoidal signal used in all
our examples. In presence of harmonics, it can be shown that the accuracy of the algorithm is not as
good as full cycle algorithm. (see example - 5)

Example : 2

To improve speed, we can even restrict the data window to half a cycle. When this is done, we get half
cycle Fourier algorithm. With K even number of samples per half cycle, the relevant equations are given
by (see exercise - 4)

(6)

(7)

Notice that our convention is that the latest sample corresponds to the window number. Therefore, first K
- window are incomplete because K - samples are not available with them. To complete the incomplete
windows, adequate number of zeros are padded in the beginning. Correct estimates are obtained only
after .
Table 3 : Performance of Half Cycle Fourier Algorithm

Randn
Mean Standard deviation
multiplier(E)
0.1 10.0058 0.0614
0.2 10.0119 0.1228
0.3 10.0183 0.1842
0.4 10.0251 0.2456
0.5 10.0322 0.3070
0.6 10.0396 0.3684
0.7 10.0474 0.4298
0.8 10.0555 0.4911
0.9 10.0639 0.5525
1.0 10.0727 0.6138
1.1 10.0817 0.6751
1.2 10.0912 0.7364
1.3 10.1009 0.7977
1.4 10.1110 0.8589
1.5 10.1214 0.9201
1.6 10.1321 0.9813
1.7 10.1431 1.0424
1.8 10.1545 1.1034
1.9 10.1662 1.1645
2.0 10.1783 1.2254
2.1 10.1906 1.2863
2.2 10.2033 1.3472
2.3 10.2163 1.4080
2.4 10.2297 1.4687
2.5 10.2434 1.5294
2.6 10.2574 1.5899
2.7 10.2717 1.6504
2.8 10.2864 1.7108
2.9 10.3014 1.7711
3.0 10.3168 1.8314

Table 3 summarizes the performance of half cycle algorithm for the standard sinusoidal signal used in all
our examples. In presence of harmonics, it can be shown that the accuracy of the algorithm is not as
good as full cycle algorithm. (see example - 5)
31.1 Full Cycle Fourier Algorithm
So far we have used number of sample points required in estimation method to define the length of data
window. Alternatively, length of data window can be characterized by it's time span. For example, for a 3-
sample data window, time span of data window is , thus, higher the sampling frequency, smaller the
time span. We now consider the case when length of the data window is one cycle, though we have a
freedom to choose number of samples in a window subject to the constraint N > 2.

Let the sampling frequency be such that (K>2) K samples be acquired in a cycle. With one cycle data
window the eq (5) can be simplified dramatically. For example, for the first cycle (samples 0, 1, 2……K-
1), LS estimation model with K samples per cycle in the data window is given by follows eqn.

The solution to the LS estimate problem is given by,

Now,

Since (1)

Equation (1) represent the numerical integral of over a time interval of (see exercise

1).

Since , it is not surprising to find out that above numerical integration is also zero.

Similarly, it can be shown that and are numerical equivalent of and

Consequently, they are non-zero and it can be shown that,


Thus, with one cycle data window, coefficient matrix in (15) becomes diagonal. Hence the equation
simplifies to

(2)

where

(3)

We conclude this lecture by summarizing the effect of length of data window on delay in post fault
estimation of voltage and current signals.
31.2 Issues Related to Fault Current Estimation
Fig 31.3 shows pre-fault to post-fault
current waveform. A 3-sample full cycle
data window is considered. The window W1
contains only pre-fault data. Thus it can be
used to correctly estimate the pre-fault
current. The first post-fault sample is seen
in data window W2 . Window W2 contains
one post-fault current sample and two pre-
fault current samples. Hence it does not
correspond to either pre fault or post fault
phasor. Hence, it's estimation is completely
erroneous. When, we reach window W4 , we
find that it is populated completely with
post fault data. Consequently, it's phasor
estimated corresponds to the post fault
phasor.

Thus, the delay introduced in measuring post-fault signal is equal to the length of data window. Thus, 1
cycle data window introduces a delay of 1 cycle in estimation. It is likely that CT may be driven into
saturation by DC offset current. While cycle window will reduce accuracy of estimation, with it's use

one can strike a compromise between the problem of CT saturation and improving accuracy of estimation.

The next example considers the effect of delaying DC offset current of the fundamental on estimation.

Example : 3

Consider a current signal which does not have noise but it has DC offset. This represents fault current on
an unloaded system.
Fig 31.4 show the estimated magnitude of I m, measured for 5-fundamental cycles using 2-point, 3-point
cycle and full cycle Fourier algorithms. It can be seen that, significant errors are seen in all

estimation methods. Also, accuracy of full cycle fourier algorithm is seen to be the most accurate
algorithm. The reason is quite obvious. Even if we view DC offset current as noise, it is apparent that it
does not have a zero mean. Thus, least square based estimation algorithms are expected to fail under
such situations.

One way out of this imbroglio is that we should use some other filtering method for dc offset current. This
is usually achieved in hardware by what is known as mimic impedance. (refer Q. 7)

31.3 Mimic impedance :

Mimic impedance is an impedance whose


ratio is identical to the ratio of

transmission lines. In that sense, it mimics


a transmission line.
Fig 31.5 shows a current source having
sinusoidal component and dc offset current
connected to the impedance. The
sinusoidal voltage developed across the
impedance is given by
=

where

One way out of this imbroglio is that we should use some other filtering method for dc offset current. This
is usually achieved in hardware by what is known as mimic impedance. (refer Q. 7)

31.3 Mimic impedance :

Mimic impedance is an impedance whose


ratio is identical to the ratio of

transmission lines. In that sense, it mimics


a transmission line.
Fig 31.5 shows a current source having
sinusoidal component and dc offset current
connected to the impedance. The
sinusoidal voltage developed across the
impedance is given by

=
31.3 Mimic impedance : (contd..)

Time constant is the ratio of the line. Now, if we choose , then it is obvious that the

voltage waveform is devoid of the dc offset component and is given by

Infact this is the sinusoidal steady response for the mimic impedance circuit.
The current is scaled by magnitude of mimic impedance and in phase by . Thus by an inverse
operation, we get back the sinusoidal current waveform devoid of dc offset component. Filtering algorithm
discussed earlier will then give satisfactory results. Mimic impedances are routinely used in distance
relays used for transmission line relaying where the problem of decaying dc offset is most serious. Mimic
impedance can also be implemented in software.

31.4 Frequency response of Estimation algorithms


By now we have deduced that:

1. Full cycle fourier algorithm gives the best performance in filtering harmonics and noise.

2. Half cycle does improve speed of response at the cost of accuracy.

3. Three sample algorithm is quite fast but the accuracy of estimation is poor.

Any of the above estimation algorithms can be viewed as a digital filter whose job is to extract
fundamental in presence of harmonics and noise. The presentation so far was biased towards elimination
of noise. Filtering of harmonic can be discussed more neatly by evaluating the frequency response of the
estimation algorithms.

31.4 Frequency response of Estimation algorithms (contd..)

Input to the filter is stream of samples at frequency , . Since, in relaying we are


primarily interested in extracting the fundamental component. The output of the estimation algorithm is
viewed by the relay logic as the fundamental component of the signal. Thus, if , the output
should follow input. On the other hand, if , ideally, the output should be zero.

The frequency response can be evaluated by analytical tools. However, to simplify presentation, we
restrict the treatment to experimental (by simulation) evaluation of the frequency response. The
frequency response for 3-sample, half cycle and full cycle algorithms are shown in fig 31.7.

Salient observations arising out of fig 31.7 are as follows:


1. Full cycle algorithm rejects dc component as well as harmonics (both even and odd) very efficiently. This
can be explained by the fact that
&

For m - an integer, greater than unity.

Half cycle algorithm rejects odd harmonics efficiently but not the even harmonics. This can be explained
2.
by
the fact that

&

For m - an odd number, greater than unity.

3. 3-sample does not have good harmonic rejection properties.


4. Acharacteristic frequencies are wrongly interpreted by all algorithms as fundamental. Infact, the full cycle
Fourier algorithm is identical to DFT. Therefore, it is not surprising to find out that this behavior can be
explained by what is known as ‘DFT leakage'. We will consider this issue in more detail in later lectures.

31.4 Frequency response of Estimation algorithms (contd..)

Input to the filter is stream of samples at frequency , . Since, in relaying we are


primarily interested in extracting the fundamental component. The output of the estimation algorithm is
viewed by the relay logic as the fundamental component of the signal. Thus, if , the output
should follow input. On the other hand, if , ideally, the output should be zero.

The frequency response can be evaluated by analytical tools. However, to simplify presentation, we
restrict the treatment to experimental (by simulation) evaluation of the frequency response. The
frequency response for 3-sample, half cycle and full cycle algorithms are shown in fig 31.7.

From the fig 31.7, it can be seen that


1. Full cycle algorithm rejects dc component as well as harmonics (both even and odd) very efficiently
2. Half cycle algorithm rejects odd harmonics efficiently but not the even harmonics
3. 3-sample does not have good harmonic rejection properties.
Acharacteristic frequencies are wrongly interpreted by all algorithms as fundamental. Infact, the full cycle
4.
fourier
algorithm is identical to DFT. Therefore, it is not surprising to find out that this behavior can be explained
by what is known as ‘DFT leakage'. We will consider this issue in more detail in later lectures.

31.4 Frequency response of Estimation algorithms (contd..)


Review Questions

Exercise 1:

Consider evaluation by trapezoidal rule of integration. This is average of the second

harmonic signal over 2-cycles which is known to be zero. Consider sampling this signal at rate of K -

samples per cycle corresponding to fundamental frequency. The sampels are at start t = 0,.... (2K-

1). Now append K+1 sample at the end clearly, and . Addition of this additional

sample, allows us to cover one full cycle length of fundamental on x - axis. Now show that is

numerical evaluation of this integral. Hence, deduce that . Illustrate your result

geometrically.
Exercise 2:

Assuming a sampling rate of 32 samples per cycle, generate samples for a 50 Hz sinusoidal signal with
at different levels of noise. Now choose noise parameter choose E = 0.5. Now consider standard
deviation of estimation obtained after 100 estimations. Plot the (curves of 6 vs K; the no. of cycles in
data window) where K is varied from 1 - 4. Hence, show that increasing the length of data window
reduces error. Interpret this result in terms of speed vs accuracy conflict in relaying.

Exercise 3:

Repeat exercise 2 for E = 0.1, 1, 2, 3 and 4.

Review Questions (contd..)

Exercise 4: (contd..)
Consider LS estimate of phasor using half cycle data window i.e. K-samples per half cycle at nominal
frequency. Show that the estimate equations are given as below:

Further, show that for cycle with,

and . Hence, derive a simple expression for

calculating and . Compare and contrast with the full cycle window results.

Exercise 5:

Evaluate fundamental component of the square wave in Example - 1 using half cycle fourier algorithm.
What conclusions do you draw.
Exercise 6:

Suppose that square in Example - 1 also had a superposed dc component of 5v. Repeat Q. 5. Hence,
refine your conclusions.

Exercise 7:

One way to account for decaying dc offset current during estimation of fundamental is to account for it in
the signal model. Hence, consider the signal model to be .
Assuming that time constant ' ' is known, develop a LS method to estimate V m, and V 0 . Compare the
accuracy of this method with full cycle and half cycle algorithm.

Exercise 8:

Extend full cycle algorithm to measure 3rd and 5th harmonic in a signal. Assume suitable sampling
frequency.

Recap
In this lecture we have learnt the following:

Phasor estimation using least square method.

Half cycle and full cycle fourier algorithm.

Frequency response of various algorithms.

Role of mimic impedance in distance relaying.


Module 9 : Numerical Relaying II : DSP Perspective

Lecture 32 : Fourier Analysis

Objectives
In this lecture, we will show that

Trignometric fourier series is nothing but LS approximate of a periodic signal over orthogonal basis of
polynominals.

Hence, we will extend fourier like method to functioning of other orthogonal functions like walsh, Harr etc.

32.1 Fourier series: A review

Let be a real valued periodic function with time period that satisfies Dirchelet’s conditions. They
require that

1. f(t) is bounded and of period T 0


2. f(t) has finite number of maxima and minima in one period and
3. finite number of discontinuities.
Then, it can be expressed in either of the following equivalent forms.

a)

Where is called fundamental frequency and , harmonic where - is an integer.

b)

In (a), the coefficients and are real valued, while in (b), coefficient may be complex. Both
forms (a) and (b) are equivalent. (b) can be obtained from (a) by following substitutions.

Thus, , and are related as follows.

32.1 Fourier series: A review


Let be a real valued periodic function with time period that satisfies following conditions
[Dirchelet’s conditions]. Then, it can be expressed in either of the following equivalent forms.

a)

Where is called fundamental frequency and , harmonic where - is an integer.

b)

In (a), the coefficients and are real valued, while in (b), coefficient may be complex. Both
forms (a) and (b) are equivalent. (b) can be obtained from (a) by following substitutions.

Thus, , and are related as follows.

32.1 Fourier series: A review (contd..)

In other words, , the usage of exponential form also introduces the concept of negative
frequency. It can be interpreted in the following way.

represents a phasor of unit magnitude rotating in anti-clockwise direction at speed of

rad/s.

represents a phasor of unit magnitude rotating in clockwise direction at speed of rad/s.

The coefficients , and can be computed using the following expressions.

=
=

32.1 Fourier series: A review (contd..)

In other words, , the usage of exponential form also introduces the concept of negative
frequency. It can be interpreted in the following way.

represents a phasor of unit magnitude rotating in anti-clockwise direction at speed of

rad/s.

represents a phasor of unit magnitude rotating in clockwise direction at speed of rad/s.

The coefficients , and can be computed using the following expressions.

=
32.1 Fourier series: A review (contd..)

Since, many of the voltage and current phasor estimation methods are based upon least square
estimation, it is a worthwhile intellectual exercise to show that Fourier series truncated at some ‘n’ can be
interpreted through Least square estimation theory.

We define the concept of mean square error (MSE). MSE is defined as:

The interval for periodic function should be time period , while should be sine/cosine

function (or) exponential function of the Fourier series. Our job is to find the coefficient so as to
minimize the mean square error. Thus, the optimization problem is given by,

Consider approximated by functions as follows:

(1)

In truncated Fourier series, belong to the set { integer} and . To


evaluate the quality of approximation,

Now,

(2)

32.1 Fourier series: A review (contd..)

Now, if we choose to be either or from the trigonometric form of Fourier series,

then the expression for the MSE simplifies drastically. It can be verified that with and

.
=

= 0;

In fact, this is analogous to the statement that we will have zero average power exchange over a time-
interval if the voltages and currents belong to different frequencies of the harmonic spectrum.

Similarly, with and , it can be verified that,

= = 0; (3)

Equation (3) holds true even when . When , we have the analogy of interaction between
voltage and current phasors separated by , which leads to zero average power.
The concept of zero average power interaction at (1) sines and cosines harmonic at different frequencies
and (2) sines and cosines at same frequency can be generalized by the concept of orthogonal functions.

32.2 Orthogonal functions:

A set of complex valued functions , , are said to be orthogonal if,

The definition obviously applies to real valued functions where in . Clearly, the functions used in
Fourier series (both in trigonometric and complex exponential form) are orthogonal. Many more set of
orthogonal functions like Walsh, Harr etc and corresponding approximate series can be found in the
literature of signal processing. They also have applications in power quality. However, for our use, Fourier
series suffices.

From the discussion so far, we conclude that in case of Fourier series over a time period , the second
term in (2) vanishes. Hence,
For the dc signal , it can be shown that,

(4)

Further, for to be , or , it can be verified that,

= =

32.2 Orthogonal functions: (contd..)

Hence,

At the minimum, the partial derivative of MSE with variable should be zero. Now,

For

Thus, when we substitute , we get coefficient , similarly by substituting

, we get coefficient . Finally, for dc signal, which is defined by , it can be


shown that

For
These coefficients of LS approximation are nothing but the coefficients of Fourier series. This leads us to a
very important conceptual result viz. coefficients in Fourier series minimize the MSE. This establishes the
linkage between Fourier series and Least square methods. Similar series can be developed for other set
of orthogonal functions. [See Q:2]

Review Questions

1. For the square periodic wave form as shown in fig 32.1.

Show that

Interpret you answers in terms of and .

2. A class of function known as Walsh function are defined as follows:

Review Questions
1. For the square periodic wave form as shown in fig 32.1.

Show that

Interpret you answers in terms of and .

2. A class of function known as Walsh function are defined as follows:

Review Questions (contd..)

2.
a) Plot the functions.
b) Show that they are orthogonal.
c) What advantages can they have in DSP.
For the square pulse shown below with duty cycle d/T, compute the harmonic spectrum. Evaluate its
3.
behaviour in
the limit S .

4. State the conditions under which periodic signal can be represented by Fourier Series.
Recap
In this lecture we have learnt the following:

Trignometric Fourier series is nothing but LS approximate of a periodic signal over orthogonal basis of
polynominals.

Hence, we can extend Fourier like method to functioning of other orthogonal functions like walsh, Harr
etc.
Module 9 : Numerical Relaying II : DSP Perspective

Lecture 33 : Discrete Fourier Transform

Objectives
In this lecture, we will

Derive Discrete Fourier Transform (DFT) and its inverse.

Different forms of DFT and IDFT will be derived.

33.1 Motivation

Consider a finite duration signal of duration sampled at (fig 33.1) a uniform rate such that

where is an integer .

Then the Fourier transform of signal is given by:

If we now evaluate the above integral by trapezoidal rule of integration after padding two zeros (red dots
in fig 33.1) at the extremity on either side [where the signal is zero], we obtain the following expressions.

(1)

The corresponding inverse which is used to reconstruct the signal is given by:

(2)

If from equation (1) we could compute complete frequency


spectrum i.e. then (2) would imply that we
can obtain . The fallacy in the above statement is
quite obvious as we have only finite samples and the curve
connecting any 2-samples can be defined plausibly in infinitely
many ways (see fig 33.2). This suggests that from (1), we should
be able to derive only limited amount of frequency domain
information.

33.1 Motivation

Consider a finite duration signal of duration sampled at fig 33.1 a uniform rate such that

where is an integer .
Then the Fourier transform of signal is given by:

If we now evaluate the above integral by trapezoidal rule of integration after padding two zeros (red dots
in fig 33.1) at the extremity on either side [where the signal is zero], we obtain the following expressions.

(1)

The corresponding inverse which is used to reconstruct the signal is given by:

(2)

If from equation (1) we could compute complete frequency


spectrum i.e. then (2) would imply that we
can obtain . The fallacy in the above statement is
quite obvious as we have only finite samples and the curve
connecting any 2-samples can be defined plausibly in infinitely
many ways (see fig 33.2). This suggests that from (1), we should
be able to derive only limited amount of frequency domain
information.

33.1 Motivation (contd..)

Since, we have N-data points [real] and a complex number contains both magnitude and phase
angle information in the frequency domain (2-units of information), it is reasonable to expect that we

should be in a position to predict atmost transforms for original signal.

Now, let

and (3)

then substituting (3) in (1), we get

Note that our choice of frequency is such that the exponential term in (1) is independent of . The
intuition for choosing such is that, in principles we are attempting a transform on discrete samples
which may (or) may not have a corresponding analog ‘parent' signal. This suggests to us the following
discrete version of Fourier transform for a finite discrete sequence

33.1 Motivation (contd..)

(4)

Our next job should be to come up with an inverse transformation. If inverse transformation exists, then
there is no loss of information from discrete (time) domain to frequency domain and vice-versa.
Existence of inverse will establish, transform nature of (4). If (2) defines IFT in continuous domain, in the
discrete domain, by analogy of (1) and (4) we can hypothesize following inverse transform.

(5)

Where K is a suitable scaling factor.


Our next job is to verify that indeed (4) and (5) define a transformation pair. Substituting (4) in (5), we
get following expression for right hand side of (5).

Right hand side (6)

[Note the use of dummy subscript ]

Let us work this expression out in a long hand fashion; for compactness we use notation

In the above expression, for the first row is set to zero, for the second row it is set to one and for the
last row .

33.1 Motivation (contd..)

Now, grouping terms column wise, we get


Note that this jugglery shows that we can interchange the summation order. One order indicates row
wise and another column wise summation

i.e. (7)

Our primary task now is to evaluate the expression.

We now claim that

Proof: For ,

Hence, the first case is obvious.


Now, if , let

33.1 Motivation (contd..)

Now,

where

AS is integer, then

Note that we have used the following geometric series expression

Thus, RHS in (6) is equal to

We see that equation (6) defines the inverse transformation if we choose ;


Thus, N-point DFT and IDFT for samples are defined as follows.

where m = 0, ........., N - 1
33.1 Motivation (contd..)

Now,

where

AS is integer, then

Note that we have used the following geometric series expression

Thus, RHS in (6) is equal to

We see that equation (6) defines the inverse transformation if we choose ;


Thus, N-point DFT and IDFT for samples are defined as follows.

where m = 0, ........., N - 1

33.1 Motivation (contd..)

Note that in general DFT and inverse DFT can be defined in many ways, each only differing in choice of
constant and . Thus, the generic form of DFT and IDFT is as follows:
DFT IDFT

i.e.

The constraint in choosing the constraints is that product

For example, when


Choice of is commonly used in relaying because it simplifies phasor estimation.

Review Questions

1. Repeat the DFT and IDFT derivation yourself.

Recap

In this lecture we have learnt the following:

Derived DFT and IDFT.


Module 9 : Numerical Relaying II : DSP Perspective

Lecture 34 : Properties of Discrete Fourier Transform

Objectives

In this lecture, we will

Discuss properties of DFT like:

1) Linearity,

2) Periodicity,

3) DFT symmetry,

4) DFT phase-shifting etc.

34.1 Linearity:

Let and be two sets of discrete samples with corresponding DFT's

given by and . Then DFT of sample set is given by

Proof: ;

34.2 Periodicity :

We have evaluated DFT at . There after, it shows periodicity. For example

Where is an integer.

Proof:

(1)

Both and are integers. Hence ; Therefore from (1) we set


34.3 DFT symmetry :

If the samples are real, then extracting in frequency domain seems counter
intuitive; because, from N bits of information in one domain (time), we are deriving 2N bits of information
in frequency domain. This suggests that there is some redundancy in computation of
. As per DFT symmetry property, following relationship holds.

, where symbol indicates complex conjugate.


Proof:

Since

34.3 DFT symmetry : (contd..)

If the samples are real; then they


contain atmost bits of information. On
the otherhand, is a complex number
and hence contains 2 bits of information.
Thus, from sequence , if
we derive , it
implies that from N-bit of information, we
are deriving bits of information. This is
counter intuitive. We should expect some
relationship in the sequence
Thus, we conclude that
[Symmetry]

and [Anti-
symmetry]. DFT magnitude and phase plots
appear as shown in fig 34.1 and 34.2.

34.4 DFT phase shifting :

DFT shifting property states that, for a


periodic sequence with periodicity i.e.
, an integer, an offset
in sequence manifests itself as a phase shift
in the frequency domain. In other words, if
we decide to sample x(n) starting at n equal
to some integer K, as opposed to n = 0, the
DFT of those time shifted sequence,
is

Proof: By periodicity of samples, we have


34.4 DFT phase shifting :

DFT shifting property states that, for a


periodic sequence with periodicity i.e.
, an integer, an offset
in sequence manifests itself as a phase shift
in the frequency domain. In other words, if
we decide to sample x(n) starting at n equal
to some integer K, as opposed to n = 0, the
DFT of those time shifted samples.

Proof: By periodicity of samples, we have


34.4 DFT phase shifting: (contd..)

(2)

Now to compute , let us map the samples to .


Apply DFT to sequence .

(from (2))

Review Questions

1. Compute 8 - pt. DFT of the following sequence.

, , , , , , ,
. Hence, illustrate the various DFT properties discussed in this lecture.

2. By using inverse DFT, show that discrete samples can be recovered with knowledge of

Calculate the N pt. DFT of rectangular function given by, . Verify the various DFT
3.
properties

for this signal.

Recap

In this lecture we have learnt the following:

The properties of DFT like:

1) Linearity,

2) Symmetry,

3) DFT symmetry,
4) DFT phase-shifting etc.
Module 9 : Numerical Relaying II : DSP Perspective

Lecture 35 : Computation of Phasor from Discrete Fourier Transform

Objectives
In this lecture, we will

Develop methodology to evaluate phasor from DFT.

The method would be generalized to handle moving windows.

Recursive forms of DFT approach will be derived.

35.1 DFT of a Sinusoid

Consider a sinusoidal input signal of frequency , given by

(1)

This signal is conveniently represented by a phasor

(2)

Assume that is sampled times per cycle such that . Then,

(3)

and f s = Nf 0 . In the transform domain, transformed components are separated by . Thus, choice
m = 1 corresponds to extracting the fundamental frequency component. The Discrete Fourier Transform
of contains the fundamental frequency component given by

(4)

(5)

where, (6)

35.1 DFT of a Sinusoid (contd..)

(7)

Substituting x k from (3) in (6) and (7) it can be shown that for a sinusoidal input signal given by (1)

(8)
Therefore, from equation (2), (5) and (8) it follows that

(9)

When the input signal contains other frequency components as well, the phasor calculated by equation
(9) is a filtered fundamental frequency phasor. It is presumed here that the input signal must be band-
limited to satisfy the “Nyquist Criterion”, to avoid errors due to aliasing affects.

35.2 Phase Computation using DFT

In relaying applications, during steady state, we will be working with a moving window, such that each
window is having N-most recent samples. Let and indicate and component of DFT for
window. By our convention, window number is the sample number of the first sample in the active
window. As the first N - 1 windows are incomplete, there window number is one. Afterwards, window
number is incremented by one for each new sample.

35.2 Phase Computation using DFT (contd..)

Similarly,

Hence, DFT estimated at window for (m = 1) is given by

Hence, phasor estimate for window is given by


Thus, we see that with moving window, the phasor estimate rotates at a speed of per window. This

rotation in phasor during computation can be directly derived from DFT – phase shifting property.

35.2Phase Computation using DFT (contd..)

In the computation of phasor, we would not like this phasor rotation to occur due to DFT phase shifting. This
can be avoided if we modify equation (6) and (7). Replace = 0 by = , in the lower limit and =N+
- 1 in the upper limit, we get

Where (10)

(11)

Substituting in equation (10), we get

for m = 1;

for m = 1;

Hence,

Thus, we conclude that artificial rotation induced in phasor computation by using DFT equations can be
eliminated by appropriately modifying the offset in the summation index of DFT equation.
35.3Full Cycle Recursive DFT
From equation (10) and (11), we have

and

35.2 Phase Computation using DFT (contd..)

In the computation of phasor, we would not like this phasor rotation to occur due to DFT phase shifting.
This can be avoided if we modify equation (6) and (7). Replace = 0 by = , in the lower limit and
=N+ - 1 in the upper limit, we get

Where (10)

(11)

Substituting in equation (10), we get

= for m = 1;

for m = 1;

Hence,

Thus, we conclude that artificial rotation induced in phasor computation by using DFT equations can be
eliminated by appropriately modifying the offset in the summation index of DFT equation.
35.3 Full Cycle Recursive DFT
From equation (10) and (11), we have

and

35.3 Full Cycle Recursive DFT (contd..)

The computation for can be visualized from the following pair wise multiplication and add sequence
enclosed in red brackets in the fig 35.1.
Now, to compute , we add one new sample . Computation of from is
shown by pairing with in the green boundary. It is now obvious, that

. Since,

for m - an integer. Thus,

(12)

Similarly, for sine component, we have

(13)

35.3 Full Cycle Recursive DFT (contd..)


Eqns. 12 and 13 provide a recursive update for DFT computation. The advantage of recursive form is that
it reduces computation from 2N multiply add operation in normal DFT to 4 additions and 2
multiplications.
To begin with, we will get 2N set . When the first window is full populated with N-

samples, we will get correct values of and . Afterwards, for a stationary phasor at

fundamental frequency and hence, the DFT latches on to the appropriate phasor.

35.4 Half Cycle DFT Form for Phase Estimation

If our primary interest is to extract fundamental phasor component in the signal then, it can be verified
that, restricting moving window to half a cycle does not alter the end result of eqn. (5) and (6) provided
that N-now represents, number of samples per half-cycle. Now, the sample is given by

. Thus, half cycle form of DFT phasor estimation is given by the following eqns.
(14)

(15)

Advantage of half cycle algorithm is that the moving window latches on to the post fault signal in of

a cycle. Thus, compared to full cycle version, it is twice as fast. A keen observer would have noticed that
DFT based on moving window phasor estimation equations are identical to the full cycle and cycle fourier
algorithms derived in lecture-31. Thus, the frequency response of fourier algorithms developed in lecture
31 applies to the DFT version. In particular, it is not surprising to see that harmonic rejection property of
half cycle algorithm is inferior to its full cycle avatar. This is consistent with the ‘speed vs accuracy'
conflict, we have discussed earlier.

35.5 Half Cycle Recursive DFT


Recursive form of half cycle DFT can be derived in an analogous manner to full cycle DFT. Realizing that

we get the following recursive update forms for fundamental phasor computation.

35.3 Full Cycle Recursive DFT (contd..)


Eqns. 12 and 13 provide a recursive update for DFT computation. The advantage of recursive form is that
it reduces computation from 2N multiply add operation in normal DFT to 4 additions and 2
multiplications.
To begin with, we will get 2N set . When the first window is full populated with N-

samples, we will get correct values of and . Afterwards, for a stationary phasor at

fundamental frequency and hence, the DFT latches on to the appropriate phasor.

35.4 Half Cycle DFT Form for Phase Estimation

If our primary interest is to extract fundamental phasor component in the signal then, it can be verified
that, restricting moving window to half a cycle does not alter the end result of eqn. (5) and (6) provided
that N-now represents, number of samples per half-cycle. Now, the sample is given by

. Thus, half cycle form of DFT phasor estimation is given by the following eqns.
(14)

(15)

Advantage of half cycle algorithm is that the moving window latches on to the post fault signal in of

a cycle. Thus, compared to full cycle version, it is twice as fast. A keen observer would have noticed that
DFT based on moving window phasor estimation equations are identical to the full cycle and cycle fourier
algorithms derived in lecture-x. Thus, the frequency response of fourier algorithms developed in lecture x
applies to the DFT version. In particular, it is not surprising to see that harmonic rejection property of
half cycle algorithm is inferior to its full cycle avatar. This is consistent with the ‘speed vs accuracy'
conflict, we have discussed earlier.

35.5 Half Cycle Recursive DFT


Recursive form of half cycle DFT can be derived in an analogous manner to full cycle DFT. Realizing that

we get the following recursive update forms for fundamental phasor computation.

35.3 Full Cycle Recursive DFT (contd..)


Eqns. 12 and 13 provide a recursive update for DFT computation. The advantage of recursive form is that
it reduces computation from 2N multiply add operation in normal DFT to 4 additions and 2
multiplications.
To begin with, we will get 2N set . When the first window is full populated with N-

samples, we will get correct values of and . Afterwards, for a stationary phasor at

fundamental frequency and hence, the DFT latches on to the appropriate phasor.

35.4 Half Cycle DFT Form for Phase Estimation

If our primary interest is to extract fundamental phasor component in the signal then, it can be verified
that, restricting moving window to half a cycle does not alter the end result of eqn. (5) and (6) provided
that N-now represents, number of samples per half-cycle. Now, the sample is given by

. Thus, half cycle form of DFT phasor estimation is given by the following eqns.

(14)

(15)
Advantage of half cycle algorithm is that the moving window latches on to the post fault signal in of

a cycle. Thus, compared to full cycle version, it is twice as fast. A keen observer would have noticed that
DFT based on moving window phasor estimation equations are identical to the full cycle and cycle fourier
algorithms derived in lecture-x. Thus, the frequency response of fourier algorithms developed in lecture
31 applies to the DFT version. In particular, it is not surprising to see that harmonic rejection property of
half cycle algorithm is inferior to its full cycle avatar. This is consistent with the ‘speed vs accuracy'
conflict, we have discussed earlier.

35.5 Half Cycle Recursive DFT


Recursive form of half cycle DFT can be derived in an analogous manner to full cycle DFT. Realizing that

we get the following recursive update forms for fundamental phasor computation.

Review Questions

1. Consider, the following signal

(a) Generate samples on this waveform using sampling frequency of 12 samples per cycle.
(b) Apply full cycle and half cycle algorithms to estimate phasor from generalized DFT approach.
(c) Repeat (b) using recursive forms.
2. Now consider the following signal.

Repeat (2) and comment on the accuracy of full cycle and half cycle estimation methods.
Recap
In this lecture we have learnt the following:

Computation of phasor from DFT.

Computation of stationary phasors from moving windows.

Recursive DFT approach (full cycle and half cycle).


Module 9 : Numerical Relaying II : DSP Perspective

Lecture 36 : Fast Fourier Transform

Objectives
In this lecture,

We will introduce Fast Fourier Transform (FFT).

We will show equivalence between FFT and Sequence transformation.

36.1 Fast Fourier Transform

We have seen that N- point DFT is given by the following expression

(1)

Let , the root of unit. Then the following relationships can be easily derived.

1. (2)

Proof: using Geometric progression series formula

We get because (3)

2. From and , we get

(4)

Hence , etc.

3. From the fact and , we have (5)

and etc. (6)

Now using the operator, DFT for can be written as follows.


Arranging it in a matrix format, we get the following

(7)

(or) stated more compactly

Where

The row of the matrix indexes the frequency component while the column of the

matrix indexes the sample. The matrix enjoys a very special property viz. it’s columns or rows

are orthogonal to each other. If and denote the and column of matrix , then, it is easy
to verify that

Where H - indicates Hermitian operator defined as

i.e. each column is first transposed to a row and every element is then replaced by its complex
conjugate.

For a real number, the complex conjugate is identical to the original number. Hence on real-valued
vectors, Hermitian and transpose operators are one and the same. However, for complex valued vectors
the two differ.
It is now easy to verify that

and

Thus,
(8)

(9)

The invertibility of , in essence captures the transform property of DFT.

In relaying, typically we are not interested in deriving all possible frequency components. Our interest is
primarily in extracting the fundamental and sometimes 2 nd and 5 th harmonic (differential protection).
Since, matrix-vector product involves multiplications, and similar number of additions, we say that
extracting all possible frequency components by (1) would involve (read as order ) effort.

This effort is considered to be significantly high for real-time computing. However, with some ingenuity,

researchers have shown that the task can be achieved in approximately computations. This

fast approach to computing all possible frequency transforms in discrete domain is called Fast Fourier
Transform (FFT). For example, with brute force implementation of (1) requires 64 complex
multiplications which can be reduced to 12 multiplications with FFT.

As we would not have much use for FFT in this course, we will not pursue this topic any further. Rather,
we now establish an equivalence between two very well known transforms viz. multiple DFT (or) FFT and
sequence component transformation. [for the remaining text through out we will refer equation (1) as
FFT].

36.2 Equivalence of FFT and N-phase sequence component transformation:

We will first review N-phase sequence transformation. Consider a N-phase (balanced or unbalanced)
system ( ). Let the phasors in phase domain e.g. ( for 3-phase system) be represented

by . Note that are complex numbers. Then, these phasors can be expressed
as a linear combination of N-set of balanced N-phase systems as follows.

0-sequence component

There are n- such phasors in the 0-sequence system each of equal magnitude and angle.

1-sequence component

(10)

There are n- such phasors in 1-sequence system. If is taken as reference, then for a balanced

system is equal in magnitude to but phase shifted by angle i.e.

Similarly, 2-sequence component

(11)
In this system b-phase lags a-phase by . Proceeding in the similar manner we get,

(12)

Equivalence of FFT and N-phase sequence component transformation: (contd..)

Fig 36.1 (a, b and c) visualize the system for a 3-


phase system. Expressing these equations in
matrix format we obtain the following equations.

(13)

Equivalence of FFT and N-phase sequence component transformation: (contd..)

Thus, writing compactly

or (14)
Where

Thus, from (8) and (14) we conclude that FFT and sequence transformation (defined from sequence
domain to the phase domain) involve the same transformation matrix P. Hence, the two transforms are
mathematically equivalent. In particular for N = 3. With a- phase as reference phasor, we see the
following equivalence relationships.

and from DFT, we get

This mathematical equivalence brings out an important concept viz. transformations and decompositions
done via orthogonal matrices can have multiple interpretations. However, there is one important
difference between the two transformations. The samples in signal processing are
usually real numbers while corresponding phasors in sequence analysis are complex numbers. Thus,
while there is a redundancy in information in FFT domain which leads to DFT symmetry property, there is
no such redundancy in sequence domain. Hence, in sequence domain we do not come across such a
property.

The mathematical equivalence of two should put the reader at ease with both these transformations,
irrespective of which one he came across first.

Recap
In this lecture, we have

Shown equivalence of generic FFT and N-phase sequence transformation.

Illustrated differences between the properties of the 2 - transforms , because first transform (FFT) is used
to

convert n-dimensional real vector (Rn ) to n-dimensional complex vector (Cn ) while the N-phase sequence
transformation maps a vector to a C n vector.
Module 9 : Numerical Relaying II : DSP Perspective

Lecture 37 : Estimation of System Frequency

Objectives

In this lecture,

We will introduce the concept of DFT leakage, and use it to estimate magnitude and phase angle errors
due to change

in system frequency.

Error in Phasor Estimation due to Change in System Frequency

So far while discussing the phasor estimation problem, we have assumed that frequency of the power
system remains fixed at it's nominal value ( ). Hence, we have also fixed the sampling

frequency to , with N-point DFT being used for estimation.

However, during disturbance and even in steady state to a certain extent, the frequency varies. Thus, we
expect the phasor estimation under constant frequency assumption to be erroneous. Under such
situations, how good is our estimate of the phasor? We now plan to answer this question. As a by product
of the analysis, we will also develop a frequency estimation technique which can be used in under
frequency and rate of change of frequency relays. To simplify presentation, the analysis is developed
gradually. First, we determine the DFT of complex exponential signal at frequency .

DFT of Complex Exponential

Let the signal be given by

(1)

For this signal let N-sample be captured in P-cycles. P can be a positive integer or even a positive real

number. Then, sampling interval ( ) is given by , sampling speed by . In the

previous lectures, we had taken P = 1. The discrete sample at is given by the following
expression:

(2)

Thus, DFT component corresponding to frequency , is given by

(3)
It should now be fairly easy to compute the summation in (3)

Let , which is a constant once P and m are fixed. (4)

DFT of Complex Exponential (contd..)

Then (5)

(6)

Note that MATLAB defines . This convention differs from our convention viz.

DFT of Complex Exponential (contd..)


DFT of Complex Exponential (contd..)

Fig 37.1(a) shows the envelope of response for as a function of , where is treated as a
continuous variable. Since in DFT we have to restrict to be a discrete number, this plot is sampled at
discrete points ( ). The plot indicates that fundamental is extracted correctly as

expected. At all harmonic frequencies, the DFT gain i.e. is zero. Infact, fig 37.1(a) is identical to

the frequency response of full-cycle Fourier algorithm. To be specific, we have chosen , N =


12.
Fig 37.1(b) shows the envelope of response for 3 different frequencies 49, 50, 51 Hz. The sampling rate
is fixed at 12 samples per cycle at nominal frequency of 50 Hz. Thus, at 49 Hz, P = 49/50 and for 51Hz
waveform P = 51/50. It is seen from the figure that magnitude response is more or less identical when
frequency deviation is within Hz.
Finally, fig 37.1(c) shows a set of response when frequency deviation from nominal is large enough i.e.
when = 40, 50 and 60 Hz. Now it can be seen easily that, if we sample the envelope in fig 37.1(c)
(not the time domain signal) of 40 Hz signal at 50 Hz ( ), then the P = 0.8, and gain at 50 Hz is a
finite non-zero value different from unity. This effect is known as DFT leakage. It can be said that the
energy in frequency bin has leaked into frequency bin .
Remark 1: As varies from , with a constant sampling frequency , we note that P varies

proportionately. This is because we always obtain N-samples in seconds which is equivalent to

cycles of Hz waveform.
Remark 2: From eqn. (6), it is clear that DFT gain is unity at . Thus, the curve of fig 37.1(a),
slides to the left when 'P' reduces below 1 and it slides to the right when . However, if we assume
our waveform to be a 50 Hz signal, we always sample the envelope at .

In DSP literature, DFT leakage is considered to be undesirable. It means that we wrongly interpret a 40
or a 60Hz signal as a 50 Hz signal. However, by a little more analysis, we will show that deviation small
enough from nominal frequency can be easily estimated from corresponding phase characteristic of DFT.
This not only allows us to build underfrequency and rate of change of frequency relays but it simplifies
hardware as sampling rate need not follow the system frequency. Consequently, no-zero crossing
detectors are required. From the relaying perspective, it turns out to be a boon in disguise.

As seen in fig 37.1(b), the DFT magnitude leakage for Hz frequency deviation around nominal

frequency say 50Hz, is practically negligible. For f = 51 Hz, it equals = -

0.0065. Thus, we conclude that effect of magnitude leakage on estimation of phasor magnitude can be
neglected. However, the phase angle of DFT tells another story. Note that

For and

Thus,

Thus an error of is introduced in phase computation due to 1 Hz frequency deviation.

DFT of real COSINE signal

So far, we have concentrated on DFT response of complex exponential. In practice, we are interested in
DFT of real sine (or) cosine signal and not the complex exponential signal. However, deriving the
response for real cosine (or) sine signal from response of complex exponential is not very difficult. From
the fact that

and by following similar steps as in the case of complex

exponential, we get where P is the number of cycles of the signal e.g. 1,

1.25, 2 etc, in which N-samples for DFT are obtained.

Thus,

(7)

We have already deduced that

Similarly it can be shown that


Thus,

(8)

With P 1, , it can be seen that

while, and .

Hence, following approximation can be made to equation (8).

(9)

We conclude that even with real sine or cosine signal, any reasonable deviation of the signal from the
nominal value, leads to negligible magnitude leakage. However, phase angle error for 1Hz deviation in
frequency is approximately which is not negligible.

DFT of real COSINE signal

Fig 37.2 shows the envelope of magnitude response of for different frequencies 40, 50, 60 Hz as

per eqn. (9). For these plots, we have used N = 32 and = 160 Hz.

Estimation of Frequency

Now our aim, is to develop a method of estimating power system frequency using the recursive DFT
approach to phasor estimation. We plan to show that in the moving window approach the phase angle
estimated by recursive DFT approach rotates at a speed proportional to the deviation from the nominal
frequency. In turn, this deviation can be assessed by measuring the rate of change of phase angle.

In the previous section, we have derived the DFT leakage for complex exponential and real cosine signals.
We will now generalize the DFT computation of complex exponential so that it can handle moving window
concept.

Generalized DFT of Complex Exponential


Following the methodology used while generalizing DFT, we can write generalized DFT for window
(window number corresponds to the sample number of first sample in the window) as:

(10)

where

Substituting, in (9), we get

where

Summation is the DFT corresponds to window number 1. Substituting from eqn. (8),

(11)
we obtain
If m = P, then it is clear that DFT is stationary i.e. independent of window number. In relaying

applications where we are interested in fundamental phasor estimation, we choose . Hence, we


can expect obtain stationary DFT in (10) when m = P = 1 i.e. when signal corresponds to fundamental
frequency.

With the knowledge of the generalized DFT of the complex exponential, now we can derive the
generalized DFT expression for real cosine signal.

Generalized DFT of Real Cosine Signal

For a real cosine signal, with moving window concept eqn (7) can be generalized as follows:

(12)

(13)

Following the similar reasoning as outlined in the previous section of the DFT of real cosine signal, we can
neglect the second term in (13). This leads to following approximation.

(14)

Observe that P = m = 1, we obtain stationary DFT because = 1. However, when frequency

deviates from nominal frequency i.e , then , the DFT estimate for nominal frequency, will
start rotating along with the window. From, (14) we can derive that

Since fundamental phasor estimated for window number ‘w' is given by

, we deduce that

(15)

where is the sampling time interval. Summarizing, if we set sampling frequency for a sinusoidal signal
to provide N-samples per cycle at the nominal frequency , (say 50 or 60 Hz), and keep the sampling
frequency invariant of the actual frequency of sinusoid, then the phasor estimated by moving window
approach rotates at a speed proportional to . This rotation will be in anti-clockwise direction if >
0 i.e. > . Conversely, it will be in the clockwise direction if < 0 i.e. < .

Generalized DFT of Real Cosine Signal (contd..)


If we monitor, this phase rotation, then from the proportionality relationship of (15), we can estimate the
frequency ‘ '. If denotes phase-angle, then from (15), we can obtain the rate of change of as
follows:

(16)

Discussion

There are many advantages associated with the above algorithm. The method is not based on zero
crossing time and it is immune to noise and harmonics. Instead of using single phase quartiles, one can
estimate the positive sequence component and derive frequency from it. Such an approach will use all the
three phase voltages and hence will have better noise rejection properties. At harmonics of nominal
frequency and hence, the above approach will reject frequencies m completely.

Measurement of Frequency

To measure accurately, we integrate eqn. (16) until equal to 0.5 radians. Let ‘T' be the time to
accumulate this change:

If we assume that frequency computation will be further averaged over four measurements to smoothen
out noise, then time to compute deviation is given by
Thus, a frequency deviation of 1 Hz is detected in 0.32sec while a frequency deviation of 0.1 Hz is
detected in 3.2sec. This is an illustration of standard speed versus accuracy conflict in relaying. This
technique can be recommended for development of under frequency and rate of change of frequency
relays.

Recap

In this lecture we have learnt the following:

We introduced DFT leakage. It was shown that when fixed sampling frequency is used, typically N-
samples in 1 - cycle

at nominal frequency, then, DFT leakage is zero. This means that there are no magnitude and phase angle
errors in estimation. However, when the system frequency deviates from the nominal (of the order
say), then errors introduced in estimating the amplitude of the signal is negligible. However, now phase
angle errors are not negligible.

It was shown that if the frequency deviates from the nominal value, with constant sampling frequency,
the phasor starts rotating at a speed proportional to it. This can be used for frequency estimation.
Module 10 : Differential Protection of Bus, Transformer and Generator

Lecture 38 : Bus Protection

Objectives

In this lecture, we will learn

Importance of redundancy in bus protection.

Different bus arrangements and their application like:

Single bus single breaker arrangement.

Single breaker double bus with bus tie.

Double bus double breaker arrangement.

Ring bus arrangement.

One and a half circuit breaker arrangement.

Implementation of differential bus protection using high impedance bus differential relay.

Non-linear percentage differential characteristics.

Introduction

Faults in a power system can be either apparatus faults or bus faults. Apparatus fault refer to faults in
feeders, transformers, generators or motors. On the other hand bus is an external interconnection point
for terminals of different apparatus. A bus fault is usually rare, but if and when it happens its
consequences can be quite severe. It can lead loss of multiple feeders or transmission lines and hence
has a potential to create a large enough disturbance to induce transient instability. Even if it does not
lead to transient instability, loss of load from an important substation can be quite high. Because of these
reasons, bus rearrangement can have sufficient redundancy so that in case of a bus fault, an alternative
bus automatically takes over the functions of the ‘main bus'. Thus, the end user sees no disruption in
service except during the fault interval. This can however involve significant costs, viz the cost of new
bus bar and additional circuit breakers to configure a parallel arrangement. Hence, different bus
configurations are used in practice – each one representing a different trade off between cost, flexibility
and redundancy. In this lecture, we will discuss following bus arrangements:-

1. Single bus - single breaker

2. Single breaker - double bus with bus-tie

3. Double bus - double breaker

4. Ring bus arrangement

5. One - and - a - half circuit breaker arrangement


Differential protection discussed in lecture 3 is used for bus protection. If the algebraic sum of all
apparatus currents is zero, then there is no fault on the bus. However, during bus fault, the apparatus
current sums to the bus fault current.

Single Bus Single Breaker Arrangement


Fig 38.1 shows the
single bus single
breaker arrangement. In
this particular example,
there are six feeders
connected to a bus.
Each feeder has a CT to
monitor feeder current
while a single VT is used
to measure bus voltage.
The ‘NC's are
mechanical switches
which are normally
closed. During bus
maintenance, these will
have to be opened to
guarantee safety to
maintenance personnel.

In case of bus fault, all


the breakers have to be
opened to isolate the
bus. In turn, it leads to
severe disruption of
service to loads. Hence,
this scheme has
minimum flexibility.
However, it uses
minimum number of
circuit breakers, (one
per feeder) and it also
requires only one VT.

Hence, it is cheap and is used for non critical, low priority feeders where loss of service is not a prime
consideration but low cost (investment) is.

Single Breaker Double Bus with Bus Tie


Fig 38.2 shows the arrangement.
This arrangement is used when
Large number of circuits exists especially at lower voltage and industrial
1.
substation.
2. Substation is fed from two separate power supplies with one supply for each bus.
If each bus has its own source, then bus coupler with overcurrent protection can be opened or closed. In
case of loss of supply, 51 (AC time overcurrent relay) is closed. For each bus, there is a differential
protection is provided. For a bus fault, we have to open all circuit breakers on bus along with 51T (trip
breaker). Thus, bus fault leads to only partial loss of service. The arrangement requires two VTs. Hence,
this scheme with addition of one bus bar and circuit breaker improves flexibility in comparison to the
single bus single breaker scheme.
Double Bus Double Breaker Arrangement
Fig 38.3 shows a double bus, double breaker arrangement.
As shown in the fig 38.3, each feeder is connected to two buses which in normal operation mode are
paralleled. Bus differential protection is provided for each bus. This scheme would be used typically at high
voltages like 400kV. Distance protection of such voltage level has to be directional as fault in the primary
line of Z2 of one of the relays cannot be left unattended for time required for Z2 operation. Hence,
directional comparison scheme is required for which CCVT is used for communication. Hence, one CCVT
per feeder would be used along with this scheme. In case of a bus fault (say on bus-1), the breakers
connected to it will have to be opened. Subsequently, the system function then automatically switches to
alternative bus (e.g. Bus 2) with no loss of service to load.

In case, if a feeder has to be isolated, both the breakers connected to it will have to be opened. For line
(feeder) protection, to measure feeder current the CT contribution from both bus 1 and 2 have to be
summed. i.e. corresponding CTs are paralleled. In case of a stuck breaker, local backup for breaker failure
is to operate all the corresponding bus breakers. This bus arrangement provides maximum flexibility but it
is also costly as two breakers per feeder are required.
Ring Bus Arrangement
Fig 38.4 shows a typical ring bus arrangement with four feeders.
Again to isolate a feeder, say on a feeder fault, two adjacent breakers have to be operated. Similarly,
feeder current is calculated by summing or paralleling the appropriate CTs. Each feeder requires its own
VT. The arrangement requires one circuit breaker per feeder and hence it is less costly. This arrangement
is popular because of low cost and high flexibility. As the bus section between the two breakers becomes
a part of the line, separate bus protection is not applicable or required. i.e, the feeder protection also
provides the functionality of bus bar protection.

One and a Half Circuit Breaker Arrangement


Fig 38.5 shows the one
and a half circuit breaker
arrangement.

It is so called because
total number of breakers
is 1.5 times the number
of feeders. Fig 38.5
shows the arrangement
with 4 feeders and 6
breakers. There are two
buses, each one having
its own bus differential
protection. In case of a
bus fault, all breakers
connected to the bus will
have to be opened.
Automatically, the
system operation moves
to alternative bus
without any further loss
of service. Hence, this
scheme also provides a
high level of flexibility.

Now, consider the case


of a stuck breaker say
while clearing of feeder
fault on L1 . In case of a
stuck breaker which is
connected to the bus
(shown in red in fig
38.5), the local breaker
backup (LBB) is to open
all the breakers on the
bus. In the case of stuck
central breaker (see
green breaker) i.e. when
the shared breaker is
stuck, LBB consists of
opening the adjacent
breaker. In addition, a
transfer trip signal is
required to the breaker
at the remote end of the
feeder (L 2 ) connected to
the stuck breaker.

Differential relay for bus bar protection can be implemented in one of the following three ways:
1. Sample by sample comparison.
2. Comparison of current phasors.
3. High impedance bus differential relay.

The main difficulty in bus differential protection is that significant differential current may appear due to
saturation of CT on external fault. When a CT saturates, its secondary current is not scaled replica of
primary current. Therefore, sum of CT secondary current is not equal to sum of primary currents even
though primary CT currents sum to zero.

This causes a differential relay to operate on even external faults, leading to maloperation of bus
protection scheme. This compromises security and is not acceptable. While the percentage differential can
provide security against normal CT errors due to mismatch of CT turns ratio and magnetization current; it
is not adequate to handle severe CT saturation problem. So the relevant questions to be asked now are:

How was this problem handled in the past, i.e. in the era prior to numerical
(1)
relays?
(2) How do numerical relays cope with this problem?
High Impedance Bus Differential Relay

This approach has been the most successful with traditional electro mechanical and solid state relay. It is
based upon the following ingenious and innovative thinking. If you cannot beat CT saturation, exploit it!
In fact this is now a well accepted principle in theory of systematic innovation, also known as TRIZ (a
Russian acronym), that one innovative way to problem solving is to exploit the harm:

“If you cannot undo the harm, stretch the harm to the extreme and then exploit it to your advantage".
Recall that when a CT core saturates, it behaves more like an air core device. The coupling between the
primary and secondary winding is negligible. The impedance now offered by the CT as seen from the CT
secondary terminals is very low and it equals the impedance of the CT secondary winding. The CT is no
more a current source with high impedance shunt. Rather, it is a plain low impedance path. Thus, if we
increase the impedance of the relay element which was to carry the differential current significantly, then
sum of all the CT secondary currents (except for the saturated CT) will be diverted into the low impedance
path of saturated CT's secondary. Therefore, differential current would be negligible and hence protection
system will not operate (See fig 38.6).Thus, now saturation of CT itself is responsible for saving a false
operation.

High Impedance Bus Differential Relay (contd..)


In contrast,
numerical relays
offer a low
impedance path.
Hence, this scheme
of differential bus
bar protection cannot
be emulated with
numerical relays.
Therefore, with
numerical relays the
busbar protection
has to be very fast.
i.e preferably
decision making has
to be completed
before the CT
saturates. Recall that
saturation of CT is
primarily a
consequence of DC
offset current.
The time for CT core saturation also depends upon time constant (L/R) of transmission line. If the
protection system could reach trip decision before the onset of CT core saturation, then it would be
reliable. Hence, numerical relaying based bus bar protection is expected to operate in quarter of a cycle.
Development of such protection scheme requires ingenuity because of the well known speed vs accuracy
conflict.

Non linear % Differential Characteristics

If the CT core saturation factor could be discounted for, then we could use constant % differential
characteristic for bus bar differential protection. We model a CT as scaled current source due to
transformation ratio in parallel with magnetizing impedance (Norton's equivalent). However, the
magnetizing impedance itself is nonlinear. It is large when CT core is not saturated and small when CT
core is saturated. The current in this branch directly contributes to the differential current.

Non linear % Differential Characteristics (contd..)

This suggests that %


differential characteristics
should be modified to have
higher slopes to take care of
CT saturation. A fast protection
scheme can be devised by
instantaneous sample based
differential protection scheme.
In contrast, a phasor
summation scheme will be
inherently slower as correct
phasor estimates will have to
wait until the moving window
is totally populated with post
fault current samples. One way
out of this imbroglio is to use a
smaller data window (e.g. 3
sample window).

On the other hand, the comparison scheme based computation of instantaneous samples can be error
prone due to noise transient related problem. To obtain reliability, it is necessary that consistent
differential current should be obtained. A transient monitor function can be used to check that. A
transient counter is initialized to zero. If a fault is detected due to presence of differential current, then
counter is incremented. Conversely, if counter is greater than zero, and no fault is detected (small
enough differential current magnitude) then counter is decremented. If the counter crosses a preset
threshold value, trip decision is implemented. This scheme will not trip on transient.

However, in addition to internal faults, it will also trip on external fault. For this purpose, the differential
protection relay also has to have an inbuilt feature to detect CT saturation. One way to detect CT core
saturation is based on measuring current change in consecutive samples with the expected sinusoidal
signal model. A change much beyond the expected change in sinusoidal model indicates CT core
saturation. Many more innovative schemes can be thought out to detect CT saturation which is beyond
the scope of this lecture.

Review Questions

1. What is the function of 'NC's shown in fig 38.1.

What are the advantages of single breaker double bus arrangement over single bus single breaker
2.
arrangement?

3. How does double bus double breaker bus arrangement provides maximum flexibility?

4. What are the advantages of ring bus arrangement?

5. How is CT saturation problem handled in bus protection schemes?

6. Draw the configuration with 6-circuits.

Recap
In this lecture, we have learnt advantages and disadvantages of different bus arrangements
like
Single bus single breaker arrangement.

Single breaker double bus with bus tie.


Double bus double breaker.

Ring bus arrangement.

One and a half circuit breaker arrangement.

High impedance bus differential relay.

B is differential protection using numerical relay.

Congratulations, you have finished Lecture 38. To view the next lecture select it from the left hand side
menu of the page
Module 10 : Differential Protection of Bus, Transformer and Generator

Lecture 39 : Transformer Protection

Introduction

Differential protection of transformer was introduced in lecture 2. Traditionally, it involves establishing


circulating current through a pair of matched CTs installed on the primary and secondary winding of the
transformer. If there is no internal fault in the transformer, zero current flows through the differential
overcurrent element. However, in case of an internal fault, the CT secondary currents are not matched
and hence the differential current is not zero. This causes the overcurrent element to pick up and
operate the circuit breakers to isolate the transformer.

Selection of CT Turns Ratio

Let the transformer turns ratio given


by and the corresponding CT
ratio be given by and as
given in fig 39.1. Then,
Current in CT - 1 primary =

Current in CT - 1 secondary =

Current in CT - 2 primary =

Current in CT - 2 secondary =

If there is no fault, then with proper connections account for the CT polarity, we should obtain circulatory
current through CT secondary.
Hence,

Selection of CT Turns Ratio (contd..)

i.e, or (1)

If the transformer (to be protected ) is working on tap T as shown in fig 39.2, then the above equality
has to be modified as follows:

(2)
Example
Let the primary of the transformer winding has 1000 turns while secondary has 500 turns. If the primary
CT ratio is 100:5, find the CT ratio required in the secondary side to establish circulatory current scheme.

Ans: =1000, and =20

From equation (1), we get

Thus, a suitable secondary CT ratio would be 200:5.

Example (contd..)

Remarks 1: Sometimes due to ‘odd turns ratio' involved in primary, it may not be possible to obtain
matching CTs on the secondary. In such situations ‘auxiliary CTs' are used either on primary or secondary
(or both sides) to obtain circulatory currents in absence of internal faults. Primary of the auxilliary CT is
connected in series with secondary of main CT. Secondary of auxilliary CT participates in the circulating
current scheme.

Remark 2: The circulating current scheme described above has been traditionally used with
electromechanical and solid state relays. However in case of numerical relays, such physical connections
are no more required. Given turns ratio and CTs ratio and , one can work out the
expected current in secondary of transformer (in absence of internal fault). Hence, auxiliary CTs become
redundant and the transformer connections are simplified drastically. Thus, with numerical relaying most
of the hardware connections and circulatory currents can be easily accounted in software. Further, with
digital protection systems differential protection can be implemented by either 'sample by sampe'
comparison or by first computing the phasors and then comparing them.

Phasor computation approach will involve a delay equal to the time required for moving window to latch
on to post fault phasor. Conversely, 'sample by sample' comparison approach can be faster but it is more
prone to picking up to noise or trannsients. Hence, even it has to be slowed down by 'polling scheme'. In
this scheme, we increment a winter, whenever large enough differential is detected. If counter is positive
and differential is below threshold, we decrement the counter. If the counter 'ensures as threshold, a trip
decision is issued.
Example (contd..)
Remark 3: When dealing with three phase transformers, the transformer connections like Y-Y or
also play a role in determining CT secondary interconnections to establish circulating current scheme.
This is because of the phase shifts typically of the order of that result in the line currents when we
move from primary to secondary side of the power transformer. Fig 39.3 shows the typical connections
for star-delta transformer bank for establishing the circulatory currents. The study of the circuit brings
out the following important rule for interconnection of CT secondary for transformers: “If the power
transformer winding are connected in Y configuration, use configuration for corresponding CT
secondary interconnections" (and vice-versa).
Remark 4: With numerical relays such interconnection complexity can be easily handled in software.
After, specifying the turns ratio and the phase shift from primary to secondary, it should be possible to
work out the expected secondary differential current by simple calculation.

Role of Percentage Differential Protection

So far, our discussion has focused on an ideal transformer. However, practical transformers and CTs pose
additional challenge to protection.

The primary of transformer will carry no load current even when the secondary is open circuited. This will
(1)
lead to

differential current on which the protection scheme should not operate.

It is not possible to exactly match the CT ratio as per equation (1). This would also lead to differential
(2)
currents under

healthy conditions.
If the transformer is used with an off nominal tap, then differential currents will arise as equation (2) is
(3)
not satisfied

even under healthy conditions. However, tap position can be read in numerical protection scheme and
accounted by equation (2). This would make the numerical protection scheme adaptive.

To prevent the differential


protection scheme from picking
up under such conditions, a
percentage differential
protection scheme is used. (see
fig 39.4 )
It improves security at the cost
of sensitivity. Notice an offset of
to account for the no load
current. The current on the x-
axis is the average current of
primary and secondary winding
referred to primary. It indicates
the restraining current while the
corresponding difference on Y-
axis represents the differential
current. For reference current
direction see fig 39.1.

The differential protection will pick up if magnitude of differential current is more than a fixed percentage
of the restraining current.

Complications of Magnetizing Inrush

We now plan to show that even percentage


differential protection scheme will misclassify the
inrush current as fault current. This is because
during inrush, secondary current is negligible (zero
if secondary is open circuited), while primary
current can be as high as 10 - 20 times the full
load current. Thus some kind of restraint function
is required to inhibit the pick up on inrush.
Traditionally, this restraint is based upon second
harmonic content in primary which discriminates a
fault from the inrush condition.

Alternatives in numerical relaying also include voltage restraint used in integrated substation protection
scheme and flux restraint scheme. Before, discussing these schemes further, we will review the origin of
magnetizing inrush phenomenon.

Consider the circuit in fig 39.5. The switch is closed at t = 0. By Faraday's law, we have

, with

and

(3)
Complications of Magnetizing Inrush (contd..)

For simplicity, let us assume that . i.e. core is initially demagnetized. Then, the post
energisation flux wave form in the core is shown in fig 39.6.

Complications of Magnetizing Inrush (contd..)


This wave form is quite different from what we obtain by steady state analysis as shown in fig 39.7.

During steady state analysis, we can replace by and the corresponding steady state phasor

equation is given as follows:

i.e,

and (4)

Complications of Magnetizing Inrush (contd..)


Thus, it is clear that peak flux during energization is twice as high as the steady state peak sinusoidal

value. Depending upon the residual flux, it can be even higher. Now, , where is the knee

point flux density of core. Thus, during energization, the core is driven deep into saturation. The resulting
H and hence magnetizing current can be very high (up to 20 times full load current). This current is
known as inrush current of transformer. So far, we have assumed . But in general,
depends upon the remnant flux in the core and H can be anywhere between and . Hence,

during energization will vary from to . Fig 39.8 visualizes the nature of the inrush current.

Complications of Magnetizing Inrush (contd..)


Our analysis so has a discrepancy. As per our analysis, flux and current wave shape in fig 39.6 should
persist till infinity i.e. it should represent the steady state flux and current waveform in the core.
However, we also know that steady state flux and current waveform is as per fig 39.7. The resulting
discrepancy is a consequence of our simplifying assumption viz, core is ideal and the winding is non
resistive. If we also model the winding resistance, we would observe that the voltage available at the
ideal transformer primary terminals would reduce drastically due to large voltage drop in the winding
impedance during inrush condition. Consequently, the effect should propagate and reduce flux in the
core. If the flux in the core reduces, so would magnetizing current. Thus, each cycle would have smaller
magnetization current peak and the magnetizing current and flux would finally approach the one
produced by steady state phasor equation.
To summarize the discussion so far,
1. Transformer when energized can be subjected to large inrush currents.
2. Inrush current can trip differential protection of transformers.
Some methodology to detect inrush has to be devised and transformer differential protection has to be
inhibited from tripping during this condition.

Detection of Inrush Current and Overexcitation Condition

Appreciable differential current can result due to either inrush or overexcitation of transformer. When a
transformer is overexcited, then from the relationship , we can infer that peak
sinusoidal flux is large. This implies that transformer core will be driven into saturation for an interval in
each half cycle. Due to this, there would be distortion from the sinusoidal magnetization current. During
saturation, the corresponding magnetizing current can be quite large and on the resulting differential the
protection system may issue a trip decision by confusing overexcitation for an internal fault. Hence, in
practice restraint has to be provided for both overexcitation and inrush current condition. There are three
possible ways in which this can be achieved.

(1) Harmonic Restraint

Analysis of the current waveform indicates that inrush current is rich in second harmonic and current
during overfluxing has a large fifth harmonic component. Thus, if we compute the second and fifth
harmonic current in , then, we can provide following logic for restraining operation of
differential protection. Restrain operation of differential protection if

1. for restrain (No load magnetization current)

or

2.

(Where is the slope of the % differential characteristics)

Detection of Inrush Current and Overexcitation Condition (contd..)

(1) Harmonic Restraint (contd..)


3. [For restraining inrush current]

(Where is the magnitude of second harmonic)


or

4. [For restraining overexcitation]

(Where is the magnitude of fifth harmonic)


Typically, and are the percentage harmonic restraint and would depend upon type of transformer
and steel. For numerical relays, the design of anti aliasing filters also affects the choice of above
parameters. During any transient (including the fault condition), harmonics develop much more rapidly
than the fundamental and hence, typically numerical relays are restrained for about a cycle indirectly by
these transients. Typical setting for used in practice are 10, 20 or 30%.

(2) Voltage Based Restraint

In an integrated substation protection system, it is reasonable to assume availability of bus voltage


measurement for transformer protection without extra cost of VT. Then, voltage measurement can be
used to restrain the operation of differential protection scheme on inrush or overexcitation. Traditionally,
this has been referred in literature as “tripping suppressor” as it suppresses tripping function. If the
voltage signal is high, the relay is restrained if

or (5)

(6)

or (7)

(8)

Detection of Inrush Current and Overexcitation Condition (contd..)

(2) Voltage Based Restraint (contd..)


Expressions 5, 6 and 7 are self explanatory.
The last restraining function is known as the transient monitor function. The transient monitor function
is used to qualify the purity of data. Typically, in a numerical relaying set up, with moving window
algorithm, there are a certain number of windows in which both pre fault and post fault data points are
present. Any phasor computation done with them is meaningless because the window does not fit with
either prefault or post fault signal. Under such condition, the residual error ( sample) between
estimated (reconstructed) and measured signal is quite high. For a half cycle window with 6 samples in

it, . When is greater than threshold value , then tripping decision should be inhibited.

(3) Flux Restraint Scheme

Fig 39.9 shows the flux current plane associated with no fault and internal fault regions. It is difficult to
evaluate the actual flux in the core, because the initial condition is unknown. It depends also upon the
remanant flux. Fortunately, to distinguish no fault (or external fault) from the internal fault, we are
interested in the slope of curve rather than the actual values.

Detection of Inrush Current and Overexcitation Condition (contd..)

(3) Flux Restraint Scheme (contd..)

This can be easily worked out as follows.


Let the voltage at the terminal of the transformer be v(t), current i(t) and let L be the leakage inductance
of the winding. If we neglect the resistance of the winding, then,

Using trapezoidal rule of integration, we get

(9)

From the above equation (9) we can deduce the following generic relationship.

(10)

Operation on the unsaturated region of magnetizing curve produces large value of slope . Since, the

fault or overexcitation (saturated) regions have smaller slopes, we can now distinguish internal

fault from the saturation condition by following counter scheme.

If current differential indicates trip and , increment counter.

else if and , then

else if and , then

If there is an internal fault in the system, then will monotonically increase and once crosses a

known threshold, trip decision will be issued. On the other hand, during inrush or over excitation the

will alternate between low slope and high slope region depending upon whether the core is in saturation
or not. Thus, the counter will indicate a small tooth kind of behavior with being below the
threshold value. Hence, operation of the different protection scheme would be restrained in this region.

Remark 5: We have illustrated the basic principle so far using a single phase transformer for simplicity.
However, in practice, we use both three phase two winding and three phase three winding (primary,
secondary and tertiary) transformers. The basic principle of differential protection is the same but we now
have to scale up to multiple phases. For a three phase (two winding) transformer, there would be 3 trip
currents (one per phase) and three restraining currents (one per phase). For three phase three winding
transformers, two restraining per phase are required.
Review Questions

1. What are auxiliary CTs? Why are they used?

2. What are the advantage of numerical relaying over other relaying schemes in differential protection?

3. Show that maximum flux during energization can vary from to 3 .

4. What are the various restraint schemes used?

The primary winding of a transformer has 2000 turns and CT ratio is 600:5. The secondary has 10000
5.
turns and is
working on a tap of 60%. Find out CT ratio required for secondary side to establish circulating current
scheme.
Explain how reliability is obtained by polling scheme in the 'sample by sample' comparison approach for
6.
differential

protection.

Recap
In this lecture we have learnt the following:

How to select CT turns ratio for differential protection application.

Percentage differential protection.

Magnetizing inrush current and its complications.

Detection of inrush current and overexcitation current.

Different restraint schemes in use.

Applications to 3 phase transformers.


Module 10 : Differential Protection of Bus, Transformer and Generator

Lecture 40 : Generator Protection

Objectives
In this lecture, we will learn about protection of generator against various faults and abnormalities like:

Internal Fault like LLG, phase and ground faults.

Abnormal operations like overload, underfrequency, unbalanced generator, etc.

Issue with numerical protection.

Introduction

Generator protection and control are interdependent problems. A generator has to be protected not only
from electrical faults (stator and rotor faults) and mechanical problems (e.g. Related to turbine, boilers
etc), but it also has to be protected from adverse system interaction arising like generator going of out of
step with the rest of system, loss of field winding etc. Under certain situations like internal faults, the
generator has to be quickly isolated (shut down), while problems like loss of field problem requires an
‘alarm' to alert the operator. Following is a descriptive list of internal faults and abnormal operating
conditions.

1. Internal Faults

a. Phase and /or ground faults in the stator and associated protection zone
b. Ground faults in the rotor (field winding)

2. Abnormal Operating Conditions

a. Overload.

b. Overvoltage.

c. Loss of field.

d. Unbalanced Operation e.g. single phasing.


e. Under and over frequency.
f. Motoring or loss of prime mover.
g. Subsynchronous oscillation.
h. Loss of synchronization (out of step).

Multi – CT Differential Protection for Generators

Typical interconnections for differential protection of connected generators is shown in fig 40.1(a).
With a numerical relay, the circulatory as shown in fig 40.1 (a and b) is not be hard wired. Instead,
equivalent computations can be done in microprocessor. For differential protection, it is important to
choose CTs from same manufacturer with identical turns ratio to minimize CT mismatch. To improve
security, percentage differential protection is preferred. The accuracy of the differential protection for
generators is expected to be better than that of differential protection for transformers, as issues like
overfluxing, magnetizing inrush, no load current and different voltage rating of primary and secondary are
non – existent.
Multi – CT Differential Protection for Generators (contd..)
Stator Ground Fault Protection
Most faults in a generator are a consequence of insulation failure. They may lead to turn – to – turn
faults and ground faults. Hence ground fault protection is very essential for generators. Three types of
grounding schemes are used in practice

1. Fault Protection with high impedance grounding.

2. Fault protection with low impedance grounding.


3. Hybrid grounding.

High Impedance Grounding

It is used to limit the maximum fault current due to fault in winding near generator terminals to 1 – 10 A
primary. This reduces iron burning in the generator and it helps in avoiding costly repairs. Fig 40.2 below
shows a typical circuit connection.

High impedance grounding reduces sensitivity for both feeder ground protection and differential protection
in the stators of the generators. Alternative to high impedance grounding is low impedance grounding.

Low Impedance Grounding


The advantage of low impedance grounding is improved sensitivity of the protection. However, if the fault
is not cleared quickly, the damage to equipment can be much higher. It is possible to engineer ground
(zero sequence) differential protection using a directional ground overcurrent relaying as shown in fig
40.2. The basic idea is to compare the sum of terminal current with neutral current. If the
two are identical, there is no internal ground fault. Conversely, a differential in the two quantities
indicates an internal ground fault on the generator.

Reduced or Loss of Excitation Protection


What is it?
Reduction or loss of excitation to the field winding is an abnormality rather than a fault. If the field
winding is completely lost, then in principle, synchronous generator will try to mimic an induction
generator. This mode of operation is possible provided that power system to which generator is connected
is strong enough to provide necessary reactive power support. Recall that an induction generator has no
field winding and hence it cannot generate reactive power. If adequate reactive power support is not
available (a strong possibility!), then the generator will have to be shut down. It is likely that field winding
will be accidentally shut off and usually loss of synchronism will require appreciable time to take effect.
Hence, it is preferable to first raise an alarm for operator to restore field, failing which, generator has to
be shut down.

Consequences
Prima-facie, consequence of reduced excitation may not appear to be dramatic, but it can lead to end-
region over-heating in turbo-alternators. Hence, this abnormality has to be detected and an alarm has to
be raised for the operator. The ultimate measure would be to shut down the generator. Fig 40.3 shows
the reactive power capability curve of a generator. It can be seen that in the lagging power factor-
operating region, limits are determined either by rotor field heating limit or by stator armature heating
limit.
Reduced or Loss of Excitation Protection (contd..)
Consequences (contd..)
Turbo-alternators may not have adequate reactive power absorption capability. Hence, they are seldom
operated with leading power factor. Typically leading power factor operation of generators results when
the field excitation is reduced. Hence, limitations on the reactive power absorption capability set a lower
limit on the reduction on field excitation system (see dotted line in fig 40.4).
Reduced or Loss of Excitation Protection (contd..)
Consequences (contd..)
How?
Protection system for synchronous-generators should detect reduced or loss of excitation condition, raise
an alarm and if the abnormality persists, trip the generator. This can be achieved by use of distance
relays that are installed at generator terminals. Directionally, they look into the generator. For this
purpose, we need to interpret capability curve on the R-X plane. If the complex power generated is given
by then the apparent impedance seen by the distance relay installed on the generator terminals
is given by

(1)

For simplicity, we have referred impedance has been referred to the primary side. Fig 40.5 shows the
capability curve transferred to R-X plane using eqn. (1).
To protect the generator two distance relays and directional units are used. To protect generator against
complete loss of field, inner circle is used. The relay operates when the impedance vector moves into this
circle. Operating time of about 0.2 to 0.3 seconds are used with a complete shut down of the generator.
The diameter of this circle is of the order of , with the upper part of the circle 50-75% of below
the origin.
The larger circle is used to detect reduced or partial loss of excitation system. Directional blinder may be
used to limit pickup on normal operating condition.
Protection against unbalanced operation
Quite often, a generator is connected to grid using a transformer. The - winding on the generator
side, traps the zero sequence current from flowing through the phase winding. However, positive and
negative sequence currents will find their way into stator winding. Positive sequence currents cannot
discriminate between balanced and unbalanced operating conditions. On, the other hand, negative
sequence currents clearly indicate the abnormality. Hence, it can be used as an effective discriminant for
unbalanced system operation. Negative sequence currents create an mmf wave in opposite direction to
the direction of rotation of rotor. Hence, it sweep across the rotor induces second harmonic currents in
rotor, which can cause severe over heating and ultimately, the melting of the wedges in the air gap.

ANSI standards have established that the limits can be expressed as where is the negative
sequence current flowing. The machine designer establishes constant k. It can be in the range of 5 – 50.
An inverse-time overcurrent relay excited by negative sequence current can be used for this protection.
Generator Motoring: why and how?
If the mechanical input to the prime mover is removed while the generator is in service, then rotors mmf
wave will tend to drive the rotor, just like an induction motor. This is dangerous to both steam and hydro
turbine. In steam turbines, it may lead to overheating while in hydro turbine it would cause cavitation of
the turbine blades. The motoring of generator can be detected by reverse power flow relays having
sensitivity of 0.5% of rated power output with time delay of approximate 2 seconds.
Over Voltage Protection
How?
On its face value, over voltage protection should be more or less straightforward. First, one should raise
an alarm if the over voltage is above 110% of rated value. There would a subsequent trip if it persists for
1 min or more. Very large over voltages of the order of 120% of rated value or above, will lead to trip
within approximately 6 seconds.
Why?
Terminal voltage of a generator is controlled by an automatic voltage regulator (AVR). If the load current
(I) on the generator reduces, the AVR would automatically reduce the field current so as to reduce open
circuit emf E to maintain constant terminal voltage V. However, loss of a VT fuse, incorrect operation or
setting of AVR etc can lead to over voltage which is detrimental to the generator. Steady state over
voltage will lead to saturation of iron, both for generator and the unit transformer connected to it. This
will lead to large magnetizing currents, unacceptable flux patterns, over-heating, which can damage the
power apparatus. Hence, generators have to be protected against overvoltage.
V/f Protection

During start-up or shut down, the speed of the generator will deviate significantly from the nominal
speed. As per the emf equation (E = 4.44f m N), overfluxing of the core is not simply a consequence of
over voltages with respect to nominal voltage. Rather overfluxing occurs when V/f ratio exceeds its
nominal value. Hence, over voltage protection is implemented after normalizing the terminal voltage by
the frequency of the generator.

Out-of-Step Protection

With modern generators having large Xd and EHV transmission having low reactance, it is likely that the
electrical center, a consequence of out-of step condition would be within the generator step-up
transformer unit. To detect this condition, distance relay looking into the generator (or into the
transformer-generator unit) should be installed. Even a distance relay used for loss-of-field protection will
pick-up on such power swing. If the swing moves out of the relay characteristic, before the timer runs
down, then, no trip action will be initiated. However, if the swing persists for sufficient time, the loss-of-
excitation distance relay will operate on power swing.
A Note on Numerical Protection

At this point of time, there are no new principles to be introduced from the numerical relaying
perspective. The differential protection scheme can be implemented by either using sample comparison
(time domain approach) or by using phasor comparison (frequency domain approach). Time domain
approach can be faster, than phasor comparison approach. The DFT approach with 1-cycle window will
require one cycle to latch on to the phasor. Usually, the time constant associated with DC offset currents
for generator faults will be large. Hence, decaying dc offset can be approximated by dc signal, which
implies the full cycle DFT will be able to reject it. However, with half-cycle estimation, mimic impedance
should be used.

Sample comparison approach is immune to dc-offset problem but building reliability with such an
approach requires a polling scheme. In other words, reliability is obtained at the cost of time by
ascertaining that successive samples return the trip decision. One can even implement a hybrid approach
where in one switches from time domain to frequency domain approach. The decision to switch will
depend upon the speed of rotation.

Recap
In this lecture we have learnt about the following:

Internal Fault like LLG, phase and ground faults.

Abnormal operations like overload, underfrequency, unbalanced generator, etc.

Issue with numerical protection

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