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RACHNA COLLEGE OF ENGINEERING & TECHNOLOGY, GUJRANWALA Analog Electronic Circuit (EE210)

Experiment#1

Study of Movement of Q-Point on DC load line

& TECHNOLOGY, GUJRANWALA Analog Electronic Circuit (EE210) Experiment#1 Study of Movement of Q-Point on DC load

PURPOSE:

This experiment is intended to illustrate how a bipolar transistor circuit can be biased for the desired DC operation and how this DC condition can be kept stable if a transistor with a different β = h fe is substituted into the circuit. The biasing of the transistor establishes the Q-point of the transistor circuit.

The Q-point determines the relationship between the input waveform shape and the output waveform shape. If the Q-point is not near the middle of the load line or if the input signal is too large, it is possible for the output waveform to become distorted.

The CE amplifier with voltage divider biasing will be used as the test circuit to show the Q-point movement on load line as ratio of base resistor is changed.

PRE-LAB:

You should be familiar with the DC analysis techniques needed to find the Q-point of a Common-emitter circuit. You should understand how varying the ratio of the two base resistors, R1 and R2, affect the base voltage and motion along the load line.

EQUIPMENT:

2 NPN transistors with different β's, 2N3904, 2N2222, or equivalent.

Sensitive Multimeter, Power supply, Breadboard and Jumper wires.

Resistors 1kΩ, 2,5,8,15kΩ, 20kΩ, and 25kΩ

Laptop for curve tracing on Matlab or excel and Proteus or PSPICE for simulation.

INTRODUCTION:

Figure shows a schematic diagram of a BJT common-emitter (C E ) amplifier circuit. BJT Transistor amplifiers are frequently used in the common-emitter configuration (C E ), since this design gives both a high current gain (A I ) and a high voltage gain (A V ). This experiment explores the dc characteristics of the common-emitter circuit and how changing the base resistor affects Q point position on DC load line.

You will study the movement of the Q-point on the dc load line as R2 is varied.

How Q point varies with change in Beta value.

How to choose base resistor for Q point to be middle of DC load line.

1. We know that Q point is a specific value of output voltage to output current of

the transistor. In this case Vce and Ic values determines the Q point.

2. Base current is key element to control collector current as Ib changes it cause

collector current to vary as in common emitter case.

3. In our experiment voltage divider network controls the value of Ib as show in

circuit diagram which in turns controls the value of Ic and in result Vce also varies.as shown in figure by formulas.

in result Vce also varies.as shown in figure by formulas. DC Analysis Method: an example is
in result Vce also varies.as shown in figure by formulas. DC Analysis Method: an example is

DC Analysis Method: an example is given for DC analysis calculation:

Vce also varies.as shown in figure by formulas. DC Analysis Method: an example is given for
Vce also varies.as shown in figure by formulas. DC Analysis Method: an example is given for

PROCEDURE:

a. Theoretical Work:

1. Measure beta of transistor using multimeter.

2. For accurate calculation measure resistor values with the help of multimeter and use these values in your calculations.

3. Calculate values listed in table using dc analysis technique as example given above.

4. Replace R2 with resistor mentioned in table and calculate parameters for each resistance.

5. Construct load line and mention Q point for every measurement.

6. Replace transistor and repeat steps thru 1 to 4.

Calculation:

For transistor 2N3904.

steps thru 1 to 4. Calculation: For transistor 2N3904. b. Software Simulation : For Transistor 2N2222

b. Software Simulation:

For Transistor 2N2222

2N3904. b. Software Simulation : For Transistor 2N2222 1. Construct the circuit as shown in figure

1. Construct the circuit as shown in figure below.

2. Measure the parameters mentioned in tables.

3. Replace R2 and measure all parameter.

4. Draw load line for each transistor and mention Q point for every measurement.

Observation:

For transistor 2N3904.

for each transistor and mention Q point for every measurement. Observation: For transistor 2N3904. For Transistor

For Transistor 2N2222

for each transistor and mention Q point for every measurement. Observation: For transistor 2N3904. For Transistor
Proteus Simulation c. Hardware Implementation : 1. Construct the circuit as shown in circuit diagram

Proteus Simulation

c. Hardware Implementation:

1. Construct the circuit as shown in circuit diagram mentioned above.

2. Measure and record the desired values as mentioned in the table.

3. Repeat procedure for all resistances and record in table.

4. Draw load line for each transistor and mention Q point for each measurement.

Observation:

For 2N3904 Transistor

and mention Q point for each measurement. Observation: For 2N3904 Transistor d. Conclusion: For 2N2222 Transistor

d. Conclusion:

For 2N2222 Transistor

and mention Q point for each measurement. Observation: For 2N3904 Transistor d. Conclusion: For 2N2222 Transistor