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ELECTRICAL CHARACTERISTICS
Electrical Specifications: Unless otherwise specified, all parameters apply for TA = -40C to +85C, VDD = +5.0V, VSS = 0V,
VIN+ = VIN- = VREF/2. All ppm units use 2*VREF as full-scale range.
Parameters Sym Min Typ Max Units Conditions
Analog Inputs
Differential Input Range 2.048/PGA V VIN = VIN+ - VIN-
Common-Mode Voltage Range VSS-0.3 VDD+0.3 V
(absolute) (Note 1)
Differential Input Impedance ZIND (f) 2.25/PGA M During normal mode operation
(Note 2)
Note: Unless otherwise indicated, TA = -40C to +85C, VDD = +5.0V, VSS = 0V, VIN+ = VIN- = VREF/2.
.005 10.0
Integral Nonlinearity (% of FSR)
TA = +25C
VDD = 5V
PGA = 1
.004
7.5
.000 0.0
2.5 3 3.5 4 4.5 5 5.5 -100 -75 -50 -25 0 25 50 75 100
VDD (V) Input Voltage (% of Full-Scale)
FIGURE 2-1: INL vs. Supply Voltage FIGURE 2-4: Noise vs. Input Voltage.
(VDD).
3.0
PGA = 1
0.003 PGA = 2
PGA = 1 2.0
PGA = 4
Integral Nonlinearity
PGA = 8
1.0
(% of FSR)
0.002
0.0
VDD = 5 V
0.001 -1.0
-2.0
VDD = 2.7V
0 -3.0
-60 -40 -20 0 20 40 60 80 100 120 140 -100 -75 -50 -25 0 25 50 75 100
o
Temperature ( C) Input Voltage (% of Full-Scale)
FIGURE 2-2: INL vs. Temperature. FIGURE 2-5: Total Error vs. Input Voltage.
20 0.4
VDD = 5V VDD = 5.0V
15 0.3
Gain Error (% of FSR)
PGA = 4 PGA = 8
10 0.2 PGA = 1
Offset Error (V)
PGA = 2
5 0.1 PGA = 2
0 0
-5 -0.1
PGA = 1
-10 -0.2
PGA = 4
-15 -0.3
PGA = 8
-20 -0.4
-60 -40 -20 0 20 40 60 80 100 120 140 -60 -40 -20 0 20 40 60 80 100 120 140
Temperature (C) Temperature (C)
FIGURE 2-3: Offset Error vs. Temperature. FIGURE 2-6: Gain Error vs. Temperature.
220
5
200
4
160
2
140 VDD = 2.7V
VDD = 2.7V 1
120
0 VDD = 5.0V
100
-1
-60 -40 -20 0 20 40 60 80 100 120 140
-60 -40 -20 0 20 40 60 80 100 120 140
FIGURE 2-7: IDDA vs. Temperature. FIGURE 2-10: OSC Drift vs. Temperature.
600 0
-10 Data Rate = 3.75 SPS
500 -20
-30
Magnitude (dB)
400 -40
IDDS (nA)
-50
300
-60
200 -70
VDD = 5V -80
100 -90
VDD = 2.7V
-100
0 -110
-60 -40 -20 0 20 40 60 80 100 120 140 -120
0.1 1 10 100 1k 10k
0.1 1 10 100 1000 10000
9
8 VDD = 5V
7 VDD = 4.5V
6
IDDB (PA)
5
VDD = 3.3V
4
3
VDD = 2.7V
2
1
0
-60 -40 -20 0 20 40 60 80 100 120 140
Temperature (oC)
3.1 Analog Inputs (VIN+, VIN-) the VSS pin be tied to the analog ground path or
isolated within an analog ground plane of the circuit
VIN+ and VIN- are differential signal input pins. The board.
MCP3421 device accepts a fully differential analog
input signal which is connected on the VIN+ and VIN-
3.3 Serial Clock Pin (SCL)
input pins. The differential voltage that is converted is
defined by VIN = (VIN+ - VIN-) where VIN+ is the voltage SCL is the serial clock pin of the I2C interface. The
applied at the VIN+ pin and VIN- is the voltage applied MCP3421 acts only as a slave and the SCL pin
at the VIN- pin. The input signal level is amplified by the accepts only external serial clocks. The input data
programmable gain amplifier (PGA) before the from the Master device is shifted into the SDA pin on
conversion. The differential input voltage should not the rising edges of the SCL clock and output from the
exceed an absolute of (2* VREF/PGA) for accurate MCP3421 occurs at the falling edges of the SCL clock.
measurement, where VREF is the internal reference The SCL pin is an open-drain N-channel driver.
voltage (2.048V) and PGA is the PGA gain setting. The Therefore, it needs a pull-up resistor from the VDD line
converter output code will saturate if the input range to the SCL pin. Refer to Section 5.3 I2C Serial Com-
exceeds (2* VREF/PGA). munications for more details of I2C Serial Interface
The absolute voltage range on each of the differential communication.
input pins is from VSS-0.3V to VDD+0.3V. Any voltage
above or below this range will cause leakage currents 3.4 Serial Data Pin (SDA)
through the Electrostatic Discharge (ESD) diodes at
SDA is the serial data pin of the I2C interface. The SDA
the input pins. This ESD current can cause unexpected
pin is used for input and output data. In read mode, the
performance of the device. The common mode of the
conversion result is read from the SDA pin (output). In
analog inputs should be chosen such that both the
write mode, the device configuration bits are written
differential analog input range and the absolute voltage
(input) though the SDA pin. The SDA pin is an open-
range on each pin are within the specified operating
drain N-channel driver. Therefore, it needs a pull-up
range defined in Section 1.0 Electrical
resistor from the VDD line to the SDA pin. Except for
Characteristics and Section 4.0 Description of
start and stop conditions, the data on the SDA pin must
Device Operation.
be stable during the high period of the clock. The high
or low state of the SDA pin can only change when the
3.2 Supply Voltage (VDD, VSS) clock signal on the SCL pin is low. Refer to Section 5.3
VDD is the power supply pin for the device. This pin I2C Serial Communications for more details of I2C
requires an appropriate bypass capacitor of about Serial Interface communication.
0.1 F (ceramic) to ground. An additional 10 F
capacitor (tantalum) in parallel is also recommended
to further attenuate high frequency noise present in
some application boards. The supply voltage (VDD)
must be maintained in the 2.7V to 5.5V range for spec-
ified operation.
VSS is the ground pin and the current return path of the
device. The user must connect the VSS pin to a ground
plane through a low impedance connection. If an
analog ground path is available in the application PCB
(printed circuit board), it is highly recommended that
( V IN + V IN -)
Output Code = ( Max Code + 1 ) --------------------------------------
2.048V
- 4.6 Self-Calibration
The device performs a self-calibration of offset and
The LSB of the code is given by: gain for each conversion. This provides reliable
conversion results from conversion-to-conversion over
EQUATION 4-2: variations in temperature as well as power supply
2.048V fluctuations.
LSB = 2--------------------------
N
Where: 2
4.7 Input Impedance
N = the number of bits
The MCP3421 uses a switched-capacitor input stage
using a 3.2 pF sampling capacitor. This capacitor is
TABLE 4-1: LSB SIZE OF VARIOUS BIT switched (charged and discharged) at a rate of the
CONVERSION MODES sampling frequency that is generated by the on-board
clock. The differential mode impedance varies with the
Bit Resolutions LSB (V) PGA settings. The typical differential input impedance
12 bits 1 mV during a normal mode operation is given by:
14 bits 250 V ZIN(f) = 2.25 M/PGA
16 bits 62.5 V
18 bits 15.625 V Since the sampling capacitor is only switching to the
input pins during a conversion process, the above input
impedance is only valid during conversion periods. In a
TABLE 4-2: EXAMPLE OF OUTPUT CODE
low power standby mode, the above impedance is not
FOR 18 BITS presented at the input pins. Therefore, only a leakage
Input Voltage (V) Digital Code current due to ESD diode is presented at the input pins.
VREF 011111111111111111 The conversion accuracy can be affected by the input
VREF - 1 LSB 011111111111111111 signal source impedance when any external circuit is
connected to the input pins. The source impedance
2 LSB 000000000000000010 adds to the internal impedance and directly affects the
1 LSB 000000000000000001 time required to charge the internal sampling capacitor.
0 000000000000000000 Therefore, a large input source impedance connected
to the input pins can increase the system performance
-1 LSB 111111111111111111
errors such as offset, gain, and integral nonlinearity
-2 LSB 111111111111111110 (INL) errors. Ideally, the input source impedance
- VREF 100000000000000000 should be zero. This can be achievable by using an
< -VREF 100000000000000000 operational amplifier with a closed-loop output
impedance of tens of ohms.
FIGURE 5-2:
SCL
DS22003B-page 14
MCP3421
1 9
C C S S G G
1 0 1 0 1 0
Timing Diagram For Reading From The MCP3421 With 18-Bit Mode.
Address Bits A2- A0 = 000 are programmed at the factory unless customer requests specific codes.
Stop bit or NAK bit can be issued any time during reading.
Data bits on clocks 1 - 6th in 2nd byte are repeated MSB and can be ignored.
SCL
FIGURE 5-3:
SDA 1 1 0 1 A2 A1 A0 D D D D D D D D D D D D D D D D C C S S G G
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 1 0 1 0 1 0
1 9
C C S S G G
1 0 1 0 1 0
(Optional)
Timing Diagram For Reading From The MCP3421 With 12-Bit to 16-Bit Modes.
DS22003B-page 15
MCP3421
MCP3421
1 9 1 9
SCL
SDA 1 1 0 1 A2 A1 A0 C1 C0 S1 S0 G1 G0
SDA
Bus free time TBUF 4700 ns Time between START and STOP
conditions.
Fast Mode
Clock frequency TSCL 0 400 kHz
Clock high time THIGH 600 ns
Clock low time TLOW 1300 ns
SDA and SCL rise time (Note 1) TR 20 + 0.1Cb 300 ns From VIL to VIH
SDA and SCL fall time (Note 1) TF 20 + 0.1Cb 300 ns From VIH to VIL
START condition hold time THD:STA 600 ns After this period, the first clock
pulse is generated
Repeated START condition TSU:STA 600 ns Only relevant for repeated Start
setup time condition
Data hold time (Note 4) THD:DAT 0 900 ns
Data input setup time TSU:DAT 100 ns
STOP condition setup time TSU:STO 600 ns
STOP condition hold time THD:STD 600 ns
Output valid from clock TAA 0 1200 ns
(Notes 2 and 3)
Bus free time TBUF 1300 ns Time between START and STOP
conditions.
Input filter spike suppression TSP 0 50 ns SDA and SCL pins
(Note 5)
TF THIGH TR
SCL TSU:STA
TSU:STO
TLOW TSU:DAT
THD:DAT TBUF
SDA THD:STA
TSP
TAA
VDD
SDA SCL
Microcontroller
(PIC16F876)
NPP301
EEPROM
(24LC01) VDD VDD
MCP3421
MCP3421
Temperature
Sensor 1 VIN+ VIN- 6
(TC74)
2 VSS VDD 5
R R
3 SCL SDL 4 0.1 F 10 F
The user can test the presence of the MCP3421 on the FIGURE 6-5: Example of Pressure
I2C bus line without performing an input data conver-
Measurement.
sion. This test can be achieved by checking an
acknowledge response from the MCP3421 after send- In this circuit example, the sensor full scale range is
ing a read or write command. Here is an example using 7.5 mV with a common mode input voltage of VDD / 2.
Figure 6-4: This configuration will provide a full 14-bit resolution
(a) Set the R/W bit HIGH in the address byte. across the sensor output range. The alternative circuit
for this amount of accuracy would involve an analog
(b) The MCP3421 will then acknowledge by pulling gain stage prior to a 16-bit ADC.
SDA bus LOW during the ACK clock and then release
the bus back to the I2C Master. Figure 6-6 shows an example of temperature measure-
ment using a thermistor. This example can achieve a
(c) A STOP or repeated START bit can then be issued linear response over a 50C temperature range. This
from the Master and I2C communication can continue. can be implemented using a standard resistor with 1%
tolerance in series with the thermistor. The value of the
Address Byte resistor is selected to be equal to the thermistor value
at the mid-point of the desired temperature range.
SCL 1 2 3 4 5 6 7 8 9
VDD
ACK
1 1 0 1 A2 A1 A0 1 10 k
SDA
Resistor
Start Start
Bit Device bits Address bits Bit 10 k VDD VDD
R/W Thermistor
MCP3421
Response MCP3421
1 VIN+ VIN- 6
FIGURE 6-4: I 2C Bus Connection Test.
2 VSS VDD 5
R R
3 SCL SDL 4 0.1 F 10 F
6.3 Application Examples
The MCP3421 device can be used in a broad range of
sensor and data acquisition applications. Figure 6-5,
shows an example of interfacing with a bridge sensor
TO MCU
for pressure measurement. (MASTER)
3
4
3
4
XXNN CA25
5
2
6
Note: In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for customer-specific information.
E1
B
p1 D
n 1
c A A2
L A1
Address Options: XX A2 A1 A0
A0 * = 0 0 0
A1 = 0 0 1
A2 = 0 1 0
A3 = 0 1 1
A4 = 1 0 0
A5 = 1 0 1
A6 = 1 1 0
A7 = 1 1 1
* Default option. Contact Microchip factory for other
address options
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchips Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
Microchip is willing to work with the customer who is concerned about the integrity of their code.
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as unbreakable.
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
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10/19/06