6.

S096: Assembly

Daniel Kang

Massachusetts Institute of Technology

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A typical computer

Fig. 01-06 from Englander, Irv. The Architecture of Computer Hardware and System
Software: An Information Technology pproach. 2nd edition. John Wiley & Sons, Inc.

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Von Neumann Architecture: CPU

Image of Von Neumann architecture removed due to copyright restrictions.

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What is assembly?

An assembly language is a low-level programming language for a

computer, or other programmable device, in which there is a very
strong (generally one-to-one) correspondence between the
language and the architectures machine code instructions.

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What is assembly?

An assembly language is a low-level programming language for a

computer, or other programmable device, in which there is a very
strong (generally one-to-one) correspondence between the
language and the architectures machine code instructions.

5
Why high-level languages?

Stronger abstractions
e.g. object oriented programming
e.g. C, C++, Java, Python
Increased portability
e.g. interpreted languages
e.g. Java, Python
Faster development cycles
...

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Why assembly?
y?

Debugging often requires reading assembly

Understand how things work at the machine level
Helps you write faster code (even in high-level languages)

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Assembly languages (architectures)
rchitectures)

I servers)

x86, x64 (desktops, laptop, servers)

I ARM (phones)
(phones)

I SPARC
SPARC (Sun)
(Sun)

I MIPS

I ...

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Registers

Registers

Storage close to the CPU

Most instructions manipulate registers
Manipulation of register content
Load and store from registers
Register are fast, memory access is slow

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x86 syntax (AT&T / GAS)

I Registers
I 8 registers in x86 (32-bit)
I 16 registers in x64 (64-bit)
I 16-bit: ax, bx, ...
I 32-bit: eax, ebx, ...
I 64-bit: rax, rbx, ..., r8, r9, ...
I Referenced by %REGISTER
I Constants: $0, $1, $0x20 (32), ...

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x86 syntax (AT&T / GAS)
GAS)

I Arithmetic instructions
I
OP a, b b = b OP a

I e.g. add %edx, %eax %eax = %eax + %edx

I Assignment instructions
I
OP a, b b = a

I e.g. mov %edx, %eax %eax = %edx

I Condition testing
I
OP a, b

I e.g. test %eax, %eax

I Control o w
flow
I
OP address

I e.g. jmp 0x420e80 jump unconditionally to 0x420e80

I ...

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 Live demos!

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Hailstone sequences: code

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 disassembly

Hailstone sequences: unoptimized disassembly

I Compiled with gcc version 4.8.1

I CPU: Intel(R) Core(TM) i7-3612QM CPU @ 2.10GHz

I gcc -O0 hailstone.c -o hailstone
I
gdb ./hailstone

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Hailstone sequences: unoptimized disassembly

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 Hailstone sequences: optimzed disassembly
I gcc -O3 hailstone.c -o hailstone
I gdb ./hailstone

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Intrinsics: code

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 disassembly

Intrinsics: vadd optimized disassembly

NOTE: THIS CODE IS UNSAFE (why?)

I gcc -O3 intrin.c -o intrin

I gdb ./intrin

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Intrinsics: sadd disassembly

I Try it yourself !

I Too large to fit
t on the screen! (why?)

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Further questions
questions

I Ho
How functions?

w are parameters passed to functions?

I How are values returned from functions?

I Do all instructions take the same amount of time?

I How
How does caching work?

I
What are the differences
dierences between ARM and x86?

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Further material

I Intel syntax
I External assembly: yasm, masm, etc.
I Intel manuals: http:
//www.intel.com/content/www/us/en/processors/
architectures-software-developer-manuals.html
I Classes: 6.004, 6.033, 6.172

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MIT OpenCourseWare
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6.S096 Effective Programming in C and C++

IAP 2014

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