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Sigma-Delta ADC Characterization Using Noise Transfer Function

Pole-Zero Tracking

Hochul Kim and Kye-shin Lee


Texas Instruments Inc. Dallas, TX

Abstract
This work presents a new characterization method for
ADCs using noise transfer function pole zero tracking.
In this scheme, the ADC poles and zeros are extracted
from the measured FFT-plot. Furthermore, the pole-zero
behavior with respect to test conditions including supply
Figure 1 Block diagram of the 2nd order modulator
voltage, bias current and reference voltage can be
analyzed. As a result, the pole-zero sensitivity to each test
condition can be separately obtained. This can overcome In this paper, we propose a modulator characterization
the drawbacks of the conventional test method which method based on noise transfer function (NTF) pole-zero
mainly focuses on analyzing the FFT-plots and SNR value. location analysis. The locations of the NTF poles and zeros
are obtained from the measured FFT-plot using a novel
pole-zero searching scheme which gives consistent results
1. Introduction regardless of the number of output samples. Furthermore,
the pole-zero behavior with a certain test condition such as
Sigma-delta () ADC is a key component for recent supply voltage, bias current, and reference voltage can be
audio, instrumentation, data acquisition, bio-medical and obtained. From this information, the pole-zero sensitivity
telecom applications [1] [3]. Especially, for system on a with respect to a specific test condition can be separately
chip (SOC) using a nanometer CMOS process that can shown. This is an advantage compared to the conventional
highly integrate RF/analog along with the digital test method which only shows the SNR versus test
processing circuits in the same chip, the characterization conditions. Furthermore, with the pole-zero sensitivity, it
and failure analysis of the modulator becomes is possible to easily figure out critical design or process
extremely important, since this mainly dominates the related parameters such as the noise, gain error, and
evaluation time of the entire system. So far, the matching accuracy. This can be possible due to the fact
modulator characterization has been performed by visually that the modulator non-idealities can be classified into
inspecting the FFT-plot which shows the noise spectrum NTF pole or zero affecting factors [7]. The following
of the modulator. In addition, the signal-to-noise ratio sections describe the NTF model, pole-zero searching
(SNR) and signal-to-(noise + distortion) ratio (SNDR) are scheme, and experimental results using a 2nd order single-
obtained from the FFT-plot [4], [5]. loop modulator.
However, the conventional test method has several
drawbacks. First of all, in case the SNR does not meet the 2. NTF Model of 2nd Order Modulator
budget, the root cause of the degradation cannot be The 2nd order modulator is widely used architecture
accurately seen from the FFT-plot, since the SNR of the
for ADCs due to simple circuit implementation and
modulator is affected both by the white (thermal) noise
good stability behavior[8]. In addition, high resolution can
and the shaped noise portion. This is especially
be achieved even with a moderate over-sampling rate by
problematic for wide-band modulators, where the in- using multi-bit quantizers. Figure 1 shows the general
band noise level is dominated by the quantization noise
block diagram of the single-loop 2nd order modulator.
rather than the thermal noise [3]. Secondly, analyzing the
The NTF of the modulator is given as [9]
device behavior by visually inspecting the FFT-plot cannot
give an absolute reference, since the noise level of the Y ( z ) ( z 1) 2
FFT-plot varies with the number of samples [6]. In NTF ( z ) = = (1)
addition, overlaid FFT-plots can be used to solve this E(z) z2
problem. However, it is extremely difficult to analyze
where the two poles and two zeros are located at 0+j0
overlaid FFT-plots when the number of plots increases.
(origin) and 1+j0 of the z-plane. However, eq. (1) is an
ideal NTF which is valid only without the non-idealities
except the quantization error .

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1-4244-1128-9/07/$25.00 2007 IEEE
effect of imaginary zero is dominant when is close to
the ideal value (=1). In this case, a clear notch is observed
in the NTF. However, as moves further from the ideal
value, the notch disappears since the low frequency region
of the NTF is dominated by the real zero. Figure 3 shows
the NTF behavior with different pole values. In this case,
the value of and was set to 1 and 0, respectively. As the
value of increases from 0 to 0.99, the entire NTF shifts
toward the low frequency region. In addition, the flat high
frequency region is extended. The imaginary part of the
pole, , makes a peak in the high frequency region of the
NTF when the value of is close to 1. When the value of
real pole is close to 0, the NTF is mainly affected by .
But when is close to 1, the peaking gets larger since the
effect dominates. Overall, the zeros affect the low
Figure 2 NTF behaviors with zeros ( = 0, = 0) frequency region of the NTF and poles affect the high
frequency region of the NTF. In reality when both pole and
zero are present in the NTF, even poles can slightly affect
the low frequency region of the NTF and vice versa.

3. Pole-Zero Searching Scheme


This section describes how the NTF poles and zeros are
found from the measured FFT-plot. The proposed method
is to first obtain a curve fit of the measured FFT-plot and
finding the poles and zeros such that the error between the
NTF and the curve fit is minimized. This requires solving a
number of frequency versus noise power quadratic
equations at specific frequency points. Figure 4 is a
measured FFT-plot of a 2nd order modulator with
40MHz sampling rate, which is mainly used for WCDMA
applications. The FFT-plot is redrawn with the curve fits in
Figure 3 NTF behaviors with poles ( = 1, = 0) Figure 5, which the solid line is the 8th order poly-nominal
curve fit of the FFT-plot obtained by using the MATLAB
function ployval [10]. However, the DC offset, input tone,
Now, we re-define a more realistic NTF model with and harmonics are excluded from the curve fit. The dotted
complex conjugate poles and zeros. That is line represents the scaled curve fit which is generated by
multiplying scaling factor k to the original curve fit,
[ z ( + j ) ] [ z ( j ) ]
NTF ( z ) = (2) which makes the in-band noise power identical to the
[ z ( + j ) ] [ z ( j ) ] measured FFT-plot. That is
where and are the real and imaginary part of the zero, BW 2
while and are the real and imaginary part of the pole 0
N m ( f ) df
respectively. In addition, when = 1 and = = = 0, in k= BW 2 (3)
eq. (2) is identical to the ideal NTF given in eq. (1). 0
N cf ( f ) df
Another assumption used in the NTF model is that the real
zero and the real pole are all positive. This will make where Nm (f) and Ncf (f) are the noise spectrum of the
the complex poles and zeros to locate in the right half side measured FFT-plot and curve fit, respectively. In this case,
of the z-plane. the signal bandwidth, BW, is set to 1MHz. As a result, the
scaled curve fit can be an accurate approximation of the
Figure 2 shows the NTF behavior with different zero
measured FFT-plot NTF.
values. The value of value was decreased from 1 to 0.9,
while was set to 0.003. To show how the zeros affect the Figure 6 shows the scaled curve fit where the frequency
NTF, we arbitrarily chose the value of and . In addition, index (point-A) divides the noise spectrum into low
both and were set to 0 in order to eliminate the pole frequency and high frequency regions, the pole index
effect. The reason value was selected close to be 0 is that (point-B) indicates the maximum point of the scaled curve
even a small value (0.01), it will make a huge notch
within the signal band, which is unrealistic. The low
frequency noise floor increases as is decreased. The

Paper 32.2 INTERNATIONAL TEST CONFERENCE 2


by plugging the frequency and magnitude of the scaled
curve fit in eq. (4), which yields a bi-quadratic equation.

Figure 4 Measured FFT-plot

Figure 7 Proposed pole-zero extraction scheme

Figure 5 Measured FFT-plot with curve fits In addition, only the real roots of the bi-quadratic equation
are considered as valid solutions, because of the
assumption that is a real number. Once the real poles are
obtained, the complex pole for each bin between A and B
is obtained by using the value obtained at that frequency
bin. A simplification can be made when finding . Instead
of directly solving the bi-quadratic equation for each
frequency bin between A and B, a new equation is
obtained by subtracting the bi-quadratic equation for a
certain frequency bin with the bi-quadratic equation for
point B. This approach is based on the fact that affects
the high frequency slope and peaking behavior of the NTF.
Figure 6 Concept of pole-zero searching with the scaled Furthermore, the new equation will be a quadratic equation
curve fit which can be more easily solved than the bi-quadratic
equation. Using and for each bin, the error between the
fit, and the zero index (point-C) is the mid-point between scaled curve fit and the NTF is compared. As the result,
DC and the frequency index. The next step is to find the the optimum and that makes the minimum error are
optimum , , , and value that minimize the error selected as the optimum value. The next step is finding the
between the NTF and scaled curve fit. real zero at point-C, using the optimum and . This
Figure 7 shows the proposed pole-zero extraction scheme. involves solving a bi-quadratic equation for frequency bin
Note that the poles mainly affect the high frequency region C. However, only the positive and real root is considered
and zeros affect the low frequency region of the NTF, the as a valid solution, since the assumption of is that it is a
poles are obtained using bins between A and B, whereas real and positive number. The error between the scaled
the zeros are obtained with the bin at C (Figure 6). The real curve fit and NTF is further minimized by fine tuning the
pole at each frequency bin between A and B is obtained complex zero .

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The real pole noise spectrum which is used to find the real
pole , is given by

(e jTs 1) 2
N RP (e jTs ) = (4)
(e jTs ) 2
where Ts is the sampling period. The real pole for each
frequency bin between point-A and B, is obtained by
solving eq. (4), which lead to a bi-quadratic equation given
as

a4 4 + a3 3 + a2 2 + a1 + a0 = 0 (5)

where
a4 = 1 Figure 8 NRP(e
jTs
) with = 0.298.
a3 = a1 = 4 cos Ts
( 2 cos 2Ts 8 cos Ts + 6 )
a0 = 1 2
N RP (e jTs )

In addition, only the real roots of eq. (5) are considered as


a valid solution, since the assumption of is a real number.
In order to find the imaginary pole , the imaginary pole
noise spectrum is used. That is

(e jTs 1) 2
N CP (e jTs ) = (6)
[ e jTs ( + j ) ] [ e jTs ( j ) ]
Similar to the real pole case, another bi-quadratic equation
is obtained for for each frequency bin between A and B.
That is jTs
Figure 9 NCP(e ) with = 0.298 and = 0.594.
b4 + b3 + b2 + b1 + b0 = 0
4 3 2
(7)
where bxi are the coefficients for specific frequency bin pi
where which lies between A and B, and bxn are the coefficients
b4 = 1 for frequency bin pn (point-B). This approach is based on
the fact that affects the high frequency slope and peaking
b3 = b1 = 0
of the noise spectrum. Therefore, the value of obtained
b0 = 4 + ( 4 cos T s ) 3 + ( 2 cos 2 T s + 4 ) 2
from eq. (8) will make the high frequency slope and
+ ( 4 cos T s ) + 1 peaking of complex pole noise spectrum NCP(ejTs) a close
approximation of the scaled curve fit. Furthermore, since
( 2 cos 2 T s 8 cos T s + 6 )
2
b4 = 1 and b3 = b1 = 0 as shown in eq. (7) and eq. (8) will
N CP ( e j Ts ) be a quadratic equation which is more simple to solve than
the bi-quadratic equation. Finally, the error between the
For this case, the real pole obtained from eq. (5) is used. scaled curve fit and NCP(ejTs) replaced with and
However, a simplification scheme is used when finding . obtained for each frequency bin between point-A and B, is
Instead of directly solving eq. (7), a new equation is compared. Obviously, the best and will make the
obtained for each frequency bin by subtracting the minimum error. In this case, = 0.298 and = 0.594 are
quadratic equation for the specific frequency bin from the the best solutions. However, the and values that make
quadratic equation for point-B. That is the complex pole locate outside of the z-plane unit circle
were excluded, since this causes the modulator to
become unstable. Figure 8 shows the scaled curve fit and
(b4 i b4 n ) 4 + (b3 i b3 n ) 3 + (b2 i b2 n ) 2 (8) real pole noise spectrum NRP(ejTs) with = 0.298. Figure
+ (b 1i b1n ) + (b0 i b0 n ) = 0 9 shows the scaled curved fit and complex pole noise
spectrum NCP(ejTs) with = 0.298 and = 0.594. It is
shown that the NCP(ejTs) matches the scaled curve fit with
good accuracy in the high frequency region,

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jTs
Figure 10 NRZ(e ) with = 0.925.
(a)

(b)

Figure 12 (a) Final NTF pole-zero location


(b) Detailed zero location

In addition, only the positive real root of eq. (10) is


Figure 11 Final NTF.
selected as a valid solution, because of the assumption that
is a real and positive number. The valid solution for this
Once the best value of and are determined, the real case was = 0.925. Figure 10 shows the scaled curve fit
zero is obtained by using the real zero noise spectrum and real zero noise spectrum NRZ(ejTs) with = 0.925. As
given as expected increases the low frequency noise floor which
makes NRZ(ejTs) closely match the low frequency portion
(e jTs ) 2 of the scaled curve fit, whereas maintaining the high
N RZ (e jTs ) = (9)
[ e jTs ( + j ) ] [ e jTs ( j ) ] frequency behavior. However, there is a slight discrepancy
between the scaled curve fit and NRZ(ejTs), which is due to
where the best solution previously obtained for and are the imaginary zero effect. Therefore, is fine tuned to
used for the complex pole value. Now, assuming the real minimize the error. The optimum value for this case was
zero will increase the low frequency noise floor, the bi- = 0.003. Figure 11 shows the scaled curve fit and the final
quadratic equation for the zero index (point-C) shown in NTF with the obtained , , , and value. Figure 12
Figure 6 will be solved to find . That is shows the z-plane pole-zero location of the final NTF,
where the complex pole, zero location is at (0.298+j0.594)
c4 4 + c3 3 + c2 2 + c1 + c0 = 0 (10) and (0.925+j0.003), respectively.
where
c4 = 1
4. Experimental Results
c3 = c1 = 0
2
A switched-capacitor (SC) 2nd order single-loop
c0 = 1 N RZ (e jTs ) [ 4 ( 4 cos Ts ) 3 modulator has been used to verify the proposed test
+ (2 cos Ts + 2 2 + 4) 2 scheme. The modulator was fabricated using a
nanometer CMOS technology. The sampling clock
(4 cos Ts + 4 2 cos Ts ) frequency was set to 40MHz with signal bandwidth of
+ ( 4 + 2 2 cos 2Ts +1) ] 1MHz. Figure 13 shows the test setup, in which the signal

Paper 32.2 INTERNATIONAL TEST CONFERENCE 5


Figure 13 Test Setup

generator made the fundamental tone for the ADC


input with the common mode voltage (Vcm). The device
sampling clock was externally provided, and an external
power supply was used for sweeping the analog power
supply and the reference voltage. The bias current is swept
using an external V-I converter. The digital output
sequence was captured by the data capturing system,
which is the FIFO board. In addition, the data bits are sent
to the PC through a USB cable. The FFT plot was
generated with 65536 (64k) output samples for each Figure 14 Pole-zero locations with different supply voltages
measurement, using MATLAB [10]. The supply voltage,
bias current, and reference voltage (VREF) were the most
important test conditions for the ADC. In this test
scheme, the pole-zero location was obtained from the
measured FFT plots with different test conditions. The
default value of each test condition were supply voltage =
1.6V, bias current = 8A, and VREF = 0.7V. In addition,
the SNR for each case was observed to see the correlation
between the in-band noise floor and the pole zero location.
However, in order to separately see how the poles and
zeros affect the in band noise floor the following
parameters are used,

P distance between complex pole and (0 + j 0)


Z distance between complex zero and (1 + j 0) Figure 15 SNR and P versus supply voltages

where P and z are the distance between the measured


NTF (scaled curve fit) and the ideal NTF poles and zeros,
respectively. With this approach, the NTF pole-zero
dependency on each test condition variation can be easily
obtained.
Figure 14 shows the z-domain pole-zero location with
different supply voltages where the detailed zero location
is shown in the bottom figure. The supply voltage was
varied from 1.2V to 2.0V. As the supply increases, the real
pole decreases while the complex pole slightly
increases. In addition, the real pole significantly changes
under low supply conditions (1.2V and 1.4V). However,
the real zero is almost constant with supply voltage
above 1.4V. The complex pole is not affected by the Figure 16 SNR and Z versus supply voltages
supply voltage. Figure 15 shows the SNR and P versus

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supply voltage. Although P consistently varies when the
supply voltage is larger than 1.5V, the SNR is not affected
by the variation of the supply voltage. Figure 16 shows the
SNR and Z versus supply voltage. The SNR variation
under low supply voltage is consistent with the Z change.
This indicates the SNR degradation is mainly due to the
real zero effect
Figure 17 shows the pole-zero location with different bias
currents. The bias current was changed from 4A to 30A
where the value between 4A and 12A was of particular
interest, since the bias current beyond this value forces the
NTF poles and zeros to deviate from the ideal location. For
the poles, the imaginary part constantly increases as the
bias current increases. However, the real pole is not
affected much by the bias current. In addition, under this
bias current range, the real zero is near 0.93 whereas the
complex pole does not show significant change. Overall,
the complex pole is mainly affected by the bias current
variation. Figure 18 and 19 show SNR with P and SNR
with z, respectively. In this case, the result is shown for
bias current up to 30A. The pole distance P is minimum
value around bias current of 10A, and constantly
increases beyond bias current of 10A. The zero distance
Figure 17 Pole-zero locations with different bias currents
does not change with the variation of bias current up to
16A, and gradually increases beyond this point.
Therefore, the SNR degradation under low bias conditions
(< 16A) is mainly caused by the NTF pole variation and
SNR degradation under high current (> 16A) is mainly
affected by the zero variation.
Figure 20 is the pole-zero location with reference voltage
(VREF) which is varied between 0.5V and 0.9V. For VREF =
0.5V, the NTF pole is located outside of the unit circle,
which makes the modulator unstable. However, beyond
this voltage, the pole location does not drastically change.
In addition, the zero moves toward (1+j0) as VREF
increases to 0.7V, however, this behavior is reversed as
VREF exceeds 0.7V. The zero movement is mainly due to
the real zero . The complex zero is not affected by
VREF. Figure 21 and 22 shows the SNR and pole-zero Figure 18 SNR and P versus bias current.
distance P and z, respectively. As VREF is varied from
0.6V to 1.3V, P does not show significant variation.
However, P slightly increases as VREF exceeds 1.3V. The
zero distance Z drastically changes under low VREF value
(< 1V), which mainly affects the SNR. In addition, similar
to the P case, z does not show much dependency on
VREF with higher values (> 1V).
To summarize, using the proposed method, the NTF pole-
zero behavior with different test conditions including
supply voltage, bias current, and reference voltage has
been observed. From this information, the pole-zero
distance P and Z are obtained. Now, we use the pole-
zero sensitivity to see the correlation between the NTF
poles and zeros. That is
Figure 19 SNR and Z versus bias current.

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pole zero sensitivit y ( P / Z )
where larger value indicates that the poles are more
affected than the zeros, and vice versa. Table 1 shows the
pole-zero sensitivity with different test conditions. For
instance, the zero is more affected than the pole when the
supply voltage decreases from 1.4V to 1.2V.

Table 1 Pole-zero sensitivity with different test conditions

Supply 1.2V 1.4V 1.6V 1.8V 2.0V


(p /z) 0.87 3.99 11.29 8.79 9.15
Bias 4A 8 A 10 A 12 A 16 A
(p /z) 9.67 9.78 11.26 11.59 133.8
VREF 0.5V 0.6V 0.7V 0.8V 0.9V
(p /z) 4.42 7.29 10.24 7.95 5.56

Figure 20 Pole-zero location with different reference voltages


5. Limitations
Basically, the proposed test scheme can be applied to
higher order and higher resolution ADCs. However,
for the high order case, it is required to solve a number of
(2N)-th order equations to find the NTF poles and zeros
where N is the order of the modulator. Therefore, as the
order increases, the number of roots will increase, and it
will be more complicated to find the valid solution. For
high resolution ADCs, the in-band noise level reduces
as the resolution increases. As a result, the NTF poles and
zeros will not move much from the ideal location. This
means the pole-zero variation will be less than the low
resolution case, which the accuracy might be an issue.
Overall, the proposed test method is novel in aspects of
Figure 21 SNR and P versus reference voltages finding the NTF poles and zeros from the measured FFT-
plots, and using the pole-zero behavior for characterizing
the ADC. The proposed test scheme is different from
BIST [5] and DFT [11], since it does not focus on
reducing the test time and test cost by simplifying the test
procedure.

6. Conclusions
A new characterization method for modulators based
on NTF pole-zero tracking is proposed. The proposed
method finds the NTF poles and zeros from the measured
FFT-plot using an iterative searching scheme.
Furthermore, the pole-zero behavior with respect to
different test conditions are obtained. From this
information, it is possible to figure out the critical design
Figure 22 SNR and Z versus reference voltage. and process parameters using pole-zero sensitivity.
Overall, this can overcome the drawbacks of the
conventional modulator test method such as noise level
variation with number of FFT samples, limited analysis of

Paper 32.2 INTERNATIONAL TEST CONFERENCE 8


overlaid FFT-plots, and difficult prediction of performance
degradation with test conditions.

7. Acknowledgements
The authors would like to thank Russ Byrd and Joonsung
Park for their comment and help in reviewing this paper.

8. References
[1] T.-H. Kuo, K.-D. Chen, and H.-R. Yeng, A wideband
CMOS sigma-delta modulator with incremental data
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vol. 37, pp. 11-17, Jan. 2002.
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optimized 14-bit SC modulator for ADSL CO
applications, ISSCC Dig.Tech. Papers, vol. 47, Feb.
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[3] J. Jrvinen and K. Halonen, A 1.2V dual-mode
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ISSCC Dig.Tech. Papers, vol. 49, Feb. 2006, pp. 488-
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[4] S. R. Norsworthy, I. G. Post, and H. S. Fetterman, A
14-bit 80kHz sigma-delta A/D converter: modeling,
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State Circuits, vol. 24, pp. 256-266, April 1989.
[5] M. F. Toner and G. W. Roberts, A BIST scheme for
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sigma-delta ADC, IEEE Trans. Circuits Syst. II, vol.
42, pp. 1-15, Jan. 1995.
[6] Y.-C. Jenq, Measuring harmonic distortion and noise
floor of an A/D converter using spectral averaging ,
IEEE Trans. Instrum. Meas., vol. 37, pp. 525-528,
Dec. 1988.
[7] P. Malcovati et al., Behavioral modeling of switched-
capacitor sigma-delta modulators, IEEE Trans.
Circuits Syst. I, vol. 50, pp. 352-363, March 2003.
[8] J. Candy and A. N. Huynh, Double interpolation for
digital-to-analog conversions, IEEE Trans.
Commun., vol. COM-34, pp. 77-81, Jan. 1986.
[9] S. R. Norsworthy, R. Schreier, and G. C. Temes,
Delta-Sigma Data Converters-Theory, Design and
Simulation. New York: IEEE Press, 1996.
[10] Simulink and Matlab Users Guides, The Math Works
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[11] C.-K. Ong and K.-T. Chen, Self-testing second-order
delta-sigma modulators using digital stimulus, IEEE
VLSI Test Symposium, April 2002, pp. 123 128

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