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Basic Computer Organization and Design-I

Lesson: Basic Computer Organization and Design-I


Lesson Developer: Amita Misra
College/Department: Bhaskaracharya

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Basic Computer Organization and Design-I

Table of Contents
Chapter 1: Basic Computer Organization and Design
1.1: Computer Organization and Architecture
1.1.1:The Computer Level Hierarchy
1.1.2:Instruction set Architecture
1.2: The stored program concept
1.2.1: Registers
1.2.2: Memory
1.2.3: Machine instructions and their representation
1.2.4: Organization of simple computer system
1.3: Computer Instruction
1.3.1: Designing an Instruction set architecture
1.3.2: Instruction Set For Basic Computer
1.3.3: Instruction Set Completeness
Summary
Exercises
Glossary
References

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Basic Computer Organization and Design-I

1.1 Computer Organization and Architecture

This article is an introduction to a Basic Computer, its operations and how they are
performed. Before we understand the terms Computer organization and Architecture, let us
first see how computers function internally. We may define a Computer as:
An electronic device which accepts an input, processes it (by modifications and calculations
on data received as input) and presents the output to the user in useful ways.
I/P Devices used are (Keyboard, Mouse )
O/P Devices used are (Monitors, printers)
In addition to these devices it contains the control unit (Brain of the computer). A computer
system consists of a Central Processing unit (CPU), a Memory unit and I/O interface. There
may be a number of I/O devices connected to a given computer (See Figure 1.1)

Connections between CPU, memory and I/O devices

Source: self
Figure 1.1
Computer organization represents the basic design and structure of a Computer System. A
computer consists of various parts as shown in Figure 1.1, and computer organization is a
functional description of these parts and their design implementation. It is mainly concerned
with how CPU functions internally, accesses data from memory, performs calculations on
this data and stores it back in the memory. It may be also defined as a way of selecting
different hardware components and interconnecting them, to design a Computer System
which meets the performance goals and is cost effective. We may view a computer system
at different levels of abstraction, where computer organization refers to a level below the
Operating System but above the digital logic level. Main components at this level may be
called as Subsystems or functional Units built from lower levels.

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Value addition: Image


Abstract level of Computer Organization

Source: self

Early descriptions of a computer organization are attributed to Von Neumann. According to


Von Neumann, a computer system may be composed of five major subsystems
1. Input
2. Output
3. Memory
4. Arithmetic Logic Unit (ALU)
5. Control Unit

ALU and Control Unit together form the heart of the computer system i.e. CPU or processor
(see figure 1.2)

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Original Von Neumann Architecture

Source :self
Figure 1.2

1.1.1 The Computer Level Hierarchy

A Computer is designed to solve problems of a wide range, and therefore must accept
programs written in any high or low level language such as java, C, C++, Prolog etc. The
physical components of a computer are still wires and gates; therefore a wide gap exists
between the actual physical components and the application programs written in these high
level languages. Practically, this gap must be invisible to most of the users and
programmers. Problem solving in Computers can be approached in different ways, one of
them being Divide and Conquer, which says that divide a large problem into smaller sized
sub problems, and solve each sub problem separately and then combine the solutions to get
the desired result. Each sub problem performs a specific function, and sub problems only
interface with each other for the entire system to function.
Computer organization can also be viewed at different levels of abstraction, where each
level performs a different set of functions, and interacts with lower levels using the
functions provided by lower levels. Computer organization aids in this partitioning of a
system into different layers and their interface.

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Basic Computer Organization and Design-I

The Abstract Levels of Modern Computing Systems

Figure 1.3 below shows the different levels of modern Computing systems.

Different levels of computer systems

Figure 1.3
Level 6 The User Level, is composed of applications and is the level with which we
are familiar as a user. At this level, we run programs such as word processors,
graphics packages, or games. The lower levels are nearly invisible from the User
Level.

Level5 (The High-Level Language Level, consists of languages such as C, C++,


FORTRAN, Lisp, Pascal and Prolog. These languages must be translated (using either
a compiler or an interpreter) to a language the machine can understand. Compiled
languages are translated into assembly language and then assembled into machine
code. (They are translated to the next lower level.) Although if programming in a
particular language, the programmer must know about data types and the
instructions available for those types, he need not know about how those types are
actually implemented. He is not aware of the lower layer functions.

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Level4 An assembly language is a low-level programming language for computers.


It is a symbolic representation of the machine codes for architecture. This
representation is based on mnemonics that symbolize instructions, processor
registers, memory locations, and other language features. A programmer can also
write a program in assembly language. Assemblers like TASM and MASM are used to
convert it to machine code

Level3 The System Software Level, deals with operating system instructions
This level is responsible for multiprogramming, protecting memory, synchronizing
processes, memory management; process Scheduling and various other important
functions.
Level2 The Instruction Set Architecture (ISA) or Machine Level consists of the
machine language recognized by the particular architecture of the computer system.
Programs written in a computers true machine language on a hardwired computer
can be executed directly by the electronic circuits without any interpreters,
translators or compilers.

Level1 The Control Level is where a control unit makes sure that instructions are
decoded and executed properly and that data is moved where and when it should
be.
Reference: The Essentials of Computer Organization and
Architecture (second edition) Author Linda Null and Julia Lobur
Copyright 2012 by Jones and Barlett Learning. LLC

Value addition Image


Co-coordinating many levels of Abstraction

Source: self

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Basic Computer Organization and Design-I

Value addition Did you Know


One Assembly language instruction is translated to exactly one machine level
instruction

Computer Architecture : It describes how the internal structure of a computer works, how
different tasks are actually performed internally and how the actual physical devices i.e.
gates, wires, transistors execute the instructions given by assembly language program. A
good design is based on the decisions taken at Architecture level.
1.1.2 Instruction Set Architecture

1. It is the interface between hardware and software of a computer system.


2. The instructions of an ISA, act as a bridge, for communication between application
level and lower levels consisting of the actual hardware components.
3. A computer processes information in binary i.e. 0 and 1, hence all statements written
at application level have to be translated into Binary .ISA does this translation.
4. Various data types, registers, their format, Addressing techniques, memory and its
organization are some of the features of a computer system decided by ISA.

When defining the Architecture of a Computer, we define things like number and length of
registers, number and types of machine instructions available, different levels of cache
memory, length of instructions whether variable or fixed. We write an algorithm or a
program in a High Level Language say Java or C++ and then execute it, to get the output.
When a program executes, it calls another program (set of instructions) and this process
continues till finally the instructions reach the machine level where they are actually
executed. Computers these days are designed to perform various tasks such as data
analysis, data processing, gaming or they may be developed for embedded systems such as
in microwave ovens, remote controls etc. Whether a computer system is to be designed for
a simple embedded application or a complicated one is directly influenced by the
architecture and organization.

Value addition: Did you Know?


Difference between computer organization and computer
architecture
Computer organization is the way different attributes of a computer system
are linked together and interact to achieve the goals specified by the
computer Architecture. Architecture of a computer specifies features such as
range of addresses available, memory, register and how these coordinate
with each other to achieve the desired results. Architecture is a blue print,
and organization is how to implement it. Architecture is not vendor specific,
but organization is. Each vendor may implement the basic architecture in his
own way. A programmers view is reflected in architecture as it determines
the number and types of instructions available, size of the register available
and computer organization is implementation of this architecture, and there
may be various ways to this implementation. Also organization of a computer
may be changed without changing the Architecture. It may be implemented
as a 64-bit machine whose 64-bit Instruction is read in 1 clock cycle or as 32-
bit machine, where it is read in two clocks cycles. Changes in architecture are
less rapid as compared to organization which has seen a drastic change over
the years. Computers today run faster due to changes in organization, but the
basic set i.e. architecture still almost remains the same.

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Basic Computer Organization and Design-I

Architecture of a computer has following attributes


1. Number of bits used to represent a data type, the mechanism for an
Input and giving an Output, various addressing schemes available,
number of bits in the instruction ,length of data register

2. Whether a particular instruction is available or not depends on factors


like the number of bits available in the Instruction register.

Organization is implementation of above features


1. Generation of control signals, memory technology (how cache is
organized).Once the instruction set is decided, organization is to
decide how to decode and execute those instructions.

2. How to execute a particular instruction whether directly or indirectly


through a combination of various instructions, for example whether to
multiply directly through a multiplication unit or by subsequent
addition.

The number and length of internal registers, the set of instructions available
define architecture while generation of clock pulses, interaction of registers
with memory is used to define an organization of a computer system.

Remember: Computer Architecture comes before Computer Organization.

Value addition: Analogy


We may compare organization and architecture to building a house. The
design and architecture comes first, where we decide the basic layout plan of
a house, number of rooms etc., and then is organization i.e. actually building
the house by bricks or any other latest technology but keeping in mind the
basic architecture of the house.

Transfer of information across layers of a computer system.

Each high level Layer of a computer system interacts with the layer below using the services
provided by lower layer. See figure (1.4)

Problem Statement:
The problem as described by the client, for which an application is to be built. It may not be
precise, but contains an overall description of the requirements of the client.
Algorithm:
The problem stated above is converted to an algorithm which may be stated as a set of
rules that defines the sequence of operations. It has a definite input and output, and
terminates eventually.
Program:
We then convert the algorithm to a program using any of the languages (may be high level
or low level) that computer can comprehend.

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Basic Computer Organization and Design-I

Transformation between different Layers

Source: self
Figure 1.4

Instruction Set Architecture:


It specifies the instruction set, number and types of registers, their length, size of RAM,
word size ,addressing modes and data types available.
Micro architecture/organization:
It contains how the above defined ISA is implemented. There may be a number of ways to
implement an ISA. Therefore different organizations of one ISA are possible.
Logic Circuits :
It is the physical model of Boolean function. It describes operations such as Add, subtract,
multiply, comparison (may be performed using XOR or subtraction) and their
implementation.
Devices:
Gates and wires are used to implement logic circuits.

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Value addition: Image


Computer System Layers of Abstraction

Computer Software is a collection of computer programs, algorithms and related


data that provide instructions to the computer .Instruction set Architecture includes
data types, registers, addressing modes and commands to be implemented by the
processor. Microarchitecture is the set of processor design techniques to implement
the instruction set. And below microarchitecture are the circuits and devices that
actually implement the instructions in binary code which at the lowest level are in
form of electrical signals .Hence we say ISA is the interface between the hardware
and the software. The hardware implements the software through ISA,
microarchitecture, logic gates and devices.

Source: self

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Measurement Terminology used in computers


To compare two things, we use same units of measure. For example lengths or
speeds of a train may be compared in meters or miles/hour respectively. This is used to
determine which is faster and better. Similar logic applies to computers. We use the concept
of number of characters that can be stored to determine the capacity of a system.

Value addition Image


Common Prefixes associated with computer organization and
Architecture
Kilo (K) = 103 ~ 210 Milli =10-3 ~ 2-10
Mega (M) = 106 ~220 Micro =10-6 ~2-20
Giga (G) =109 ~230 Nano =10-9 ~2-30
Tera(T) =1012 ~240 Pico =10-12 ~2-40
Peta(p) =1015 ~250 Femto =10-15 ~2-50
Source: self

Computers are clocked devices. Computational steps/ operations occur periodically


according to clock ticks, and these operations are discrete with respect to time. Every
computer system contains a clock for synchronizing the operations. All sequential circuits
have clock signal as one of the inputs. All state transitions occur only when clock value is
either 0 or 1 or at rising or falling edge. Processors usually execute instructions at the rate
of 1 per clock cycle. However these days systems use parallel processing, pipelining to
execute more than one instruction per clock cycle.
Clock cycle time: Time interval between two consecutive rising or falling edges of the clock.
The clock sends electrical pulses to all the main components thus transferring data and
instructions to different memory location.
Clock frequency: The number of cycles completed per second. It is measured in MHz
(complete millions of cycles per second) or GHz (complete billion of cycles per second).
Since all the tasks in a computer are performed by processor, the frequency of the
microprocessor plays a crucial role in determining the overall performance of system.
Number of clock cycles required to execute an instruction depends on both
architecture and organization.

What it means to say "I have a 1 GHz computer


Clock speed is the rate at which a processor completes a processing cycle. 1GHz is
equal to one billion cycles per second. 1GHz means that the computer takes 1 Nano
second to perform each step but a number of steps are required to execute one
instruction, whereas computational speed is expressed in MIPS i.e. millions of
instructions per second hence clock speed is more than computational speed. For
example 1GHz computer (clock speed) may have a computational speed of 300 MIPS.
Also different processors use different architectures i.e. no. of clock cycles required to
complete one instruction varies in different processors, hence doubling the clock speed
may not necessarily double the speed of the processor. This implies that a 1.6GHz CPU
may not be twice as fast as 800MHz CPU and vice-versa. For example if 1.6GHz CPU
completes an instruction in four cycles and 800MHz CPU takes seven clock cycles then
1.6GHz CPU will be more than twice in speed in compared to 800MHz CPU and if
1.6GHz takes more clock cycles then 800MHz then it will be less than twice fast as
compared to 800MHz.
Parameters such as Bus width, cache size, no. of caches, RAM also affect the overall
speed of a computer.

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Value addition: FAQ


What is Clock cycle time Of say 100 MHz Processor
A 100 MHz processor has a clock cycle time of 10 nanoseconds.

Value addition: Advertisement


Advertisement of a computer

Consider a facsimile computer advertisement. The ad contains phrases such as


64MB SDRAM ,64-bit PCI sound card and 32KB LI cache.
Explanation of the advertisement
The microprocessor is the part of a computer that actually executes program
instructions .It is the brain of the system. The microprocessor in the advertisement is
a Pentium III; operating at 667MHz. Computers are clocked devices, in which
computational steps occur periodically according to clock ticks. Operation of a
computer is discrete in time. This determines clock speed. All the circuits in the CPU
are synchronized by the system clock hence every computer system contains a clock
for synchronization. It changes from 1 to 0 and back again at regular intervals (the
clock cycle).Modern processors typically complete instructions (i.e., fetch-execute
cycles) at the rate of 1 per clock cycle. Many use multiple instruction ``pathways'' or
``pipelines'' in an attempt to complete more than one instruction per cycle. The
clock rate is measured in "MHz" (megahertz), where 1 MHz is 1 million cycles per
second.. Because computer system clocks generate millions of pulses per second, we
say that they operate in the megahertz (MHz) range. Many computers today operate
in the gigahertz range, generating billions of pulses per second. And because nothing
much gets done in a computer system without microprocessor involvement, the
frequency rating of the microprocessor is crucial to overall system speed. The
microprocessor of the system in our advertisement operates at 667 million cycles per
second, so the seller says that it runs at 667MHz.The next thing that we see in the
ad is 133MHz 64MB SDRAM. The 133MHz refers to the speed of the system bus,
which is a group of wires that moves data and instructions to various places within
the computer. Like the microprocessor, the speed of the bus is also measured in MHz
Many computers have a special local bus for data that supports very fast transfer
speeds (such as those required by video). This local bus is a high-speed pathway

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that connects memory directly to the processor. Bus speed ultimately sets the upper
limit on the systems information-carrying capability.
The system in the advertisement also has a memory capacity of 64 megabytes (MB)
or about 64 million characters. Memory capacity not only determines the size of the
programs that we can run, but also how many programs we can run at the same
time without bogging down the system.

Reference: The Essentials of Computer Organization And


Architecture (second edition) Author Linda Null and Julia Lobur
Copyright 2012 by Jones and Barlett Learning. LLC

1.2The stored program concept


CPU design focuses on data path (such as ALUs, control unit: logic which controls the data
path), Memory components such as registers, caches. These sections work together to
perform the fetch, decode and execute instructions. Microprocessor consists of data path
and control. The data path performs the arithmetic and logic operations. Control directs
data path, memory and IO devices to execute instructions according to the program written.
It can be viewed as a finite state machine whose inputs are machine instruction, data path
conditions and output is a register transfer statement, control signals and ALU operation
codes .A computer manipulates data in binary. Memory stores both data and instructions. It
is the task of the CPU to fetch the program instructions, decode each instruction, and
perform the operations on the data stored in memory. Data path can be described as a
network of storage units i.e. registers and arithmetic logic unit for performing operations on
data. These units are connected by buses for transferring information from one place to
another. The timing signals for these operations are generated by clock pulses. Together
these two components i.e. data path and control unit perform the tasks of the CPU.
Control unit ensures that correct data moves to the required location at appropriate time so
that operations on it may be performed. The figures 1.5 and 1.6 shown below describe the
basic components of a computer system. It receives input information either through
network (internet) or input devices. This information is exchanged through system buses.
Main memory holds temporary data as CPU registers are limited. All processing is done in
CPU registers and ALU. Information within the CPU registers is exchanged through CPU
buses. This processed information is available to the user through output devices.

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Top Level Structure of a computer

Source: self
Figure 1.5

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CPU Structure

Source: self
Figure 1.6

1.2.1 Registers

A register stores binary values using a group of flip-flops or latches. For example for an
instruction to add two integers, the control places one of the values in register A, other
values in say register B. The values are then added using an addition circuit of ALU, may be
a half or full adder. A third register may be needed to store the result or it may be one of
the source registers i.e. either say C=A+B or A=A+B, where A, B, C are names of registers.
All Variables, values, instructions are stored in memory, but they have to be moved to
registers so that they can be processed by CPU. Once the computation is done, the values
may be moved back to memory and new set of values are loaded in registers, hence CPU
always processes information present in registers. Since register consists of flip-flops, and
each flip-flop is capable of storing 1 bit of information, an n-bit register stores n bits of
information. Registers are used to store both data and information needed to execute a
program. Registers are located on processor so that information can be accessed quickly.
Values can be accessed quickly by CPU if these values are present in registers as compared
to memory locations. Flip-flops may be used to implement a register. One D flip-flop can
store one bit of information, hence to store multiple bits we need collection of D flip-flops.
These flip-flops must be clocked devices and operate synchronously. At each clock pulse
transition a new value enters a register and remains there until the clock pulses again. We
process data stored in computer systems, and this data is usually in fixed size binary words,
hence registers of 16, 32, 64 bits are used. Different architectures may have different
number of registers. They are used to read/write information or transfer information
amongst themselves or across memory. A register does not have an address as is the case
with a memory location. They are accessed directly by name by the control unit. Registers
may be used for special purposes such as shift registers, increment, count, index registers(
are used in looping constructs), stack pointer registers (for maintaining program stack),

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status registers( to hold status bit such as overflow, carry or zero). Computers may have
more than one register set and each may be used in a different way. Pentium architecture
has a data register set and an address register set and usage of both is different. Some
architectures support large set of registers to increase the execution speed of instructions.
Most of the registers used are synchronous i.e. tied to a master clock, which changes its
state from 0 to 1 or 1 to 0 at regular intervals. Registers load new data only when the clock
ticks. This may sometimes lead to an assumption that more frequently the clock ticks, the
faster the system becomes. But certain restrictions are there on the clock speed or the
length of the clock. Whenever the clock ticks, new data is loaded into the register, and the
output changes. These output values move through the logic circuits of the machine, and
become an input for another set of registers, and then are stored there. The clock cycle
time must be long enough to ensure that the changed values are received correctly for the
next set of registers. If the clock cycle is too short, the values may not be transferred
correctly, leading to an inconsistent state in the system. Hence before finalizing the clock
cycle time it must be ensured that it is at least as large as maximum propagation delay of
the circuit.
The CPU time needed for a program to execute may be calculated as
CPU time = (No. of seconds) per Program
= (No. of instructions in a program) * (Average cycle time for one
instruction) * (No. of seconds in one cycle)

The architecture of a machine has a direct impact on its performance. Two machines may
have same clock speed, but may take different number of cycles to execute an instruction
i.e. old computer such as Intel 286, or 386 needed more number of cycles to execute an
instruction as compared to Pentium. However, in general, multiplication operation requires
more clock cycles as compared to addition. Accessing a memory location takes more time as
compared to registers and floating point arithmetic takes more time as compared to integer
arithmetic.
Arithmetic Logic Unit (ALU) performs arithmetic operations such as addition, subtraction,
comparison during execution of a program. These operations usually take two inputs and
produce one output. Bits in the status register are set depending on the outcome of the
operation performed in ALU, e.g. whether the result of the operation is negative or zero.
ALU performs operations depending on the control signals it receives from the control unit.
Control unit can be called as the traffic manager of ALU since it directs the movement of
data, instructions, operations or result for the ALU. It is the control unit who gives
commands to the ALU indicating the registers to be used, and ensures correct data is placed
at correct position along with timing signals, so that the required logic circuits are enabled
and perform the operations desired. The control unit uses a program counter register to find
the address for next instruction and status register for maintaining overflows, sign bit of the
result operation, carry or borrow. To summarize registers are
1. Large enough to hold a data value(integer or floating point) or an instruction
2. Used to store inputs and outputs from ALU
3. Relatively few in number
4. Access time is fast as compared to memory
5. Can be used to store the intermediate results of a calculation.

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1.2.2 Memory

Block diagram of Memory

Reference: The Essentials of Computer Organization And


Architecture (second edition) Author Linda Null and Julia Lobur
Copyright 2012 by Jones and Barlett Learning. LLC
Figure 1.7

Instructions are placed in memory. We may view memory as a double dimensional array.
Each row has a length equal to word size, and each individual cell stores one bit of
information. Each memory location is identified by a unique address. Addresses usually
begin with a value 0. 4 bits represents a nibble; 8 bits is called a byte. Memories are
generally byte addressable i.e. each group of 8 bits can be uniquely addressed. Machine
may have word size more than 8 bits, may be 16, 32 or 64 bits. This implies the number of
bits that can be processed at a time may be more than 8, and memory can still be byte
addressable. In a byte addressable memory where one word consist of multiple of bytes,
address of the word is determined by the lowest address byte, hence machines may be
word addressable where each word i.e. (No. of bits in one row) has a unique address or
byte addressable (group of 8 bits of a row) has a unique address. Instructions have to be
brought into main memory (RAM) so that CPU may execute them. CPU cannot access the
data present in disk drives. In RAM each memory location can be accessed in same amount
of time. Each row of RAM has an address and data present in that address is called its
content. Operations performed with memory are-Read from a location or Write to a
location.
Consider a notation used for memory 2MX32. This implies that memory has 2M words i.e. 2
x 220 words. Each word is of 32 bits i.e. 221 rows and 32 columns of a double dimensional
array. This implies that we can store 221 different data items in memory hence we require
21 bits to uniquely identify a location of memory.

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Value addition Table


Calculate number of bits required

To count from 0 to 3 in binary (for a total of 4 items), we need 2 bits. To count from
0 to 7 in binary (for a total of 8 items), we need 3 bits. To count from 0 to 15 in
binary (for a total of 16 items), we need 4 bits.
The correct answer in above table for 5th column is 5 bits. In general, if a computer
has 2^N addressable units of memory it requires n bits to uniquely identify each
byte. In order to be able to move a word in and out of the memory, a distinct
address has to be assigned to each word. This address will be used to determine the
location in the memory in which a given word is to be stored. This is called a
memory write operation. Similarly, the address will be used to determine the
memory location from which a word is to be retrieved from the memory. This is
called a memory read operation. Typically, memory read and memory write
operations are performed by the central processing unit (CPU).
Reference: The Essentials of Computer Organization And
Architecture (second edition) Author Linda Null and Julia Lobur
Copyright 2012 by Jones and Barlett Learning. LLC

Remember: All instructions and data are both stored in memory.

Value addition: Do You Know?


What does it mean to say you have a "16-bit" or a "32-bit" processor?
It refers to the size of each word in memory of processor. i.e. no of bits in
each word

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Value addition Historical/Intellectual Context


Processor Specifications
Many confusing specifications often are quoted in discussions of processors.
This section discusses some of these specifications, including the data bus,
address bus, and speed. Processors can be identified by two main
parameters: how wide they are and how fast they are. The speed of a
processor is a fairly simple concept. Speed is counted in megahertz (MHz) and
gigahertz (GHz), which means millions and billions, respectively, of cycles per
secondand faster is better! Three main specifications in a processor are
expressed in width. They are
Data bus
Address bus
Internal registers
Data Bus Note that the processor data bus is also called the front side bus
(FSB), processor side bus (PSB), or just CPU bus. The number of bits a
processor is designated can be confusing. All modern processors have 64-
bit data buses; however, that does not mean they are classified as 64-
bit processors. Processors such as the Pentium 4 and Athlon XP are 32-bit
processors because their internal registers are 32 bits wide, although their
data I/O buses are 64 bits wide and their address buses are 36 bits wide
(both wider than their predecessors, the Pentium and K6 processors). The
Itanium series and the AMD Opteron and Athlon 64 are 64-bit processors
because their internal registers are 64 bits wide.
Address Bus
The address bus is the set of wires that carries the addressing information
used to describe the memory location to which the data is being sent or from
which the data is being retrieved. As with the data bus, each wire in an
address bus carries a single bit of information. This single bit is a single digit
in the address. The more wires (digits) used in calculating these addresses,
the greater the total number of address locations. The size (or width) of
the address bus indicates the maximum amount of RAM a chip can
address.
Internal registers
The size of the internal registers indicates how much information the
processor can operate on at one time and how it moves data around
internally within the chip. A register is a holding cell within the processor; for
example, the processor can add numbers in two different registers, storing
the result in a third register. The register size determines the size of data on
which the processor can operate.(see table 1.1)
Reference: Upgrading and Repairing PCs, 15th
Anniversary Edition By Scott Mueller

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Value addition: Do you know?


The difference between the 32-bit versions of an Operating System and 64-bit
versions of an Operating System
One of the greatest advantages of using a 64-bit version of an Operating is
the ability to access physical memory (RAM) that is above the 4-gigabyte
(GB) range. This physical memory is not addressable by 32-bit versions of an
Operating System. The ability to address more physical memory lets an
Operating System minimize the time that is required to swap processes in and
out of physical memory. Therefore, it can manage processes more efficiently,
because a 64-bit operating system can handle large amounts of memory
more efficiently than a 32-bit operating system, a 64-bit operating system
can be more responsive when running several programs at the same time and
switching between them frequently .This memory management feature helps
improve the overall performance of an Operating System.

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Intel and Intel-Compatible Processors and Their Data


Bus/Register Widths

Reference: Intel and Intel-Compatible Processors and Their


Data Bus/Register Widths
Upgrading and Repairing PCs, 15th Anniversary Edition
By Scott Mueller
Table 1.1

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Basic Computer Organization and Design-I

1.2.3 Machine instructions and their representation.

Instructions are stored in memory in form of bits i.e. (Binary). CPU fetches, decodes and
then executes these instructions. Instruction is a group of bits, and these bits define the
micro operations to be performed for each instruction, and their sequence. Instructions and
data, both are stored in memory. Instruction read from the memory is placed in a control
register or instruction register. The control logic decodes these bits of the instruction and
issues a sequence of micro operations for executing the instruction. The total number of
instructions supported by a computer constitutes an instruction set

Value addition: Do you know


In what order are machine instructions executed by the basic machine cycle?
Answer: In sequential order, one after another.

A computer program consists of a sequence of instructions and each instruction performs a


very basic step of computation. Depending upon the complexity and architecture, each
computer may have a limited or large number of instructions.
Each instruction is made up of different fields with at least two fields
Opcode: Indicating the type of instruction example Add, Sub, Compare
Operand: Registers or memory locations where operands are located and also location to
specify the result.
Some architecture specify one operand in the instruction and other is implicit in the
instruction, called processor register called AC (accumulator register), while others may
specify multiple operands.
The operation code or opcode is a group of bits, which define the operation to be performed.
The total number of operations available depends on the number of bits present in the
opcode. To specify 2^n distinct operations we need n bits in the opcode. For example: A
computer with 32 distinct operations will have 5 bits in the opcode field (2^5=32).Each of
the unique possible combinations represent an operation to be performed. Control unit
reads the instruction, decodes it, issues control signals, reads the operand and performs the
desired operation with this operand and another operand as processor register.

Relation between computer operation and micro operation:


An operation is a field of instruction stored in memory. It is a group of bits indicating a
specific operation such as Add, Sub, and Compare etc. The control reads the instruction and
decodes it. It then issues a sequence of control signals, and for each operation there is a
sequence of micro operations which are executed or we may say that each operation
specifies a set of micro operations to be performed in a particular sequence. These micro
operations are performed on the data stored in the registers.
An instruction specifies both the operation and data or operands on which operation is to be
performed. Data may be present in memory or registers. Memory words are identified by
their addresses. We may use a group of k bits to specify any of the 2^k possible registers.
To Summarize:
Before a program can be executed it has to be loaded into main memory.
A process is a program in execution.
A program is translated into a set of instructions specifying the operations and the data. An
instruction is a group of bits specifying the operations, data, and the sequence of micro
operations to be performed. Instructions and data, both are stored in memory.
Remember: Instructions are read from memory as words.
An important field in instruction code is the operation code field. The operation code of an
instruction is a group of bits that define operations to be performed such as add, subtract,
multiply, shift, and complement. The number of bits required for the operation code of an

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Basic Computer Organization and Design-I

instruction depends on the total number of operations available in the computer. For 2n
distinct operations, operation code must have at least n bits.
For example consider a computer with 64 distinct operations. The operation code consists
of six bits. One of the bit combinations say 100111, assigned to the AND operation. This
instruction is read from memory, the control unit decodes this operation code, issues control
signals to read an operand from memory and perform AND operation with contents of
processor registers. In one machine cycle, operations like add two numbers or subtract two
numbers are performed by the CPU.

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Basic Computer Organization and Design-I

1.2.4 Organization of simple computer system

We present here one way of organization of a computer system. We have one processor
register and an instruction code having two parts. The first part contains the operation to be
performed, while the second part contains the location of the operand which may be a
register or may be read from the memory. The second operand required for the operation is
taken from the processor register (AC).Memory is divided into two parts, one part
containing the instructions and other data. We consider here a memory unit with 4096
words and 212=4096 hence 12 bits are needed to specify an address. Each memory word
contains 16 bits; hence an instruction code consists of 16 bits. From these 16 bits, 12 bits
are needed to specify the address of the opcode, leaving 4 bits for the opcode, thus 24=16
possible operations. To execute a program (a set of instructions) the control unit reads an
instruction which is of 16 bits. From these 16 bits, 12 bits are used to specify the location or
address of the operand (from address part). Control then moves to this address and from
this location again reads the operand of 16 bits (from data part).Control unit then issues a
sequence of micro operations to execute the operation specified in the instruction with this
operand and contents of accumulator (AC).

Instruction Not an instruction

Program located in main memory

Source: self
Figure 1.8

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Basic Computer Organization and Design-I

Two main components of Instruction

Source: self
Figure 1.9

Addressing Modes

The various addressing modes in a given instruction set architecture determine how to
identify the operand (or operands) of each instruction in the given instruction format. An
addressing mode can specify a constant, a register or a location in memory. There are
mainly 3 types of addressing modes

1) Immediate

If the address part of an instruction is used to specify the actual operand instead of the
address, then the addressing mode is known as Immediate.
For example consider an instruction load #100 R1. In this the operation is to load a
value in register R1.The source of the operand is given immediately in the instruction itself.
The control need not go to a memory location to read the operand. The operand is present
in the instruction itself. Use of '#' is sometimes used to indicate that the value is an operand
itself and not an address. Immediate addressing is not considered a good programming
construct. Changing a value of an operand requires a change in every instruction using that
operand.

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Basic Computer Organization and Design-I

2) Direct Address

When the second part of the instruction code specifies the effective address
of the operand

Value addition: Image


Direct Address

Source: self

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Basic Computer Organization and Design-I

Indirect Address

When the second part of the instruction code designates an address, which contains the
address of the operand. One bit of the instruction code is used to distinguish between direct
and indirect

Value addition: Image


Indirect Address

Source: self

Let us discuss how these addressing modes are determined in an instruction using an
instruction code format.
Consider the instruction code format for a 16 bit Instruction (Fig 1.10)

Instruction Format

Source: Self
Figure 1.10

The above instruction format contains


12 bits to designate address
1 bit as mode bit for direct or indirect address
3 bits for the opcode

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Basic Computer Organization and Design-I

Direct (absolute) mode

In this addressing mode, the instruction holds the address of the operand. For example if an
instruction is to store 400 R1. This means store the value of the operand in location 400 to
register R1. Hence the source is the value at memory address 400, and destination is R1. In
this if we do not prefix the instruction with # indicating a direct addressing mode. Another
way of stating a direct instruction is using a single processor register accumulator, where
we assume it implicitly. For example Store 0x400 (0x indicating hexadecimal, total of 12
bits), would imply transfer the value of the operand located at address Ox400 to AC
register. See Figure 1.11. Consider an instruction placed at location 023. The Mode bit (I)
=0 indicating a direct address instruction. Since I=0 for direct address instruction 3 bits of
the opcode are 011 indicating say for example an AND instruction. Last 12 bits are 0100
0101 0111 converting this to hexadecimal 0x457 hence instruction becomes
0011 0100 0101 0111 or 0x(3457). This means go to location 0X457 read the operand
present at that address and perform AND operation with contents of AC register .( In this
we are assuming the second operand is implicit in AC and also the destination is AC) i.e.
instruction actually performs

AC <- AC AND M (AR)

where M(AR) reads the word present at the address specified in the instruction.

Direct Address

Direct address Example

Source: self
Figure 1.11

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Basic Computer Organization and Design-I

Indirect mode
In this the instruction does not contain the actual address of the operand, however it
contains the address of the, address of the operand. In other words the control reads the
address specified in the instruction, say location A, goes to this location i.e. location A,
again performs a read operation at this location A, and reads an address say B. This new
address B is now the actual or effective address of the operand. Control now moves to
location B and reads the operand.
For example consider the instruction:
Load (0x200)
An address within the parenthesis is used to indicate an indirect address instruction. This
instruction loads AC (AC is implicit in this instruction) with the contents of memory location
whose address is stored at location 0x200. Indirect addressing may be of two types-
Register Indirect or Memory Indirect. In Register Indirect, a register holds the address of
the operand, while in Memory Indirect a memory location holds the address of the operand.

Indirect address Example

Source: self
Figure 1.12

Instruction at location 0x022 is 1 011 0100 0101 0111. 011 says AND operation
1011 indicates indirect instruction. Instruction is 0xB457. The control goes to location 0x457
to find the address of the operand. In this instruction the address of the Operand is 0x500.
The control again goes to location 0x500 and reads the operand and performs the operation
assuming second operand in AC and also stores the result in accumulator i.e.
AC AC AND M (M (AR))

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Basic Computer Organization and Design-I

Effective address: The actual physical address of the operand.


In the example given above
Direct address Effective address is 0x457
Indirect address Effective address is 0x500.
This implies in an indirect address instruction we need two references to memory, first
reads the address of the operand, and second reads the operand therefore it is M (M (AR)).

Registers used in a basic organization of a computer system can be categorized as:


1) Data register: Holding the operands for arithmetic or logical operations.
2) Address register: It contains the address of a memory location. For example: Pointer
data type contains an address. This address may be starting address of array, or an address
of the operand, or an address of the next instruction.
3) Flag Registers: These are used to represent the status bit after an operation is
performed. For example sign bit or zero value of the result, once the operation is
performed.
The bit length of the registers may vary depending on the type of data they are holding.

Value addition: Analogy

Role of Flags
Consider the dashboard of a car. It has indicators showing speed, fuel etc. In
addition to these, there are a number of lights that automatically come up to
indicate conditions such as low fuel, headlights on, low coolant etc. Similarly
there are a number of bits that indicate status of the processor after the last
operation is performed. For example, if while performing addition of 2 positive
numbers, the sign bit changes, it may indicate the case of overflow, an error,
and result might be incorrect. Hence, these status bits or flags can be
compared to lights of car which glow to indicate a condition. Similarly, in
processor we have flag bits to indicate the status.

Reference: Computer Organization and Design


Fundamentals
By David Tarnoff

In many organizations of the computer, the flag bits or status bit are grouped as one status
register. The values in this status register are usually based on the outcome of an arithmetic
or logical operation; hence this status register is connected to ALU. This is generally used in
constructs like while and if where next statement to be executed depends on the result
of the previous instruction. This is known as Conditional Branching, where we branch to a
new location depending on the outcome of previous instruction. We perform the operation
and set the status bits. The next instruction to be executed checks these status bit and
branches to the new location depending on the value in these status bits.

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Basic Computer Organization and Design-I

Direct Indirect addressing example

Source: Self

Figure 1.13

Building a Basic Computer:

In this article, we consider designing a basic computer system, the registers required and
how they interact with memory, because instructions are stored in memory. The size of
each memory word is 16 bits and an instruction is stored in one memory word. Hence,
instruction register (IR) is of 16 bits. Memory unit has a capacity of 4096 words, each word
of 16 bits. Since 212=4096, we need 12 bits to uniquely identify an address therefore
address register (AR) is of 12 bits. This implies out of 16 bits, 12 bits will be used to specify
the address and remaining 4 bits will be used to specify the operation to be performed.
Another register is needed to store the intermediate results of computations and is called as

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Basic Computer Organization and Design-I

temporary register (TR). The operand read from the memory will be placed in data register
(DR). Another register is needed to maintain the address of the next instruction to be
executed and is named as Program Counter (PC).Program is viewed as a set of instructions,
which are executed sequentially unless next instruction is a branch instruction. For a branch
instruction this new address present in the instruction is transferred to the Program
Counter; hence the next instruction to be executed is from this new location. An input
register (INPR) and an output register (OUTR) are used for transferring information between
input/output devices and computer system. Each is of 8 bits.(see table 1.2 and figure 1.14)

Basic Registers and Memory for a Basic Computer

4096 words. Each word is of 16 bits.

Source: Self
Figure 1.14

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Basic Computer Organization and Design-I

Register for a Basic Computer

Source: Self
Table 1.2

COMMON BUS SYSTEM

The basic computer presented here has a number of registers (8 registers) and a memory
unit. Information has to be transferred across these registers, memory and control unit. An
efficient way for transferring this information is a common bus system. A bus is a group of
parallel lines on which information travels (data, address instructions). The size or width of
a Bus is the number of bits it transfers in parallel. In this example it is 16, because this is
the number of bits in a register. At any given time only one of the devices attached to the
Bus can use it to transfer information. For the common bus system we require control lines
for synchronization and lines for actually transferring the information. The connections of
the registers and memory of the basic computer are shown in figure 1.15. Output from
seven registers and memory is connected to the common bus.

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Basic Computer Organization and Design-I

Bus Components
The bus contains following components
1. Registers namely AR, IR, PC , TR, DR, AC, INPR , OUTR, Memory
2. Control variables
1. Selection variables: to select the source register.
2. Enable ( load) : selects the destination to receive information

Since for selecting a source there are 7 possibilities (INPR is not a source for the common
BUS), we need 3 selection variables (S0, S1, and S2).
For example if S2, S1, S0 = 011, then the output of DR is selected as an input to the
common bus.

Reference: Computer System Architecture Morris Mano


Figure 1.15
Load/enable input (LD): Register whose load is enabled, reads the data present on the
common bus during the next clock transition.

INR: increments the contents of the register CLR: clear the contents of the register to zero
Hence if S2S1S0 =011, value present in DR is placed onto the bus. Outputs from the
common bus are connected to the input of each register and memory .The register whose
load is enabled will receive this data. Memory is selected for read/write operation if S 2S1S0

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Basic Computer Organization and Design-I

=111. A read /write operation is performed depending on whether a read/write input of


memory is enabled.
Program counter contains an address and if PC is incremented it points to the address of the
next instruction to be executed. This address is loaded into the AR to read the instruction
from memory.
Accumulator takes input from ALU, DR, AC and INPR and is used in operations such as
ADD DR to AC, AND DR to AC.
Note: INPR is not connected to Bus and is only connected to ALU.
AC receives the input from adder and logic circuit. ALU receives input from three different
sources. One set of inputs comes from AC itself for example in instructions like Complement
AC, SHRAC, source register and destination register are same. Operand is the contents of
AC itself. After executing the instruction the changed values are transferred to the AC.
Another set of input for AC comes from data register. The contents of DR along with the
contents of AC are used in arithmetic operations requiring two operands. For example the
add instruction actually performs the following
AC AC +DR
Contents of AC and DR are transferred to ALU; ALU performs the operation and transfers
the result back to AC. End carry if any is transferred to single bit flip flop E. Another input
for AC comes from INPR. An input device through the I/O interface transfers data to the
INPR, which finally moves to the ALU for processing or may be stored in the memory.
Transfer of data Between Data Register and Accumulator and
ALU

Source: self
Figure 1.16

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Basic Computer Organization and Design-I

The common bus has 16 lines for input because this is number of bits in the registers
These 16 bus lines are connected to the 16 inputs of six registers (AR, PC, DR, AC, IR, and
TR) and memory .Five registers have three control inputs LD, INR, Clear. Note that IR,
INPR, OUTR do not have INC or zero as a control input. These registers only have a load
input .They do not modify this information. For memory either Input to the memory (write)
or output from the memory (read) is performed .Memory address is however connected
only to AR, hence only AR can be used to perform a read from or write to memory.

Value addition: Do You Know?


Read from Memory
A read from memory always requires AR .we cannot perform M(PC) because
PC is not connected directly to memory.

Separate address bus would be required between memory and registers to enable all the
registers to access memory. The organization discussed here eliminates the need of
separate address bus at the cost of first transferring the address to AR, ( the only register
connected to memory) & then perform read from memory or write to memory.

Memory , Instruction Register and Program counter

Source: self
Figure 1.17

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Basic Computer Organization and Design-I

Connection of Address Register, Program Counter and Memory

Source: self
Figure 1.18

Instruction register is neither incremented nor cleared to zero, since its contents are used to
generate control signals for fetching, decoding and executing instructions. Temporary
Register (TR) is used to store intermediate results of operations. It can be accessed only by
CPU and not by any other unit. It can be loaded, incremented and cleared.

Incompatibility in register sizes


As discussed the common bus presented here has 16 input lines i.e. 16 bits of information
are transferred in parallel at a time between registers and bus. But AR and PC each have 12
bits hence when AR and PC are selected for transferring information to the bus, the 4 most
significant bits are given a value of 0. Conversely if AR or PC receives information from the
bus then least 12 significant bits are transferred from bus to these registers.

Transfer bits between 2 Registers of different lengths

IR

Source: self
Figure 1.19

The contents of any register can be applied onto the bus and simultaneously an operation
can be performed in the adder and logic circuit during the same clock cycle. The transition
at the end of the clock pulse transfers the content of the bus into the destination register
and the output of the adder and logic circuit is transferred into AC. For example, consider
the two micro operations

AC<--DR, DR<-- AC

These two micro operations can be performed simultaneously during the same clock cycle.
This is done as follows-

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Basic Computer Organization and Design-I

The selection lines have a value (S2 S1 S0 =100). Hence AC register is selected and its
contents are placed onto the bus, we enable load input of DR hence it receives the value
placed on the bus i.e. contents of AC .Simultaneously we enable load input of AC and
transfer the contents of DR through adder and logic circuit into AC. The clock transition at
the end of clock cycle performs both the operations.

1.3 Computer Instruction


1.3.1 Designing an instruction set architecture

Instruction set architecture (ISA) specifies the different types of instructions available in a
computer, the number of bits allowed per instruction (16, 32, or 64), the number of
operands (fixed or variable) in an instruction, whether the instruction set is complex or
simple, time needed to decode and execute an instruction, size of the instruction etc.. For
example a short instruction takes less space in memory and can be fetched easily, but this
may increase the number of instructions required to perform an operation. For example
consider the operation
A<--B+C
Let us specify 3 operands in an instruction say destination, source1 and source2. tWhen
this operation is translated to an instruction, we need just one instruction say add A,B,C.
For the instruction set with a single processor register organization, the above requires a
number of instructions given below
. load B (load B to AC)
Add C (performs AC<--AC + C)
Store A (store the result in register A)

The architectures available today differ from each other in the following aspects-
1) The ways the operands are stored in CPU. (Using registers or stack).
2) Number of operands per instruction (one, two or three).
3) Location of an operand (immediate, direct or indirect addressing.)
4) Number of operations available.
One of the basic steps of designing computer architecture is deciding the instruction set
format. Some of the key points to be kept in mind when designing an architecture are-

The space available to a program: A program is finally converted to a series of


instructions to be executed, hence number of instructions required to store a
program in memory is a direct implication of the number of instructions available.
For example whether a multiply operation would require just one step if multiply unit
is available or through a series of steps (of addition).If instructions are of fixed
length, it may be easy to decode them and also require less time as compared to a
complicated instructions with a large number of variable fields.

Memory organization: whether a machine is byte addressable or word addressable


whose word length may be 16, 32 or 64 bits.

Different types of addressing modes available and the time required for decoding or
calculating the effective address depending on the mode bit.
Number of registers present in the CPU.

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Basic Computer Organization and Design-I

1.3.2 Instruction set for the Basic Computer

Each instruction is placed in one memory word. An opcode consists of 4 bits and
2^4=16.Therefore 16 different instructions are possible. The remaining 12 bits are used for
address hence 2^12=4096 words of 16 bits each.
Instruction formats vary depending on the requirements. Instruction format for a mainframe
would be quite different from that of a microprocessor. The length of instruction, number of
fields and number of bits in each field differ in various systems, but all instruction formats
have a field called opcode and a field to determine the location of the operand. Structure
and format of other fields varies depending on the type of computer. These fields determine
the flow of data between registers, memory and Input/Output.
The computer system presented here has three instruction formats. Since instruction
register is of 16 bits, the opcode part has 3 bits and interpretation of the remaining bits
depends on the type of instruction. The three main types of instructions differ from each
other depending on the value in opcode field.
1. Memory reference instruction: It uses 12 bits to specify the address .Mode Bit,
I=0 for Direct Addressing and 1 for Indirect Addressing.
2. Register reference instruction: In this opcode has a value 111 and 0 in the
leftmost bit position. In this operand from the memory is not needed and operation
is directly performed on the processor register specified. Since we assumed only
one Processor Register (AC), in Register reference instruction the operand is implicit
(contents of AC). For example Shift AC, Complement AC. The remaining 12 bits of
the instruction register can be used to specify any one of the different register
reference instructions(see table 1.3)
3. Input/Output: It has a value 111 in opcode and 1 in the leftmost bit of instruction
register. The remaining 12 bits of the instruction register are used to specify any
one of the Input/output instructions.
Hence these types are distinguished by the first four bits of the instruction register. If the 3
bits of the code field contain a value 111 then it is either register reference or Input/Output.
The control then checks the value in the first bit of instruction register, if it is 1 it is an
Input/Output, if it is 0 then it is a register reference.
If the value in the opcode field varies from 000 to 110(0 to 6) then control interprets it as a
memory reference instruction, with first field being used to distinguish between Direct and
Indirect addresses. Bits of the opcode give 7 different possible types of memory reference
instructions. These can be combined with Input/output and register reference instructions.
See table 1.3 for the list of different types of instructions. The table uses Hexadecimal
addresses, thus reducing the number of bits required. The three Xs (XXX) represent a 12
bit hexadecimal address.

Instruction Register

Source: self
Figure 1.20

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Basic Computer Organization and Design-I

For memory reference instructions the values are interpreted as follows.


Direct memory reference Instruction---
First four bit value ranges from 0000 to 0110 i.e. hexadecimal 0 to 6. Thus instruction code
range is from 0xxx to 6xxx.
Indirect memory reference Instruction----
First four bit value ranges from 1000 to 1110 i.e. hexadecimal 8 to E. Hence instruction
code range is from 8xxx to Exxx.(see figure 1.21)

Value of Opcode determines different types of Instructions

Source: self

Figure 1.21

Register reference range starts from 0111 hence first four bits of IR are represented in
hexadecimal value as 7. The other bit positions are filled with a value 1 in any one of the bit
position for any one instruction and remaining 11 bits are zero. For example consider

Instruction Hexadecimal value Binary Instruction Value


Clear AC 7800 0111 1000 0000 0000
Clear E 7400 0111 0100 0000 0000

Similarly we keep on changing the position of the bit whose value is 1, thus leading to
different type of register reference instructions.
Input output range: the first four bit positions are 1111 thus the value F in hexadecimal.
For a particular I/O instruction any one bit position is set to 1 and others are set to zero
value. For different I/O Instructions the position of this bit with value 1 keeps on changing,
leading to different types of I/O instructions.

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Basic Computer Organization and Design-I

Basic Computer Instructions


Symbol Hexadecimal Code Description
I=0 I=1
AND 0 XXX 8 XXX And memory word to AC
ADD 1 XXX 9 XXX Add memory word to ac
LDA 2 XXX A XXX Load memory word to ac
STA 3 XXX B XXX Store content of AC in
memory
BUN 4 XXX C XXX Branch unconditionally
BSA 5 XXX D XXX Branch and Save Return
address
ISZ 6 XXX E XXX Increment and skip if Zero

CLA 7800 Clear Accumulator


CLE 7400 Clear E
CMS 7200 Complement AC
CME 7100 Complement E
CIR 7080 Circular right AC and E
CIL 7040 Circular left AC and E
INC 7020 Increment AC
SPA 7010 Skip next instruction if AC
positive
SNA 7008 Skip next instruction if AC
negative
SZA 7004 Skip next instruction if AC
Zero
SZE 7002 Skip next instruction if E
zero
HLT 7001 Halt Computer

INP F800 Input character to AC


OUT F400 Output character from AC
SKI F200 Skip on input Flag
SKO F100 Skip on Output Flag
ION F080 Interrupt On
IOF F040 Interrupt Off
Reference: Computer System Architecture Morris Mano

Table1.3

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Basic Computer Organization and Design-I

Value addition: Image


3 different Instruction Formats

1)

Source: self

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Basic Computer Organization and Design-I

1.3.2Instruction Set Completeness

Instruction Types
A program is a set of instructions; hence the instruction set of computer should be capable
of executing any program written by the user. Instructions are generally classified into four
categories.
1. Instructions for performing calculations/modifications of data such as arithmetic,
logical and shift.
2. Instructions for transferring information between memory and registers present in
CPU.
3. Instructions for handling branch and unconditional branch along with status bits.
4. Instruction for accepting an Input and producing an Output.

If a computer system has all these four types of instruction, then the instruction set is
complete, i.e. it can translate and execute any program written by user.

Arithmetic, logical, shift instructions

These are used to process the data entered by the user. These instructions are used for
arithmetic, logical or shift operations to modify the data present in memory and processor
registers. For example consider the instructions
ADD R1, R2, RO
SUB R1, R2, RO
The first instruction performs an addition on the data stored in registers R1 and R2 and
stores the result in RO. Similarly second instruction performs subtraction of R1 and R2 and
stores the result in RO. The operations such as multiplication, division, subtraction and
many others can all be performed with the following three instructions Add, Complement,
and Increment.
We perform, operations on binary data, and perform subtraction using 2s complement
form. Multiplication and division are usually performed by successive additions and
subtractions, since it is expensive to build circuits for them.
Logical instructions are used for bit manipulation such as AND, NOT, OR. Complement of
AND operation is NAND. All other logic operations (XOR, NOR gate) can be implemented
with above mentioned gates.

Instructions for moving information to and from memory and


processor registers

The information of computer system is largely stored in memory .However all processing of
data is done in processor registers. Hence, we must be able to exchange information
between memory and registers used for processing the data. The instructions listed here
were:
LDA: Load AC
AC receives the information from memory from the address location designated in
instruction register. Similarly
STA: Store AC
Saves the processed information from AC back to memory location specified in the
instruction.

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Basic Computer Organization and Design-I

Program control instructions


Instructions are normally executed sequentially in a computer system. However in case of
constructs like a function call or procedure call the next instruction to be executed may be
from a different location rather than in sequence. Also jump to a new location may be
conditional or unconditional. For example in case of while loop or if then else construct
different set of instructions are to be executed depending on outcome of the condition
specified .These instructions are called program control instruction since they alter the
sequence of execution of instructions. Since program counter contains the address of next
instruction to be executed, these program control instructions change the value of program
counter and the next instruction to be executed is from the new memory location whose
value is loaded in PC register. Examples include jump, conditional jump or call instruction.
Go to construct in a program is implemented using branch instruction, where we simply
load the PC with a new address location, but the present value of PC is lost i.e., program
moves to the new location and starts execution. Consider the program segment given below
R1 = M (100)
While R1! =0
{
R2 = R2 + R0
R1--
}
If the result of decrementing R1 is not equal to zero, perform the two statements again. To
implement the above statements, the set of instructions is as follows
Load 100 R1 (load a value at memory location 100 into register
Loc1: Add R2, R0 (Perform addition R2R2+R0)
Decrement R1 (R1 R1--)
Branch if not Z Loc1
Z, N, V, C are the bits used for conditional branch.
Z indicates a zero value in the register.
N indicates a negative value.
V is for overflow and C is for carry.
The call instructions are used to implement procedure and function calls. In these
instructions PC is loaded with a new value containing the address of the new location, but
the present value of PC is saved in memory location or designated register(say A). When
the function or procedure terminates the control resumes execution from the location where
the function was called. This is achieved by loading the PC with the earlier saved address.
The BUN, BSA and ISZ instructions listed in table 1.3 are included in this category.
Always remember: Loops and branches require machine instructions that alter the
normal sequence

Input/output Instructions
These instructions provide the communication between Computer System and peripheral
devices. Data from the user is transferred to the system through input instruction. It
transfers the data from an input device such as keyboard/mouse through an I/O interface to
the processor. Each of these input devices have a designated address. For example,
keyboard may be associated with an input port of address 100.Hence the instruction Input
100 will be used to transfer data from keyboard to an input register and then to processor
register, usually AC. Similarly, if printer is associated with port number of address 200 then
the instruction Output 200 causes the value in the processor register (usually AC) to be
moved to the output register and finally to the output device associated with address of 200
i.e., Printer. Given below are a few examples to show how information is exchanged
between computer and outside world.

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Basic Computer Organization and Design-I

Computer acting as a storage device

Source: self
Figure 1.22
In figure 1.22 Computer may act as a storage device to store the data received from any
source say internet. Downloaded data through an input port moves to the CPU where it may
be processed by the ALU (Arithmetic logic unit), moves back to CPU and then is transferred
by the CPU to the hard disk for storage

Data movement from an Input device to computer

Source: self
Figure 1.23

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Basic Computer Organization and Design-I

In figure 1.23 both input and output operation are involved. Data from an input device say
keyboard is moved through an input port to CPU, then it is processed by ALU .After
processing it may be stored in hard disk or displayed on the screen .For display data is
moved to an output device by the CPU through an output port.

Processing from storage to I/O

Source: self
Figure 1.24

In figure 1.24 data present within the memory is first transferred to CPU, and then to ALU if
processing is required .ALU again transfers it to CPU and then CPU through an output
interface moves it to an output device say printer

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Basic Computer Organization and Design-I

Value addition: Historical/Intellectual Context


Real World Examples Of Computer Architecture

The Intel Corporation has produced many different architectures Intels first popular
chip the 8086, was introduced in 1979 and used in the IBM PC computer. It handled
16-bit data and worked with 20-bit addresses, thus it could address a million bytes
of memory. .) The 8086 CPU was split into two parts: the execution unit, which
included the general registers and the ALU, and the bus interface unit, which
included the instruction queue, the segment registers, and the instruction pointer.
The 8086 had four 16-bit general purpose registers named AX (the primary
accumulator), BX (the base register used to extend addressing), CX (the count
register), and DX (the data register) An 8086 assembly language program was
divided into different segments, special blocks or areas to hold specific types of
information. There was a code segment (for holding the program), a data segment
(for holding the programs data), and a stack segment (for holding the programs
stack). To access information in any of these segments, it was necessary to specify
that items offset from the beginning of the corresponding segment. Therefore,
segment pointers were necessary to store the addresses of the segments.
In 1980, Intel introduced the 8087, which added floating-point instructions to
the 8086 machine set as well as an 80-bit wide stack. Many new chips were
introduced that used essentially the same ISA as the 8086, including the 80286 in
1982 (which could address 16 million bytes) and the 80386 in 1985 (which could
address up to 4 billion bytes of memory). The 80386 was a 32-bit chip the first in a
family of chips often called IA-32 (for Intel Architecture. 32-bit). When Intel moved
from the 16-bit 80286 to the 32-bit 80386, designers wanted these architectures to
be backward compatible which means that programs written for a less powerful and
older processor should run on the newer, faster processors. For
example, programs that ran on the 80286 should also run on the 80386. Therefore,
Intel kept the same basic architecture and register sets. (New features were added
to each successive model, so forward compatibility was not guaranteed.)
80386 and 80486 were both 32 bit machines with 32 bit Data Bus.80486 added a
high speed cache memory
The Pentium started with the Pentium processor, which had 32-bit registers and a
64-bit data bus and employed a superscalar design. The CPU had multiple ALUs and
could issue more than one instruction per clock cycle (i.e., run instructions in
parallel). The Pentium Pro added branch prediction, while the Pentium II added MMX
technology to deal with multimedia. The Pentium III added increased support for 3D
graphics (using floating point instructions). Historically, Intel used a classic CISC
approach throughout its processor series. The more recent Pentium II and III used a
combined approach employing CISC architectures with RISC cores that could
translate from CISC to RISC instructions.
The seventh generation family of Intel CPUs introduced the Intel Pentium 4 (P4)
processor. This processor differs from its predecessors in several ways. Pentium 4
processor has clock rates of 1.4GHz (and higher), uses more than 42 million
transistors for the CPU. This new micro architecture is composed of several
innovative technologies, including a hyper-pipeline, a 400MHz (and faster) system
bus, and many refinements to cache memory and floating-point operations. Hence
P4 is an extremely useful processor for multimedia applications..
The introduction of the Itanium processor in 2001 marked Intels first 64-bit chip
(IA-64). Itanium includes a register-based programming language and a very rich
instruction set. It also employs a hardware emulator to maintain backward
compatibility with IA-32/x86 instruction sets. This processor has 4 integer units, 2

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floating point units, a significant amount of cache memory at 4 different levels, 128
floating point registers, 128 integer registers, and multiple miscellaneous registers
for dealing with efficient loading of instructions in branching situations. Itanium can
address up to 16GB of main memory.

Source: (copyright) The Essentials of Computer Organization


And Architecture(second edition) Author Linda Null and Julia
Lobur

Summary
A computer system is viewed as a hierarchy of layers.
Each layer performs a specific function. These different levels or layers help in
minimizing the gap between applications such as high level programming language
and actual physical components such as wires, gates and transistors.

Stored program concept.


An important development for computer systems was the stored program concept
given by Von Neumann. This chapter presented a basic simple architecture of a
computer system, describing an instruction and its components.

CPU is the main component of a computer system.


It consists of a data path consisting of registers, ALU, and bus system. The bus
system helps in transforming information between ALU, registers, memory and CPU.

Control Unit functions as a decision maker.

Control unit interprets the instructions of a program, decides the sequencing of


operations, data movement and generation of timing signals. All components use
these timing signals to work together as a single system.

General purpose registers.


General purpose registers contain data or temporary results.

Special purpose registers.


They are used for accessing memory location, for storing the next address of the
instruction to be executed, status registers, register to hold the instruction read from
memory so that it may be decoded and executed.

Instruction set Architecture.


The core elements of the instruction set architecture include registers, data types,
instruction format, addressing schemes, instruction types etc. Most computer
systems used today have many register sets. Instructions vary in size, type and
number of operands present.

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Designing an ISA
When an ISA is designed, many important decisions are made such as length of
instructions, number of registers, types of addressing schemes.

Large VS small Instruction Set


Large instruction set imply longer instructions hence more time to fetch and decode,
but program may require less number of instructions thus saving space. Instructions
with fixed and short length are easy to decode and fast to execute but require more
space.

An Instruction specifies the location of an operand.


Operands may be located in memory, stack or registers. One memory word may
contain one instruction or it may be split in more than one word depending on length
of instruction and word size of memory.

An instruction may contain


o Opcode and data (immediate)
o Opcode and address of the operand(direct)
o Opcode and address of the address of the operand (indirect)
o Data only.

Instruction Classification.
Instructions can be classified into different categories such as data movement,
arithmetic, logical, program control and input/output.

The function of input system is to receive information from the user and deliver it to
the computer system.

Output is to deliver the information from the system to the user.

Exercises

1.1 What is the function of a CPU?

1.2 What is the function of control unit?

1.3 What are the different types of registers and where are they located?

1.4 How does the ALU know which function to perform?

1.5 Explain the difference between clock cycles and clock frequency.

1.6 Is micro operation same as machine instruction?

1.7 A digital computer has a memory unit with 20 bits in one word. The instruction set
consists of 128 different operations. All instructions have an (opcode) and an address
part. Each instruction is stored in one word of memory.
a) How many bits are needed for the opcode?
b) How many bits are needed for the address part of the instruction?

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c) What is the maximum possible memory size?


d) What is the largest unsigned binary number that can be accommodated in one
word of memory?

1.8 A computer has a memory unit of 1024 words of 32 bits each. An instruction is
stored in stored in one memory word. The instruction has four parts: a Mode bit, an
opcode, a register code and an address part. There are 128 registers.
a) How many bits are present in the opcode, the register code, and the address?
b) What is the number of bits needed for data input of memory?

1.9 Give the difference between various addressing modes indicating the number of
memory accesses required to bring an operand into processor register?

1.10 Explain how the following register transfer statements are executed through the
common bus System?
a) IR<M (AR)
b) M [AR] <DR
c) AC <DR, DR<AC (done simultaneously)
d) DR M(AR)
e) PC AR

1.11 Can the following micro operations be executed in a single clock pulse? If yes how?
If no, why not?
a) DR<M (PC)
b) AC<AC+TR
c) DR<AC+DR
d) AC<AC+DR

1.12 A Computer has a memory unit of 4096 words. One word of memory consists of 6
bits while an address requires 12 bits. A memory-reference instruction consists of
three words: a 6-bit operation-code (one word) and a 12-bit address (in the next two
words. Suppose PC contains a value 000000000001.Assume instructions are being
executed sequentially,
a) What value will be value loaded next in the PC?
b) Show how the instruction is placed in main memory?

1.13 The memory unit of a Computer has 256 K words, each of 32 bits each. An
instruction is present in one memory word. Instruction format has four fields: an op
code field, a mode field to specify addressing modes, a register address field and a
memory address field. There are 6 addressing modes and 64 registers.
a) What is the length of the mode field?
b) What is the length of the register field?
c) What is the length of the address field?
d) What is the length of the opcode field?

1.14 A memory reference instruction consists of two words and is present at location X.
Let Y denote the address field of this instruction (stored at X + 1). The operand used
during the execution of the instruction is stored at an address Z. Show how Z is
calculated from the other addresses if the addressing mode of the instruction is
a) Direct
b) Indirect

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1.15 Consider a computer system classified as 64 bit processor and having an address
bus 32 bits wide. The instruction has two fields; the first field contains the opcode
and the other immediate operand or address
a) What is the number of bits in program counter and instruction register?
b) What is the maximum memory capacity (in bytes)?
c) What is the advantage of having a 64 bit local address bus as compared to 32 bit
address bus?
d) What is the advantage of having a 64 bit data bus as compared to 32 bit data
bus?

1.16 What is the difference between Computer architecture and organization?


1.17 The computer system discussed here had 4 bits in opcode field and remaining 12 bits
for address. Does this limit the maximum number of operations to 16? Explain.

Glossary
Absolute address : An address in a computer Language that identifies a storage location or
a device without the use of an intermediate reference.

Access Time: The length of time required for a binary Word in the memory section of a
computer to be read by the Central Processing unit (CPU), or the time to read data from a
peripheral data storage area.

Accumulator: The name of the CPU registers in a single -address instruction format. The
accumulator or AC is implicitly one of the two operands

Address space :The range of addresses (memory, I/O) that can be referenced.

Arithmetic and Logic unit (ALU): A part of a computer that performs arithmetic operations,
logic operations and related operations.

Bus :A shared Communication path consisting of more than one line, since the paths are
shared only one device can transmit at a time.

Clock - A digital pulse generator that controls the timing of a computer determines the
speed (number of steps per second) of the computer.

Direct (Absolute): The address of the memory location that holds the operand is included in
the instruction.

Immediate operand: When the second part of an instruction code specifies an operand, the
instruction is said to have an immediate operand.

Instruction: A group of Binary codes that determines the operation to be performed

Indirect mode: The instruction contains a name of a register or a memory location that
holds the (effective) address of the operand.

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Instruction set architecture: An instruction set architecture (ISA), is the part of the
computer architecture related to programming, including the basic data types, instructions,
registers, addressing modes, memory architecture, interrupt and exception handling, and
external I/O. An ISA includes the set of opcodes (machine language), and the actual
commands implemented by a particular processor.
Instruction set architecture is distinguished from the microarchitecture, which is the set of
processor design techniques used to implement the instruction set
Program Counter (PC) - A special-purpose register in the CPU which contains the address of
the next instruction to be fetched.

Process: An instance of a program in execution

Von Neumann architecture: A stored-program architecture in which there is a single


processor that operates sequentially on data that is stored in the same physical memory
and in the same format as the instructions.

Word: The set of bits handled by a computer as a primary unit of data. The width (number
of bits) of a computer word depends on the hardware design. Wider words imply higher
levels of precision, higher speed, and complex instructions. Each location in memory
contains one word.

64-bit processor A processor that has 64-bit registers

References

1: Works Cited
Computer Organization and Architecture: Designing for Performance
By William Stallings

Computer Organization and Design Fundamentals By David Tarnoff

The Essentials of Computer Organization and Architecture (second edition) By Linda Null
and Julia Lobur.

Computer System Architecture By Morris Mano

Fundamentals Of Computer organization and Architecture By Mustafa Abd-El-Barr Hesham

Upgrading and Repairing PCs, 15th Anniversary Edition By Scott Mueller

2: Suggested Readings

Computer Architecture: A Quantitative Approach by Hennessy & Patterson

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Basic Computer Organization and Design-I

Computer Architecture and Organization by John P Hayes, Tata McGraw Hill, 1996

Computer Architecture and organization: Design Principles and Applications by B


Govindarajalu, TMH Publishing Company Ltd., 2004

Computer Architecture and Parallel Processing by Kai Hwang, Faye A Briggs , McGraw Hill
Inc, 1985

Computer Organization by Car Hamacher, Zvonks Vranesic, SafeaZaky, McGraw Hill, Vth
Edition

Digital Electronics - An Introduction to Theory and Practice by W H Gothmann

How Computers Work: Processor and Main Memory by Roger Stephen Young,

Fundamentals of Computer organization and Design by Sivarama P. Dandamudi, Springer


International Edition, 2003

Micro processor Architecture, Programming & Applications with the 8085 by Ramesh S
Goankar, Penram International Publishing (India) Pvt. Ltd., Fourth Edition, 2002

Pipelined and Parallel Computer Architecture by Sajjan G Shiva, Prentice Hall Inc, 1996,
First Edition

Structured Computer Organization by Andrew S Tanenbaum, PHI/Pearson, 4th Edition

3: Web Links

1. http://cnx.org/content/col10040/1.9/

2. http://courses.cs.vt.edu/~cs1104/SystemsOrg/COrgn_1.htm

3. http://cnx.org/content/m10263/latest/

4. http://www.tpub.com/content/et/14091/css/14091_213.htm

5. http://faculty.etsu.edu/tarnoff/ntes2150/Ch15_v02.pdf

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