343
An Optimal Power Flow Control Method of Power System using Interline
Power Flow Controller (IPFC)
S Teerathana, A. Yokoyama
The University of Tokyo
ABSTRACT
Interline Power Flow Controller (IPFC) is a new
concept of Flexible AC Transmission System
(FACTS) controller with the unique capability for
series compensation with the unique capability of
power flow management among multi-line of a
substation. Generally speaking, the IPFC employs a
number of Voltage Sourced Converters (VSCs) linked
at the same DC terminal, each of which can provide
series compensation for the selected line of the
transmission system. Through common dc link , any
inverters within the IPFC is able to transfer real
power to any other and thereby facilitate real
power transfer among the line. This paper, for
simplicity, proposes the powerful tool applied on
3-machine 9-bus test system, basic test system with
one loop, and Optimal Power Flow (OPF) method.
We can solve the OPF for the minimum cost and
balance the entire power flow at the satisfied
solution.
1. INTRODUCTION
Regulator uncertainty, cost, and lengthy delays to
transmission line construction are just a few of the
barriers that have resulted in the serious deficiency in
power transmission capacity that currently prevails in
many regions. Solving these issues requires
innovative tool on the part of all involved.
Low-environmental-impact technologies such as
Flexible AC Transmission system (FACTS) and dc
links are a proven solution to rapidly enhancing
reliability and upgrading transmission capacity on a
long-term and cost-effective basis. It has been
considered as an excellent controller in a power
system network after considerable effort on the
development of power electronics-based power flow
controller[2]. As power systems are encountering
increasing power demand, however, it becomes
difficult to build new transmission lines for power
management. The concept of FACTS controller was
timely and appropriate. Due to the advance in power
semiconductor industry, high power rating and
high-speed gate turn-off power electronic devices are
introduced practically in power system applications.
These developments provide a new generation of
FACTS controllers called VSC based FACTS
controllers with promising features in flexible power
flow control, transient stability and power system
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oscillation damping enhancement. The family of
compensators and power flow controllers based on
VSC are the Static Synchronous (shunt)
Compensator (STATCOM), the Static Synchronous
Series Compensator (SSSC) and the Unified Power
Flow Controller (UPFC). The UPFC is used as a
powerful tool for the cost effective utilization of
individual transmission lines by facilitating the
independent control both the real and reactive power
flow. While the Interline Power Flow Controller
(IPFC) concept provides a solution for the problem
of compensating a number of transmission lines at a
given substation. Any inverters within the IPFC are
able to transfer real power to any other and thereby
facilitate real power transfer among the lines,
together with independently controllable reactive
series compensation of each individual line. The
main objective of the IPFC is to optimize both real
and reactive power flow among multi-lines, transfer
power from overloaded to underloaded lines.
However, it can also be utilized to compensate
against reactive voltage drops and the corresponding
reactive line power, and to increase the effectiveness
of the compensating system against dynamic
disturbances [4].
2. INTER-LINE POWER CONTROLLER
It is common that the Interline Power Flow
Controller employs a number of dc to ac inverters in
order to offer series compensation for each line. As a
new concept for the compensation and effective
power flow management, it addresses the target of
compensating a number of transmission lines at a
given substation.
2.1 Configuration of Interline Power Flow
Controller
Generally, the Interline Power Flow Controller
(IPFC) is a combination of two or more
independently controllable static synchronous series
compensators (SSSC) which are solid-state voltage
source converters which inject an almost sinusoidal
voltage at variable magnitude and couples via a
common DC link as shown in Figure1.
Conventionally, series capacitive compensation fixed,
thyristor controlled or SSSC based, is employed to
increase the transmittable real power over a given
line and to balance the loading of a normally

Vi
Static synchronous series
compensator (SSSC)
dc common
link
Static synchronous series
compensator (SSSC)
Fig. 1. Simplified schematic of the IPFC model
V1seff
V1s V1pq
I1
P12
V2s V2pq V2seff
I2
Fig. 2. Basic Two-Inverter Interline Power Flow Controller.
encountered multi-line transmission system. They are
controlled to provide a capability to directly transfer
independent real power between the compensated
lines while maintaining the desired distribution of
reactive flow among the line [1],[3].
Consider simplified schematic of IPFC model
in figure1, each compensating inverters is linked
together at their dc terminals. With this scheme, in
addition to providing series reactive compensation,
any inverter can be controlled to supply real power to
the common dc link from its own transmission line.
Thus, an overall surplus power can be transferred
from the underutilized lines which can be used by
other lines for real power compensation. Evidently,
this arrangement maintains the overall power balance
at the common dc terminal by appropriate control
action. An elementary IPFC scheme consisting of
two back-to-back dc to ac inverters is used as a tool
to compensate a transmission line by series voltage
injection. Two synchronous voltage sources, with
phasors V1pq and V2pq, in series with transmission
line1 and 2 respectively, represent the two
back-to-back dc to ac inverters as illustrated in
figure2.
2.2 Basic operating principles of Interline Power
Flow Controller
The IPFC is designed with a combination of the
series connected VSC which can inject a voltage with
controllable magnitude and phase angle at the
fundamental frequency while DC link voltage can be
maintained at a desired level. The common dc link is
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344
represented by a bidirectional link (P12 =P1pq = -P2pq)
Vj for real power exchange between voltage sources.
Transmission line1, represented by reactance X1, has
a sending-end bus with voltage phasor V1s and a
receiving – end voltage phasor V1r. The sending
–end voltage phasor of Line2, represented by
reactance X2, is V2s and the receiving-end voltage
phasor is V2r. Simply, all the sending-end and
Vk receiving-end voltages are assumed to be constant
with fixed amplitudes, V1s = V1r = V2s = V2r =1 p.u.,
and with fixed angles resulting in identical
transmission angle s1 = s2 for the two systems. The
two line impedances, and the rating of the two
Vx1 V1r compensating voltage sources, are also assumed to be
identical. This means V1pqmax = V2pqmax and X1 = X2.
Although in practice system1 and system2 could be
X1 likely different due to different transmission line
voltage, impedance and angle. We assumed system1
is arbitrarily selected to be the prime system for
Vx2 V2r which free controllability of both real and reactive
line power flow is stipulated to derive the constraints
the free controllability of system1 forces on the
power flow control of system2. A phasor diagram of
X2
system1 illustrated in Figure3 defines the relationship
between V1s, V1r, Vx1 (the voltage phasor across X1)
and the inserted voltage phasor V1pq, with
controllable magnitude and angle. V1pq is added to
the sending-end voltage V1seff = V1s + V1pq. So V1seff –
V1r, the difference sets the compensated voltage
phasor or Vx1 across reactance X1. As 1 is varied
over its full 360 degree range, the end of phasor V1pq
moves along a circle with its center located at the end
of phasor V1s. The area within this circle defines the
operating range of phasor V1pq.
1
Vx1
V1pq
V1r
V1s
V1sef
S1
S1eff I1
Fig. 3. Phasor diagram of system 1
So line1 can be compensated. The rotation with angle
1of phasor V1pq modulates both the magnitude and
the angle of phasor Vx1 and , therefore, both the
transmitted real power, P1r, and the reactive power,
Q1r, vary with 1. This process requires the voltage
source representing Inverter1 (V1pq) to supply and
absorb both reactive, Q1pq, and real, P1pq, power.
According to the equivalent circuit of the IPFC
shown in Figure 4, the power flow equation can be
established as following [5]:
 345
V se Pji+jQji constraint under IPFC operation. The entire set of
Vi
ij
Z seij
Z seij + __
Iji
power flow equations are solved simultaneously with
the IPFC cost minimization. The objective function
Pi+jQi Vj in the OPF is usually minimized. We shall designate
the objective function as following:
Re{VseijI *ji+ VseikI *ki} = 0
Pki+jQki PQ12  PQ22 o min . (6)
Iki
__
+
The equation that guarantees that the power
Z seik . V se Vk
ik
transmitted between inverters of IPFC condition is
Fig. 4. The equivalent Circuit of the IPFC met will be designated as
n
Pi Vi 2 gii  ¦ ViV j ( gij cosTij  bij sin Tij )
j 1, j z i P12  P21 0 (7)
(1)
n
 ¦ ViVseij ( gij cos(Ti  Tseij )  bij sin(Ti  Tseij ))
j 1, j z i The OPF can also solve for an optimal solution with
n inequality constraints such as bus voltage magnitudes
Qi Vi 2bii  ¦ ViV j ( gij sin Tij  bij cosTij ) and thermal constraint designated as
j 1, j z i
(2)
n
 ¦ ViVseij ( gij sin(Ti  Tseij )  bij cos(Ti  Tseij )) V min d V i d V max (8)
j 1, j z i
P ij d P max (9)
Pji V j2 g jj  ViV j ( g ij cos(T j  T i )  bij sin(T j  T i ))
(3)All components of inserted voltage are controlled
 V jVseij ( g ij cos(T j  Tseij )  bij sin(T i  Tseij ))
variables, V 1 p ,V 1q ,V 2 p ,V 2 q .
Q ji V j2 b jj  ViV j ( g ij sin(T j  T i )  bij cos(T j  T i ))
(4)Consider real power flow between two buses as
 V jVseij ( g ij sin(T j  Tseij )  bij cos(T i  Tseij ))
­° § V j  Vseij  V i ·½°
According to the operating principle of the IPFC, Pij Re®Vseij ¨ ¸¾ (10)
°̄ ¨ Zseij ¸°
active power exchange between series connected © ¹¿
inverters via the common DC link is: Where we assumed all variable as following:
Zse 0.000  j 0.010[ p.u.]
n Vmin 0.95[ p.u.]
Psum ¦ ^ReVse I `
j 1, j z i
ij
*
ji 0 (5) Vmax 1.05[ p.u.]
Pmax 0.850 [ p.u.]

Where 3. NUMERICAL EXAMPLE IN

g in  jbin 1 / Zsein , g nn  jbnn 1 / Zsenn MULTI-MACHINE POWER SYSTEM
g ii ¦g in , bii ¦b in 3.1 3-machine 9 bus System under IPFC operation
n n
Test case in this paper is carried out on a simple
n = j, k, … power system model, 3-machine 9-bus power system
P ij = sum of the interface active power flow with two IPFCs arbitrarily established as shown in
Tse = angle of series voltage source of the figure 5. Consider the case where line 1 is selected as
FACTS controllers a prime system with an IPFC set the injected voltage
Vse = magnitude of series voltage source of phasor V1pq with a magnitude of 0.01 p.u. and angle
of 0.03+pi. Indeed, the prime inverter could be
the FACTS controllers controlled to provide any independent operating
T = bus angle
point. This would take one degree of freedom from
V = bus voltage magnitude the other inverter in system2. The operation of
secondary IPFC at line 2 is defined where a voltage
2.3 Optimal Power Flow for power system with phasor V2pq with a magnitude of 0.012781 p.u. is
IPFC injected at 0.03 radius.
The optimal power flow is a very difficult Referring to figure 6, an elementary IPFC,
mathematical programming problem. Almost every composed of voltage-sourced Converter 1 and 2 with
mathematical programming approach that can be a common dc link provides (real and reactive) series
applied to a problem has been attempted many compensation for Line 1 and 2. It shows the real
decades. For simplicity, we proposed the concept of power control by selecting a proper magnitude of
OPF method applied to a simple one loop system, V2pq while the sum of P1pq and P2pq for an ideal
3-machine 9-bus system for coping with an overload system is zero.

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 346

20
PQ1
18
PQ2
16 PQ1 + PQ2

Capacity (10-3[ p.u.])

14
12
10
8
6
4
2
0
1.2 1.3 1.4 1.5 1.6 1.7
Load [p.u.]

Fig. 8. The capacity of IPFC established at line 1 and 2 when

demanding load at node 5 is increasing

4. CONCLUSION
Fig. 5. 3-machine 9-bus power system model
Interline Power Flow Controller is a new type of
Next, the test system in figure 5 is chosen to test inverter-based FACTS controllers. Like the
power flow control capabilities of the IPFC. For STATCOM, SSSC, and UPFC, the IPFC also
simplicity, both identical voltage phasor V1pq and employs the voltage-sourced dc to ac inverter
V2pq with a magnitude of 0.1 p.u. are injected at (converter). However, while all the others purpose to
different angle, 3.4525 radius and 0.0 radius compensate a single transmission line, the IPFC is
respectively. In this way, controlling the real power supplied to manage power flow for the compensation
flow is achieved by appropriately adjusting the angle of multi-line transmission system. The basic IPFC
of IPFC in Line 1. The result is shown in figure 7. structure is based on zero net power at the common
dc terminals with the assumption that in the overall
P=0.414 P=0.411 system there is available capacity in the strong and
4 P=0.340
5 underloaded lines to provide appropriate real power
compensation for the weak and overloaded lines. In
practical if this condition is not satisfied, the basic
P=0.716
P=0.074
IPFC structure can be complemented with an
additional shunt inverter to provide the differential
P=0.0196
P=-0.0938
P=0.301 power from a suitable shunt bus which can also
P=0.302 6 provide shunt reactive compensation. That the IPFC
P=0.396
configuration offers a flexible utilization of needed
compensation assets, without any significant cost
addition, is hoped to attract much interest in utilities
Fig. 6. Real Power Flow between Bus4 and Bus5&6 to solve some difficulties in the recent power system
P=0. 417 P=0. 414
problems.
4 P=0. 062 5
5. REFERENCE
P=0. 716
[1] Laszlo Gyugyi, Kalyan k.Sen, Colin D. Schauder, “THE
P=0. 350
INTERLINE POWER FLOW CONTROLLER CONCEPT : A
P= -0.312 NEW APPROACH TO POWER FLOW MANAGEMENT IN
P= -0.0426
P = 0.298 TRANSMISSION SYSTEM” IEEE Transactions on Power
6 Delivery, Vol.14, No.3, July 1999.
P=0.3 42 P=0. 299
[2] Klaus Habur and Donal O’Leary “FACTS For Cost Effective
and Reliable Transmission of Electrical Energy.”
[3] Jianhong Chen, Tjing T.Lie, D.M. Vilathgamuwa , “Design of
An Interline Power Flow Controller”, 14th PSCC, Sevilla, 24-28
June 2002
Fig. 7. Real Power Flow under the IPFC operation by adjusting [4] Stefan Elenius “ Flexible AC Transmission Systems Combined
an angle. Compensators: Unified Power Flow Controller (UPFC) and
Interline Power Flow Controller (IPFC).”
[5] Xiao-Ping Zhang, Edmund Handschin, “Transfer Capability
2.4 3-machine 9 bus System under IPFC operation Computation of Power Systems with Comprehensive Modeling of
by OPF method Facts Controllers”, 14th PSCC, Sevilla, 24-28 June 2002
We assumed branch 3 is an overloaded line
needed a satisfied solution by IPFC established at
branch 1 and 2. Consider the increasing load bus 5,
by OPF method the minimum capacity of IPFC can
be computed to manage the power flow system as
shown in figure 8.

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