UNIT -1

Digital Time Measurement Techniques:

LECTURE NOTES # 1

Outline of the Lecture

Introduction:
Introduction:

One of the methods of measuring an unknown quantity is to measure it in terms of a standard

quantity of a known accuracy. Obviously, the accuracy of the measurement will primarily be
decided by the accuracy of the standard. Nowadays, time and frequency standards have the
best accuracy. Hence, measurements of time and frequency in terms of the standard time and
frequency, respectively, will yield the utmost accuracy. Further, the time and frequency can
be measured very conveniently by digital techniques.

There are many advantages of digital system.

It is free from mechanical movement hence, no frictional error is involved, no
controlling and damping torque is required.
Digital output can be stored and reproduced when it is required without deterioration.
Digital systems do not operate in the active region. Hence, it is independent form
various parameter like temperature, humidity, vibrations.

Disadvantages-
Instrument circuits are more complex and expensive.
Philosophy of digital measurements:

One of the methods of measuring an unknown quantity is to measure it in terms of a standard

quantity of a known accuracy. Obviously, the accuracy of the measurement will primarily be
decided by the accuracy of the standard. Nowadays, time and frequency standards have the
best accuracy. Hence, measurements of time and frequency in terms of the standard
time and frequency, respectively, will yield the utmost accuracy. Further, the time and
frequency can be measured very conveniently by digital techniques.A commonly used digital
scheme for the measurement of a physical quantity x in terms of the standard time period of
clock pulses is explained in two basic steps. The quantity x is converted into an electrical
signal. This is achieved by employing a suitable transducer/sensor. There are number of
transducers are available which converts the quantity x to be measured into a measurable
voltage v.
If x is a time varying signal, so also will be v. In this case, v is sampled and
sampled value V is held for a time sufficient for the instrument to carry out the
measurement.

Nirmal kr. Pandey/Assistant professor/ E&I/ Digital Measurement Technique/2015-2016 1

 Measurement of x is done in terms of the number of clock pulses. Therefore, the
accuracy of measurement is primarily dependent upon the stability and the accuracy of
the clock.

LECTURE NOTES # 2

Outline of the Lecture

Measurement of a Time Interval between Two Events:

Let time interval tx is to be measured between two events A and B, occurring at times tA
and tB , respectively.
Considering that A comes before event B.
i.e., tA < tB
The time to pulse width converter for this case could be and SR Flip Flop as shown in
figure below. The event occurring at time tA sets the Flip Flop and that occurring at time tB
resets it. The output pulse available at Q, thus has a pulse width tx .

(a) Time of occurrence of events. (b) Time interval to pulse width converter.

Errors in time interval measurement:

If the time interval tx is very large compared to the time period Tc of the clock. Then the
standard method is sufficiently accurate but if tx becomes comparable to Tc, then it
introduces considerable error. Let

The waveform shown below shows the graphical representation of errors in time interval.

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 When b is less than equal to half of the clock period.

When b is greater than equal to half of the clock period.

LECTURE NOTES # 3

Outline of the Lecture

Vernier Technique for small time interval measurement:

The functional diagram for the time measurement using the Vernier technique is shown in
figure below. Initially, the flip flop FF is set and flip flop FF1 AND FF2 are reset. Also, the
main and the Vernier counters are cleared. At time tA, FF1 is set and the gate A1 is
enabled. The main counter starts counting the clock pulses of the main oscillator. Similarly,
at time tB , the Vernier counter starts counting the pulses from the Vernier oscillator.

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Leading edge of pulses of these two oscillators coincide, the coincident detector gives a
narrow pulse output which resets the flip flop FF. Now, both the AND gats are closed and the
readings of the tow counters are frozen. From these counter readings Nm and Nv , and the
knowledge of the time periods Tm and Tv of the two oscillators, the time interval can be
evaluated as shown below.

For simplicity, the clock pulses are shown by vertical lines. When the first event occurs at
time tA, the main clock oscillator pulses are counted. The second event occurs at time tB
after time tx and initiates the counting of Vernier oscillator pulses in the Vernier counter. By
the time tx, the main counter has counted a pulses. The time difference between the ath
main clock pulses and the first Vernier clock pulse is given by BC=b. The time difference
between the next main clock pulse and 2nd Vernier clock pulse is

The time difference between the (a+2)th main and 3rd Vernier clock pulse is b-2T. Thus, at
every succeeding Vernier clock pulse, the time difference reduces by T= the difference
between the time periods of the two clock oscillators. Thus, the initial time difference of bTm
will be overcome after b/ T = Nv Vernier clock Pulses. Note that, during the time BD, the
main counter also counts Nv pulse. Thus,

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 LECTURE NOTES # 4

Outline of the Lecture

Measurement of time interval with constraints:
:

In general we assume that event A occurs before event B. No restriction on the interval
between the two events was imposed. In many situations, the events may occur in an
arbitrary order. A new scheme is shown in figure (a) is shown to overcome the issues.
Figure b shows the waveform of the related circuits. Initially, two D- Flip Flops are cleared
by applying an appropriate CLEAR signal. The working of the circuit is self- explanatory.
From the waveforms it is clear that no matter which event occurs first, the output has a pulse
width of the time difference. An advance circuit with indicators is shown in figure (c).

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For the measurement of a periodic time T of periodic signal, a suitable signal to pulse width
converter circuit is shown in figure (a). The waveforms are shown in figure (b)

Input signal is first converted to train of positive pulses C using a zero level comparator.
Initially, to mono-stable is reset and therefore, the output G of NOR gate complement of C.
the trailing edge of the output pulse of T Flip Flop triggers to mono-stable which turn close
the NOR gate. When Q comes back to the level 0 after its time duration t., another cycle
of events will take place.

LECTURE NOTES # 5

Outline of the Lecture

Measurement of phase:

Different sources of error that affects the accuracy of phase measurement

Zero level comparators- It require some positive voltage, called the threshold
voltage, to change the output level from logic 0 to logic 1. If the input signals are
comparable with threshold value and the signal levels of these two inputs are not the same,
then error is introduced. This can be minimizing by amplification of signal prior to their
application to the zero level comparators.

High frequency- As signal frequency increases, t, the time interval between the
zero-crossing of the two waves, decreases for a particular phase difference. For higher
frequencies t becomes comparable with the time period of the clock pulses, even for a large
phase difference.

Low frequency- As the signal frequency decreases the gating time becomes
comparable with the period of thee signal frequency. This leads to an error in the

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measurement of phase difference at low frequencies. This error can be minimized by
increasing the gating time.

Resolution due to the phase detector circuit:

In practice, the resolution of the timer depends critically on the phase detector circuitry. The
maximum resolution is obtained when the phase detector circuit senses a change in phase
which occurs between the two oscillator frequencies over one cycle. Such a phase
detector can be constructed using a high speed voltage comparator. This comparator
should be designed to give logic 1 output when the voltage difference at its input is greater
than its threshold voltage. Thus, following a phase of the output is changed by 180 degree
relative to the input signal. By allowing the comparator output to set a D-type flip flop
which is clocked continuously by the Vernier oscillator, a single pulse output is obtained
when a null point is reached. In practice, square waves at the leading and trailing edges
can be considered as sinusoidal waves. Let the outputs of main and the Vernier oscillators
be expressed, around these edges, as vm= A sin wmt and vv= A sin (wvt-), respectively.

For resolution calculations, tx is the value that can be measured in one cycle of
oscillations.

Since in the vicinity of the phase coincidence the signals are small, sinx is approximately x.
hence, the difference signal seen by the comparator is

At the time of phase coincidence (which takes place after one cycle)

The limit to resolution is reached when the threshold voltage Vt of the comparator equals
D. Thus,

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 LECTURE NOTES # 6

Outline of the Lecture

Time interval between two events defined by voltage levels:

The measurement of the time interval between two instants t1 and t2 at which a
monotonically time varying signal attains the voltage levels VH and VL, respectively, will
now be considered. Such a decreasing / increasing signal is, in practice, invariably associated
with an increasing / decreasing signal such as vi shown in figure (a). We shall consider a
monotonically decreasing signal first. One possible scheme of measurement is shown in
figure (b). Note that the voltage transfer characteristic of the comparator follows the
path ABCD for increasing values of vi and DCEFBA for decreasing values of vi.

A practical circuit realization for the measurement between two events with help of voltage
level is shown in figure below. In this circuit two comparators named as C1 & C2, one JK
Flip Flop and one AND Gate is being used. Output of comparators are connected to clear and
preset of JK Flip Flop respectively, they are connected in such a manner that as soon as
output of comparator switches from 0 to 1 the Flip Flop starts toggling.

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 LECTURE NOTES # 7

Outline of the Lecture

Measurement of Quality factor for ringing circuit:

In this circuit, the three components are all in series with the voltage source. The
governing differential equation can be found by substituting into Kirchhoff's voltage
law(KVL) the constitutive equation for each of the three elements. From KVL,

Where VR & VL are the voltages across R, L and C respectively and is the time
varying voltage from the source. Substituting in the constitutive equations,

For the case where the source is an unchanging voltage, differentiating and dividing
by L leads to the second order differential equation:

This can usefully be expressed in a more generally applicable form:

and are both in units of angular frequency. is called the neper frequency,
orattenuation, and is a measure of how fast the transient response of the circuit will die away

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after the stimulus has been removed. Neper occurs in the name because the units can also be
considered to be nepers per second, neper being a unit of attenuation. is the angular
resonance frequency.
For the case of the series RLC circuit these two parameters are given by:

A useful parameter is the damping factor, which is defined as the ratio of these two,

In the case of the series RLC circuit, the damping factor is given by,

The value of the damping factor determines the type of transient that the circuit will exhibit.
Plot showing underdamped and overdamped responses of a series RLC circuit. The critical
damping plot is the bold red curve. The plots are normalised for L = 1, C = 1

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 LECTURE NOTES # 8

Outline of the Lecture

Decibel meter:

The Decibel (dB) value of a voltage V with respect to a reference voltage VR is given by

A Decibel meter (dB meter) measures the dB value. dB represents the compressed value of
the signal. A logarithmic amplifier based on the exponential V-I characteristics of a PN
junction can be used for dB conversion. However, the PN Junction is too sensitive to
temperature variations and, therefore, requires temperature compensation. The circuit for
generation the exponential waveform is shown in figure below

If V1 and V2 be the voltages at times T1 and T2, respectively.

Multiplying both sides by 20 log10 we get

Where Thus, dB value of V1 with respect to voltage V2 equals

the product of K and the time difference . Based on the relation, dB can be
evaluated by using the circuit.

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A microcontroller AT89C2051 can be used in a dB meter to reduce the hardware circuit
complexity through software. It has in built precision voltage comparator, the output of
which, however, is not accessible for outside use.
Circuit diagram is shown below.

LECTURE NOTES # 9

Outline of the Lecture

Logarithmic ADC:

The AD83051 is an inexpensive micro-miniature logarithmic converter optimized for

determining optical power in fiber optic systems. It uses an advanced implementation of a
classic trans-linear (junction based) technique to provide a large dynamic range in a versatile
and easily used form. A single-supply voltage of between 3 V and 12 V is adequate; dual
supplies may optionally be used. The low quiescent current (typically 5 mA) permits use in
battery-operated applications. The input current, IPD, of 10 nA to 1 mA applied to the INPT
pin is the collector current of an optimally scaled NPN transistor, which converts this current
to a voltage (VBE) with a precise logarithmic relationship. A second such converter is used to
handle the reference current (IREF) applied to pin IREF. These input nodes are biased
slightly above ground (0.5 V). This is generally acceptable for photodiode applications where
the anode does not need to be grounded. Similarly, this bias voltage is easily accounted for in
generating IREF. The output of the logarithmic front end is available at Pin VLOG. The basic
logarithmic slope at this output is nominally 200 mV/decade (10 mV/dB). Thus, a 100 dB
range corresponds to an output change of 1 V. When this voltage (or the buffer output) is

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applied to an ADC that permits an external reference voltage to be employed, the AD8305
voltage reference output of 2.5 V at Pin VREF can be used to improve the scaling accuracy.
Suitable ADCs include the AD7810 (serial 10-bit), AD7823 (serial 8-bit), and AD7813
(parallel, 8-bit or 10-bit). Other values of the logarithmic slope can be provided using a
simple external resistor network. The logarithmic intercept (also known as the reference
current) is nominally positioned at 1 nA by the use of the externally generated current, IREF,
of 10 A, provided by a 200 k resistor connected between VREF, at 2.5 V, and the
reference input, IREF, at 0.5 V. The intercept can be adjusted over a wide range by varying
this resistor. The AD8305 can also operate in a log ratio mode, with the numerator current
applied to INPT and the denominator current applied to IREF. A buffer amplifier is
provided for driving a substantial load, for use in raising the basic slope of 10 mV/dB to
higher values, as a precision comparator (threshold detector), or in implementing low-pass
filters. Its rail-to- rail output stage can swing to within 100 mV of the positive and negative
supply rails, and its peak current sourcing capacity is 25 mA. It is a fundamental aspect of
translinear logarithmic converters that the small signal bandwidth falls as the current
level diminishes, and the low frequency noise-spectral density increases. At the 10 nA level,
the bandwidth of the AD8305 is about 50 kHz and increases in proportion to IPD up to a
maximum value of about 15 MHz. Using the buffer amplifier, the increase in noise level at
low currents can be addressed by using it to realize lowpass filters of up to three poles. The
AD8305 is available in a 16-lead LFCSP package and is specified for operation from 40C
to +85C.

LECTURE NOTES # 10

Outline of the Lecture

Vernier Technique for small time interval measurement:

The functional diagram for the time measurement using the Vernier technique is shown in
figure below. Initially, the flip flop FF is set and flip flop FF1 AND FF2 are reset. Also, the
main and the Vernier counters are cleared. At time tA, FF1 is set and the gate A1 is enabled.
The main counter starts counting the clock pulses of the main oscillator. Similarly, at time tB
, the Vernier counter starts counting the pulses from the Vernier oscillator.

Leading edge of pulses of these two oscillators coincide, the coincident detector gives a
narrow pulse output which resets the flip flop FF. Now, both the AND gats are closed and the
readings of the tow counters are frozen. From these counter readings Nm and Nv , and the
knowledge of the time periods Tm and Tv of the two oscillators, the time interval can be
evaluated as shown below.

For simplicity, the clock pulses are shown by vertical lines. When the first event occurs at
time tA, the main clock oscillator pulses are counted. The second event occurs at time tB,
after time tx and initiates the counting of Vernier oscillator pulses in the Vernier counter. By
the time tx, the main counter has counted a pulses.

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The time difference between the ath main clock pulses and the first Vernier clock pulse is
given by BC=b. The time difference between the next main clock pulse and 2nd Vernier
clock pulse is

The time difference between the (a+2)th main and 3rd Vernier clock pulse is b-2T. Thus, at
every succeeding Vernier clock pulse, the time difference reduces by T= the difference
between the time periods of the two clock oscillators. Thus, the initial time difference of bTm
will be overcome after b/ T = Nv Vernier clock Pulses. Note that, during the time BD, the
main counter also counts Nv pulse. Thus,

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