XOR GATE

The XOR gate is known on its extended name exclusive OR gate that produces
logic high level output only when its input has a different value. This gate offers a very
useful function in digital manipulation and processing. It is used to implement various
logical operations from code checking to code conversion.

The 7486 is a quad 2-input XOR gate IC intended to implement the exclusive OR
function. The schematic symbol and truth table are illustrated below. The power supply
lines are across pins 14 and 7.

A INPUTS OUTPUTS
Y
B A B Y
0 0 0
0 1 1
1 0 1
1 1 0

Materials: Digital trainer, 7486

The following experiment will verify the truth table of the XOR gate. Initially, do not
connect any power to the system and switch all data switches to OFF (down) position. Then,
interconnect the XOR gates as shown below:
 XOR GATE

PROCEDURE

1. Switch on the power supply. All LEDs of the DATA STATUS monitor should be OFF.
2. Fill up the table below to verify the XOR gates truth table using inputs D1 and D2.
Monitor the signals through DATA STATUS monitor IN1, IN2, and IN3.

INPUT OUTPUT
D1 D2 IN1 IN2 IN3
0 0 0 0 0
0 1 0 1 1
1 0 1 0 1
1 1 1 1 0

3. What inputs (D1/D2) are required to produce a logic low level across the output (IN3)?
(0,0)(1,1)- The inputs required are both 0 and both 1to produce a logic low level.
4. What inputs (D1/D2) are required to produce a logic high level across the output (IN3)?
(0,1)(1,0)-The inputs should have 1 high level and 1 low level to produce a logic high
level.
5. The second set of gates is composed of XOR gates 2 to 4. Note that only the outputs (IN4
to IN6) are monitored using the DATA STATUS LEDs. Fill up the table below to
determine the circuit function.

INPUTS OUTPUTS
D3 D4 D5 D6 IN4 IN5 IN6
0 0 0 0 0 0 0
0 0 0 1 0 0 1
0 0 1 0 0 1 1
0 0 1 1 0 1 0
0 1 0 0 1 1 1
0 1 0 1 1 1 0
0 1 1 0 1 0 0
0 1 1 1 1 0 1
1 0 0 0 1 1 1
1 0 0 1 1 1 0
1 0 1 0 1 0 0
1 0 1 1 1 0 1
1 1 0 0 0 0 0
1 1 0 1 0 0 1
1 1 1 0 0 1 1
1 1 1 1 0 1 0
 XOR GATE

6. What input signals (D3 to D6) are required to produce a low logic level at the output
(IN5)?
(0,0,0,0) (0,0,0,1) (0,1,1,0) (0,1,1,1) (1,0,1,0) (1,0,1,1) (1,1,0,0,) (1,1,0,1)

7. What input signals (D3 to D6) are required to produce a high logic level at the output
(IN6)?
(0,0,0,1) (0,0,1,0) (0,1,0,0) (0,1,1,1) (1,0,0,0) (1,0,1,1) (1,1,0,1) (1,1,1,0)

8. What general rule can you formulate based on the results of steps 5, 6, and 7?
(Hint: Think odd/even)
Odd no. of input produces high logic level output. Even no. of input produces low logic
level output.
 POLYTECHNIC UNIVERSITY OF THE PHILIPPINES
BATAAN BRANCH

XOR GATE
(EXPERIMENT 7)

Reporters: Pascua, Christine Joy D.

Mariveles, Candi Eunice R.

Engr. Aida I. Estacio

Instructor

February 9, 2017