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SmallRouterDesignUsing
BluespecSystemVerilog
DaianSovaM.Filip
MasterAAC
SBTRouterDesign 1
PolitehnicaUniversityBucharest AutomaticControlandComputerScienceDepartment
1. SBTRouterBlockDescription
TheSBTRouterisasimplerouterwhichhasoneinputport(8bitswide)andthreeoutputports
(also8bitswide).Itsmainfunctionalityistoreceiveinputdataononechannelandrouteittoone
ofthethreeoutputchannels.
read_pkt_data_in
(8bits) chan0(8bits)
RESETN chan2(8bits)
OUTFIFO2 EN_chan2
CLK
RDY_chan2
SBTROUTER
1.1DataPackets
Inputdataisorganizedin8bitpackets,withthefirsttwobitsbeingtheaddressbit,andtheother
sixbeingthepayload(usefuldata).Sincethereareonly3outputlanes(chan0,chan1andchan2)
andtheaddressis2bitswide,address3isillegalandpacketssenttothisaddressarediscarded
(ignored).
PAYLOAD ADDR
7.....................2 1...0
SBTPACKET
1.2InputProtocol
TherouterhasaFIFOtoholdtheinputdata(8bitswideandtwobytesdeep).Dataisdrivenonthe
inputbus(read_pkt_data_in)aslongasRDY_read_pktsignalisasserted.Ifthissignalisdeasserted
bytherouter,thismeanstheFIFOisfullandnomoredatacanbeputintotheFIFO.Whendatais
drivenontheinputbustheEN_read_pktsignalisassertedbythedatadrivertolettherouterknow
newdataisavailableontheinputbus.
SBTRouterDesign 2
PolitehnicaUniversityBucharest AutomaticControlandComputerScienceDepartment
1.3OutputProtocol
Whentherouterreceivesdata,itroutesittotheproperlane(chan0,chan1orchan2).Whenitplaces
newdataononeoftheoutputlanes,itassertsRDY_chanXsignaltoletthereceiverknowthatnew
dataisavailableonthecorrespondinglane.Whenthedataissampledbythereceiver,the
EN_chanXsignalisassertedbythereceivertolettherouterknowthatdatahasbeensampled.
Whenthedataissampled,therouterdeletesthedatafromtheFIFOandplacesthenextitemfrom
theFIFOontheproperchanXlane.
SBTRouterDesign 3
PolitehnicaUniversityBucharest AutomaticControlandComputerScienceDepartment
2. ImplementationusingBluespecSystemVerilog(BSV)
2.1. InterfaceImplementation
TheBSTRouterisimplementedinBluespecSystemVerilog(BSV).TheinterfaceoftheSBT
Routerisimplementedasaseriesofmethods:read_pktasinput,andchan0,chan1andchan2as
outputs.
interface SBT_Router_Interface;
// data input (8 bits, 1 channel)
method Action read_pkt (Byte data_in);
TheinputinterfaceisanActionmethodithasanenablesignal(EN_)whichcausestherelated
actionstotakeplaceintheclockcyclewhentheEN_signalishigh,ithasareadyRDY_signalthat
signalstothedatadriverwhendatacanbestoredintotheFIFO,andithasan8bitargumentwhich
isthe8bitinputdatabus.
TheoutputinterfaceiscomprisedofthreeActionValuemethodschanX,oneforeachoutput
channel.SincetheyareActionmethodstheyhaveanEN_enablesignal,anRDY_readysignal,and
theyreturnan8bitvaluewhichisthe8bitoutputdatabus.
2.2. Rules
ThelogicoftheSBTRouterisimplementedusingrules,whichcalltheinterfacemethods.
rule route_pkt;
let first_elem = input_fifo.first;
let addr = first_elem[1:0];
if (addr != 2'b11)
$display ("*%d* [SBT] Forwarding to CHANNEL:%h - DATA:%h",
clock, addr, first_elem[7:2]);
else
$display ("*%d* [SBT] Discarding packet with bad address -
DATA:%h | ADDR:%h", clock, first_elem[7:2], addr);
input_fifo.deq;
endrule
SBTRouterDesign 4
PolitehnicaUniversityBucharest AutomaticControlandComputerScienceDepartment
Theroute_pktruleimplementstheforwardingofdatafromtheinputFIFOtooneoftheoutput
FIFOs,iftheaddressisvalid(0,1or2).
2.3. Simulating
TheSBTRouterisinstantiatedinatoplevelmodulemkTOP.Thismoduleactsasdriver(sends
datatotherouter)andasreceiver(takesdatafromtherouter).Thisbehaviorisimplementedusing
rules.
rule send_data;
$display ("*%d* [TOP I] Sending DATA:%h | ADDR:%h", clock, data[7:2],
data[1:0]);
router.read_pkt (data);
router.packet_valid(1);
rule read_chan0;
Byte a <- router.chan0;
count <= count - 1;
Thesend_datarulepreparesavaluedatatobesenttotherouterandoneverycyclewhenitcan
send(theRDY_signaloftheread_pktmethodoftherouterisasserted)itplacesthedataonthe
inputbus.
Theread_chanXrulereadsavaluefromthecorrespondingchanneloftherouterwhentheRDY_
signalofthechanXmethodisasserted.
Theseruleswillonlyfireisthetheirimplicitconditionsaremet.TheseRDY_signalsarepartofthe
implicitconditionsoftheserulesbecausetheRDY_signalsshowwhentheintendedactionscanbe
performed.
SBTRouterDesign 5
PolitehnicaUniversityBucharest AutomaticControlandComputerScienceDepartment
3. BSVCode
3.1. SBT_Router.bsv
// File: SBT_Router.bsv
package SBT_Router;
import FIFO :: *;
interface SBT_Router_Interface;
// data input (8 bits, 1 channel)
method Action read_pkt (Byte data_in);
(* synthesize *)
module mkSBT_Router (SBT_Router_Interface);
// FIFO definitions
FIFO#(Byte) input_fifo <- mkFIFO;
FIFO#(Byte) chan0_fifo <- mkFIFO;
FIFO#(Byte) chan1_fifo <- mkFIFO;
FIFO#(Byte) chan2_fifo <- mkFIFO;
rule incr_clock;
clock <= clock + 1;
endrule
rule route_pkt;
let first_elem = input_fifo.first;
let addr = first_elem[1:0];
if (addr != 2'b11)
$display ("*%d* [SBT] Forwarding to CHANNEL:%h - DATA:%h", clock, addr,
first_elem[7:2]);
else
SBTRouterDesign 6
PolitehnicaUniversityBucharest AutomaticControlandComputerScienceDepartment
input_fifo.deq;
endrule
return first_elem;
endmethod
return first_elem;
endmethod
return first_elem;
endmethod
endmodule
endpackage
SBTRouterDesign 7
PolitehnicaUniversityBucharest AutomaticControlandComputerScienceDepartment
3.2. SBT_Top.bsv
// File: SBT_top
import SBT_Router :: *;
(* synthesize *)
module mkTop (Empty);
rule send_data;
$display ("*%d* [TOP I] Sending DATA:%h | ADDR:%h", clock, data[7:2],
data[1:0]);
router.read_pkt (data);
router.packet_valid(1);
rule read_chan0;
Byte a <- router.chan0;
count <= count - 1;
rule read_chan1;
Byte a <- router.chan1;
count <= count - 1;
rule read_chan2;
Byte a <- router.chan2;
count <= count - 1;
rule incr_clk;
clock <= clock + 1;
endrule
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PolitehnicaUniversityBucharest AutomaticControlandComputerScienceDepartment
rule end_simulation;
if (clock >= 20)
if (count == 0) $finish(0);
endrule
endmodule
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