EEN1026 Electronics II: Experiment

Experiment EB2: IC Multivibrator Circuits

Learning Outcomes

LO1: Explain the principles and operation of amplifiers and switching circuits
LO2: Analyze high and low frequency response of amplifiers
LO3: Analyze the operation of power amplifiers and switching circuits.

1.0 Objectives
To measure the frequency and duty cycle of an astable 555 timer
To measure the pulse width and duty cycle of a monostable 555 timer
To measure the frequency and duty cycle of a voltage-controlled oscillator

2.0 Apparatus
Equipment required Components required
Power Supply 1 Timer IC 555 2
Oscilloscope 1 Resistor 10k (1/4W) 2
Multimeter 1 Resistor 100k (1/4W) 1
Breadboard 1 Resistor 33k (1/4W) 1
Function Generator 1 Resistor 68k (1/4W) 1
Resistor 47k (1/4W) 1
Resistor 1k (1/4W) 2
Mylar Capacitor 0.01F 4
Potentiometer (1k) 1

3.0 Introduction

Multivibrators are circuits that are designed to have zero, one, or two stable output states. The
555 timer is one of the most popular general purpose IC multivibrators. It can be used
in a variety of applications requiring accurate time delays, oscillation, and pulse
conditioning. Signetics Corporation first introduced it as SE555 timer, which is an 8-
pin IC that can be connected with external components for either astable or monostable
operation. Figure 1 shows the simplified block diagram of a 555 timer. The circuits
name is derived from the use of an internal voltage divider between VCC and ground
using three 5k resistors. This divider chain is used to set a pair of reference voltages
for two comparators that drive the set and reset inputs of an R-S flip-flop.
EEN1026 Electronics II: Experiment

8 +VCC

7
5k
6
THRESHOLD + DISCHARGE
CONTROL _ S Q Q1
5
5k
_ 3
2 + R Q OUTPUT
_
TRIGGER
5k
4 RESET
1 GROUND

Figure 1: Block diagram of 555 Timer

Refer to Figure 1, a logic high voltage (+V0) applied to the set S input and a logic low (0V) to
the reset R input forces the output Q to high (VCC) and Q low (0V). This is referred to as the
set condition of the flip-flop. A high reset R and low set S causes the output to switch to a low
Q and a high Q . This is referred to as the reset condition of the flip-flop. The circuit latches
in either of the two states. In other words, a high S input sets Q to high; a high R input resets
Q to low. Output Q remains in a given state until triggered into the opposite state.

The comparators are simply Op-amps. Note that the upper comparator has a threshold input
(pin 6) and a control input (pin 5). In most applications, the control input is not used, so
that the control voltage equals +2VCC/3. However, applying an external voltage to this
pin provides some control over the reference voltages for both comparators. When the
voltage of pin 6 exceeds the control voltage, the high output from the Op-amp will set
the flip-flop. The high Q output from the flip-flop will turn on transistor Q 1 and
discharge the external timing capacitor connected to pin 7. The complementary signal
(logic low) of the flip-flop goes to pin 3, the output.

When the external reset (pin 4) is grounded, it inhibits the device. This ON-OFF feature is
useful sometimes. In most applications, however, the external reset is not used and pin 4 is
tied directly to the supply voltage. The inverting input of the lower comparator is called the
trigger (pin 2) and its noninverting input has a fixed voltage of +V CC/3 developed by the three
5k voltage divider. When the trigger input voltage is slightly less than +V CC/3, the Op-amp
output goes high and resets the flip-flop. Lastly, pin 1 is the chip ground, while pin 8 is the
power supply pin. The 555 timer will work with any supply voltage between 4.5 and 16V.

Monostable Operation

Figure 2a shows the 555 timer connected for monostable (one-shot) operation. It produces a
single, fixed voltage, output pulse each time a trigger pulse is applied to pin 2 (Figure 2b).
EEN1026 Electronics II: Experiment

+VCC
7 R 8

5k
6
+
C _ S Q
5k
+ _
2 R Q Vout
_
TRIGGER 3
5k
1

(a)

+VCC (pin 2)
+2VCC/3 0
+VCC 0 (pin 6 & 7)
0 (pin 3)

(b)
Figure 2: (a) Monostable operation; (b) ideal waveforms

The trigger input is a narrow pulse with a quiescent value of +V CC. When the trigger input is
slightly less than +VCC/3, the lower Op-amp has a high output and resets the flip-flop. This
cuts off the transistor, allowing the capacitor to start charging up. As the capacitor charges,
the voltage at pin 6 increases. Eventually, the voltage becomes slightly greater than the
control voltage (+2VCC/3). The output of the upper Op-amp then goes high, forcing the RS
flip-flop output to be set. As soon as Q goes high, it turns on the transistor and this quickly
discharges the capacitor. As a result, we get a triangular pulse at pin 6 & 7.

The capacitor C is charged through resistance R. For a larger RC time constant, the capacitor
will take longer time to charge to +2VCC/3. In other words, the RC time constant controls the
width of the output pulse. Solving the exponential equation for capacitor voltage gives the
formula for its pulse width as
W 1.1RC (1)

Astable Operation

Figure 3a shows the 555 timer connected for astable or free-running operation. The output is
a square-wave signal. When Q is low, the transistor is cut off and the capacitor is charged
through ( R A RB ). Because of this, the charging time constant is ( R A RB )C . When the
EEN1026 Electronics II: Experiment

voltage at pin 6 is slightly greater than +2V CC/3, the upper Op-amp has a high output and this
sets the flip-flop. With Q high, it turns on the transistor and grounds pin 7. Now the capacitor
discharges through RB . The discharging time constant is RB C . When the capacitor voltage
drops slightly below +VCC/3, the lower Op-amp has a high output and this resets the flip-flop.

+VCC
RA 8

7 5k

RB +
_ S Q
6
5k
C _
+ R Q Vout
2
_ 3
5k
1

(a)

+2VCC/3
(pin 2 & pin6)
+VCC/3
+VCC
(pin 3)
0
W
(b)
T
Figure 3: (a) Astable operation; (b) ideal waveforms

Figure 3b illustrates the waveforms; the timing capacitor has an exponentially rising and
falling voltage and the output of Q is a rectangular wave. Since the charging time constant is
longer than the discharging time constant, the output is not symmetrical; the high state lasts
longer than the low state. To specify how unsymmetrical the output is, we can define duty
cycle as
W
D100% (2)
T
Depending on the resistances R A and RB , the duty cycle is between 50 and 100 percent.
The mathematical solutions of the charging and discharging equations give the following
formulas. The output frequency is
EEN1026 Electronics II: Experiment

1.44
f (3)
( R A 2 RB )C
and the duty cycle is
R A RB
D 100% (4)
R A 2 RB
If R A is much smaller than RB , the duty cycle approaches 50 percent.

Voltage-Controlled Oscillator (Pulse Position Modulator)

The free-running multivibrator can be modified to become a voltage-controlled oscillator
(VCO). Recall that pin 5 (control) is connected to the inverting input of the upper Op-amp.
Normally, the control voltage is +2VCC/3 because of the internal voltage divider. In VCO,
however, the voltage from an external potentiometer overrides the internal voltage. In other
words, by adjusting the potentiometer, we can change the control voltage level. If we increase
Vcontrol, the capacitor will take a longer time to charge and discharge; therefore, the frequency
decreases. As a result, we can change the frequency of the circuit by varying the control
voltage.

4.0 Procedures
A. Astable 555 Timer
1. Refer to the 555 timer circuit shown in Figure 4-1. The schematic diagram does not show
the op-amps, flip-flop, and other components inside the 555 timer, but only the pins and
external components.
2. Notice that pin 5 (control) is bypassed to ground through a small capacitor, typically
0.01F. This provides some noise filtering for the control voltage.
3. Based on equations (3) and (4), calculate and record the frequencies (fcal) and duty cycles
(Dcal) for the resistances listed in Table 4-1 in Appendix D2.
4. Connect the circuit of Figure 4-1 on a breadboard (refer to Appendix C) with RA = 10k
and RB = 10k. Measure and record the supply voltage VCC(meas) with a multimeter.
5. Using an oscilloscope (set CH1 and CH2 to DC coupling and trigger source to CH1), and
connect the probes at pin 3 (CH1) and pin 6 (CH2), measure the waveforms Vout (at CH1)
and Vpin-6 (at CH2). If the circuit is functioning properly, these waveforms will be similar
to those in Figure 3(b).
6. Align the ground levels of CH1 and CH2 as indicated on Graph 4-1 in Appendix D2.
Adjust Volts/div and Time/div to display the waveforms on the screen as big as possible
with one to two cycles. Sketch Vout and Vpin-6 waveforms on Graph 4-1.
7. Measure and record the period, T and the high portion of the pulse width, W. Determine
the frequency f and duty cycle D from the measurement results.
8. Repeat steps 5 through 7 for the other resistances of Table 4-1.
9. For RA = 100 k and RB = 10 k case, measure and record the maximum and minimum
voltage levels of Vout and Vpin 6 waveforms.
10. Ask the instructor to check all of your results. You must show the last oscilloscope
waveforms to the instructor.
EEN1026 Electronics II: Experiment

VCC=+5V

RA 4 8
7 3 Vout 1 8
555
RB Timer 2
6 5 7
3 6
C1=0.01F 2 1 C2=0.01F
4 5
SE/NE555

Figure 4-1: Astable 555 Timer Circuit (TOP VIEW)

B. Monostable 555 Timer

1. IC U2 of Figure 4-2 is a 555 timer connected for monostable operation. Calculate the
pulse width for each resistance value R listed in Table 4-2. Record the results under Wcal.
2. IC U1 of Figure 4-2 is the astable multivibrator circuit of Part A. It is used here to provide
the trigger input to the monostable circuit (U2).
3. Connect the circuit of Figure 4-2 with resistance R = 33k. Measure and record VCC(meas).
4. Using an oscilloscope, measure the waveforms at pin 2, Vpin2 (at CH1) and pin 3, Vout (at
CH2) of the monostable circuit (U2). Set CH1 and CH2 to DC input coupling and trigger
source to CH1. Align the ground levels of CH1 and CH2 as indicated on Graph 4-4. Set
Time/div to display the waveforms with one to two cycles on the screen. Set Volt/div to
display the waveforms as big as possible but not overlapping. Sketch the waveforms.
5. Measure and record the pulse width, W, at the output of U2.
6. Repeat steps 4 to 5 for the other resistances R in Table 4-2.
7. For R = 68 k case, connect CH2 to pin 6, measure and record the maximum and
minimum voltage levels of pin 6 waveform.
8. Ask the instructor to check all of your results. You must show the last oscilloscope
waveforms to the instructor.
VCC=+5V

100k 4 8 4 8
R
7 3 7 3 Vout
U1 U2
10k 555 555
6 5 6 5
Timer Timer
0.01F
2 1 0.01F 2 1
0.01F
0.01F

Figure 4-2: Monostable 555 Timer Circuit

C. Voltage-Controlled Oscillator

1. Connect the voltage-controlled oscillator (VCO) of Figure 4-3 (refer to Appendix B for
the potentiometer legs). Measure and record VCC(meas).
EEN1026 Electronics II: Experiment

2. Measure the output, Vout (CH1) and pin 6, Vpin 6 (CH2) waveforms with an oscilloscope.
Set CH1 and CH2 to DC input coupling and trigger source to CH1. Align the channel
ground levels as indicated on Graph 4-5. Adjust Volts/div to display the waveforms on the
screen as big as possible.
3. Vary the 1-k potentiometer and notice the changes in the waveforms. Adjust Time/div if
necessary.
4. Turn the potentiometer to get the minimum frequency. Adjust Time/div to display the
waveforms with one to two cycles on the screen. Sketch Vout and Vpin 6 waveforms.
5. Measure and record T, W, Vpin 6 (max) and Vpin 6 (min). Measure and record the DC voltage at
pin 5, Vpin 5 with a multimeter. Calculate the frequency and duty cycle.
6. Turn the potentiometer to get the maximum frequency. Repeat steps 4 and 5.
7. Ask the instructor to check all of your results. You must show the last oscilloscope
waveforms to the instructor.

VCC=+5V
4 8
10k Vout 1k
7 3
555
A
100k Timer Var
6 5
1k
B
2 1
C1=0.01F
1k

Figure 4-3: Voltage-Controlled Oscillator Circuit

Report Submission

Submit your report on the same day immediately after the experiment.

The Resistor color code chart Capacitance

ABC .abc

APPENDIX B
AB x 10C pF 0.abc F

Potentiometer

A Var B
EEN1026 Electronics II: Experiment

Log Scale
The distance in a decade of the log scale in the figure below is x mm. Since log 101 = 0, it is
used as a refernce point (0 mm) in the linear scale. Then, the reading 10 is located at x mm
and the reading 0.1 is located at x mm. For a reading F, it is located at [1og10(F)]*x mm.
E.g.:
Reading 0.25 is located at [1og10(0.25)]*x mm = -0.602x mm
Reading 2.5 is loacted at [1og10(2.5)]*x mm = 0.398x mm
Reading 25 is located at [1og10(25)]*x mm = 1.398x mm (not shown in the figure)
Reading 250 is located at [1og10(250)]*x mm = 2.398x mm (not shown)

Conversely, a point at z mm location is read as 10 z / x .

E.g.:
-0.3x mm is read as 10(-0.3x/x) = 0.501
0.6x mm is read as 10(0.6x/x) = 3.98
1.5x mm is read as 10(1.5x/x) = 31.6 (not shown)
2.7x mm is read as 10(2.7x/x) = 501 (not shown)

-0.3x
-x -0.602x 0 0.398x0.6x x
Linear scale
(mm)

Log scale
0.1 0.2 0.3 0.5 1 2 3 4 5 6 78910
0.4 0.6 (unit)
0.25 0.7 0.9 2.5 3.98
0.501 0.8

Balachandran 14 October 2011

EEN1026 Electronics II: Experiment

Appendix C: Breadboard Internal Connections

Internal
Horizontally connected connections Horizontally connected

+VCC

0.1 F

Vertically
connected 8 7 6 5

555

Vertically 1 2 3 4

connected

0V
GND

Internal
connections
General mistakes:
The legs of the resistors and the transistor are shorted
by the breadboard internal connections.
Multimedia University FOE
Balachandran 14 October 2011
 Experiment EB2: IC Multivibrator Circuits
Lab Report
(Submit your report on the same day immediately after the experiment)
(Student who is found copying experimental results, discussions and conclusions from
other group will get zero mark in the overall experiment evaluation.)

Name: ________________________ Student I.D.: _______________ Date: __________

Majoring: ____________________ Group: ____________ Table No.: ____________

4. Astable 555 Timer

VCC(meas) = _________V [1 mark]

Table 4-1: Astable Operation for various RA and RB

RA (k) RB (k) f cal Dcal T W f D

10 10
10 100
100 10
[3 marks]
For RA = 100 k, RB = 10 k case (Step 9):
Vout (max) = ______ V VCC(meas) Vout (max) = ______ V
Vout (min) = ______ V
Vpin 6 (max) = ______ V Vpin 6 (max) / VCC(meas) = ______
Vpin 6 (min) = ______ V Vpin 6 (min) / VCC(meas) = ______
[7 marks]
Graph 4-1: Astable Operation for RA = 10 k, RB = 10 k

Time base : ______ s/div, CH1 (Vout) : ______ V/div, CH2 (Vpin 6) : ______ V/div

CH1 & CH2

ground
[5 marks]
EEN1026 Electronics II
Experiment EB2
Graph 4-2: Astable Operation for RA = 10 k, RB = 100 k

Time base : ______ s/div, CH1 (Vout) : ______ V/div, CH2 (Vpin 6) : ______ V/div

CH1 & CH2

ground

[5 marks]

Graph 4-3: Astable Operation for RA = 100 k, RB = 10 k

Time base : ______ s/div, CH1 (Vout) : ______ V/div, CH2 (Vpin 6) : ______ V/div

CH1 & CH2

ground
[5 marks]

Instructors Check (Graph 4-3)

Sign : ________ Time : _______

Remarks:
EEN1026 Electronics II
Experiment EB2
B. Monostable 555 Timer

VCC(meas) = _________V [1 mark]

Table 4-2: Monostable Operation for various R

R (k) Wcal W
33
47
68
[3 marks]

For R = 68 k case (Step 7):

Vpin 6 (max) = ______ V Vpin 6 (max) / VCC(meas) = ______
Vpin 6 (min) = ______ V
[3 marks]

Graph 4-4: Monostable Operation for R = 33 k

Time base : ______ s/div, CH1 (Vpin 2) : ______ V/div, CH2 (Vout) : ______ V/div

CH2 ground

CH1 ground

[5 marks]

Instructors Check (after Graph 4-4)

Sign : ________ Time : _______

Remarks:
EEN1026 Electronics II
Experiment EB2
C. Voltage-Controlled Oscillator

VCC(meas) = _________V [1 mark]

Graph 4-5: Voltage-Controlled Oscillator at minimum frequency

Time base : ______ s/div, CH1 (Vout) : ______ V/div, CH2 (Vpin 6) : ______ V/div

T = ________s
W = ________s
Vpin 6 (max) = ________V
Vpin 6 (min) = ________V
Vpin 5 = ________V
f = ________Hz
D = ________%

CH1 & CH2

ground

[5 + 7 marks]

Voltage-Controlled Oscillator at maximum frequency

T = ________s
W = ________s
Vpin 6 (max) = ________V
Vpin 6 (min) = ________V
Vpin 5 = ________V
f = ________Hz
D = ________%
[7 marks]

Instructors Check

Sign : ________ Time : _______

Remarks:
EEN1026 Electronics II
Experiment EB2
Discussion
A. Astable 555 Timer
1. Explain the difference between the calculated fcal and the measured f.
________________________________________________________________________
________________________________________________________________________
2. Compare the calculated Dcal to the measured D, and justify their difference.
________________________________________________________________________
________________________________________________________________________
3. Identify how the voltages Vout and Vpin 6 are related in the three graphs.
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
4. Compare between voltages VCC(meas) and Vout (max) and explain their difference.
________________________________________________________________________
5. Evaluate how WL, f and D changes when RA and/or RB are varied. Propose the expected
minimum and maximum duty cycle values.
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
[5 x 3 marks]
B. Monostable 555 Timer
1. Identify how the voltages Vout and Vpin 3 are related in the three graphs.
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
2. Describe how W changes when R is varied.
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
EEN1026 Electronics II
Experiment EB2
[2 x 3 marks]
C. Voltage-Controlled Oscillator
1. With the help of Figure 1 and Figure 3, compare and evaluate the relationships between
voltages Vpin 6 (max) and Vpin 5, as well as Vpin 6 (min) and Vpin 5. Include numerical calculations in
your answer.
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
2. Describe how W, f and D changes when the value of Vpin 5 is varied.
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
[2 x 3 marks]
Conclusion
The astable 555 timer circuit has frequency ranging from ____________ to ___________ and
duty cycle from _____________ to _____________. The frequency increases when
____________________________________________________________ and the duty cycle
increases when __________________________________________________________. The
logic-low pulse width, WL increases when _________________________________________
_________________________.
For the monostable 555 timer circuit, the pulse width ranges from __________ to _________.
The pulse width increases when ________________________________________________.
In the voltage-controller oscillator circuit, the frequency ranges from __________ to
_________ and the duty cycle ranges from __________ to __________. The decrease of the
control-pin voltage causes _____________________________________________________
___________________________________________________________________.
[15 marks]