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COMPAL CONFIDENTIAL
MODEL NAME : PAL50/52
1 1
2
E3 MACALLAN 14" UMA/ATG 2
EXPRESS 1/2 Mini Card 1/2 Mini Card Full Mini Card China TPM1.2 LPC BUS SATA
33MHz INT.Speaker LAN SWITCH
Card Flash WLAN WWAN/UWB SSX44B SATA Repeater HDA Codec PI3L720 PAGE 32
W25X64ZE MAX4951BE 92HD90B2 PAGE 30
PAGE 37 PAGE 36 PAGE 36 PAGE 36 PAGE 34
PAGE 14
PAGE 28
USB10 USB6 USB4 USB5 64M 4K sector PAGE 30
DC/DC Interface
PAGE 44
TP CONN KB CONN DELL CONFIDENTIAL/PROPRIETARY
PAGE 43 PAGE 43
LED Compal Electronics, Inc.
PAGE 45 Title
UMA Block Diagram
Size Document Number Rev
1.0
LA-6591P
Date: Monday, January 10, 2011 Sheet 2 of 66
A B C D E
5 4 3 2 1
POWER STATES
USB PORT# DESTINATION
Signal SLP SLP SLP SLP ALWAYS M SUS RUN CLOCKS
State S3# S4# S5# A# PLANE PLANE PLANE PLANE
0 JUSB2 (Right side 1)
S0 (Full ON) / M0 HIGH HIGH HIGH HIGH ON ON ON ON ON
1 JUSB3 (Right side 2)
D D
S3 (Suspend to RAM) / M3 LOW HIGH HIGH HIGH ON ON ON OFF OFF
2 JESA1 (Right Side ESATA)
S4 (Suspend to DISK) / M3 LOW LOW HIGH HIGH ON ON OFF OFF OFF
3 JUSB1 (Ext Left Side )
S5 (SOFT OFF) / M3 LOW LOW LOW HIGH ON ON OFF OFF OFF
4 WLAN
S3 (Suspend to RAM) / M-OFF LOW HIGH HIGH LOW ON OFF ON OFF OFF
5 WWAN
S4 (Suspend to DISK) / M-OFF LOW LOW HIGH LOW ON OFF OFF OFF OFF
PCH
6 JMINI3(Flash)
S5 (SOFT OFF) / M-OFF LOW LOW LOW LOW ON OFF OFF OFF OFF
7 USH->BIO
8 DOCKING
PM TABLE
9 DOCKING
+15V_ALW +3.3V_SUS +5V_RUN +3.3V_M +3.3V_M
C
SATA DESTINATION C
+5V_ALW +1.5V_MEM +3.3V_RUN +1.05V_M +1.05V_M
10 Express card
+3.3V_ALW_PCH +1.8V_RUN (M-OFF)
power SATA 0 HDD
+3.3V_RTC_LDO +1.5V_RUN
plane 11 Bluetooth
+0.75V_DDR_VTT
SATA 1 ODD/ E3 Module Bay
+VCC_CORE
12 Camera
+1.05V_RUN_VTT
SATA 2 NA
+1.05V_RUN
State 13 LCD Touch
SATA 3 NA
B
S5 S4/AC don't exist OFF OFF OFF OFF OFF PCI EXPRESS DESTINATION B
need to update Power Status and PM Table Lane 1 MINI CARD-1 WWAN
A
Port D Dock DP port 1 Lane 8 None A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT Index and Config.
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Size Document Number Rev
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD 1.0
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. LA-6591P
Date: Monday, January 10, 2011 Sheet 3 of 66
5 4 3 2 1
5 4 3 2 1
MODC_EN
HDDC_EN
EN_INVPWR FDC654P
+BL_PWR_SRC
Q21
D D
ADAPTER
SI3456BDV SI3456BDV
(Q27) (Q30)
+PWR_SRC 1.05V_VTTPWRGD
BATTERY ISL95870AH +VCC_SA +5V_HDD +5V_MOD
(PU13)
ALWON
+15V_ALW
C SN0608098 C
CHARGER +5V_ALW RUN_ON
(PU2)
SI4164DY
+3.3V_ALW (Q50)
AUX_EN_WOWL
PCH_ALW_ON
+5V_RUN
AUX_ON
SUS_ON
RUN_ON
M_ON
SN1003055RUWR
SN1003055
MAX17411 RT8209BGQW RT9026GFP TPS51311
(PU9) (PU3) (PU5) (PU4) (PU7) (PU16) SI3456 SI3456 S13456 SI3456 NTMS4920 SI3456
B (Q38) (Q49) (Q54) (Q34) (Q55) (Q58) B
1.05V_0.8V_PWROK
CPU_VTT_ON
0.75V_VR_EN
M_ON
DDR_ON
RUN_ON
Pop option
RUN_ON
CPU1.5V_S3_GATE RUN_ON
Pop option
+1.0V_LAN +3.3V_M
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
+1.05V_RUN BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Power Rail
+1.5V_CPU_VDDQ +1.5V_RUN NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. 1.0
LA-6591P
Date: Monday, January 10, 2011 Sheet 4 of 66
5 4 3 2 1
5 4 3 2 1
@ 2.2K
SMBUS Address [0x9a]
@ 2.2K
+3.3V_ALW_PCH
H14 MEM_SMBCLK 202
2N7002
C9 MEM_SMBDATA 200 DIMMA SMBUS Address [A0]
2N7002
2.2K
202
PCH
D
2.2K
+3.3V_LAN 200 DIMMB
SMBUS Address [A4] D
C8 LAN_SMBCLK 28
SML1_SMBCLK
+3.3V_ALW_PCH
2.2K 53
51 XDP2
A5 B6 2.2K SMBUS Address [TBD]
3A 3A
2.2K +3.3V_ALW SMBUS Address
2.2K
APR_EC: 0x48
B4 DOCK_SMB_CLK 127
1A SPR_EC: 0x70
129 MSLICE_EC: 0x72 2.2K
+3.3V_RUN
1A A3 DOCK_SMB_DAT DOCKING
USB: 0x59
AUDIO: 0x34 14
SLICE_BATTERY: 0x17 13 G Sensor
2.2K SMBUS Address [3B]
SLICE_CHARGER: 0x13
C
+3.3V_ALW C
2.2K
B5 LCD_SMBCLK 30
1B WWAN
A4 LCD_SMDATA 32 SMBUS Address [TBD]
1B
2.2K
KBC 2.2K
+3.3V_ALW
100 ohm 7
1C A56 PBAT_SMBCLK
6 BATTERY SMBUS Address [0x16]
1C B59 PBAT_SMBDAT 100 ohm
CONN
2.2K
+3.3V_ALW
2.2K
A50 M9
1E USH_SMBCLK
B53 L9 USH SMBUS Address [0xa4]
1E USH_SMBDAT
B B
2.2K
+3.3V_SUS
2.2K
MEC 5055 7
2B A49 CARD_SMBCLK
8 Express card SMBUS Address [TBD]
2B B52 CARD_SMBDAT
2.2K
+3.3V_ALW
2.2K
B50 10
1G CHARGER_SMBCLK
A47 9 Charger
1G CHARGER_SMBDAT SMBUS Address [0x12]
2.2K
+3.3V_ALW
2.2K
B7 BAY_SMBDAT 29
2D
30 E3 Module Bay
A A7 BAY_SMBCLK SMBUS Address [0xd2] A
2D
2.2K
+3.3V_RUN
2.2K
2A B49 DAI_SMBCLK 8 Compal Electronics, Inc.
DAI_SMBDAT 9
A/D,D/A SMBUS Address [0x30] Title
2A B48
converter SMBUS TOPOLOGY
Size Document Number Rev
1.0
LA-6591P
Date: Monday, January 10, 2011 Sheet 5 of 66
5 4 3 2 1
5 4 3 2 1
(1)PEG_RCOMPO (H22) use 4mil connect to PEG_ICOMPI, then use 4mil connect to RC2. JCPU1I
DMI
DMI_CRX_PTX_P2 A24 J32 P9 E9
16 DMI_CRX_PTX_P2 DMI_RX[2] PEG_RX#[4] VSS171 VSS244
DMI_CRX_PTX_P3 B23 H34 P8 E8
16 DMI_CRX_PTX_P3 DMI_RX[3] PEG_RX#[5] VSS172 VSS245
H31 P6 E7
DMI_CTX_PRX_N0 PEG_RX#[6] VSS173 VSS246
16 DMI_CTX_PRX_N0 G21 G33 P5 E6
DMI_CTX_PRX_N1 DMI_TX#[0] PEG_RX#[7] VSS174 VSS247
16 DMI_CTX_PRX_N1 E22 G30 P3 E5
DMI_CTX_PRX_N2 DMI_TX#[1] PEG_RX#[8] VSS175 VSS248
16 DMI_CTX_PRX_N2 F21 F35 P2 E4
DMI_CTX_PRX_N3 DMI_TX#[2] PEG_RX#[9] VSS176 VSS249
16 DMI_CTX_PRX_N3 D21 E34 N35 E3
DMI_TX#[3] PEG_RX#[10] VSS177 VSS250
PEG_RX#[11] E32 N34 VSS178 VSS251 E2
16 DMI_CTX_PRX_P0 DMI_CTX_PRX_P0 G22 D33 N33 E1
DMI_CTX_PRX_P1 DMI_TX[0] PEG_RX#[12] VSS179 VSS252
16 DMI_CTX_PRX_P1 D22 DMI_TX[1] PEG_RX#[13] D31 N32 VSS180 VSS253 D35
K27 G32
PEG_TX[6] VSS224
J29 G29
PEG_TX[7] VSS225
C17 J27 G26
eDP_TX[0] PEG_TX[8] VSS226
F16 H28 G23
eDP_TX[1] PEG_TX[9] VSS227
C16 G28 G20
eDP_TX[2] PEG_TX[10] VSS228
G15 E28 G17
eDP_TX[3] PEG_TX[11] VSS229
F28 G11
B PEG_TX[12] VSS230 B
C18 D27 F34
eDP_TX#[0] PEG_TX[13] VSS231
E16 E26 F31
eDP_TX#[1] PEG_TX[14] VSS232
D16 D25 F29
eDP_TX#[2] PEG_TX[15] VSS233
F15
eDP_TX#[3]
Sandy Bridge_rPGA_Rev1p0
Sandy Bridge_rPGA_Rev1p0
PEG Compensation
DP Compensation
+1.05V_RUN_VTT
+1.05V_RUN_VTT
1
1
RC2
RC1 24.9_0402_1%~D
24.9_0402_1%~D
2
2
PEG_COMP
EDP_COMP
eDP_COMPIO and ICOMPO signals should be shorted near PEG_ICOMPI and RCOMPO signals should be shorted and routed
A A
balls and routed with typical impedance <25 mohms with - max length = 500 mils - typical impedance = 43 mohms
PEG_ICOMPO signals should be routed with - max length = 500 mils
- typical impedance = 14.5 mohms
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
Sandy Bridge (1/6)
Size Document Number Rev
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
1.0
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. LA-6591P
Date: Monday, January 10, 2011 Sheet 6 of 66
5 4 3 2 1
5 4 3 2 1
1
+1.05V_RUN_VTT +1.05V_RUN_VTT
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
CC1561 2 1 1
1
RC12
CC65
CC66
UC2 200_0402_5%~D @ RC124 @JXDP1
@ JXDP1
1 B 1K_0402_5%~D 1 2
P
41,42 RUNPWROK
2
RUNPWROK_AND 2 2 GND0 GND1
4 1 2 PM_DRAM_PWRGD_CPU XDP_PREQ# 3 4 CFG16 CFG16 9
O RC28 130_0402_5%~D XDP_PRDY# OBSFN_A0 OBSFN_C0 CFG17
+3.3V_ALW_PCH 1 2 2 5 6 CFG17 9
2
A OBSFN_A1 OBSFN_C1
2
RC18 200_0402_5%~D 7 8
74AHC1G09GW_TSSOP5~D RC64 SYS_PWROK_XDP XDP_OBS0 GND2 GND3 CFG0
16 PM_DRAM_PWRGD 9 10 CFG0 9
3
39_0402_5%~D XDP_OBS1 OBSDATA_A0 OBSDATA_C0 CFG1
Place near JXDP1 11
OBSDATA_A1 OBSDATA_C1
12 CFG1 9
13 14
D XDP_OBS2 GND4 GND5 CFG2 D
15 16 CFG2 9
1 1
XDP_OBS3 OBSDATA_A2 OBSDATA_C2 CFG3
17 18 CFG3 9
D OBSDATA_A3 OBSDATA_C3
19 20
QC1 CFG10 GND6 GND7 CFG8
11,44 RUN_ON_CPU1.5VS3# 2 9 CFG10 21 22 CFG8 9
G SSM3K7002FU_SC70-3~D CFG11 OBSFN_B0 OBSFN_D0 CFG9
9 CFG11 23 24 CFG9 9
OBSFN_B1 OBSFN_D1
S 25 26
3
XDP_OBS4 GND8 GND9 CFG4
27 28 CFG4 9
XDP_OBS5 OBSDATA_B0 OBSDATA_D0 CFG5
29 30 CFG5 9
OBSDATA_B1 OBSDATA_D1
The resistor for HOOK2 should beplaced 31 32
XDP_OBS6 GND10 GND11 CFG6
such that the stub is very small on CFG0 net 33
OBSDATA_B2 OBSDATA_D2
34 CFG6 9
XDP_OBS7 35 36 CFG7 CFG7 9
OBSDATA_B3 OBSDATA_D3
37 GND12 GND13 38
H_CPUPWRGD 1 2 H_CPUPWRGD_XDP 39 40 CLK_XDP
RC51 CFD_PWRBTN#_XDP PWRGOOD/HOOK0 ITPCLK/HOOK4 CLK_XDP#
14,16 SIO_PWRBTN#_R 2 1K_0402_5%~D 41 42
RC6 0_0402_5%~D HOOK1 ITPCLK#/HOOK5
43 VCC_OBS_AB VCC_OBS_CD 44
CFG0 1 2 XDP_HOOK2 45 46 XDP_RST#_R
+1.05V_RUN_VTT RC71 SYS_PWROK_XDP HOOK2 RESET#/HOOK6 XDP_DBRESET#
16,41 SYS_PWROK 2 1K_0402_5%~D 47 HOOK3 DBR#/HOOK7 48
@ RC9 0_0402_5%~D 49 50
DDR_XDP_WAN_SMBDAT_R1 GND14 GND15 XDP_TDO
12,13,14,15,28,36 DDR_XDP_WAN_SMBDAT 1 2 51 SDA TD0 52
1 2 H_THERMTRIP# RC1251 2 0_0402_5%~D DDR_XDP_WAN_SMBCLK_R1 53 54 XDP_TRST#
12,13,14,15,28,36 DDR_XDP_WAN_SMBCLK SCL TRST# XDP_TDI
@ RC126 56_0402_5%~D RC127 0_0402_5%~D 55 56
H_CATERR# XDP_TCLK TCK1 TDI XDP_TMS
1 2 57 TCK0 TMS 58
@ RC128 49.9_0402_1%~D 59 60
H_PROCHOT# GND16 GND17
1 2
RC44 62_0402_5%~D JCPU1B Keep R1132, R1133, R1136-R119 SAMTE_BSH-030-01-L-D-A
for slew rate control.
A28 CPU_DMI 1 2
BCLK CLK_CPU_DMI 15
MISC
CLOCKS
C26 A27 CPU_DMI# RC13 1 2 0_0402_5%~D
PROC_SELECT# BCLK# CLK_CPU_DMI# 15
RC15 0_0402_5%~D XDP_RST#_R 2 1 PLTRST_XDP# 17
RC8 1K_0402_5%~D
C C
41 CPU_DETECT# AN34 SKTOCC#
A16 CPU_DPLL 1 2
DPLL_REF_CLK CLK_CPU_DPLL 15
A15 CPU_DPLL# RC16 1 2 0_0402_5%~D
DPLL_REF_CLK# CLK_CPU_DPLL# 15
RC17 0_0402_5%~D
1 2 CLK_XDP 1 2
H_CATERR# CLK_CPU_ITP 15
AL33 @ RC48
@RC48 0_0402_5%~D RH107 0_0402_5%~D
CATERR# CLK_XDP# 1 2 CLK_CPU_ITP# 15
RH106 0_0402_5%~D
THERMAL
D
AN33 R8 DDR3_DRAMRST#_CPU 3 1
18 H_PECI PECI SM_DRAMRST# DDR3_DRAMRST# 12
DDR3
MISC
QC2
Max 500mils BSS138W-7-F_SOT323-3~D
G
9 CLK_XDP_ITP 1 2
2
1
42,52,54 H_PROCHOT# 1 2 H_PROCHOT#_R AL32 AK1 SM_RCOMP0 @ RH109 0_0402_5%~D
RC57 56_0402_5%~D PROCHOT# SM_RCOMP[0] SM_RCOMP1 RC50
A5 9 CLK_XDP_ITP# 1 2
Close to JCBU1 SM_RCOMP[1] SM_RCOMP2 4.99K_0402_1%~D DDR_HVREF_RST @ RH108 0_0402_5%~D
A4
SM_RCOMP[2]
2
RC129 0_0402_5%~D THERMTRIP#
SM_RCOMP1/0 --> 20mil CC177
place RC129 near CPU 0.047U_0402_16V4Z~D
2
AP29 XDP_PRDY#
PRDY# XDP_PREQ#
AP27
PREQ#
AR26 XDP_TCLK 1 2
TCK 15 DDR_HVREF_RST_PCH
PWR MANAGEMENT
SM_RCOMP0
1 RC130
1
75_0402_1%~D
RC4
10K_0402_5%~D
1
CC140
140_0402_1%~D
25.5_0402_1%~D
200_0402_1%~D
RC42
RC43
RC45
2
2
UC1
2
1 5
2
A NC VCC A
14,17 PCH_PLTRST# 2 A
3 4 PCH_PLTRST#_BUF 1 2 PCH_PLTRST#_R
GND Y RC10 43_0402_5%~D Avoid stub in the PWRGD path
SN74LVC1G07DCKR_SC70-5~D while placing resistors RC25 & RC130
DELL CONFIDENTIAL/PROPRIETARY
1
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
Sandy Bridge (2/6)
Size Document Number Rev
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
1.0
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. LA-6591P
Date: Monday, January 10, 2011 Sheet 7 of 66
5 4 3 2 1
5 4 3 2 1
JCPU1D
JCPU1C
AE2 M_CLK_DDR2
D M_CLK_DDR0 13 DDR_B_D[0..63] SB_CLK[0] M_CLK_DDR#2 M_CLK_DDR2 13 D
12 DDR_A_D[0..63] AB6 M_CLK_DDR0 12 AD2 M_CLK_DDR#2 13
SA_CLK[0] M_CLK_DDR#0 DDR_B_D0 SB_CLK#[0] DDR_CKE2_DIMMB
AA6 M_CLK_DDR#0 12 C9 R9 DDR_CKE2_DIMMB 13
DDR_A_D0 SA_CLK#[0] DDR_CKE0_DIMMA DDR_B_D1 SB_DQ[0] SB_CKE[0]
C5 V9 DDR_CKE0_DIMMA 12 A7
DDR_A_D1 SA_DQ[0] SA_CKE[0] DDR_B_D2 SB_DQ[1]
D5 D10
DDR_A_D2 SA_DQ[1] DDR_B_D3 SB_DQ[2]
D3 C8
DDR_A_D3 SA_DQ[2] DDR_B_D4 SB_DQ[3] M_CLK_DDR3
D2 A9 AE1 M_CLK_DDR3 13
DDR_A_D4 SA_DQ[3] M_CLK_DDR1 DDR_B_D5 SB_DQ[4] SB_CLK[1] M_CLK_DDR#3
D6 AA5 M_CLK_DDR1 12 A8 AD1 M_CLK_DDR#3 13
DDR_A_D5 SA_DQ[4] SA_CLK[1] M_CLK_DDR#1 DDR_B_D6 SB_DQ[5] SB_CLK#[1] DDR_CKE3_DIMMB
C6 AB5 M_CLK_DDR#1 12 D9 R10 DDR_CKE3_DIMMB 13
DDR_A_D6 SA_DQ[5] SA_CLK#[1] DDR_CKE1_DIMMA DDR_B_D7 SB_DQ[6] SB_CKE[1]
C2 V10 DDR_CKE1_DIMMA 12 D8
DDR_A_D7 SA_DQ[6] SA_CKE[1] DDR_B_D8 SB_DQ[7]
C3 G4
DDR_A_D8 SA_DQ[7] DDR_B_D9 SB_DQ[8]
F10 F4
DDR_A_D9 SA_DQ[8] DDR_B_D10 SB_DQ[9]
F8 SA_DQ[9] F1 SB_DQ[10] RSVD_TP[11] AB2
DDR_A_D10 G10 AB4 DDR_B_D11 G1 AA2
DDR_A_D11 SA_DQ[10] RSVD_TP[1] DDR_B_D12 SB_DQ[11] RSVD_TP[12]
G9 SA_DQ[11] RSVD_TP[2] AA4 G5 SB_DQ[12] RSVD_TP[13] T9
DDR_A_D12 F9 W9 DDR_B_D13 F5
DDR_A_D13 SA_DQ[12] RSVD_TP[3] DDR_B_D14 SB_DQ[13]
F7 SA_DQ[13] F2 SB_DQ[14]
DDR_A_D14 G8 DDR_B_D15 G2
DDR_A_D15 SA_DQ[14] DDR_B_D16 SB_DQ[15]
G7 SA_DQ[15] J7 SB_DQ[16] RSVD_TP[14] AA1
DDR_A_D16 K4 AB3 DDR_B_D17 J8 AB1
DDR_A_D17 SA_DQ[16] RSVD_TP[4] DDR_B_D18 SB_DQ[17] RSVD_TP[15]
K5 SA_DQ[17] RSVD_TP[5] AA3 K10 SB_DQ[18] RSVD_TP[16] T10
DDR_A_D18 K1 W10 DDR_B_D19 K9
DDR_A_D19 SA_DQ[18] RSVD_TP[6] DDR_B_D20 SB_DQ[19]
J1 SA_DQ[19] J9 SB_DQ[20]
DDR_A_D20 J5 DDR_B_D21 J10
DDR_A_D21 SA_DQ[20] DDR_B_D22 SB_DQ[21] DDR_CS2_DIMMB#
J4 SA_DQ[21] K8 SB_DQ[22] SB_CS#[0] AD3 DDR_CS2_DIMMB# 13
DDR_A_D22 J2 AK3 DDR_CS0_DIMMA# DDR_B_D23 K7 AE3 DDR_CS3_DIMMB#
SA_DQ[22] SA_CS#[0] DDR_CS0_DIMMA# 12 SB_DQ[23] SB_CS#[1] DDR_CS3_DIMMB# 13
DDR_A_D23 K2 AL3 DDR_CS1_DIMMA# DDR_B_D24 M5 AD6
DDR_A_D24 SA_DQ[23] SA_CS#[1] DDR_CS1_DIMMA# 12 DDR_B_D25 SB_DQ[24] RSVD_TP[17]
M8 SA_DQ[24] RSVD_TP[7] AG1 N4 SB_DQ[25] RSVD_TP[18] AE6
DDR_A_D25 N10 AH1 DDR_B_D26 N2
DDR_A_D26 SA_DQ[25] RSVD_TP[8] DDR_B_D27 SB_DQ[26]
N8 SA_DQ[26] N1 SB_DQ[27]
DDR_A_D27 N7 DDR_B_D28 M4
DDR_A_D28 SA_DQ[27] DDR_B_D29 SB_DQ[28] M_ODT2
M10 SA_DQ[28] N5 SB_DQ[29] SB_ODT[0] AE4 M_ODT2 13
Sandy Bridge_rPGA_Rev1p0
Sandy Bridge_rPGA_Rev1p0
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
Sandy Bridge (3/6)
Size Document Number Rev
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
1.0
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. LA-6591P
Date: Monday, January 10, 2011 Sheet 8 of 66
5 4 3 2 1
5 4 3 2 1
CFG2
1
@RC51
@ RC51
1K_0402_5%~D
2
D JCPU1E D
L7 @ T1 PAD~D
RSVD28 @ T2 PAD~D
AG7
CFG0 RSVD29 @ T3 PAD~D
7 CFG0 AK28 AE7
CFG1 CFG[0] RSVD30 @ T4 PAD~D
7 CFG1 AK29
CFG[1] RSVD31
AK2 PEG Static Lane Reversal - CFG2 is for the 16x
CFG2 AL26 W8 @ T5 PAD~D
7 CFG2 CFG3 CFG[2] RSVD32
7 CFG3 AL27
CFG4 CFG[3]
7 CFG4 AK26
CFG[4] 1:(Default) Normal Operation; Lane #
CFG5 AL29 AT26 @ T6 PAD~D CFG2
7 CFG5 CFG6 AL30
CFG[5] RSVD33
AM33 @ T7 PAD~D
definition matches socket pin map definition
7 CFG6 CFG7 CFG[6] RSVD34
7 CFG7 AM31 CFG[7] RSVD35 AJ27 @ T8 PAD~D 0:Lane Reversed
CFG8 AM32
7 CFG8 CFG9 CFG[8]
7 CFG9 AM30 CFG[9]
CFG10 AM28
7 CFG10 CFG11 CFG[10] CFG4
7 CFG11 AM26 CFG[11]
@ T9 PAD~D CFG12 AN28 CFG[12]
1
@ T10 PAD~D CFG13 AN31 T8 @ T11 PAD~D
@ T12 PAD~D CFG14 CFG[13] RSVD37 @ T13 PAD~D @ RC52
AN26 CFG[14] RSVD38 J16
@ T14 PAD~D CFG15 AM27 H16 @ T15 PAD~D 1K_0402_5%~D
+VCC_GFXCORE CFG16 CFG[15] RSVD39 @ T16 PAD~D
7 CFG16 AK31 CFG[16] RSVD40 G16
CFG17 AN29
7 CFG17
2
RSVD1 CFG[17]
1 2 follow DG0.9 change to 1Kohm 5%
@RC122
@ RC122 49.9_0402_1%~D
RESERVED
@RC123
@ RC123 49.9_0402_1%~D
1 2 RSVD4
@RC121
@ RC121 49.9_0402_1%~D
RSVD46 B34 @ T23 PAD~D 0 : Enabled; An external Display Port device is
1 2 +DIMM0_1_VREF_CPU +DIMM0_1_VREF_CPU B4 A33 @ T24 PAD~D
@RC96
@ RC96 1K_0402_5%~D
+DIMM0_1_VREF_CPU
+DIMM0_1_CA_CPU D1 RSVD6 RSVD47
A34 @ T25 PAD~D
connected to the Embedded Display Port
+DIMM0_1_CA_CPU RSVD7 RSVD48
1 2 +DIMM0_1_CA_CPU B35 @ T26 PAD~D
@RC97
@ RC97 1K_0402_5%~D RSVD49 @ T27 PAD~D
C35
RSVD50
@ T28 PAD~D F25 CFG6
@ T29 PAD~D RSVD8
F24
@ T30 PAD~D RSVD9 CFG5
F23
@ T31 PAD~D RSVD10 @ T32 PAD~D
D24 AJ32
RSVD11 RSVD51
1
@ T33 PAD~D G25 AK32 @ T34 PAD~D
@ T35 PAD~D RSVD12 RSVD52 @ RC54 @ RC53
G24
@ T36 PAD~D RSVD13 1K_0402_5%~D 1K_0402_5%~D
E23
@ T37 PAD~D RSVD14
D23
@ T38 PAD~D RSVD15 @ T39 PAD~D
C30 AH27
2
@ T40 PAD~D RSVD16 VCC_DIE_SENSE
A31
@ T41 PAD~D RSVD17
B30
@ T42 PAD~D RSVD18
B29
@ T43 PAD~D RSVD19
D30 AN35 CLK_XDP_ITP 7
@ T44 PAD~D RSVD20 RSVD54
B31 AM35 CLK_XDP_ITP# 7
@ T45 PAD~D RSVD21 RSVD55
A30
@ T46 PAD~D RSVD22
C29
RSVD23
PCIE Port Bifurcation Straps
@ T47 PAD~D J20
@ T48 PAD~D RSVD24 @ T49 PAD~D
B18 AT2
RSVD25 RSVD56
@ T155 PAD~D A19
VCCIO_SEL RSVD57
AT1 @ T50 PAD~D 11: (Default) x16 - Device 1 functions 1 and 2 disabled
AR1 @ T51 PAD~D
B RSVD58 B
CFG[6:5] 10: x8, x8 - Device 1 function 1 enabled ; function 2
@ T52 PAD~D J15
RSVD27 disabled
01: Reserved - (Device 1 function 1 disabled ; function
B1 @ T53 PAD~D
KEY 2 enabled)
00: x8,x4,x4 - Device 1 functions 1 and 2 enabled
1
@ RC56
1K_0402_5%~D
2
PEG DEFER TRAINING
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Sandy Bridge (4/6)
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. 1.0
LA-6591P
Date: Monday, January 10, 2011 Sheet 9 of 66
5 4 3 2 1
5 4 3 2 1
JCPU1F POWER
+1.05V_RUN_VTT
+VCC_CORE +VCC_CORE
53AAG35 8.5A
VCC1
AG34 VCC2 VCCIO1 AH13
22U_0805_6.3VAM~D
22U_0805_6.3VAM~D
22U_0805_6.3VAM~D
22U_0805_6.3VAM~D
22U_0805_6.3VAM~D
22U_0805_6.3VAM~D
22U_0805_6.3VAM~D
22U_0805_6.3VAM~D
22U_0805_6.3VAM~D
22U_0805_6.3VAM~D
22U_0805_6.3VAM~D
1 1 1 1 1 AG33 AH10
VCC3 VCCIO2
AG32 AG10
CC67 CC75 CC76 CC77 VCC4 VCCIO3
CC68 AG31 AC10 1 1 1 1 1 1 1 1 1 1 1
D 10U_0805_4VAM~D 10U_0805_4VAM~D 10U_0805_4VAM~D 10U_0805_4VAM~D 10U_0805_4VAM~D VCC5 VCCIO4 D
AG30 Y10
2 2 2 2 2 VCC6 VCCIO5
CC78
CC69
CC79
CC80
CC81
CC82
CC83
CC84
CC85
CC70
CC86
AG29 U10
VCC7 VCCIO6
AG28 P10
VCC8 VCCIO7 2 2 2 2 2 2 2 2 2 2 2
AG27 L10
VCC9 VCCIO8
AG26 J14
VCC10 VCCIO9
AF35 J13
VCC11 VCCIO10
AF34 J12
VCC12 VCCIO11
1 1 1 1 1 AF33 J11
VCC13 VCCIO12
AF32 H14
CC87 CC71 CC72 CC88 CC73 VCC14 VCCIO13
AF31 H12
VCC15 VCCIO14
22U_0805_6.3VAM~D
22U_0805_6.3VAM~D
22U_0805_6.3VAM~D
22U_0805_6.3VAM~D
22U_0805_6.3VAM~D
330U_D2_2VM_R6M~D
330U_D2_2VM_R6M~D
330U_D2_2VM_R6M~D
10U_0805_4VAM~D 10U_0805_4VAM~D 10U_0805_4VAM~D 10U_0805_4VAM~D 10U_0805_4VAM~D AF30 H11
2 2 2 2 2 VCC16 VCCIO15
AF29 VCC17 VCCIO16 G14 1 1 1
AF28 VCC18 VCCIO17 G13 1 1 1 1 1
@ CC90
@ CC91
@ CC92
@ CC93
CC107
CC108
CC109
AF27 G12 + + + @
VCC19 VCCIO18
CC89
AF26 VCC20 VCCIO19 F14
AD35 VCC21 VCCIO20 F13
AD34 F12 2 2 2 2 2 2 2 2
VCC22 VCCIO21
AD33 VCC23 VCCIO22 F11
AD32 VCC24 VCCIO23 E14
AD31 VCC25 VCCIO24 E12
AD30 VCC26
AD29 VCC27 VCCIO25 E11
AD28 VCC28 VCCIO26 D14
AD27 VCC29 VCCIO27 D13
AD26 VCC30 VCCIO28 D12
AC35 VCC31 VCCIO29 D11
+VCC_CORE AC34 C14
VCC32 VCCIO30
AC33 VCC33 VCCIO31 C13
AC32 VCC34 VCCIO32 C12
AC31 VCC35 VCCIO33 C11
1 1 1 1 1 AC30 VCC36 VCCIO34 B14
AC29 VCC37 VCCIO35 B12
C CC110 CC111 CC112 CC113 CC114 C
AC28 VCC38 VCCIO36 A14
22U_0805_6.3VAM~D 22U_0805_6.3VAM~D 22U_0805_6.3VAM~D 22U_0805_6.3VAM~D 22U_0805_6.3VAM~D AC27 A13
2 2 2 2 2 VCC39 VCCIO37
AC26 VCC40 VCCIO38 A12
+1.05V_RUN_VTT
AA35 VCC41 VCCIO39 A11
AA34 VCC42
AA33 VCC43 VCCIO40 J23
1
AA32 VCC44
AA31 Note: Place the PU resistors close to CPU RC60
VCC45 75_0402_1%~D
1 1 1 1 1 AA30
VCC46 R1555 close to CPU 300 - 1500mils
AA29
CC115 CC116 CC117 CC118 VCC47
CC119 AA28
2
22U_0805_6.3VAM~D 22U_0805_6.3VAM~D 22U_0805_6.3VAM~D 22U_0805_6.3VAM~D 22U_0805_6.3VAM~D VCC48
AA27
2 2 2 2 2 VCC49 H_CPU_SVIDALRT#
AA26 1 2 VIDALERT_N 52
VCC50
CORE SUPPLY
Y35 RC61 43_0402_5%~D
VCC51
Y34
VCC52
Y33
VCC53
Y32
VCC54
Y31
VCC55 +1.05V_RUN_VTT
1 1 1 1 1 Y30
VCC56
Y29
CC120 CC121 CC122 CC123 CC124 VCC57 CAD Note: Place the PU
Y28
VCC58
1
22U_0805_6.3VAM~D 22U_0805_6.3VAM~D 22U_0805_6.3VAM~D 22U_0805_6.3VAM~D 22U_0805_6.3VAM~D Y27 resistors close to CPU
2 2 2 2 2 VCC59 RC63
Y26 R1558 close to CPU 300 - 1500mils
VCC60 130_0402_1%~D
V35
VCC61
SVID
V34 AJ29 H_CPU_SVIDALRT#
VCC62 VIDALERT# VIDSCLK
V33 AJ30 VIDSCLK 52
2
VCC63 VIDSCLK VIDSOUT Iccmax current changed for PDDG Rev0.7
V32 AJ28 VIDSOUT 52
VCC64 VIDSOUT
V31
VCC65
1 V30
V29
VCC66 CPU Power Rail Table
VCC67
CC125 V28 SVID note: VIDALERT# trace S0 Iccmax
VCC68
22U_0805_6.3VAM~D V27
VCC69 routing need to be routed between Voltage Rail Voltage Current (A)
B 2 V26 B
VCC70 VIDSCLK and VIDSOUT signals
U35
VCC71
U34
VCC72
VCC 0.65-1.3 53
U33
VCC73
U32
VCC74
U31
VCC75
VCCIO 1.05 8.5
U30
VCC76
U29
+VCC_CORE VCC77
U28
VCC78
VAXG 0.0-1.1 26
U27
VCC79
U26
VCC80 +VCC_CORE
R35
VCC81
VCCPLL 1.8 3
R34
VCC82
1 1 1 1 R33
VCC83
1
R32
VCC84
VDDQ 1.5 5
+ @CC129 + @CC130 + CC131 + CC132 RC66
470U_D2_2V-M~D 470U_D2_2V-M~D 470U_D2_2V-M~D 470U_D2_2V-M~D
R31
VCC85 Place RC66, RC70near CPU
R30 100_0402_1%~D
VCC86
R29
VCC87
VCCSA 0.65-0.9 6
2 3 2 3 2 3 2 3
SENSE LINES
R28
2
VCC88 VCCSENSE_R
R27 AJ35 1 2 VCCSENSE 52
VCC89 VCC_SENSE VSSSENSE_R
R26
VCC90 VSS_SENSE
AJ34 RC67 1 2 0_0402_5%~D VSSSENSE 52 +1.5V_MEM 1.5 12-16 *
P35 RC68 0_0402_5%~D
VCC91
P34
VCC92
1
P33
VCC93 VTT_SENSE_R RC70
P32 B10 1 2 VTT_SENSE 51
VCC94 VCCIO_SENSE VSSIO_SENSE_R RC1321
P31
VCC95 VSSIO_SENSE
A10 2 0_0402_5%~D VTT_GND 51 100_0402_1%~D * Description
1 1 P30 RC133 0_0402_5%~D
VCC96
P29 5A to Mem controller(+1.5V_CPU_VDDQ)
2
+ CC133 + CC134 VCC97
P28 5-6A to 2 DIMMs/channel
470U_D2_2V-M~D 470U_D2_2V-M~D VCC98
P27
VCC99 2-5A to +1.5V_RUN & +0.75V_DDR_VTT
P26
2 3 2 3 VCC100
A A
DELL CONFIDENTIAL/PROPRIETARY
Sandy Bridge_rPGA_Rev1p0
Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT Sandy Bridge (5/6)
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Size Document Number Rev
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD 1.0
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. LA-6591P
Date: Monday, January 10, 2011 Sheet 10 of 66
5 4 3 2 1
5 4 3 2 1
+1.5V_CPU_VDDQ Source
+1.5V_MEM QC3 +1.5V_CPU_VDDQ
+3.3V_ALW2 +15V_ALW AO4728L_SO8~D
8 1
7 2
1
10U_0805_6.3V6M~D
20K_0402_5%~D
@ RC73
6 3 1
CC135
RC72 5
1
100K_0402_5%~D JCPU1H
RC74
4
100K_0402_5%~D 2 AT35 AJ22
2
VSS1 VSS81
AT32 AJ19
D RUN_ON_CPU1.5VS3 VSS2 VSS82 D
AT29 AJ16
2
VSS3 VSS83
3
AT27 AJ13
VSS4 VSS84
AT25 AJ10
QC4B VSS5 VSS85
1 AT22 AJ7
RUN_ON_CPU1.5VS3# DMN66D0LDW-7_SOT363-6~D VSS6 VSS86
5 AT19 AJ4
CC136 VSS7 VSS87
AT16 AJ3
4700P_0402_25V7K~D +V_DDR_REF QC5 +V_SM_VREF_CNT VSS8 VSS88
AT13 AJ2
4
2 NTR4503NT1G_SOT23-3~D VSS9 VSS89
AT10 AJ1
VSS10 VSS90
6
AT7 AH35
VSS11 VSS91
1 3 AT4 AH34
QC4A VSS12 VSS92
AT3 AH32
DMN66D0LDW-7_SOT363-6~D VSS13 VSS93
37,41,44,49 RUN_ON 1 2 2 AR25 VSS14 VSS94 AH30
1
@ RC77 0_0402_5%~D AR22 AH29
RC78 VSS15 VSS95
AR19 AH28
1
2 100K_0402_5%~D VSS16 VSS96
42 CPU1.5V_S3_GATE 1 2 RUN_ON_CPU1.5VS3# 7,44 AR16 VSS17 VSS97 AH26
RC79 0_0402_5%~D AR13 AH25
VSS18 VSS98
1 2 AR10 AH22
2
@ RC134 0_0402_5%~D VSS19 VSS99
AR7 VSS20 VSS100 AH19
AR4 VSS21 VSS101 AH16
AR2 VSS22 VSS102 AH7
RUN_ON_CPU1.5VS3 AP34 AH4
+VCC_GFXCORE
JCPU1G
POWER AP31
AP28
AP25
VSS23
VSS24
VSS25
VSS103
VSS104
VSS105
AG9
AG8
AG4
VSS26 VSS106
AP22 VSS27 VSS107 AF6
26A AP19 VSS28 VSS108 AF5
SENSE
LINES
AT24 VAXG1 VAXG_SENSE AK35 VCC_AXG_SENSE 52 AP16 VSS29 VSS109 AF3
AT23 VAXG2 VSSAXG_SENSE AK34 VSS_AXG_SENSE 52 AP13 VSS30 VSS110 AF2
22U_0805_6.3VAM~D
22U_0805_6.3VAM~D
22U_0805_6.3VAM~D
22U_0805_6.3VAM~D
22U_0805_6.3VAM~D
22U_0805_6.3VAM~D
22U_0805_6.3VAM~D
22U_0805_6.3VAM~D
CC138
CC144
CC145
CC146
CC147
CC139
CC148
VREF
AR18 CC1792 1 0.1U_0402_10V7K~D AN19 AE27
VAXG11 VSS39 VSS119
AR17 VAXG12 AN16 VSS40 VSS120 AE26
AP24 VAXG13 SM_VREF AL1 AN13 VSS41 VSS121 AE9
AP23 CC1492 1 0.1U_0402_10V7K~D AN10 AD7
VAXG14 VSS42 VSS122
AP21 AN7 AC9
VAXG15 VSS43 VSS123
22U_0805_6.3VAM~D
22U_0805_6.3VAM~D
22U_0805_6.3VAM~D
22U_0805_6.3VAM~D
1 1 1 1 AP20
VAXG16
+V_SM_VREF should AN4
VSS44 VSS124
AC8
CC151
CC141
CC152
CC153
10U_0805_4VAM~D
10U_0805_4VAM~D
10U_0805_4VAM~D
10U_0805_4VAM~D
10U_0805_4VAM~D
10U_0805_4VAM~D
330U_D2_2VM_R6M~D
AM20 AC7 1 1 1 1 1 1 1 AM1 AB28
VAXG28 VDDQ4 PAD-OPEN 4x4m VSS56 VSS136
AM18 AC4 AL34 AB27
VAXG29 VDDQ5 VSS57 VSS137
CC161
CC162
CC163
CC164
CC165
CC166
CC167
AM17 AC1 + AL31 AB26
VAXG30 VDDQ6 VSS58 VSS138
AL24 Y7 AL28 Y9
VAXG31 VDDQ7 2 2 2 2 2 2 VSS59 VSS139
AL23 Y4 AL25 Y8
VAXG32 VDDQ8 2 VSS60 VSS140
AL21 Y1 AL22 Y6
VAXG33 VDDQ9 VSS61 VSS141
AL20 U7 AL19 Y5
VAXG34 VDDQ10 VSS62 VSS142
AL18 U4 AL16 Y3
VAXG35 VDDQ11 VSS63 VSS143
AL17 U1 AL13 Y2
VAXG36 VDDQ12 VSS64 VSS144
AK24 P7 AL10 W35
VAXG37 VDDQ13 VSS65 VSS145
AK23 P4 AL7 W34
B VAXG38 VDDQ14 VSS66 VSS146 B
AK21 P1 AL4 W33
VAXG39 VDDQ15 VSS67 VSS147
AK20 AL2 W32
VAXG40 VSS68 VSS148
AK18 AK33 W31
VAXG41 VSS69 VSS149
AK17 AK30 W30
VAXG42 VSS70 VSS150
AJ24 AK27 W29
VAXG43 VSS71 VSS151
AJ23 AK25 W28
VAXG44 VSS72 VSS152
AJ21 AK22 W27
VAXG45 VSS73 VSS153
AJ20 AK19 W26
VAXG46 VSS74 VSS154
AJ18 AK16 U9
VAXG47 VSS75 VSS155
AJ17 AK13 U8
VAXG48 VSS76 VSS156
AH24
6A AK10 U6
SA RAIL
10U_0805_4VAM~D
10U_0805_4VAM~D
10U_0603_6.3V6M~D
AH20 M26 AJ25 U2
VAXG52 VCCSA2 VSS80 VSS160
AH18 L26
VAXG53 VCCSA3
AH17 J26 1 1 1 1 1
VAXG54 VCCSA4
@ CC171
J25
VCCSA5
CC168
CC169
CC170
J24 + CC172
VCCSA6 330U_D2_2VM_R6M~D Sandy Bridge_rPGA_Rev1p0
H26
VCCSA7 2 2 2 2
H25
VCCSA8 2
1.8V RAIL
3A 1
RC137
2
0_0402_5%~D
+GND_VCC_SA 55
A6
VCCPLL2
10U_0805_4VAM~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
330U_D2_2.5VM_R6M~D
1 1 1 1 A2
VCCPLL3
CC173
CC174
CC175
CC176
+ C22 H_FC_C22
FC_C22
C24 1 2 VCCSA_VID_1 55
2 2 2 VCCSA_VID1
10K_0402_5%~D
RC138 0_0402_5%~D
1
A 2 A
RC83
Sandy Bridge_rPGA_Rev1p0
DELL CONFIDENTIAL/PROPRIETARY
2
1
+V_DDR_REF 2 +DIMM0_1_VREF_DQ +1.5V_MEM +1.5V_MEM 2-3A to 1 DIMMs/channel
Note: RD1 0_0402_5%~D JDIMM1
1 2 1 2
Check voltage tolerance of +DIMM0_1_VREF_CPU VREF_DQ VSS
JDIMMA H=5.2
2.2U_0603_6.3V6K~D
@ RD7 0_0402_5%~D 3 4 DDR_A_D4
VSS DQ4
VREF_DQ at the DIMM socket DDR_A_D0 5 DQ0 DQ5 6 DDR_A_D5
0.1U_0402_16V4Z~D
DDR_A_D1 7 8
DQ1 VSS DDR_A_DQS#0
1 1 9 VSS DQS0# 10
11 12 DDR_A_DQS0
DM0 DQS0
CD1
CD2
13 VSS VSS 14
DDR_A_D2 15 16 DDR_A_D6 +1.5V_MEM
2 2 DDR_A_D3 DQ2 DQ6 DDR_A_D7
17 DQ3 DQ7 18
8 DDR_A_DQS#[0..7]
All VREF traces should 19 VSS VSS 20
have 10 mil trace width DDR_A_D8 21 22 DDR_A_D12
DQ8 DQ12
1
DDR_A_D9 23 24 DDR_A_D13
8 DDR_A_D[0..63] DQ9 DQ13
25 26 RD27
D DDR_A_DQS#1 VSS VSS 1K_0402_1%~D D
8 DDR_A_DQS[0..7] 27 28
DDR_A_DQS1 DQS1# DM1 DDR3_DRAMRST#_R
29 30
DQS1 RESET#
8 DDR_A_MA[0..15] Populate RD1 for Intel DDR3 31 32
2
DDR_A_D10 VSS VSS DDR_A_D14
VREFDQ multiple methods M1 33 34
DDR_A_D11 DQ10 DQ14 DDR_A_D15 DDR3_DRAMRST#_R 1
35 36 13 DDR3_DRAMRST#_R 2 DDR3_DRAMRST# 7
DQ11 DQ15 RD28 1K_0402_1%~D
37 38
DDR_A_D16 VSS VSS DDR_A_D20
39 40
DDR_A_D17 DQ16 DQ20 DDR_A_D21
41 42
DQ17 DQ21
43 44
DDR_A_DQS#2 VSS VSS
Layout Note: 45
DQS2# DM2
46
DDR_A_DQS2 47 48
Place near JDIMMA 49
DQS2 VSS
50 DDR_A_D22
DDR_A_D18 VSS DQ22 DDR_A_D23
51 DQ18 DQ23 52
DDR_A_D19 53 54
DQ19 VSS DDR_A_D28
55 VSS DQ28 56
DDR_A_D24 57 58 DDR_A_D29
DDR_A_D25 DQ24 DQ29
59 DQ25 VSS 60
+1.5V_MEM 61 62 DDR_A_DQS#3
VSS DQS3# DDR_A_DQS3
63 DM3 DQS3 64
65 VSS VSS 66
DDR_A_D26 67 68 DDR_A_D30
DQ26 DQ30
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
DDR_A_D27 69 70 DDR_A_D31
DQ27 DQ31
1 1 1 1 71 VSS VSS 72
CD3
CD4
CD5
CD6
DDR_CKE0_DIMMA 73 74 DDR_CKE1_DIMMA
2 2 2 2 8 DDR_CKE0_DIMMA CKE0 CKE1 DDR_CKE1_DIMMA 8
75 VDD VDD 76
77 78 DDR_A_MA15
DDR_A_BS2 NC A15 DDR_A_MA14
8 DDR_A_BS2 79 BA2 A14 80
81 VDD VDD 82
DDR_A_MA12 83 84 DDR_A_MA11
DDR_A_MA9 A12/BC# A11 DDR_A_MA7
85 A9 A7 86
C C
87 VDD VDD 88
DDR_A_MA8 89 90 DDR_A_MA6
DDR_A_MA5 A8 A6 DDR_A_MA4
91 A5 A4 92
+1.5V_MEM 93 94
DDR_A_MA3 VDD VDD DDR_A_MA2
95 A3 A2 96
DDR_A_MA1 97 98 DDR_A_MA0
A1 A0
99 VDD VDD 100
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1 105 106
VDD VDD
@ CD13
CD8
CD9
CD10
CD11
CD12
CD14
2.2U_0603_6.3V6K~D
0.1U_0402_16V4Z~D
DDR_A_D32 129 130 DDR_A_D36
DDR_A_D33 DQ32 DQ36 DDR_A_D37
131 132 1 2 +DIMM0_1_CA_CPU
DQ33 DQ37 @ RD31 0_0402_5%~D
133 134 1 1
VSS VSS
CD15
CD16
Layout Note: DDR_A_DQS#4 135 136
DDR_A_DQS4 DQS4# DM4
137 138
Place near JDIMMA.203,204 139
DQS4 VSS
140 DDR_A_D38
DDR_A_D34 VSS DQ38 DDR_A_D39 2 2
141 142
DDR_A_D35 DQ34 DQ39
143 144
DQ35 VSS DDR_A_D44
145 146
DDR_A_D40 VSS DQ44 DDR_A_D45
147 148
DDR_A_D41 DQ40 DQ45
149 150
B DQ41 VSS DDR_A_DQS#5 B
151 152
VSS DQS5# DDR_A_DQS5
153 154
+0.75V_DDR_VTT DM5 DQS5
155 156
DDR_A_D42 VSS VSS DDR_A_D46
157 158
DDR_A_D43 DQ42 DQ46 DDR_A_D47
159 160
DQ43 DQ47
161 162
DDR_A_D48 VSS VSS DDR_A_D52
163 164
DQ48 DQ52
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
CD18
CD19
CD20
2.2U_0603_6.3V6K~D
+0.75V_DDR_VTT
CD21
CD22
205 206
2 2 GND1 GND2
FOX_AS0A626-U4SN-7F
A CONN@ A
change footprint.
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, DDRIII-SODIMM SLOT1
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. 1.0
LA-6591P
Date: Monday, January 10, 2011 Sheet 12 of 66
5 4 3 2 1
5 4 3 2 1
2-3A to 1 DIMMs/channel
All VREF traces should +DIMM0_1_VREF_DQ +1.5V_MEM +1.5V_MEM
have 10 mil trace width JDIMM2
1 VREF_DQ VSS 2
3 4 DDR_B_D4
VSS DQ4
JDIMMB H=9.2
2.2U_0603_6.3V6K~D
DDR_B_D0 5 6 DDR_B_D5
DQ0 DQ5
0.1U_0402_16V4Z~D
DDR_B_D1 7 8
DQ1 VSS DDR_B_DQS#0
8 DDR_B_DQS#[0..7] 1 1 9 VSS DQS0# 10
11 12 DDR_B_DQS0
DM0 DQS0
CD23
CD24
8 DDR_B_D[0..63] Populate RD4 for Intel DDR3 13 VSS VSS 14
DDR_B_D2 15 16 DDR_B_D6
VREFDQ multiple methods M1 2 2 DDR_B_D3 17
DQ2 DQ6
18 DDR_B_D7
8 DDR_B_DQS[0..7] DQ3 DQ7
19 20
DDR_B_D8 VSS VSS DDR_B_D12
8 DDR_B_MA[0..15] 21 22
D DDR_B_D9 DQ8 DQ12 DDR_B_D13 D
23 24
DQ9 DQ13
25 26
DDR_B_DQS#1 VSS VSS
27 28
DDR_B_DQS1 DQS1# DM1 DDR3_DRAMRST#_R
29 30 DDR3_DRAMRST#_R 12
DQS1 RESET#
Note: 31
VSS VSS
32
DDR_B_D10 33 34 DDR_B_D14
Check voltage tolerance of DDR_B_D11 35
DQ10 DQ14
36 DDR_B_D15
DQ11 DQ15
VREF_DQ at the DIMM socket 37
VSS VSS
38
DDR_B_D16 39 40 DDR_B_D20
DDR_B_D17 DQ16 DQ20 DDR_B_D21
41 42
DQ17 DQ21
43 44
DDR_B_DQS#2 VSS VSS
45 DQS2# DM2 46
DDR_B_DQS2 47 48
DQS2 VSS DDR_B_D22
49 VSS DQ22 50
DDR_B_D18 51 52 DDR_B_D23
DDR_B_D19 DQ18 DQ23
53 DQ19 VSS 54
Layout Note: 55 56 DDR_B_D28
DDR_B_D24 VSS DQ28 DDR_B_D29
57 58
Place near JDIMMB DDR_B_D25 59
DQ24 DQ29
60
DQ25 VSS DDR_B_DQS#3
61 VSS DQS3# 62
63 64 DDR_B_DQS3
DM3 DQS3
65 VSS VSS 66
DDR_B_D26 67 68 DDR_B_D30
DDR_B_D27 DQ26 DQ30 DDR_B_D31
69 DQ27 DQ31 70
71 VSS VSS 72
+1.5V_MEM
DDR_CKE2_DIMMB 73 74 DDR_CKE3_DIMMB
8 DDR_CKE2_DIMMB CKE0 CKE1 DDR_CKE3_DIMMB 8
75 VDD VDD 76
77 78 DDR_B_MA15
NC A15
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
DDR_B_BS2 79 80 DDR_B_MA14
8 DDR_B_BS2 BA2 A14
1 1 1 1 81 VDD VDD 82
C DDR_B_MA12 DDR_B_MA11 C
83 A12/BC# A11 84
CD25
CD26
CD27
CD28
DDR_B_MA9 85 86 DDR_B_MA7
A9 A7
87 VDD VDD 88
2 2 2 2 DDR_B_MA8 DDR_B_MA6
89 A8 A6 90
DDR_B_MA5 91 92 DDR_B_MA4
A5 A4
93 VDD VDD 94
DDR_B_MA3 95 96 DDR_B_MA2
DDR_B_MA1 A3 A2 DDR_B_MA0
97 98
A1 A0
99 100
M_CLK_DDR2 VDD VDD M_CLK_DDR3
8 M_CLK_DDR2 101 102 M_CLK_DDR3 8
M_CLK_DDR#2 CK0 CK1 M_CLK_DDR#3
8 M_CLK_DDR#2 103 104 M_CLK_DDR#3 8
+1.5V_MEM CK0# CK1#
105 106
DDR_B_MA10 VDD VDD DDR_B_BS1
107 108 DDR_B_BS1 8
DDR_B_BS0 A10/AP BA1 DDR_B_RAS#
8 DDR_B_BS0 109 110
BA0 RAS# DDR_B_RAS# 8
111 112
VDD VDD
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
330U_SX_2VY~D
CD30
CD31
CD32
CD33
CD34
CD36
2.2U_0603_6.3V6K~D
0.1U_0402_16V4Z~D
DDR_B_D32 129 130 DDR_B_D36
DDR_B_D33 DQ32 DQ36 DDR_B_D37
131 132
DQ33 DQ37
133 134 1 1
DDR_B_DQS#4 VSS VSS
135 136
DQS4# DM4
CD37
CD38
DDR_B_DQS4 137 138
DQS4 VSS DDR_B_D38
139 140
DDR_B_D34 VSS DQ38 DDR_B_D39 2 2
141 142
DDR_B_D35 DQ34 DQ39
143 144
DQ35 VSS DDR_B_D44
145 146
B DDR_B_D40 VSS DQ44 DDR_B_D45 B
147 148
DDR_B_D41 DQ40 DQ45
Layout Note: 149
DQ41 VSS
150
151 152 DDR_B_DQS#5
Place near JDIMMB.203,204 153
VSS DQS5#
154 DDR_B_DQS5
DM5 DQS5
155 156
DDR_B_D42 VSS VSS DDR_B_D46
157 158
DDR_B_D43 DQ42 DQ46 DDR_B_D47
159 160
DQ43 DQ47
161 162
DDR_B_D48 VSS VSS DDR_B_D52
163 164
DDR_B_D49 DQ48 DQ52 DDR_B_D53
165 166
DQ49 DQ53
167 168
+0.75V_DDR_VTT DDR_B_DQS#6 VSS VSS
169 170
DDR_B_DQS6 DQS6# DM6
171 172
DQS6 VSS DDR_B_D54
173 174
DDR_B_D50 VSS DQ54 DDR_B_D55
175 176
DDR_B_D51 DQ50 DQ55
177 178
DQ51 VSS
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
CD40
CD41
CD42
0.1U_0402_16V4Z~D
2.2U_0603_6.3V6K~D
CD44
FOX_AS0A626-U8SN-7F
2
CONN@
2 2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, DDRIII-SODIMM SLOT2
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. 1.0
LA-6591P
Date: Monday, January 10, 2011 Sheet 13 of 66
5 4 3 2 1
5 4 3 2 1
1
@ RH8 1 2 33_0402_5%~D XDP_FN6 0.1U_0402_16V4Z~D 13 14
RH66 17 USB_OC6# @ RH9 33_0402_5%~D XDP_FN7 2 XDP_FN2 GND4 GND5 XDP_FN10
Shunt Clear ME RTC Registers 17,42 SIO_EXT_SMI#
1 2
XDP_FN8 XDP_FN3
15 OBSDATA_A2 OBSDATA_C2 16
XDP_FN11
1K_0402_5%~D @ RH10 1 2 33_0402_5%~D 17 18
18,41 SLP_ME_CSW_DEV# @ RH12 33_0402_5%~D XDP_FN9 OBSDATA_A3 OBSDATA_C3
Open Keep ME RTC Registers 18,36 USB_MCARD1_DET# HDD_DET#_R @ RH13
1 2
33_0402_5%~D XDP_FN10
19 GND6 GND7 20
1 2 21 22
2
BBS_BIT0_R @ RH14 33_0402_5%~D XDP_FN11 OBSFN_B0 OBSFN_D0
1 2 23 24
@ RH15 33_0402_5%~D XDP_FN12 OBSFN_B1 OBSFN_D1
1 2 25
GND8 GND9
26
D +RTC_CELL PCH_AZ_SYNC 18 GPIO36 @ RH16 33_0402_5%~D XDP_FN13 XDP_FN4 XDP_FN12 D
18 GPIO37 1 2 27
OBSDATA_B0 OBSDATA_D0
28
@ RH17 1 2 33_0402_5%~D XDP_FN14 XDP_FN5 29 30 XDP_FN13
18 EN_ESATA_RPTR# OBSDATA_B1 OBSDATA_D1
1
@ RH18 1 2 33_0402_5%~D XDP_FN15 31 32
18,41 TEMP_ALERT# GND10 GND11
1
2
PWRGOOD/HOOK0 ITPCLK/HOOK4
@ RH24 1K_0402_5%~D
7,16 SIO_PWRBTN#_R 1 2 PCH_PWRBTN#_XDP 41 42
2
47 48 XDP_DBRESET#
HOOK3 DBR#/HOOK7 XDP_DBRESET# 7,16
@ RH39
@RH39 On Die PLL VR is supplied by CH2 @ RH284 0_0402_5%~D 49 GND14 GND15 50
330K_0402_5%~D 18P_0402_50V8J~D 1 2 DDR_XDP_WAN_SMBDAT_R2 51 52 PCH_JTAG_TDO
1.5V when sampled high, 1.8 V 2 1 PCH_RTCX1 7,12,13,15,28,36 DDR_XDP_WAN_SMBDAT
1 2 DDR_XDP_WAN_SMBCLK_R2 53
SDA TD0
54
7,12,13,15,28,36 DDR_XDP_WAN_SMBCLK SCL TRST#
when sampled low @ RH285 0_0402_5%~D 55 56 PCH_JTAG_TDI
2
1
1 G 2 59 GND16 GND17 60
RH2
INTVRMEN- Integrated SUS 10M_0402_5%~D
UH4A
SAMTE_BSH-030-01-L-D-A
4 3
1.1V VRM Enable G
2
* High - Enable Internal VRs CH3 32.768KHZ_12.5PF_Q13MC1461000~D A20 RTCX1 FWH0 / LAD0 C38 LPC_LAD0 33,34,41,42
18P_0402_50V8J~D A38
LPC
Low - Enable External VRs 2 1 1 2 PCH_RTCX2 C20
FWH1 / LAD1
B37
LPC_LAD1 33,34,41,42
RTCX2 FWH2 / LAD2 LPC_LAD2 33,34,41,42
RH286 0_0402_5%~D C37
FWH3 / LAD3 LPC_LAD3 33,34,41,42
+RTC_CELL 1 2 PCH_RTCRST# D20
RH22 20K_0402_5%~D RTCRST#
FWH4 / LFRAME# D36 LPC_LFRAME# 33,34,41,42
1 2 SRTCRST# G22 +3.3V_RUN
RH23 20K_0402_5%~D SRTCRST#
E36
RTC
INTRUDER# LDRQ0# LPC_LDRQ0# 41
1 2 K22 K36 LPC_LDRQ1# 41
RH11 1M_0402_5%~D INTRUDER# LDRQ1# / GPIO23 IRQ_SERIRQ 2 1
2 1 PCH_INTVRMEN C17 V5 IRQ_SERIRQ RH28 8.2K_0402_5%~D
C INTVRMEN SERIRQ IRQ_SERIRQ 33,34,41,42 PCH_AZ_SYNC_Q 2 C
@ CH100 1
27P_0402_50V8J~D RH37 10K_0402_5%~D
1 2 1 2 AM3 PCH_GPIO33 2 1
1 2 1 2 PCH_AZ_BITCLK SATA0RXN PSATA_PRX_DTX_N0_C 28
1 2 N34 AM1 RH355 100K_0402_5%~D
31 PCH_AZ_MDC_BITCLK HDA_BCLK SATA0RXP PSATA_PRX_DTX_P0_C 28
SATA 6G
RH32 33_0402_5%~D AP7 HDD BBS_BIT0_R 2 1
PCH_AZ_SYNC SATA0TXN PSATA_PTX_DRX_N0_C 28 RH51 4.7K_0402_5%~D
L34 HDA_SYNC SATA0TXP AP5
@ @ PSATA_PTX_DRX_P0_C 28
ME1 SHORT PADS~D CMOS1 SHORT PADS~D T10 AM10
30 SPKR SPKR SATA1RXN SATA_ODD_PRX_DTX_N1_C 29
1 2 1 2 AM8 SATA_ODD_PRX_DTX_P1_C 29
1U_0402_6.3V6K~D PCH_AZ_RST# SATA1RXP
CH5 1U_0402_6.3V6K~D CH4
31 PCH_AZ_MDC_RST# 1 2 K34
HDA_RST# SATA1TXN
AP11
SATA_ODD_PTX_DRX_N1_C 29 ODD/ E Module Bay
CMOS place near DIMM RH34 33_0402_5%~D AP10
SATA1TXP SATA_ODD_PTX_DRX_P1_C 29
PCH_AZ_CODEC_SDIN0 E34 AD7 +3.3V_RUN
30 PCH_AZ_CODEC_SDIN0 HDA_SDIN0 SATA2RXN
AD5
SATA2RXP
30 PCH_AZ_CODEC_SDOUT 1 2 PCH_AZ_SDOUT 31 PCH_AZ_MDC_SDIN1
PCH_AZ_MDC_SDIN1 G34
HDA_SDIN1 SATA2TXN
AH5
RH29 33_0402_5%~D AH4 SPKR 2 1
SATA2TXP
30 PCH_AZ_CODEC_SYNC 1 2 PCH_AZ_SYNC_Q C34 @RH35
@ RH35 10K_0402_5%~D
IHDA
RH26 33_0402_5%~D +3.3V_ALW_PCH HDA_SDIN2
AB8
SATA3RXN
30 PCH_AZ_CODEC_RST# 1 2 PCH_AZ_RST# 1 2 A34
HDA_SDIN3 SATA3RXP
AB10 No Reboot Strap
RH27 33_0402_5%~D @RH287
@ RH287 1K_0402_5%~D AF3
SATA3TXN
30 PCH_AZ_CODEC_BITCLK 1 2 PCH_AZ_BITCLK SATA3TXP
AF1 Low = Default
1 RH25 33_0402_5%~D RH36 1 2 33_0402_5%~D PCH_AZ_SDOUT A36 SPKR
31 PCH_AZ_MDC_SDOUT
SATA
HDA_SDO
41 ME_FWP RH50 1 2 1K_0402_5%~D Y7 ESATA_PRX_DTX_N4_C 39
High = No Reboot
@ CH101 +3.3V_ALW_PCH SATA4RXN
Y5 ESATA_PRX_DTX_P4_C 39
PCH_GPIO33 SATA4RXP
27P_0402_50V8J~D
2
C36
HDA_DOCK_EN# / GPIO33 SATA4TXN
AD3
ESATA_PTX_DRX_N4_C 39 E-SATA
AD1
SATA4TXP ESATA_PTX_DRX_P4_C 39
1
USB30_SMI# N32
29 USB30_SMI# HDA_DOCK_RST# / GPIO13
@RH288
@ RH288 Y3
+3.3V_RUN SATA5RXN SATA_PRX_DKTX_N5_C 40
0_0603_5%~D Y1
SATA5RXP SATA_PRX_DKTX_P5_C 40
SATA5TXN
AB3
SATA_PTX_DKRX_N5_C 40 DOCK
RH59 2 1 51_0402_1%~D PCH_JTAG_TCK J3 AB1
2
JTAG
@ RH295 JTAG_TMS SATAICOMPO
8.2K_0402_5%~D RH45 2 1 200_0402_1%~D PCH_JTAG_TDI K5 Y10 +SATA_COMP 1 2
JTAG_TDI SATAICOMPI RH40 37.4_0402_1%~D
+3.3V_ALW_PCH_JTAG RH43 2 1 200_0402_1%~D PCH_JTAG_TDO H1
2
JTAG_TDO +1.05V_RUN
100_0402_1%~D
100_0402_1%~D
100_0402_1%~D
AB12
SATA3RCOMPO
1
1
@ RH48
@ RH49
@ RH47
PCH_SPI_DO
AB13 +SATA3_COMP 1 2
SATA3COMPI
SPI_MOSI RH42 49.9_0402_1%~D
1
PCH_SPI_CS0# Y14
SPI_CS0# RH30
PCH_SPI_CS1# T1 10K_0402_5%~D
SPI
17,34,36,37,41,42 PCH_PLTRST#_EC SPI_CS1#
P3 SATA_ACT#
+3.3V_SPI +3.3V_M SATALED# SATA_ACT# 45
2
2
G
S
31 PCH_AZ_MDC_SYNC SPI_MISO SATA1GP / GPIO19 PCH_SATA_MOD_EN# 42
CONN@ RH350 0_0402_5%~D RH33 33_0402_5%~D
S
JSPI1
1 SPI_PCH_CS1# 1 2 2 1 SSM3K7002FU_SC70-3~D CougarPoint_Rev_1p0 QH1 BSS138W-7-F_SOT323-3~D
G
2
1 PCH_SPI_CS1# RH345 0_0402_5%~D RH31 1M_0402_5%~D
2 QH7 7,17 PCH_PLTRST#
2 SPI_PCH_DO
3 1 2
3 PCH_SPI_DO RH346 0_0402_5%~D
4
4 SPI_PCH_DIN
5 1 2 +3.3V_SPI C745 BBS_BIT0 - BIOS BOOT STRAP BIT 0
5 PCH_SPI_DIN RH347 0_0402_5%~D +3.3V_SPI C746 0.1U_0402_16V4Z~D
6
6 SPI_PCH_CLK 0.1U_0402_16V4Z~D
7 1 2 1 2
7 PCH_SPI_CLK RH348 0_0402_5%~D
8 1 2
8
1
SPI_PCH_CS0#
9
9 1 2
200 MIL SO8
1
1
A R890 3.3K_0402_5%~D A
11
11 +3.3V_SPI
3.3K_0402_5%~D R891 16Mb Flash ROM R892
12 12
13
+3.3V_M 64Mb Flash ROM 3.3K_0402_5%~D U53 X76@ 3.3K_0402_5%~D
2
13 SPI_PCH_CS1#1
14 U52 X76@ 2 SPI_CS1# 1 8
2
15 /CS VCC 2
16 R933 47_0402_5%~D SPI_PCH_DIN 1 2 SPI_DIN32 2 7
16 SPI_PCH_DIN DO(IO1) /HOLD(IO3)
1 2 SPI_DIN64 2 DO /HOLD 7 R895 33_0402_5%~D
SPI_WP#_SEL SPI_CLK32 1 2 SPI_PCH_CLK
17 SPI_WP#_SEL
R894
1
33_0402_5%~D
2 3 6 SPI_CLK64 1 2 SPI_PCH_CLK @R896
@
1
R896
2
0_0402_5%~D
3 /WP(IO2) CLK 6
R897 33_0402_5%~D Compal Electronics, Inc.
G1 41 SPI_WP#_SEL /WP CLK SPI_DO32 1 Title
G2 18 @ R898 0_0402_5%~D R899 33_0402_5%~D 4 GND DI(IO0) 5 2 SPI_PCH_DO
SPI_DO64 1 SPI_PCH_DO
4 GND DIO 5
R901
2
33_0402_5%~D
R900 33_0402_5%~D
PCH (1/8)
W25Q16BVSSIG_SO8~D Size Document Number Rev
W25Q64BVSSIG_SO8~D 1.0
HRS_FH12-16S-0P5SH(55)~D LA-6591P
Date: Monday, January 10, 2011 Sheet 14 of 66
5 4 3 2 1
5 4 3 2 1
+3.3V_RUN
QH5A
2
DMN66D0LDW-7_SOT363-6~D
5
MEM_SMBDATA 3 4 DDR_XDP_WAN_SMBDAT 7,12,13,14,28,36
QH5B
D Follow DG0.9 Device down & Express/Mini card UH4B DMN66D0LDW-7_SOT363-6~D D
topology 1 2
BG34 @ RH296 0_0402_5%~D
36 PCIE_PRX_WANTX_N1 PERN1 PCH_SMB_ALERT#
36 PCIE_PRX_WANTX_P1 BJ34 E12
PERP1 SMBALERT# / GPIO11
MiniWWAN (Mini Card 1)---> 36 PCIE_PTX_WANRX_N1
AV32
PETN1 1 2
AU32 H14 MEM_SMBCLK @ RH297 0_0402_5%~D
36 PCIE_PTX_WANRX_P1 PETP1 SMBCLK
BE34 C9 MEM_SMBDATA
36 PCIE_PRX_WLANTX_N2 PERN2 SMBDATA
36 PCIE_PRX_WLANTX_P2 BF34
PERP2
MiniWLAN (Mini Card 2)---> 36 PCIE_PTX_WLANRX_N2
BB32
PETN2
AY32
SMBUS
36 PCIE_PTX_WLANRX_P2 PETP2 DDR_HVREF_RST_PCH
SML0ALERT# / GPIO60 A12
DDR_HVREF_RST_PCH 7 +3.3V_ALW_PCH
37 PCIE_PRX_EXPTX_N3 BG36 PERN3
BJ36 C8 LAN_SMBCLK
37 PCIE_PRX_EXPTX_P3 PERP3 SML0CLK LAN_SMBCLK 32
EXPRESS Card---> 37 PCIE_PTX_EXPRX_N3 AV34 PETN3
AU34 G12 LAN_SMBDATA SML1_SMBCLK 1 2
37 PCIE_PTX_EXPRX_P3 PETP3 SML0DATA LAN_SMBDATA 32
RH298 2.2K_0402_5%~D
BF36 SML1_SMBDATA 1 2
29 PCIE_PRX_EMBTX_N4 PERN4
BE36 RH299 2.2K_0402_5%~D
29 PCIE_PRX_EMBTX_P4 PERP4 GPIO74
E3 Module Bay---> 29 PCIE_PTX_EMBRX_N4 AY34 PETN4 SML1ALERT# / PCHHOT# / GPIO74 C13
+3.3V_ALW_PCH
BB34 PETP4
29 PCIE_PTX_EMBRX_P4 SML1_SMBCLK
E14
PCI-E*
SML1CLK / GPIO58 SML1_SMBCLK 42
36 PCIE_PRX_WPANTX_N5 BG37 PERN5
1/2vMINI CARD-3 PCIE BH37 M16 SML1_SMBDATA DDR_HVREF_RST_PCH 2 1
36 PCIE_PRX_WPANTX_P5 PERP5 SML1DATA / GPIO75 SML1_SMBDATA 42
AY36 RH300 1K_0402_5%~D
(Mini Card 3)---> 36 PCIE_PTX_WPANRX_N5
BB36
PETN5 GPIO74 2 1
36 PCIE_PTX_WPANRX_P5 PETP5 RH301 10K_0402_5%~D
BJ38 MEM_SMBCLK 2 1
35 PCIE_PRX_MMITX_N6 PERN6
BG38 RH302 2.2K_0402_5%~D
35 PCIE_PRX_MMITX_P6
Controller
PERP6 PCH_CL_CLK1 MEM_SMBDATA
MMI ---> 35 PCIE_PTX_MMIRX_N6 AU36 PETN6 CL_CLK1 M7 PCH_CL_CLK1 36 2 1
AV36 RH303 2.2K_0402_5%~D
C 35 PCIE_PTX_MMIRX_P6 PETP6 PCH_SMB_ALERT# C
2 1
Link
BG40 T11 PCH_CL_DATA1 RH304 10K_0402_5%~D
32 PCIE_PRX_GLANTX_N7 PERN7 CL_DATA1 PCH_CL_DATA1 36
BJ40 PEG_A_CLKRQ# 2 1
32 PCIE_PRX_GLANTX_P7 PERP7
10/100/1G LAN ---> 32 PCIE_PTX_GLANRX_N7 AY40 PETN7
RH80 10K_0402_5%~D
BB40 P10 PCH_CL_RST1#
32 PCIE_PTX_GLANRX_P7 PETP7 CL_RST1# PCH_CL_RST1# 36
BE38 +3.3V_LAN
PERN8
BC38
PERP8
AW38
PETN8 LAN_SMBCLK
AY38 2 1
PETP8 RH305 2.2K_0402_5%~D
M10 PEG_A_CLKRQ# LAN_SMBDATA 2 1
PCIE_MINI1# PEG_A_CLKRQ# / GPIO47 RH306 2.2K_0402_5%~D
2 1 Y40
CLKOUT_PCIE0N
36 CLK_PCIE_MINI1# RH3072 PCIE_MINI1
1 0_0402_5%~D Y39
36 CLK_PCIE_MINI1 CLKOUT_PCIE0P
MiniWWAN (Mini Card 1)---> +3.3V_ALW_PCH RH3082 1 0_0402_5%~D CLKOUT_PEG_A_N
AB37
CLOCKS
RH81 10K_0402_5%~D MINI1CLK_REQ# J2 AB38
36 MINI1CLK_REQ# PCIECLKRQ0# / GPIO73 CLKOUT_PEG_A_P
1
+3.3V_ALW_PCH 1 2 PEG_B_CLKRQ# E6 RH99
RH98 10K_0402_5%~D PEG_B_CLKRQ# / GPIO56 1M_0402_5%~D
Y47 XCLK_RCOMP 1 2 YH2
XCLK_RCOMP +1.05V_RUN
V40 RH100 90.9_0402_1%~D 25MHZ_18PF_7A25000110~D
2
CLKOUT_PCIE6N
V42 2 1
CLKOUT_PCIE6P
18P_0402_50V8J~D
18P_0402_50V8J~D
T13
PCIECLKRQ6# / GPIO45
2 2
2 1 PCIE_EMB# V38 K43 PCI_TCM 4@ RH311 2 1 22_0402_5%~D
29 CLK_PCIE_EMB# CLK_PCI_TPM_CHA 34
FLEX CLOCKS
CH18
CH19
eModule Bay---> RH3102 1 0_0402_5%~D PCIE_EMB V37
29 CLK_PCIE_EMB CLKOUT_PCIE7P
+3.3V_ALW_PCH RH3122 1 0_0402_5%~D F47 SIO_14M RH313 2 1 22_0402_5%~D
CLKOUTFLEX1 / GPIO65 CLK_SIO_14M 41 1 1
RH104 10K_0402_5%~D EMBCLK_REQ# K12
29 EMBCLK_REQ# PCIECLKRQ7# / GPIO46
CLKOUTFLEX2 / GPIO66 H47 PCI_TPM RH314 2 1 22_0402_5%~D CLK_PCI_TPM 33
A CLK_BCLK_ITP# AK14 A
7 CLK_CPU_ITP# 2 1
RH2802 CLK_BCLK_ITP AK13 CLKOUT_ITPXDP_N JETWAY_14M
7 CLK_CPU_ITP 1 0_0402_5%~D CLKOUT_ITPXDP_P CLKOUTFLEX3 / GPIO67 K49 @ RH315 2 1 22_0402_5%~D JETWAY_CLK14M 34
RH281 0_0402_5%~D
CougarPoint_Rev_1p0
DELL CONFIDENTIAL/PROPRIETARY
PCIE REQ power rail:
Compal Electronics, Inc.
suspend: 0 3 4 5 6 7 PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
core: 1 2 BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, PCH (2/8)
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. 1.0
LA-6591P
Date: Monday, January 10, 2011 Sheet 15 of 66
5 4 3 2 1
5 4 3 2 1
+3.3V_RUN
+3.3V_ALW_PCH
2.2K_0402_5%~D
2.2K_0402_5%~D
1
1
RH316
RH317
1 2 SUS_STAT#/LPCPD# +3.3V_RUN
2
@ RH318 10K_0402_5%~D
PCH_DPWROK 1 2PCH_RSMRST#_R PCH_SDVO_CTRLCLK 2 1
1 2 ME_SUS_PWR_ACK RH113 0_0402_5%~D G_CLK_DDC2 1 6 PCH_CRT_DDC_CLK RH351 2.2K_0402_5%~D
D PCH_CRT_DDC_CLK 25 PCH_SDVO_CTRLDATA 2 D
RH144 10K_0402_5%~D 1
QH6A RH352 2.2K_0402_5%~D
1 2 PCH_PCIE_WAKE# DMN66D0LDW-7_SOT363-6~D
2
RH142 10K_0402_5%~D RESET_OUT# 1 2 SYS_PWROK +3.3V_RUN
@ RH321 0_0402_5%~D
5
1 2 SIO_SLP_LAN# DSWODVREN - On Die DSW VR Enable QH6B
@ RH319 10K_0402_5%~D DMN66D0LDW-7_SOT363-6~D
Enabled (DEFAULT) G_DAT_DDC2 4 3 PCH_CRT_DDC_DAT
PCH_RI# PCH_CRT_DDC_DAT 25
1 2
RH140 10K_0402_5%~D ME_SUS_PWR_ACK_R 1 2 SUSACK#_R HIGH: R221 STUFFED,
RH323 0_0402_5%~D R222 UNSTUFFED
+3.3V_RUN
PCH_RSMRST#_Q 1 2 Disabled
RH322 10K_0402_5%~D
1 2 CLKRUN# LOW: R221 STUFFED,
RH137 8.2K_0402_5%~D ME_SUS_PWR_ACK 1 2 R222 UNSTUFFED
@ RH145 10K_0402_5%~D L_DDC_DATA - LVDS Detected
1 LVDS is detected
0 LVDS is not detected Intel request DDPB can not support eDP
UH4C
UH4D
LVDS
6 DMI_CRX_PTX_P3 DMI3TXP 24 LCD_ACLK-_PCH LVDSA_CLK#
AW16 FDI_INT AK40 AV42
+1.05V_RUN FDI_INT FDI_INT 6 24 LCD_ACLK+_PCH LVDSA_CLK DDPB_0N TMDSB_PCH_N2 26
FDI_FSYNC0 DDPB_0P
AV40
TMDSB_PCH_P2 26 HDMI D2
BJ24 AV12 FDI_FSYNC0 6 24 LCD_A0-_PCH AN48 AV45
DMI_ZCOMP FDI_FSYNC0 LVDSA_DATA#0 DDPB_1N TMDSB_PCH_N1 26
AM47 AV46 HDMI D1
@RH129
@ RH1291 2 330K_0402_1%~D AF39 AP47
24 LCD_BCLK+_PCH LVDSB_CLK DDPC_AUXN DPC_PCH_DOCK_AUX# 27
1 2 SUSACK#_R C12 E22 PCH_DPWROK AP49
41 SUSACK# SUSACK# DPWROK PCH_DPWROK 41 DDPC_AUXP DPC_PCH_DOCK_AUX 27
@ RH114 0_0402_5%~D AH45 AT38
24 LCD_B0-_PCH LVDSB_DATA#0 DDPC_HPD DPC_PCH_DOCK_HPD 40
24 LCD_B1-_PCH AH47
XDP_DBRESET# K3 PCH_PCIE_WAKE# LVDSB_DATA#1
7,14 XDP_DBRESET# B9 PCH_PCIE_WAKE# 41 24 LCD_B2-_PCH AF49 AY47
SYS_RESET# WAKE# LVDSB_DATA#2 DDPC_0N DPC_PCH_LANE_N0 40
AF45 AY49
B LVDSB_DATA#3 DDPC_0P DPC_PCH_LANE_P0 40 B
AY43
SYS_PWROK_R P12 CLKRUN# DDPC_1N DPC_PCH_LANE_N1 40
7,41 SYS_PWROK 1 2 N3 CLKRUN# 34,41,42 24 LCD_B0+_PCH AH43 AY45
RH116 0_0402_5%~D SYS_PWROK CLKRUN# / GPIO32 LVDSB_DATA0 DDPC_1P DPC_PCH_LANE_P1 40
24 LCD_B1+_PCH AH49 BA47
LVDSB_DATA1 DDPC_2N DPC_PCH_LANE_N2 40
24 LCD_B2+_PCH AF47 BA48
PCH_PWROK L22 SUS_STAT#/LPCPD# T56 PAD~D LVDSB_DATA2 DDPC_2P DPC_PCH_LANE_P2 40
42 RESET_OUT# 1 2 G8 AF43 BB47
RH117 0_0402_5%~D PWROK SUS_STAT# / GPIO61 LVDSB_DATA3 DDPC_3N DPC_PCH_LANE_N3 40
BB49
DDPC_3P DPC_PCH_LANE_P3 40
1 2 PM_APWROK_R L10 N14 SUSCLK T57 PAD~D
42 PM_APWROK APWROK SUSCLK / GPIO62 PCH_CRT_BLU
RH118 0_0402_5%~D N48 M43 PCH_DDPD_CTRLCLK 27
25 PCH_CRT_BLU CRT_BLUE DDPD_CTRLCLK
T58 PAD~D PCH_CRT_GRN P49 M36
PM_DRAM_PWRGD_R B13 SIO_SLP_S5# 25 PCH_CRT_GRN PCH_CRT_RED CRT_GREEN DDPD_CTRLDATA PCH_DDPD_CTRLDATA 27
7 PM_DRAM_PWRGD 1 2 D10 25 PCH_CRT_RED T49
RH320 0_0402_5%~D DRAMPWROK SLP_S5# / GPIO63 SIO_SLP_S5# 42 CRT_RED
T59 PAD~D AT45
CRT
PCH_RSMRST#_R C21 SIO_SLP_S4# G_CLK_DDC2 DDPD_AUXN DPD_PCH_DOCK_AUX# 27
14,42 PCH_RSMRST#_Q 1 2 H4 T39 AT43
RH120 0_0402_5%~D RSMRST# SLP_S4# SIO_SLP_S4# 41 G_DAT_DDC2 CRT_DDC_CLK DDPD_AUXP DPD_PCH_DOCK_AUX 27
M40 BH41
T60 PAD~D CRT_DDC_DATA DDPD_HPD DPD_PCH_DOCK_HPD 40
1 2 ME_SUS_PWR_ACK_R K16 F4 SIO_SLP_S3# RH123 20_0402_1%~D BB43
42 ME_SUS_PWR_ACK SUSWARN#/SUSPWRDNACK/GPIO30 SLP_S3# SIO_SLP_S3# 41 DDPD_0N DPD_PCH_LANE_N0 40
RH121 0_0402_5%~D
25 PCH_CRT_HSYNC 1 2 HSYNC M47 BB45
CRT_HSYNC DDPD_0P DPD_PCH_LANE_P0 40
7,14 SIO_PWRBTN#_R
T61 PAD~D
25 PCH_CRT_VSYNC 1 2 VSYNC M49 BF44
SIO_PWRBTN#_R E20 RH124 20_0402_1%~D CRT_VSYNC DDPD_1N DPD_PCH_LANE_N1 40
42 SIO_PWRBTN# 1 2 G10 BE44
RH122 0_0402_5%~D PWRBTN# SLP_A# SIO_SLP_A# 41,50 DDPD_1P DPD_PCH_LANE_P1 40
BF42
T62 PAD~D CRT_IREF DDPD_2N DPD_PCH_LANE_N2 40
T43 BE42
SIO_SLP_SUS# DAC_IREF DDPD_2P DPD_PCH_LANE_P2 40
42 AC_PRESENT H20 G16 T42 BJ42
ACPRESENT / GPIO31 SLP_SUS# SIO_SLP_SUS# 41 CRT_IRTN DDPD_3N DPD_PCH_LANE_N3 40
BG42
DDPD_3P DPD_PCH_LANE_P3 40
1
T63 PAD~D
1 2 PCH_BATLOW# E10 AP14 H_PM_SYNC CougarPoint_Rev_1p0
+3.3V_ALW_PCH BATLOW# / GPIO72 PMSYNCH H_PM_SYNC 7
RH139 8.2K_0402_5%~D RH126
1K_0402_0.5%~D
PCH_RI# A10 K14 SIO_SLP_LAN#
2
RI# SLP_LAN# / GPIO29 SIO_SLP_LAN# 32,41
CougarPoint_Rev_1p0
A A
1 2 PCH_CRT_BLU
RH131 150_0402_1%~D
1 2 PCH_CRT_GRN
RH132 150_0402_1%~D
1 2 PCH_CRT_RED
RH133 150_0402_1%~D DELL CONFIDENTIAL/PROPRIETARY
1 2 ENVDD_PCH
RH134 100K_0402_5%~D
Compal Electronics, Inc.
Title
PCH (3/8)
Size Document Number Rev
1.0
LA-6591P
Date: Monday, January 10, 2011 Sheet 16 of 66
5 4 3 2 1
5 4 3 2 1
+3.3V_RUN
1 2 PCI_PIRQA#
RH324 8.2K_0402_5%~D
UH4E
D PCI_PIRQB# D
1 2 RSVD1
AY7
RH325 8.2K_0402_5%~D AV7
RSVD2
BG26 AU3
PCI_PIRQC# TP1 RSVD3
1 2 BJ26 BG4
RH326 8.2K_0402_5%~D TP2 RSVD4
BH25
TP3
BJ16 AT10
PCI_PIRQD# TP4 RSVD5
1 2 BG16 BC8
RH329 8.2K_0402_5%~D TP5 RSVD6
AH38
TP6
AH37 AU2
PCI_REQ1# TP7 RSVD7
1 2 AK43 AT4
RH327 10K_0402_5%~D TP8 RSVD8
AK45 AT3
TP9 RSVD9
C18 TP10 RSVD10 AT1
1 2 ATG_MAC_LCD_DET# N30 AY3
RH330 10K_0402_5%~D TP11 RSVD11
H3 TP12 RSVD12 AT5
AH12 TP13 RSVD13 AV3
1 2 CAM_MIC_CBL_DET# AM4 AV1
RH331 10K_0402_5%~D TP14 RSVD14
AM5 TP15 RSVD15 BB1
Y13 TP16 RSVD16 BA3
1 2 BT_DET# K24 BB5
RH328 10K_0402_5%~D TP17 RSVD17
L24 TP18 RSVD18 BB3
AB46 TP19 RSVD19 BB7
1 2 PCH_GPIO3 AB45 BE8
RSVD
@ RH332 10K_0402_5%~D TP20 RSVD20
RSVD21 BD4
RSVD22 BF6
RSVD26 AY5
RSVD27 BA2
C C
BE28 TP25
BC30 TP26 RSVD28 AT12
BE32 TP27 RSVD29 BF3
BJ32 TP28
BC28 TP29
BE30 TP30
BF32 TP31
BG32 C24 USBP0-
PCI_GNT3# TP32 USBP0N USBP0+ USBP0- 38
AV26
BB26
TP33 USBP0P
A24
C25 USBP1- USBP0+ 38 ----->Right Side 1
TP34 USBP1N USBP1+ USBP1- 38
AU28
TP35 USBP1P
B25 USBP1+ 38 ----->Right Side 2
1
PCI
PCI_PIRQC# PIRQB# USBP7P USBP8- USBP7+ 33
A16 swap override Strap/Top-Block H38 L30 USBP8- 40
PIRQC# USBP8N
PCI_PIRQD# G38
PIRQD# USBP8P
K30 USBP8+
USBP8+ 40
----->DOCK
Swap Override jumper G30 USBP9-
USBP9N USBP9- 40
PCI_REQ1# C46 E30 USBP9+ ----->DOCK
USB
REQ1# / GPIO50 USBP9P USBP9+ 40
C44 C30 USBP10-
36 PCIE_MCARD2_DET# REQ2# / GPIO52 USBP10N USBP10- 37
Low = A16 swap 43 BT_DET#
BT_DET# E40
REQ3# / GPIO54 USBP10P
A30 USBP10+
USBP10+ 37
----->Express Card +3.3V_ALW_PCH
PCI_GNT#3 L32 USBP11-
USBP11N USBP11- 43
High = Default BBS_BIT1 D47
GNT1# / GPIO51 USBP11P
K32 USBP11+
USBP11+ 43 ----->Blue Tooth RPH1
E42 G32 USBP12- USB_OC0# 4 5
GNT2# / GPIO53 USBP12N USBP12- 24
B PCI_GNT3# F46
GNT3# / GPIO55 USBP12P
E32 USBP12+
USBP12+ 24
----->Camera USB_OC1# 3 6 B
C32 USBP13- USB_OC3# 2 7
USBP13N USBP13- 24
USBP13P
A32 USBP13+
USBP13+ 24
----->LCD Touch USB_OC4# 1 8
ATG_MAC_LCD_DET# G42
24 ATG_MAC_LCD_DET# PIRQE# / GPIO2
PCH_GPIO3 G40 Within 500 mils 10K_1206_8P4R_5%~D
CAM_MIC_CBL_DET# C42 PIRQF# / GPIO3 USBRBIAS RPH2
24 CAM_MIC_CBL_DET# C33 1 2
FFS_PCH_INT PIRQG# / GPIO4 USBRBIAS# RH151 USB_OC5#
28 HDD_FALL_INT 1 2 D44 4 5
RH334 0_0402_5%~D PIRQH# / GPIO5 22.6_0402_1%~D USB_OC6# 3 6
33 PLTRST_USH# 1 2 B33 2 7
RH335 0_0402_5%~D PAD~D T104 @ USBRBIAS USB_OC2#
35 PLTRST_MMI# 1 2 K10
PME# 1 8
RH336 1 2 0_0402_5%~D
7 PLTRST_XDP#
RH337 1 2 0_0402_5%~D PCH_PLTRST# C6 A14 USB_OC0#_R 1 2 10K_1206_8P4R_5%~D
32 PLTRST_LAN# PLTRST# OC0# / GPIO59 USB_OC1#_R USB_OC0# 39
RH338 1 2 0_0402_5%~D K20 RH3391 2 0_0402_5%~D
29 PLTRST_EMB# OC1# / GPIO40 USB_OC2# USB_OC1# 31,39
RH340 0_0402_5%~D B17 RH341 0_0402_5%~D
OC2# / GPIO41 USB_OC2# 14
2 1 PCI_5028 H49 C16 USB_OC3# SIO_EXT_SMI# 2 1
41 CLK_PCI_5028 CLKOUT_PCI0 OC3# / GPIO42 USB_OC3# 14
RH160 2 1 22_0402_5%~D PCI_MEC H43 L16 USB_OC4# RH41 10K_0402_5%~D
42 CLK_PCI_MEC CLKOUT_PCI1 OC4# / GPIO43 USB_OC4# 14
RH102 1 2 22_0402_5%~D PCI_DOCK J48 A16 USB_OC5#
40 CLK_PCI_DOCK CLKOUT_PCI2 OC5# / GPIO9 USB_OC6# USB_OC5# 14
RH103 33_0402_5%~D K42 D14
PCI_LOOPBACKOUT CLKOUT_PCI3 OC6# / GPIO10 SIO_EXT_SMI# USB_OC6# 14
15 CLK_PCI_LOOPBACK 2 1 H40 C14 SIO_EXT_SMI# 14,42
RH105 22_0402_5%~D CLKOUT_PCI4 OC7# / GPIO14
USB_OC0#_R 14
CougarPoint_Rev_1p0
USB_OC1#_R 14
+3.3V_RUN CH102
0.1U_0402_16V4Z~D
1 2
A A
UH3 SATA_SLPD
PCH_PLTRST# 1 BBS_BIT1 (BBS_BIT0) Boot BIOS Location
P
0 0 LPC
DELL CONFIDENTIAL/PROPRIETARY
1
TC7SH08FU_SSOP5~D
3
@ RH342
0 1 Reserved (NAND) 1K_0402_5%~D
Compal Electronics, Inc.
Title
2
+3.3V_RUN
CONTACTLESS_DET# 1 2
RH256 10K_0402_1%~D
+3.3V_ALW_PCH
D D
UH4F
14 SIO_EXT_SCI#_R
1 2 PCH_GPIO15
RH354 1K_0402_5%~D SIO_EXT_SCI# 1 2 T7 C40 CONTACTLESS_DET#
42 SIO_EXT_SCI# BMBUSY# / GPIO0 TACH4 / GPIO68 CONTACTLESS_DET# 33
RH259 0_0402_5%~D
PCH_GPIO1 A42 B41 GPIO69
TACH1 / GPIO1 TACH5 / GPIO69
PCH_GPIO15 TLS Confidentiality IO_LOOP# H36 C41 GPIO69 1 2
31 IO_LOOP# TACH2 / GPIO6 TACH6 / GPIO70 PCIE_MCARD3_DET# 36
RH260 1.5K_0402_1%~D
Low = Intel ME Crypto Transport Layer LEDB_DET# E38 A40
31 LEDB_DET# TACH3 / GPIO7 TACH7 / GPIO71 USB_MCARD2_DET# 36
Security (TLS) cipher suite with no
confidentiality SIO_EXT_WAKE# C10
41 SIO_EXT_WAKE# GPIO8
High = Intel ME Crypto TLS cipher suite
32 PM_LANPHY_ENABLE C4 LAN_PHY_PWR_CTRL / GPIO12
with confidentiality
PCH_GPIO15 G2 P4 SIO_A20GATE 1 2
14 PCH_GPIO15 GPIO15 A20GATE SIO_A20GATE 42 PECI_EC 42
RH261 0_0402_5%~D
AU16 H_PECI_R 1 2
PECI H_PECI 7
EN_ESATA_RPTR# U2 @ RH159 0_0402_5%~D
14 EN_ESATA_RPTR# SATA4GP / GPIO16 SIO_RCIN#
RCIN# P5 SIO_RCIN# 42
+3.3V_RUN
GPIO
GPIO17 D40 AY11 H_CPUPWRGD +1.05V_RUN_VTT
CPU/MISC
+3.3V_ALW_PCH TACH0 / GPIO17 PROCPWRGD H_CPUPWRGD 7
MEDIA_DET# T5 AY10 PCH_THRMTRIP#_R 2 1 SIO_A20GATE 2 1
31 MEDIA_DET# SCLOCK / GPIO22 THRMTRIP# RH262 56_0402_5%~D RH158 10K_0402_5%~D
2
TS_VSS3 AH10
@ RH353 GPIO36 V8
14 GPIO36 SATA2GP / GPIO36
1K_0402_5%~D TS_VSS4 AK10
GPIO37 M5
14 GPIO37 SATA3GP / GPIO37
1
NCTF
VSS_NCTF_4 A46 BJ46 VSS_NCTF_22
VSS_NCTF_4 VSS_NCTF_22
VSS_NCTF_5 A5 BJ5 VSS_NCTF_23 PLACE RH150 CLOSE TO THE BRANCHING POINT
VSS_NCTF_5 VSS_NCTF_23
( TO CPU and NVRAM CONNECTOR)
VSS_NCTF_6 A6 BJ6 VSS_NCTF_24
VSS_NCTF_6 VSS_NCTF_24
VSS_NCTF_7 B3 C2 VSS_NCTF_25
B VSS_NCTF_7 VSS_NCTF_25 +VCCDFTERM B
VSS_NCTF_8 B47 C48 VSS_NCTF_26 RH149 need to close to CPU
VSS_NCTF_8 VSS_NCTF_26
1
Layout note: VSS_NCTF_9 BD1 D1 VSS_NCTF_27
VSS_NCTF_9 VSS_NCTF_27 RH149
Trace wide 10mil & length 30mil VSS_NCTF_10 VSS_NCTF_28
Layout note:
BD49 D49 2.2K_0402_5%~D
All NCTF pins should have thick
VSS_NCTF_10 VSS_NCTF_28 Trace wide 10mil & length 30mil
VSS_NCTF_11 VSS_NCTF_29
BE1 E1 All NCTF pins should have thick
2
traces at 45from the pad. VSS_NCTF_11 VSS_NCTF_29
VSS_NCTF_12 BE49
VSS_NCTF_12 VSS_NCTF_30
E49 VSS_NCTF_30 traces at 45from the pad. DF_TVS_R1 2 DF_TVS
RH150 0_0402_5%~D
VSS_NCTF_13 BF1 F1 VSS_NCTF_31
VSS_NCTF_13 VSS_NCTF_31
VSS_NCTF_14 BF49 F49 VSS_NCTF_32
+3.3V_ALW_PCH VSS_NCTF_14 VSS_NCTF_32
1 2 KB_DET# CougarPoint_Rev_1p0
RH170 10K_0402_5%~D DMI & FDI Termination Voltage
2 1 TEMP_ALERT#
RH266 10K_0402_5%~D 1@ RH267 3@ RH268
2 1 MEDIA_DET# 10K_0402_5%~D 20K_0402_5%~D TPM_ID0 TPM_ID1
A RH179 10K_0402_5%~D A
China TPM 0 0
1
2@ RH270 4@ RH271
USH2.0 1 1
IO_LOOP#
1
RH163
2
10K_0402_5%~D
10K_0402_5%~D 2.2K_0402_5%~D
Compal Electronics, Inc.
1 2 LEDB_DET# Title
1
RH272
2
10K_0402_5%~D
1 GPIO17 PCH (5/8)
@ RH273 1K_0402_5%~D Size Document Number Rev
1.0
LA-6591P
Date: Monday, January 10, 2011 Sheet 18 of 66
5 4 3 2 1
5 4 3 2 1
10U_0805_4VAM~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
0.01U_0402_16V7K~D
0.1U_0402_10V7K~D
CRT
1 1 1 1 AD21 VCCCORE[3]
10U_0805_4VAM~D
AD23 U47 1 1 1
VCCCORE[4] VSSADAC
CH30
CH32
CH33
CH31
V5REF 5 0.001
VCC CORE
AF21
VCCCORE[5]
CH34
CH35
CH36
AF23
D 2 2 2 2 VCCCORE[6] D
AG21
VCCCORE[7] 2 2 2
AG23
VCCCORE[8]
V5REF_Sus 5 0.001
AG24 AK36
VCCCORE[9] VCCALVDS
AG26
VCCCORE[10]
AG27
VCCCORE[11] VSSALVDS
AK37 Vcc3_3 3.3 0.266
AG29 +3.3V_RUN
VCCCORE[12]
AJ23
LVDS
VCCCORE[13]
AJ26
VCCCORE[14] VCCTX_LVDS[1]
AM37 VccADAC3 3.3 0.001
AJ27
VCCCORE[15] +1.8V_RUN_LVDS
AJ29 AM38 2 1 +1.8V_RUN
VCCCORE[16] VCCTX_LVDS[2]
0.01U_0402_16V7K~D
0.01U_0402_16V7K~D
22U_0805_6.3VAM~D
AJ31
VCCCORE[17]
LH8 VccADPLLA 1.05 0.08
CH103
CH104
CH105
+1.05V_RUN +1.05V_RUN AP36 1 1 1 HK1608R10J-T_0603~D
VCCTX_LVDS[3]
50 mA VCCTX_LVDS[4] AP37 VccADPLLB 1.05 0.08
AN19 VCCIO[28] 2 2 2
VccCore 1.05 1.3
1 2 +VCCAPLLEXP BJ22
@RH247
@RH247 VCCAPLLEXP
1UH_LB2012T1R0M_20%~D
10U_0805_4VAM~D
1 V33 +3.3V_RUN VccDMI 1.05 0.042
HVCMOS
VCC3_3[6]
AN16 VCCIO[15]
CH40
1
AN17 VCCIO[16]
VccIO 1.05 2.925
2 @ V34 CH43
VCC3_3[7]
0.1U_0402_10V7K~D
AN21 2 VccASW 1.05 1.01
VCCIO[17]
AN26 VCCIO[18]
VccSPI 3.3 0.020
AN27 VCCIO[19] VCCVRM[3] AT16 +1.05V_+1.5V_1.8V_RUN
+1.05V_RUN
AP21 VCCIO[20]
VccDSW3_3 3.3 0.003
C C
AP23 VCCIO[21] VCCDMI[1] AT20 +1.05V_RUN_VTT
VccpNAND 1.8 0.19
DMI
10U_0805_4VAM~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1 1 1 1 1 AP24 1 2
VCCIO
VCCIO[22] CH49 1U_0402_6.3V6K~D
CH44
CH45
CH46
CH47
CH48
1U_0402_6.3V6K~D
10U_0603_4VAM~D
1 1 LH9
2 2 2 2 2
@ CH106
AT24 HK1608R10J-T_0603~D
VCCIO[24]
CH50
VccSus3_3 3.3 0.119
AN33 2 2
VCCIO[25]
VccSusHDA 3.3 0.01
AN34 AG16
+3.3V_RUN VCCIO[26] VCCDFTERM[1] +VCCDFTERM
VccVRM 1.8 / 1.5 0.16
BH29 AG17 1 2 +3.3V_RUN
DFT / SPI
VCC3_3[3] VCCDFTERM[2] @ RH276 0_0805_5%~D
0.1U_0402_10V7K~D
+1.05V_+1.5V_1.8V_RUN AP16
VCCVRM[2]
CH52 PAD-OPEN1x1m VccSSC 1.05 0.095
2 AJ17 0.1U_0402_10V7K~D
VCCDFTERM[4] 2
+1.05V_RUN +VCCAPLL_FDI BG6 VccDIFFCLKN 1.05 0.055
VccAFDIPLL
@RH195
@ RH195 0.022_0805_1% V1 +3.3V_M
VCCSPI
+1.05V_RUN_VTT AU20
VCCDMI[2] 1 VccTX_LVDS 1.8 0.06
CH54
B CougarPoint_Rev_1p0 1U_0402_6.3V6K~D B
2
2 1
RH197 0_0603_5%~D
+1.8V_RUN
1 1
2 1 + @ CH41 + @ CH42
@ RH198 0_0603_5%~D 330U_D2_2VM_R6M~D 330U_D2_2VM_R6M~D
+1.05V_RUN
2 2
2 1
@ RH199 0_0603_5%~D
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, PCH (6/8)
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. 1.0
LA-6591P
Date: Monday, January 10, 2011 Sheet 19 of 66
5 4 3 2 1
5 4 3 2 1
RH202
0_0402_5%~D
+1.05V_RUN 1 2
1 2 +VCCACLK
+3.3V_ALW_PCH @ RH200 0.022_0805_1% +5V_ALW +5V_ALW_PCH
+3.3V_ALW2
UH4J POWER
1 2 1 3
S
RH201 0_0402_5%~D 1 AD49 N26 +1.05V_RUN
VCCACLK VCCIO[29]
0.1U_0402_10V7K~D
20K_0402_5%~D
1 2 @ QH4
@ RH278
@RH253
@ RH253 0_0402_5%~D CH55 P26 1 SSM3K7002FU_SC70-3~D 1
G
2
0.1U_0402_10V7K~D +VCCDSW3_3 VCCIO[30]
T16
2 VCCDSW3_3
CH98
D CH56 D
P28
Note: Check Intel VCCIO[31] 1U_0402_6.3V6K~D
+PCH_VCCDSW 2 44 ALW_ENABLE 2
V12 T27
2
+1.05V_RUN @ LH3 DCPSUSBYP VCCIO[32]
1
10UH_LBR2012T100M_20%~D T29
@ CH57 +3.3V_RUN_VCC_CLKF33 T38 VCCIO[33]
1 2 VCC3_3[5]
0.1U_0402_10V7K~D +3.3V_ALW_PCH
2
10U_0805_6.3V6M~D
0.1U_0402_10V7K~D
1 T23
+1.05V_RUN VCCSUS3_3[7]
@ CH58
+VCCAPLL_CPY_PCH BH23 1
VCCAPLLDMI2
T24 +3.3V_ALW_PCH
VCCSUS3_3[8] +5V_ALW_PCH +3.3V_ALW_PCH
CH59
0.1U_0402_10V7K~D
AL29
2 VCCIO[14]
V23 1
USB
VCCSUS3_3[9] 2
2
CH60
+VCCSUS1 AL24 V24
DCPSUS[3] VCCSUS3_3[10] RH208 DH2
1 2
P24 10_0402_5%~D RB751S40T1_SOD523-2~D
VCCSUS3_3[6]
@
CH61
1U_0402_6.3V6K~D AA19
1
2 VCCASW[1] +PCH_V5REF_SUS
VCCIO[34] T26 +1.05V_RUN
AA21 VCCASW[2] 1
22U_0805_6.3VAM~D
22U_0805_6.3VAM~D
1 1 +3.3V_ALW_PCH 0.1U_0402_10V7K~D
2
CH64
CH65
0.1U_0402_10V7K~D
AN23 +VCCA_USBSUS 1
DCPSUS[4]
AA27 VCCASW[5]
2 2
CH66
VCCSUS3_3[1] AN24
AA29 VCCASW[6] 2
+1.05V_M AA31 +5V_RUN +3.3V_RUN
VCCASW[7]
AC26 P34 +PCH_V5REF_RUN
VCCASW[8] V5REF
2
C C
1 1U_0402_6.3V6K~D 1 1
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
AC27 RH213 DH3
CH67 VCCASW[9]
CH68
CH69
N20 +3.3V_ALW_PCH 10_0402_5%~D RB751S40T1_SOD523-2~D
VCCSUS3_3[2]
PCI/GPIO/LPC
AC29 VCCASW[10] 1
2 2 2 N22
1
VCCSUS3_3[3] CH70 +PCH_V5REF_RUN
AC31 VCCASW[11]
P20 1U_0603_10V6K~D +3.3V_RUN
VCCSUS3_3[4] 2
AD29 1
VCCASW[12]
P22
+3.3V_RUN VCCSUS3_3[5] CH71
AD31 1
VCCASW[13] 1U_0603_10V6K~D
1 2 W21 AA16 CH72 2
@RH215
@ RH215 0.022_0805_1% VCCASW[14] VCC3_3[1] 0.1U_0402_10V7K~D
LH4 W23 W16 2 +3.3V_RUN
10UH_LBR2012T100M_20%~D VCCASW[15] VCC3_3[8]
1 2 +3.3V_RUN_VCC_CLKF33 W24 T34 +VCCA_USBSUS
VCCASW[16] VCC3_3[4]
10U_0805_6.3V6M~D
1U_0402_6.3V6K~D
1 1 1
W26 1
VCCASW[17]
CH73
CH74
CH75
W29 +3.3V_RUN 0.1U_0402_10V7K~D @CH62
@CH62
2 2 VCCASW[18] 2 1U_0402_6.3V6K~D
W31 AJ2 2
VCCASW[19] VCC3_3[2]
1
W33
VCCASW[20] CH76
AF13 +1.05V_RUN
VCCIO[5] 0.1U_0402_10V7K~D
2 1
+VCCRTCEXT N16
DCPRTC CH77
1 AH13
VCCIO[12] 1U_0402_6.3V6K~D
CH78 Y49 AH14 2 Note: Check Intel
+1.05V_+1.5V_1.8V_RUN VCCVRM[4] VCCIO[13]
0.1U_0402_10V7K~D
2
B +1.05V_RUN AF14 @ LH5 B
+1.05V_RUN_VCCA_A_DPL VCCIO[6] 10UH_LBR2012T100M_20%~D
BD47
SATA
VCCADPLLA +VCCSATAPLL
AK1 1 2 +1.05V_RUN
+1.05V_RUN_VCCA_B_DPL VCCAPLLSATA
1 BF47 1
VCCADPLLB
CH79 AF11 +1.05V_+1.5V_1.8V_RUN @ CH80
1U_0402_6.3V6K~D VCCVRM[1] 10U_0805_6.3V6M~D
AF17
2 VCCIO[7] 2
AF33
VCCDIFFCLKN[1] +1.05V_RUN_VCC_SATA
AF34 AC16 +1.05V_RUN
VCCDIFFCLKN[2] VCCIO[2]
1 2 CH81 AG34
VCCDIFFCLKN[3]
1U_0402_6.3V6K~D AC17 1
VCCIO[3]
AG33 AD17 CH82
VCCSSC VCCIO[4] 1U_0402_6.3V6K~D
1 2
+1.05V_M
CH96 +VCCSST V16 +1.05V_M
1U_0402_6.3V6K~D DCPSST
1 2 +1.05V_M_VCCSUS
@ RH248 0.022_0805_1% 2 +1.05V_M_VCCSUS
1
1 T17 T21
CH84 DCPSUS[1] VCCASW[22]
V19
DCPSUS[2]
MISC
0.1U_0402_10V7K~D @CH83
@CH83
+1.05V_RUN_VTT 2 1U_0402_6.3V6K~D V21
2 VCCASW[23]
CPU
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
BJ8
V_PROC_IO
1 1 1 T19
VCCASW[21]
+RTC_CELL
CH86
CH87
CH85
4.7U_0603_6.3V6K~D
2 2 2
RTC
A22 P32
HDA
0.1U_0402_10V7K~D
1 1 1 1
LH6 CougarPoint_Rev_1p0
A A
CH88
CH89
1 2 +1.05V_RUN_VCCA_B_DPL
DELL CONFIDENTIAL/PROPRIETARY
220U_B2_2.5VM_R35M~D
220U_B2_2.5VM_R35M~D
LH7
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
10UH_LBR2012T100M_20%~D 1 1
1 1 Compal Electronics, Inc.
CH94
CH92
CH95
CH93
+ +
Title
+1.05V_RUN_VCCA_A_DPL 1 2 +1.05V_RUN_VCCA_B_DPL
2 2 2 2 @RH279
@ RH279 0_0805_5%~D
PCH (7/8)
Size Document Number Rev
1.0
LA-6591P
Date: Monday, January 10, 2011 Sheet 20 of 66
5 4 3 2 1
5 4 3 2 1
UH4I
CougarPoint_Rev_1p0
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, PCH (8/8)
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. 1.0
LA-6591P
Date: Monday, January 10, 2011 Sheet 21 of 66
5 4 3 2 1
5 4 3 2 1
RB751S40T1_SOD523-2~D
FAN1_TACH_FB 3 5
3 G1
22U_0805_6.3VAM~D
4 4 G2 6
1
1
D2
C219
MOLEX_53398-0471~D
D 2 +3.3V_M D
Place under CPU
2
Place C266 close to the Q12 as possible
BC_INT#_EMC4022 2 1
REM_DIODE1_P_4022 R385 10K_0402_5%~D
1
@ 2 C FAN1_TACH_FB 2 1
C266 2 R426 10K_0402_5%~D
100P_0402_50V8J~D B
E Q12 FAN1_DET# 2 1
3
+5V_RUN
10U_0805_10V4Z~D
0.1U_0402_16V4Z~D
1 1
C276
C275
+3.3V_RUN
2 2
10U_0805_6.3V6M~D
0.1U_0402_16V4Z~D
1 1 U9
C305
C1171
Diode circuit at DP5/DN5 is used for skin temp sensor and place
C272 close to Q14 (placed Q13 close to JMINI1 for WWAN card). 2 VDDH
2 2 +3.3V_M 3
Diode circuit at DP3/DN3 isnused for sensor SO-DIMM temp. Place 6
VDDH
17 THERMATRIP2#
VDDL THERMTRIP2#
Q14 near DIMM1 and place C277 close to Q13 1 2 VDD_PWRGD 13 VDD_PWRGD
R389 10K_0402_5%~D 18 THERMATRIP3#
REM_DIODE3_P_4022 THERMTRIP3#
100P_0402_50V8J~D
C REM_DIODE1_N_4022 C
1 2 23 DN1/THERM
1 1 C270 2200P_0402_50V7K~D REM_DIODE1_P_4022 24 19 THERM_STP# 47
DP1/VREF_T SYS_SHDN#
1
3
@ C277
E
C
B
@ C272 2 2 26 20 POWER_SW# 1 2
DN2/DP4 POWER_SW# +RTC_CELL
100P_0402_50V8J~D B Q13 27 @ R390 47K_0402_1%~D
2 E 2 C
MMBT3904WT1G_SC70-3~D DP2/DN4
3
2 1 VCP2 31
54 MAX8731_IINP VCP
4.7K_0402_5%~D R387 25
VIN
5 +FAN1_VOUT
VSET_4022 FAN_OUT
28 4
VSET FAN_OUT
8 BC_CLK_EMC4022 42
FAN1_TACH_FB SMCLK/BC_CLK
10 7 BC_DAT_EMC4022 42
TACH/GPIO1 SMDATA/BC_DATA
FAN1_DET# 11
GPIO2
+3.3V_M 2 1 PWM 15
10K_0402_5%~D R1178 GPIO3/PWM/THERMTRIP_SIO +3.3V_M
1
42 PCH_PWRGD# 1 2 3V_PWROK# 12
3V_PWROK#
R388
R391 1K_0402_5%~D 22_0402_5%~D
1 +VCC_4022
2
VDD +ADDR_XEN
32 1 2 +VCC_4022
ADDR_MODE/XEN
0.1U_0402_16V4Z~D
1U_0402_6.3V6K~D
B 4.7K_0402_5%~D R393 B
1 1
+3.3V_M 14
TEST1
C273
C1179
22
TEST2
1
+RTC_CELL 16 33
RTC_PWR3V VSS
1
R403 2 2
1U_0402_6.3V6K~D
R395 10K_0402_5%~D
8.2K_0402_5%~D 1 EMC4022-1-EZK-TR_QFN32_5X5~D
2
C274
SMSC request
2
+1.05V_RUN_VTT THERMATRIP2#
R398 2
1
2.2K_0402_5%~D C 1
1 2 2
B C278
Q15 E 0.1U_0402_16V4Z~D
3
PMST3904_SOT323-3~D 2
7 H_THERMTRIP#
+RTC_CELL C281
VSET_4022 0.1U_0402_16V4Z~D
1 2
1
5
1 U10
+3.3V_M C282 R406 TC7SH08FU_SSOP5~D 1
0.1U_0402_16V4Z~D 953_0402_1%~D POWER_SW# P B DOCK_PWR_SW# 42
4 O
2 POWER_SW_IN# 42
A
G
2
2
1
R405
8.2K_0402_5%~D
Rest=953, Tp=88degree
A A
2
THERMATRIP3#
1
C280
DELL CONFIDENTIAL/PROPRIETARY
0.1U_0402_16V4Z~D
2 Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, FAN & Thermal Sensor
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. 1.0
LA-6591P
Date: Monday, January 10, 2011 Sheet 22 of 66
5 4 3 2 1
5 4 3 2 1
D D
C C
Fingerprint CONN.
JBIO1
1 +3.3V_FP
1 @ L8
@L8
2
2 FP_USB_D- +3.3V_FP DLW21SN121SQ2L_4P~D
3
3 FP_USB_D+ U12 FP_USB_D+
4 1
4 33 FP_USBD+ 1 2 2
7 5 FP_RESET# 33 1 4 +3.3V_RUN
G1 5 GND VCC
8 6
G2 6 FP_USB_D-
1 33 FP_USBD- 4 3
TYCO_2041084-6~D FP_USB_D- FP_USB_D+ 4 3
2 3
CONN@ C285 IO1 IO2
1 2
0.1U_0402_16V4Z~D PRTR5V0U2X_SOT143-4~D R409 0_0402_5%~D
C285 Place close to JBIO1.1 2
1 2
R410 0_0402_5%~D
B B
R1135
0_0603_5%~D
+3.3V_RUN 1 2 +3.3V_FP
@ R1136
0_0603_5%~D
+3.3V_ALW 1 2
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, FP Conn.
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. 1.0
LA-6591P
Date: Monday, January 10, 2011 Sheet 23 of 66
5 4 3 2 1
5 4 3 2 1
D
S
6
JLVDS1 +LCDVDD +15V_ALW 4 5
1
2
1 R412 1
GND
1
DMN66D0LDW-7_SOT363-6~D
130_0402_5%~D
100K_0402_5%~D
2 100K_0402_5%~D
G
BATT_WHITE_LED BATT_WHITE_LED 45 1
1
R413
3 BATT_YELLOW_LED 45
3
BATT_YELLOW_LED
R414
4 C292
BREATH_WHITE_LED 45
2
BREATH_WHITE_LED 0.1U_0402_16V4Z~D
VR_SRC 5 +BL_PWR_SRC 2
DMN66D0LDW-7_SOT363-6~D
6 1 2
6 2
VR_SRC
0.1U_0402_25V4Z~D
7 C246
2
VR_SRC
3
8 0.1U_0603_50V4Z~D 1
NC
Q19A
D DISP_ON D
9
DISP_ON/OFF#
Q19B
C293
10 1 2 BIA_PWM_LVDS
PWM LE92 BLM18BB221SN1D_2P~D
11 2 5
CONNTST_GND 2
12
VR_GND
1
13
4
VR_GND D6
14
VR_GND
15 LCD_BCLK+_PCH 16
LCD_B_CLK+
16 LCD_BCLK-_PCH 16 41 LCD_VCC_TEST_EN 2
LCD_B_CLK- EN_LCDPWR
17 1 2
GND
18 LCD_B2+_PCH 16
LVDS_B2+ +3.3V_RUN Q20
19 LCD_B2-_PCH 16 16,41 ENVDD_PCH 3
LVDS_B2- PDTC124EU_SC70-3~D
LVDS_B1+ 20 LCD_B1+_PCH 16
21 1 2 LDDC_CLK_PCH
LCD_B1-_PCH 16
3
LVDS_B1- R159 2.2K_0402_5%~D BAT54CW_SOT323-3~D
LVDS_B0+ 22 LCD_B0+_PCH 16
23 1 2 LDDC_DATA_PCH
LVDS_B0- LCD_B0-_PCH 16
24 R160 2.2K_0402_5%~D
GND
LVDS_A_CLK+ 25 LCD_ACLK+_PCH 16
LVDS_A_CLK- 26 LCD_ACLK-_PCH 16 Place near to JLVDS1
GND 27
LVDS_A2+ 28 LCD_A2+_PCH 16
LVDS_A2- 29 LCD_A2-_PCH 16
30 +LCDVDD +3.3V_RUN Q21
LVDS_A1+ LCD_A1+_PCH 16
31 FDC654P-G_SSOT-6~D
LVDS_A1- LCD_A1-_PCH 16
0.1U_0402_16V4Z~D
+PWR_SRC
LVDS_A0+ 32 LCD_A0+_PCH 16 40mil
40mil
D
LVDS_A0- 33 LCD_A0-_PCH 16 6
LDDC_DATA_PCH
S
EDID_DATA 34 LDDC_DATA_PCH 16 1 1 4 5 +BL_PWR_SRC
C243
46 35 LDDC_CLK_PCH 2
MGND6 EDID_CLK LCD_TST LDDC_CLK_PCH 16
45 36 C298 1
MGND5 BIST LCD_TST 41
1000P_0402_50V7K~D
G
44 37 0.1U_0402_16V4Z~D
MGND4 V_EDID +3.3V_RUN 2 2
43 38 1
3
MGND3 LCD_VDD
1
42 MGND2 LCD_VDD 39 +LCDVDD 1
41 40 R422 C296
MGND1 CONNTST ATG_MAC_LCD_DET# 17
C297
C C
Close to JLVDS1.42,43 Close to JLVD1.41 100K_0402_5%~D
2
0.1U_0603_50V4Z~D
ACES_59003-0400C-001 2
2
CONN@
PWR_SRC_ON
Q22
SSM3K7002FU_SC70-3~D
1 2 1 3
S
R423 47K_0402_5%~D
D63 D64
RB751V-40GTE-17_SOD323-2~D RB751V-40GTE-17_SOD323-2~D
G
2
BIA_PWM_LVDS 1 2 DISP_ON 1 2
BIA_PWM_PCH 16 PANEL_BKEN_PCH 16
1
1
EN_INVPWR
42 EN_INVPWR
R1137 D68 R1138 D69 FDC654P: P CHANNAL
10K_0402_5%~D RB751V-40GTE-17_SOD323-2~D 100K_0402_5%~D RB751V-40GTE-17_SOD323-2~D
1 2 BIA_PWM_EC 42 1 2 PANEL_BKEN_EC 41
Panel backlight power control by EC
2
+CAMERA_VDD
+5V_TSP +5V_RUN Touch Screen Connector
@ R1592
For Webcam JCAM1 +15V_ALW 0_0603_5%~D
1 CAM_MIC_CBL_DET# 1 2
1 CAM_MIC_CBL_DET# 17
2 USBP12_D+ @ U86
B 2 USBP12_D- PMV45EN_SOT23-3~D B
3 1 GND 4 +3.3V_RUN
3 VCC
1
4
4
0.1U_0402_25V4Z~D
S
D
5 DMIC_CLK 3 1
+CAMERA_VDD 5 DMIC_CLK 30 USBP13- USBP13+
6 R430 2 3
6 DMIC0 100K_0402_5%~D Q32 IO1 IO2
7 DMIC0 30 1
7 +3.3V_ALW
C306
PRTR5V0U2X_SOT143-4~D
G
8
2
8
1
1
SD05.TCT_SOD323-2~D
SD05.TCT_SOD323-2~D
S
3 1 +3.3V_RUN 9
G1
0.1U_0402_16V4Z~D
10
G2
1
2
10U_0805_10V4Z~D
@ D7
@ D8
Q23
PMV45EN_SOT23-3~D JST_BM08B-SRSS-TB1-LF-SN~D R431
Place close JTCH1
G
1 1
2
CONN@ 100K_0402_5%~D 1
2
2
C299
C300
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
C304
3
2 2
0.1U_0402_25V4Z~D
2 +5V_TSP
+15V_ALW
Q125B
1
8
5 JTCH1 +5V_TSP
C301 @ L10 DLW21SN121SQ2L_4P~D 1 1
G2
1
6
0.1U_0402_16V4Z~D USBP12+ 4 USBP12_D+
3 3
17 USBP12+ 2 2
4
2 4
Q125A
R429 3 3 1
100K_0402_5%~D 18 E3_PAID_TS_DET# USBP13-
17 USBP13- 4 4
USBP12- 1 2 USBP12_D- 2 USBP13+ 5 5 C302
17 USBP12- 1 2 42 TOUCH_SCREEN_PD# 17 USBP13+ 0.1U_0402_10V7K~D
6 6
G1
2
1
TYCO_1734595-6
Webcam PWR CTRL 1 2
7
R427 0_0402_5%~D
1
D
SSM3K7002FU_SC70-3~D
CCD_OFF 2 1 1 2 CONN@
41 CCD_OFF
Q24
G R428 0_0402_5%~D
S C303
3
0.1U_0402_25V4Z~D
2
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
eDP & CAM &TS Conn
Size Document Number Rev
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
1.0
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. LA-6591P
Date: Monday, January 10, 2011 Sheet 24 of 66
5 4 3 2 1
2 1
+3.3V_RUN
U14
PCH_CRT_VSYNC 1 4
16 PCH_CRT_VSYNC PCH_CRT_HSYNC A0 VDD
16 PCH_CRT_HSYNC 2 A1 VDD 16
PCH_CRT_RED 5 23
16 PCH_CRT_RED PCH_CRT_GRN A2 VDD
16 PCH_CRT_GRN 6 A3 VDD 29
PCH_CRT_BLU 7 32
16 PCH_CRT_BLU A4 VDD
CRT_SWITCH 8 27 VSYNC_BUF
SEL1 0B1 HSYNC_BUF VSYNC_BUF 31
1B1 25
RED_CRT HSYNC_BUF 31
2B1 22
PCH_CRT_DDC_DAT GREEN_CRT RED_CRT 31
16 PCH_CRT_DDC_DAT 9 A5 3B1 20
PCH_CRT_DDC_CLK BLUE_CRT GREEN_CRT 31
16 PCH_CRT_DDC_CLK 10 A6 4B1 18 BLUE_CRT 31
12 DAT_DDC2_CRT
CRT_SWITCH 5B1 CLK_DDC2_CRT DAT_DDC2_CRT 31
41 CRT_SWITCH 30 SEL2 6B1 14
CLK_DDC2_CRT 31
26 VSYNC_DOCK
0B2 HSYNC_DOCK VSYNC_DOCK 40
1B2 24
RED_DOCK HSYNC_DOCK 40
3 GND 2B2 21
GREEN_DOCK RED_DOCK 40
11 GND 3B2 19
BLUE_DOCK GREEN_DOCK 40
28 17
GND 4B2 DAT_DDC2_DOCK BLUE_DOCK 40
31 13
GND 5B2 CLK_DDC2_DOCK DAT_DDC2_DOCK 40
33 15
GPAD 6B2 CLK_DDC2_DOCK 40
PI3V712-AZLEX_TQFN32_6X3~D
+3.3V_RUN
0.01U_0402_16V7K~D
0.01U_0402_16V7K~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0 A=B1 MB
1 1 1 1 1 1
1 A=B2 APR/SPR
C316
C317
C318
C319
C320
C321
2 2 2 2 2 2
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
CRT/Video switch
Size Document Number Rev
1.0
LA-6591P
Date: Monday, January 10, 2011 Sheet 25 of 66
2 1
2 1
+5V_RUN
2
3
D4
NC
BAT1000-7-F_SOT23-3~D
1
+5V_RUN_HDMI
2
F2 @ R5
0_1206_5%~D
2A_8VDC_SMD1812P200TF
1
B B
1 2
@ R451 0_0402_5%~D
L19 +VDISPLAY_VCC
16 TMDSB_PCH_CLK
C352 2 1 0.1U_0402_10V7K~D TMDSB_PCH_C_CLK 4 4 3 3 TMDSB_CON_CLK
0.1U_0402_10V7K~D
10U_0805_10V4Z~D
16 TMDSB_PCH_CLK#
C353 2 1 0.1U_0402_10V7K~D TMDSB_PCH_C_CLK# 1 2 TMDSB_CON_CLK# 1 1
TMDSB_PCH_C_P2 TMDSB_PCH_C_R 1 2
1 2
C337
C338
R449 680_0402_5%~D DLW21SN900HQ2L_0805_4P~D
TMDSB_PCH_C_N2 1 2 1 2
R448 680_0402_5%~D @ R459 0_0402_5%~D 2 2
TMDSB_PCH_C_P1 1 2
R450 680_0402_5%~D
TMDSB_PCH_C_N1 1 2
R452 680_0402_5%~D
TMDSB_PCH_C_P0 1 2
R453 680_0402_5%~D 1 2
TMDSB_PCH_C_N0 1 2 @ R462 0_0402_5%~D
R454 680_0402_5%~D L20
TMDSB_PCH_C_CLK 1 2 C350 2 1 0.1U_0402_10V7K~D TMDSB_PCH_C_P0 4 4 3 TMDSB_CON_P0 JHDMI1
16 TMDSB_PCH_P0 3 HDMIB_PCH_HPD_Q
R455 680_0402_5%~D 19
TMDSB_PCH_C_CLK# HP_DET
1 2 18 +5V
R456 680_0402_5%~D
16 TMDSB_PCH_N0
C351 2 1 0.1U_0402_10V7K~D TMDSB_PCH_C_N0 1 2 TMDSB_CON_N0 17
1 2 PCH_SDVO_CTRLDATA_R DDC/CEC_GND
16
DLW21SN900HQ2L_0805_4P~D PCH_SDVO_CTRLCLK_R SDA
15
SCL
1 2 14
Reserved
1
TMDSB_CON_N0 CK+
9
D0-
1 2 8
@ R468 0_0402_5%~D TMDSB_CON_P0 D0_shield
7
L21 TMDSB_CON_N1 D0+
6
D1-
16 TMDSB_PCH_P1
C348 2 1 0.1U_0402_10V7K~D TMDSB_PCH_C_P1 4 4
3
3 TMDSB_CON_P1 5
D1_shield
TMDSB_CON_P1 4 20
TMDSB_CON_N2 D1+ GND
3 21
D2- GND
16 TMDSB_PCH_N1
C349 2 1 0.1U_0402_10V7K~D TMDSB_PCH_C_N1 1
1 2
2 TMDSB_CON_N1 2
D2_shield GND
22
TMDSB_CON_P2 1 23
DLW21SN900HQ2L_0805_4P~D D2+ GND
1 2 TYCO_2041270-1
@ R469 0_0402_5%~D CONN@
1 2
@ R470 0_0402_5%~D
L22
16 TMDSB_PCH_P2
C346 2 1 0.1U_0402_10V7K~D TMDSB_PCH_C_P2 4
4 3
3 TMDSB_CON_P2
16 TMDSB_PCH_N2
C347 2 1 0.1U_0402_10V7K~D TMDSB_PCH_C_N2 1 2 TMDSB_CON_N2
1 2
DLW21SN900HQ2L_0805_4P~D
1 2
@ R471 0_0402_5%~D
+5V_RUN_HDMI
PCH_SDVO_CTRLDATA_R 1 2 +5V_HDMI_DDC
R1152 2.2K_0402_5%~D
PCH_SDVO_CTRLCLK_R 1 2
+3.3V_RUN R1153 2.2K_0402_5%~D
A +3.3V_RUN A
Q120A +3.3V_RUN
2
DMN66D0LDW-7_SOT363-6~D
1
R1168 1 6 PCH_SDVO_CTRLCLK_R
16 PCH_SDVO_CTRLCLK HDMI_CEC
1M_0402_5%~D 2 1
2
G
R1165 10K_0402_5%~D
5
2
3 1 HDMIB_PCH_HPD_Q
16 HDMIB_PCH_HPD
1
PCH_SDVO_CTRLDATA_R
S
16 PCH_SDVO_CTRLDATA 4 3
R1128
20K_0402_5%~D Q120B
Q121 DMN66D0LDW-7_SOT363-6~D
SSM3K7002FU_SC70-3~D
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, HDMI port
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. 1.0
LA-6591P +3.3V_RUN
Date: Monday, January 10, 2011 Sheet 26 of 66
2 1
5 4 3 2 1
+3.3V_RUN
AUX/DDC SW for DPC to E-DOCK 2 1
0.1U_0402_16V4Z~D
C356
C357 U20
D 0.1U_0402_10V7K~D D
1 BE0 VCC
14
2 1 DPC_AUX_C 2 13
16 DPC_PCH_DOCK_AUX A0 BE3
DPC_DOCK_AUX 3 12
40 DPC_DOCK_AUX B0 A3 PCH_DDPC_CTRLCLK 16
4 BE1 B3
11
2 1 DPC_AUX#_C 5 10
16 DPC_PCH_DOCK_AUX# A1 BE2
C360 0.1U_0402_10V7K~D
DPC_DOCK_AUX# 6 9
40 DPC_DOCK_AUX# B1 A2 PCH_DDPC_CTRLDATA 16
7 8
GND B2
PI3C3125LEX_TSSOP14~D
+5V_RUN
2 1
C365
0.1U_0402_16V4Z~D
1
U21
P
NC
DPC_CA_DET 2 4 DPC_CA_DET#
40 DPC_CA_DET A Y
G
NC7SZ04P5X-G_SC70-5~D
3
C C
+3.3V_RUN
AUX/DDC SW for DPD to E-DOCK 2 1 C366
0.1U_0402_16V4Z~D
C367 U23
0.1U_0402_10V7K~D 1 14
DPD_AUX_C BE0 VCC
16 DPD_PCH_DOCK_AUX 2 1 2
A0 BE3 13
DPD_DOCK_AUX 3 12
40 DPD_DOCK_AUX B0 A3 PCH_DDPD_CTRLCLK 16
4 11
DPD_AUX#_C BE1 B3
16 DPD_PCH_DOCK_AUX# 2 1 5 10
C368 0.1U_0402_10V7K~D A1 BE2
DPD_DOCK_AUX# 6 9
40 DPD_DOCK_AUX# B1 A2 PCH_DDPD_CTRLDATA 16
7 8
GND B2
PI3C3125LEX_TSSOP14~D
B B
+5V_RUN
2 1
C369
0.1U_0402_16V4Z~D
5
U24
P
NC
DPD_CA_DET 2 4 DPD_CA_DET#
40 DPD_CA_DET A Y
G
NC7SZ04P5X-G_SC70-5~D
3
+3.3V_RUN
1 2 PCH_DDPC_CTRLCLK
R487 2.2K_0402_5%~D Intel WW18 Strapping option
1 2 PCH_DDPC_CTRLDATA
R488 2.2K_0402_5%~D
1 2 PCH_DDPD_CTRLCLK
A R489 2.2K_0402_5%~D A
PCH_DDPD_CTRLDATA
Intel WW18 Strapping option
1 2
R490 2.2K_0402_5%~D
DELL CONFIDENTIAL/PROPRIETARY
1 2 DPD_CA_DET
R491
1
1M_0402_5%~D
2 DPC_CA_DET Compal Electronics, Inc.
R492 1M_0402_5%~D PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, DP122/DP512
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. 1.0
LA-6591P
Date: Monday, January 10, 2011 Sheet 27 of 66
5 4 3 2 1
5 4 3 2 1
+3.3V_RUN
1
PJP63
PAD-OPEN1x1m
2
+3.3V_RUN_HDDR
0.01U_0402_16V7K~D
0.1U_0402_16V4Z~D
+3.3V_RUN
1 1
HDD Repeater
C381
C382
D D
0_0402_5%~D
0_0402_5%~D
1
2
2 2
0_0402_5%~D
@ R493
0_0402_5%~D
@ R494
R1171
R1169
U25
1
7 6 +HDD_DEW2
EN VCC
18 10
PSATA_PTX_DRX_P0 CAD VCC +HDD_DEW1
14 PSATA_PTX_DRX_P0_C 2 1 16
C383 0.01U_0402_16V7K~D VCC
1 20
PSATA_PTX_DRX_N0 AINP VCC
14 PSATA_PTX_DRX_N0_C 2 1 2 AINM
C384 0.01U_0402_16V7K~D 9 HDD_PE1
PSATA_PRX_DTX_N0 PA HDD_PE2
2 1 4 8
14 PSATA_PRX_DTX_N0_C C386 0.01U_0402_16V7K~D BOUTM PB
5 BOUTP
10K_0402_5%~D
10K_0402_5%~D
+3.3V_RUN 2 1 PSATA_PRX_DTX_P0 15 PSATA_PTX_DRX_P0_RP
14 PSATA_PRX_DTX_P0_C AOUTP
1
@R1172
@
@R1170
@
0_0402_5%~D
0_0402_5%~D
C385 0.01U_0402_16V7K~D 3 14 PSATA_PTX_DRX_N0_RP
GND AOUTM
R1172
R1170
R496
R495
13 GND
+HDD_EQ1 17 11 PSATA_PRX_DTX_P0_RP
GND BINP
1
2
EP
10K_0402_5%~D
10K_0402_5%~D
PAD-OPEN1x1m
1
@ R1173
@ R1175
MAX4951BECTP+TGH7_TQFN20_4X4~D
Free Fall Sensor
2
+3.3V_RUN_FFS
2
10U_0805_6.3V6M~D
1
C387
0_0402_5%~D
0_0402_5%~D
C388 DE351DLTR
C 0.1U_0402_16V4Z~D no stuff R1174, R1176 to support TI SN75LVCP601 C
R1174
2 2
R1176
1 VDD_IO
6 VDD GND 2
4
2
HDD_FALL_INT GND
8 INT 1 GND 5
17 HDD_FALL_INT FFS_INT2 9 INT 2 GND 10
12
SDO
7,12,13,14,15,36 DDR_XDP_WAN_SMBDAT 13
SDA / SDI / SDO
7,12,13,14,15,36 DDR_XDP_WAN_SMBCLK 14
SCL / SPC
3 +3.3V_RUN
RSVD
7
CS RSVD
11
HDD PWR
DE351DLTR8_LGA14_3X5~D
+5V_ALW
+15V_ALW
+3.3V_ALW2
For HDD Temp.
1
@ R499
1
2
5
6
+3.3V_RUN 100K_0402_5%~D
1
JSATA1 D @ Q27
1 @ R500 G
2
GND
1 2 DDR_XDP_WAN_SMBDAT PSATA_PTX_DRX_P0_RP C389 2 1 0.01U_0402_16V7K~D SATA_PTX_DRX_P0 2 100K_0402_5%~D HDD_EN_5V 3 SI3456DDV-T1-GE3_TSOP6~D
PSATA_PTX_DRX_N0_RP C390 2 RX+
R501 10K_0402_5%~D 1 0.01U_0402_16V7K~D SATA_PTX_DRX_N0 3 S
RX-
DMN66D0LDW-7_SOT363-6~D
1 2 DDR_XDP_WAN_SMBCLK 4 +5V_HDD +5V_RUN
4
GND
3
R502 10K_0402_5%~D PSATA_PRX_DTX_N0_RP 2 1 SATA_PRX_DTX_N0 5 PJP3
TX-
@ Q28B
0.1U_0603_50V4Z~D
1 2 HDD_FALL_INT PSATA_PRX_DTX_P0_RP C391 2 1 0.01U_0402_16V7K~D SATA_PRX_DTX_P0 6
TX+
1
1 2
2
10U_0805_10V4Z~D
R503 100K_0402_5%~D C392 0.01U_0402_16V7K~D 7
GND JUMP_43X79
PJP64 5 1 1
1
@ C393
8
3.3V SHORT DEFAULT
6
DMN66D0LDW-7_SOT363-6~D
C394
B +3.3V_RUN_HDD B
+3.3V_RUN 1 2 9
4
3.3V
@ Q28A
10 R504
3.3V 2 2 100K_0402_5%~D
11
PAD-OPEN1x1m HDD_DET# GND
12 42 HDDC_EN 2
2
14 HDD_DET# GND
13
GND
+5V_HDD 14
1
5V
1
15
+3.3V_RUN +5V_HDD +5V_HDD 5V R505
16
17
5V
GND
100K_0402_5%~D +5V_HDD Source
FFS_INT2_Q 18 23
Reserved GND1
1000P_0402_50V7K~D
19 24
2
GND GND2
1
20
@R506
@ R506 12V
1 1 21
100K_0402_5%~D 12V
22
12V
C395
C396
2
G
0.1U_0402_16V4Z~D JAE_SP100421-HDD
2
D16 2 2 CONN@
FFS_INT2 3 1 1 2 FFS_INT2_Q
18 FFS_INT2
Main SATA +5V Default
S
RB751S40T1_SOD523-2~D
Q29
SSM3K7002FU_SC70-3~D
Pleace near HDD CONN
+3.3V_RUN_HDD
0.1U_0402_16V4Z~D
A A
1 1
C402
C399
0.1U_0402_16V4Z~D
2 2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
Pleace near HDD CONN TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT HDD CONNECTOR
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Size Document Number Rev
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD 1.0
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. LA-6591P
Date: Monday, January 10, 2011 Sheet 28 of 66
5 4 3 2 1
5 4 3 2 1
+3.3V_ALW
1 2 ZODD_WAKE#
R510 10K_0402_5%~D
1
R513
2 MOD_MD
10K_0402_5%~D For ODD
+3.3V_ALW_PCH
D D
1 2 USB30_SMI#
R514 100K_0402_5%~D
1
C407 2 1 0.01U_0402_16V7K~D SATA_ODD_PTX_DRX_N1 3 +3.3V_ALW2
14 SATA_ODD_PTX_DRX_N1_C A-
C406 0.01U_0402_16V7K~D 4 R507
SATA_ODD_PRX_DTX_N1 GND 100K_0402_5%~D
14 SATA_ODD_PRX_DTX_N1_C 2 1 5 B-
1
2
5
6
C405 2 1 0.01U_0402_16V7K~D SATA_ODD_PRX_DTX_P1 6
14 SATA_ODD_PRX_DTX_P1_C C404 0.01U_0402_16V7K~D B+ R509 D Q30
7
2
GND 100K_0402_5%~D G
8 2 MOD_EN 3 SI3456DDV-T1-GE3_TSOP6~D
42 DEVICE_DET# DP S
+5V_MOD +5V_MOD 9
2
+5V
3
DMN66D0LDW-7_SOT363-6~D
10 +5V_MOD +5V_RUN
4
+5V
0.1U_0603_50V4Z~D
MOD_MD 11 @ PJP4
MD
1000P_0402_50V7K~D
Q31B
12 GND 1 1 2 2
0.1U_0402_16V4Z~D
10U_0805_10V4Z~D
1 1 13 MODC_EN# 5 1
GND
1
1 JUMP_43X79
6
C397
C398
DMN66D0LDW-7_SOT363-6~D
C400
14 R511
4
GND
C401
15 100K_0402_5%~D
2 2 15 CLK_PCIE_EMB REFCLK+ 2
Q31A
15 CLK_PCIE_EMB# 16 REFCLK- 2
17 41 MODC_EN 2
2
GND
15 PCIE_PRX_EMBTX_P4 18 PETX+
1
15 PCIE_PRX_EMBTX_N4 19
1
C PETX- R512 C
20 GND
21 100K_0402_5%~D
GND
15 PCIE_PTX_EMBRX_P4
0.1U_0402_10V7K~D 2 1 C409 PCIE_PTX_EMBRX_P4_C 22 PERX+
15 PCIE_PTX_EMBRX_N4
0.1U_0402_10V7K~D 2 1 C408 PCIE_PTX_EMBRX_N4_C 23
2
PERX-
Pleace near ODD CONN 24 GND
+5V_MOD 25 +5V
EMBCLK_REQ# 26
15 EMBCLK_REQ# PCIE_WAKE# CLKREQ#
36,37,41 PCIE_WAKE# 27
PLTRST_EMB# WAKE#
17 PLTRST_EMB# 28
BAY_SMBDAT PERST#
42,46 BAY_SMBDAT 29 32
BAY_SMBCLK SMB_DATA GND1
42,46 BAY_SMBCLK 30 33
SMB_CLK GND2
41 MOD_SATA_PCIE#_DET 31
HPD
+3.3V_ALW 1 2 TYCO_2-2129116-3
R1183 10K_0402_5%~D CONN@
+3.3V_ALW
B Q76 B
SSM3K7002FU_SC70-3~D
1
S
2
MODC_EN#
USB30_EN
Q123B
6
DMN66D0LDW-7_SOT363-6~D
4 3 USB30_SMI#
USB30_SMI# 14
Q123A
MOD_SATA_PCIE#_DET 2 DMN66D0LDW-7_SOT363-6~D
5
USB30_EN
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT ODD CONNECTOR
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Size Document Number Rev
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD 1.0
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. LA-6591P
Date: Monday, January 10, 2011 Sheet 29 of 66
5 4 3 2 1
2 1
10U_0805_10V6K~D
1U_0603_10V6K~D
0.1U_0402_16V4Z~D
1U_0603_10V6K~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1U_0603_10V6K~D
0.1U_0402_16V4Z~D
10U_0805_10V6K~D
20 mils trace JSPK1 CONN@
INT_SPK_L+ L91 1 2 BLM18BD121SN1D_2P~D INT_SPK_L+_L 1
1 1 1 1 Place C951~C961 close to Codec 1 1 1 1 1
1
C994
C953
C955
C956
C957
C1172
C1173
INT_SPK_L- L92 1 2 BLM18BD121SN1D_2P~D INT_SPK_L-_L 2 2
C952
C954
INT_SPK_R+ L93 1 2 BLM18BD121SN1D_2P~D INT_SPK_R+_L 3 5
INT_SPK_R- L94 BLM18BD121SN1D_2P~D INT_SPK_R-_L 3 G1 2 2 2 2 U72 2 2 2 2 2
1 2 4 6
4 G2
1 27
MOLEX_53398-0471~D DVDD_CORE AVDD1 R1095
38
AVDD2 0_0805_5%~D
680P_0402_50V7K~D
680P_0402_50V7K~D
680P_0402_50V7K~D
680P_0402_50V7K~D 3 45 +VDDA_PVDD 1 2
DVDD_IO PVDD +5V_RUN
2
PESD5V0U2BT_SOT23-3~D
PESD5V0U2BT_SOT23-3~D
39
PVDD
@ DE1
@ DE2
10U_0805_10V6K~D
0.1U_0402_16V4Z~D
10U_0805_10V6K~D
0.1U_0402_16V4Z~D
1 1 1 1
1 1 1 1 9 13 AUD_SENSE_A
DVDD SENSE_A
C958
C959
C960
C961
14 AUD_SENSE_B
SENSE_B
C973
C974
C975
C976
MIC_IN_L MIC_IN_R 31 2 2 2 2
28 1 2
2 2 2 2 PCH_AZ_CODEC_BITCLK PORTA_L MIC_IN_RR C1162 1U_0402_6.3V6K~D
14 PCH_AZ_CODEC_BITCLK 6 29
BITCLK PORTA_R
VrefOut_A
23 1 2 +VREFOUT_R
PCH_AZ_CODEC_SDOUT 5 R1154 2.2K_0402_5%~D
14 PCH_AZ_CODEC_SDOUT +VREFOUT
1
SDATA_OUT AUD_HP_OUT_L
PORTB_L 31
AUD_HP_OUT_R AUD_HP_OUT_L 31
14 PCH_AZ_CODEC_SYNC 10 SYNC PORTB_R 32
AUD_HP_OUT_R 31
Place R1096 close to codec MIC_IN_L and MIC_IN_RR Pop R161 0-ohm for Combo Jack,
1 2 PCH_AZ_SDIN0_R 8 40 INT_SPK_L+
B 14 PCH_AZ_CODEC_SDIN0 R1096 33_0402_5%~D SDATA_IN PORTD_+L INT_SPK_L- must symmetric in layout pop C1164 1UF for E2 backup circuit B
PORTD_-L 41
PCH_AZ_CODEC_RST# 11 MIC_IN_RR 1 2
14 PCH_AZ_CODEC_RST# RESET#
44 INT_SPK_R+ R161 0_0402_5%~D
PORTD_+R INT_SPK_R- +VREFOUT_R 2 MIC_IN_R
PORTD_-R 43 1
D70 RB751V-40GTE-17_SOD323-2~D
I2S_12MHZ 15 25 1 2 SPKR_R 1 2
I2S_MCLK MONO_OUT SPKR 14
C1105 0.1U_0402_16V4Z~D R1119 100K_0402_5%~D
I2S_BCLK 16 12 AUD_PC_BEEP 1 2 BEEP_R 1 2
I2S_SCLK PC_BEEP BEEP 42
C1106 0.1U_0402_16V4Z~D R1120 100K_0402_5%~D
I2S_DO 1 2 I2S_DO_R 17 LE93 1 2
R1097 33_0402_5%~D I2S_DOUT DMIC_CLK_L1 @ R1141 10K_0402_5%~D
DMIC_CLK/GPIO 1 2 2
I2S_LRCLK BLM18BB221SN1D_2P~D DMIC_CLK 24
Place R1097 close to codec 18 I2S_LRCLK DMIC_0/GPIO 2 4 DMIC0 24 1 2
46 @ R1142 10K_0402_5%~D
I2S_DI# DMIC1/GPIO0/SPDIFOUT1
Close to U16 pin5 Close to U16 pin6 24 I2S_DIN SPDIFOUT0//GPIO3/Aux_Out 48 Place R1106 close to codec
CAP+ 36
PCH_AZ_CODEC_SDOUT PCH_AZ_CODEC_BITCLK 1
19 C962
No Connect 4.7U_0603_10V6K~D
1
+3.3V_RUN CAP2
1 1 34
V-
1U_0603_10V6K~D
7 37 1
DVSS Vreg
4.7U_0603_10V6K~D
4.7U_0603_10V6K~D
1U_0603_10V6K~D
10U_0805_10V6K~D
@C978
@C978 @ C977 1 1 1 1
C1180
0.1U_0402_10V7K~D 10P_0402_50V8J~D 1 2 42 26
2 2 PVSS AVSS1
C963
C964
C965
C966
R1099 10K_0402_5%~D 30
AVSS 2
49 33
GND AVSS 2 2 2 2
92HD90B2X5NLGXYAX8_QFN48_7X7~D
1 2
+3.3V_RUN +3.3V_RUN
0.1U_0402_10V7K~D
39.2K_0402_1%~D
1
1
C980
@ R352
R1086 @ C983
2
DA204U_SOT323-3~D
DA204U_SOT323-3~D
DA204U_SOT323-3~D
DA204U_SOT323-3~D
20K_0402_1%~D 100P_0402_50V8J~D 2
1
C1103
@ D54
@ D55
@ D56
@ D57
GNDA1 2
@ R1088 R1087
2
1
VCC
I2S_BCLK 1 2 2 3
RE1098 33_0402_5%~D 1A 1Y# DAI_BCLK# 40
31 AUD_MIC_SWITCH 2 5 AUD_HP_NB_SENSE 31,41 PORT B HeadPhone Out
I2S_LRCLK 4 5
Q107A Q107B 2A 2Y# DAI_LRCK# 40
1
1
41 EN_I2S_NB_CODEC# 1
OE1#
2 1 15 8
OE2# GND +3.3V_RUN
R1110
Place closely to Pin 14 1K_0402_5%~D CD74HC366M96_SO16~D
+VDDA_AVDD Resistor SENSE_A SENSE_B
2
R1078
2.49K_0402_1%~D @ D58
AUD_SENSE_B 2 1 39.2K PORT A (HP0) PORT E DA204U_SOT323-3~D
1000P_0402_50V7K~D
1
20K PORT B (HP1) PORT F
1
1
+3.3V_RUN
C979
R1081
2
100K_0402_5%~D R1082
100K_0402_5%~D
DELL CONFIDENTIAL/PROPRIETARY
2
2 5
Compal Electronics, Inc.
41 DOCK_HP_DET DOCK_MIC_DET 41 PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
Q106A Q106B TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
Azalia (HD) Codec
1
DMN66D0LDW-7_SOT363-6~D DMN66D0LDW-7_SOT363-6~D BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. 1.0
LA-6591P
Date: Monday, January 10, 2011 Sheet 30 of 66
2 1
5 4 3 2 1
SW1
42,43 POWER_SW#_MB
POWER_SW#_MB 2 1 I/O board CONN.
Change to TYCO_2041300-2_60P-T and Horizonal reverse to SSI
4 3
SKRBAAE010_4P~D JIO1
2 1
2 1 IO_LOOP# 18
32 SW_LAN_TX0+ 4 3 VSYNC_BUF 25
4 3
32 SW_LAN_TX0- 6 5 HSYNC_BUF 25
D @ D23 6 5 D
8 7
8 7
3 32 SW_LAN_TX1- 10
10 9
9 RED_CRT 25
1 PESD24VS2UT_SOT23-3~D 12 11
32 SW_LAN_TX1+ 12 11 GREEN_CRT 25
2 14 13 BLUE_CRT 25
14 13
32 SW_LAN_TX2+ 16 15
16 15
32 SW_LAN_TX2- 18 17 DAT_DDC2_CRT 25
@ SW2 18 17
20 19 CLK_DDC2_CRT 25
LAT_ON_SW_BTN# 20 19
2 1 32 SW_LAN_TX3- 22
22 21
21
42 LAT_ON_SW_BTN#
32 SW_LAN_TX3+ 24 23
24 23 XFR_ID_BIT# 42
26 25
26 25
4 3 +5V_RUN 28
28 27
27
+3.3V_LAN 30 30 29 29 AUD_HP_OUT_R 30
SKRBAAE010_4P~D +5V_ALW 32 31 MIC_IN_R +5V_ALW
32 LED_100_ORG# 32 31 MIC_IN_R 30
32 LED_10_GRN# 34 34 33 33 AUD_HP_OUT_L 30
32 LAN_ACTLED_YEL# 36 36 35 35
38 38 37 37
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1 40 40 39 39 1
42 42 41 41
C50
C1003
44 44 43 43 +3.3V_ALW_PCH
17,39 USB_OC1#
46 45
POWER & INSTANT ON SWITCH 2
17 USBP3+ 48
46
48
45
47 47 PCH_AZ_MDC_RST1# 2
17 USBP3- 50 50 49 49 PCH_AZ_MDC_SDIN1 14
52 52 51 51 PCH_AZ_MDC_SYNC 14
39,41 ESATA_USB_PWR_EN# 54 54 53 53
PCH_AZ_MDC_SDOUT 14
56 55
Defult on, Media Board 30,41 AUD_HP_NB_SENSE
DETECT_GND
58
56
58
55
57 57 PCH_AZ_MDC_BITCLK 14
60 60 59 59
WIRELESS_ON/OFF#:
JMDIA1 62 61
LOW: ON 42 VOL_MUTE 1 1 64
GND
GND
GND
GND 63
2 66 65 Analog_GND
HIGH: OFF 42 VOL_DOWN
3
2 GND GND
C 42 VOL_UP 3 C
4 4
+3.3V_ALW 5 5 TYCO_2041300-2
6 6
41 WIRELESS_ON#/OFF CONN@ +3.3V_ALW_PCH
41,45 LID_CL# 7 7
8 +3.3V_LAN
8
0.1U_0402_16V4Z~D
9 9 1
0.1U_0402_16V4Z~D
10 10 1
0.1U_0402_16V4Z~D
C1000
1 11 13
11 GND
C997
12 14
18 MEDIA_DET# 12 GND 2
C1001
TYCO_1-2041070-2~D 2
2 CONN@
Place close
Place close to JIO1.35
to JIO1.13
LED Board
JLED1
1
18 LEDB_DET# 1
45 BATT_WHITE 2
2
45 BATT_YELLOW 3
3
45 SATA_LED 4
4
45 WLAN_LED 5 7
5 G1 PJP65 PAD-OPEN1x1m
6 8
6 G2
1 2
B TYCO_2041084-6~D B
CONN@
+5V_MIC @ Q33
@ R425 @ C307 +5V_RUN SI2301CDS-T1-GE3_SOT23-3~D
D
1 2 1 2 3 1 +5V_MIC
0.1U_0402_16V4Z~D
1 100K_0402_5%~D
0.1U_0402_16V4Z~D
G
2
5
@ C308 @ U6
2
RB751V-40GTE-17_SOD323-2~D
P
2 IN+ @ R424
4
O AUD_MIC_SWITCH 30
1
3 47K_0402_5%~D
IN-
G
2
@ R38 LMV331IDCKRG4_SC70-5~D
1
@ D71
560K_0402_1%~D
+5V_ALW_MIC_G
2
@ Q46
SSM3K7002FU_SC70-3~D
1
1 3
S
@ R33
47K_0402_1%~D
Q44
G
2
SSM3K7002FU_SC70-3~D MIC_IN_R
2
AUD_HP_NB_SENSE
PCH_AZ_MDC_RST1# 30,41 AUD_HP_NB_SENSE
1 3 SI2301CDS: P CHANNAL
D
14 PCH_AZ_MDC_RST#
+5V_ALW
need to route the trace as short as possible
G
2
A A
R751
1
100K_0402_5%~D
R752
10K_0402_5%~D
DELL CONFIDENTIAL/PROPRIETARY
2
2
+3.3V_LAN
+3.3V_RUN
1 2 TP_LAN_JTAG_TMS
1
@ R545 10K_0402_5%~D
1 2 TP_LAN_JTAG_TCK R547
@ R546 10K_0402_5%~D 10K_0402_5%~D
2
U31
Default solution:
1 2 LANCLK_REQ#_R 48 13 LAN_TX0+ PCH +1.05V_M SVR - stuff R119, unstuff L99
15 LANCLK_REQ# R1187 0_0402_5%~D CLK_REQ_N MDI_PLUS0 LAN_TX0-
17 PLTRST_LAN# 36 14 Also, option to use iSVR - stuff L99, unstuff R119
D PE_RST_N MDI_MINUS0 D
CLK_PCIE_LAN 44 17 LAN_TX1+
15 CLK_PCIE_LAN CLK_PCIE_LAN# PE_CLKP MDI_PLUS1 LAN_TX1-
15 CLK_PCIE_LAN# 45 18
PCIE
PE_CLKN MDI_MINUS1
MDI
15 PCIE_PRX_GLANTX_P7 2 1 PCIE_PRX_GLANTX_P7_C
C458 0.1U_0402_10V7K~D 38 20 LAN_TX2+
PETp MDI_PLUS2 +1.0V_LAN +1.05V_M
15 PCIE_PRX_GLANTX_N7 2 1 PCIE_PRX_GLANTX_N7_C 39
PETn MDI_MINUS2
21 LAN_TX2-
C459 0.1U_0402_10V7K~D @R548
@ R548
+3.3V_LAN 1 2 PCIE_PTX_GLANRX_P7_C 41 23 LAN_TX3+ L29 0_0805_5%~D
15 PCIE_PTX_GLANRX_P7 PERp MDI_PLUS3 LAN_TX3- REGCTL_PNP10
C460 0.1U_0402_10V7K~D 42 24 1 2 1 2
PERn MDI_MINUS3
10U_0805_6.3V6M~D
0.1U_0402_10V7K~D
15 PCIE_PTX_GLANRX_N7 1 2 PCIE_PTX_GLANRX_N7_C
1
C462
C463
R549 R551 0_0402_5%~D 28 6 Idc max=330mA
SMBUS
SMB_CLK RSVD_NC
10K_0402_5%~D
15 LAN_SMBCLK 1 2 LAN_SMBCLK_R 31 SMB_DATA
15 LAN_SMBDATA 1 2 LAN_SMBDATA_R 1 +RSVD_VCC3P3_1 2 1 +3.3V_LAN
R552 0_0402_5%~D RSVD_VCC3P3_1 +RSVD_VCC3P3_2 R553 2 2 2
2 1 4.7K_0402_1%~D
2
RSVD_VCC3P3_2
SMBus Device Address 0xC8 VDD3P3_IN 5 R554 4.7K_0402_1%~D
1 2 LAN_DISABLE#_R 3
18 PM_LANPHY_ENABLE LAN_DISABLE_N +3.3V_LAN_OUT
R555 0_0402_5%~D 4
VDD3P3_OUT
41 LAN_DISABLE#_R Place R548, C462, C463 and L29 close to U31
VDD3P3_15 15 1
1
LOM_ACTLED_YEL# 26 19
@ R557 LOM_SPD100LED_ORG# LED0 VDD3P3_19 C464
27 LED1 VDD3P3_29 29
LED
10K_0402_5%~D LOM_SPD10LED_GRN# 25 +1.0V_LAN 1U_0603_10V6K~D
LED2 2
47 +1.0V_LAN +3.3V_LAN
2
VDD1P0_47
VDD1P0_46 46
T142 PAD~D TP_LAN_JTAG_TDI 32 37
T143 PAD~D TP_LAN_JTAG_TDO JTAG_TDI VDD1P0_37
34 JTAG_TDO
JTAG
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
TP_LAN_JTAG_TMS 33 43
TP_LAN_JTAG_TCK JTAG_TMS VDD1P0_43
35 JTAG_TCK 1 1 1 1 1 1
C1177
C1178
R1144 11
VDD1P0_11
C466
C467
C468
C469
0_0402_5%~D
C XTALO C
1 2 9 XTAL_OUT VDD1P0_40 40
XTALI 10 22 2 2 2 2 2 2
Y3 XTAL_IN VDD1P0_22
VDD1P0_16 16
25MHZ_18PF_7A25000110~D 8
LAN_TEST_EN VDD1P0_8
1 2 30 TEST_EN
33P_0402_50V8J~D
33P_0402_50V8J~D
1
C470
C471
1K_0402_5%~D
3.01K_0402_1%~D
Note:
+3.3V_M
R561
R562
2
Shared with PCH @ R563
Need to verify A3 silicon drive R1200 Resistor Value: 1.05V SVR * Internal SRV 0_1206_5%~D
power before removing C427 3.01 kohm for Hanksville-M LOM
1
KDS crystal vender verify 2.37 kohm for Hanksville-D LOM STUFF: R548 STUFF: L29 Q34
driving level in A3 NO STUFF: L29 NO STUFF: R548 +3.3V_ALW +3.3V_LAN
SI3456DDV-T1-GE3_TSOP6~D
+15V_ALW
D
6
S
+3.3V_ALW2 5 4
1
+3.3V_LAN 2
10U_0603_6.3V6M~D
0.1U_0402_10V7K~D
R564 1 1 1
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
100K_0402_5%~D
C475
C476
2 2 2
3
1
2
2 2
C472
C473
C474
R565 ENAB_3VLAN
LAN ANALOG 100K_0402_5%~D
3
1 1 1
DMN66D0LDW-7_SOT363-6~D
2200P_0402_50V7K~D
B B
SWITCH
Q35B
39
30
21
14
1
8
4
1
U32 5
C477
VDD
VDD
VDD
VDD
VDD
VDD
VDD
6
DMN66D0LDW-7_SOT363-6~D
38 SW_LAN_TX0+
SW_LAN_TX0+ 31
4
B0+ SW_LAN_TX0- 2
37 SW_LAN_TX0- 31
B0-
Q35A
LAN_TX0+ 1 2 LAN_TX0+R 2
L30 12NH_0603CS-120EJTS_5%~D A0+ SW_LAN_TX1+
34 SW_LAN_TX1+ 31 42 AUX_ON 1 2 2
LAN_TX0- LAN_TX0-R B1+ SW_LAN_TX1- R566 0_0402_5%~D
1 2 3
A0- B1-
33 SW_LAN_TX1- 31
L31 12NH_0603CS-120EJTS_5%~D
1
29 SW_LAN_TX2+ 1 2
LAN_TX1+ 1 LAN_TX1+R B2+ SW_LAN_TX2- SW_LAN_TX2+ 31 16,41 SIO_SLP_LAN#
2 6 28 @ R567 0_0402_5%~D
L33 12NH_0603CS-120EJTS_5%~D A1+ B2- SW_LAN_TX2- 31
LAN_TX1- 1 2 LAN_TX1-R 7 25 SW_LAN_TX3+
A1- B3+ SW_LAN_TX3+ 31
L32 12NH_0603CS-120EJTS_5%~D 24 SW_LAN_TX3-
B3- SW_LAN_TX3- 31
LAN_TX2+ 1 2 LAN_TX2+R 9 17 LAN_ACTLED_YEL#
A2+ LEDB0 LED_100_ORG# LAN_ACTLED_YEL# 31
L34 12NH_0603CS-120EJTS_5%~D 18
LAN_TX2- LAN_TX2-R LEDB1 LED_10_GRN# LED_100_ORG# 31
1 2 10 41 LED_10_GRN# 31
L35 12NH_0603CS-120EJTS_5%~D A2- LEDB2 +3.3V_LAN C478
36 DOCK_LOM_TRD0+ 0.1U_0402_10V7K~D
LAN_TX3+ 1 LAN_TX3+R C0+ DOCK_LOM_TRD0- DOCK_LOM_TRD0+ 40
2 11 35 DOCK_LOM_TRD0- 40 1 2
L36 12NH_0603CS-120EJTS_5%~D A3+ C0-
LAN_TX3- 1 2 LAN_TX3-R 12 32 DOCK_LOM_TRD1+
A3- C1+ DOCK_LOM_TRD1+ 40
5
L37 12NH_0603CS-120EJTS_5%~D 31 DOCK_LOM_TRD1-
C1- DOCK_LOM_TRD1- 40 LOM_SPD100LED_ORG# 1
P
DOCKED DOCK_LOM_TRD2+ B
13 27 4
41 DOCKED SEL C2+ DOCK_LOM_TRD2- DOCK_LOM_TRD2+ 40 LOM_SPD10LED_GRN# O WLAN_LAN_DISB# 41
26 2
C2- DOCK_LOM_TRD2- 40 A
G
LOM_ACTLED_YEL# 15 23 DOCK_LOM_TRD3+ TC7SH08FU_SSOP5~D
DOCK_LOM_TRD3+ 40
3
LOM_SPD100LED_ORG# LEDA0 C3+ DOCK_LOM_TRD3- U15
16 LEDA1 C3- 22 DOCK_LOM_TRD3- 40
A LOM_SPD10LED_GRN# A
Layout Notice : Place bead as 42 LEDA2
19 DOCK_LOM_ACTLED_YEL#
close PI3L500 as possible LEDC0 DOCK_LOM_SPD100LED_ORG# DOCK_LOM_ACTLED_YEL# 40
5 PD LEDC1 20 DOCK_LOM_SPD100LED_ORG# 40
40 DOCK_LOM_SPD10LED_GRN#
LEDC2 DOCK_LOM_SPD10LED_GRN# 40
43 PAD_GND DELL CONFIDENTIAL/PROPRIETARY
1: TO DOCK
FROM NIC DOCKED
0: TO RJ45 TO
Compal Electronics, Inc.
PI3L720ZHEX_TQFN42_9X3P5~D Title
DOCK
Intel 82579 (Hanksville) / LAN SW
Size Document Number Rev
1.0
LA-6591P
Date: Monday, January 10, 2011 Sheet 32 of 66
5 4 3 2 1
5 4 3 2 1
S
3
D
R576 1.5K_0402_5%~D 1 2 OVSTB PJP56 U33D
2
+3.3V_ALW_USH R578 4.7K_0402_5%~D
R580 1 2 FP_RESET#
2 1
BCM5882
G
2
1 2 PLTRST1#_USH 4.7K_0402_5%~D R582 4.7K_0402_5%~D PAD-OPEN 2x2m~D REF_XIN G14 REFCLK_XTALIN UART_TX_GPIO_1 D4 UART_TX/GPIO1
@ R579 10K_0402_5%~D 1 2 SPI_RST REF_XOUT F14 C4 UART_RX/GPIO0
REFCLK_XTALOUT UART_RX_GPIO_0
1 2 USH_LPCEN R645 4.7K_0402_5%~D B3
UART
1
1@ R583 4.7K_0402_5%~D Q37 U33A JTAG_CLK_USH UART_CTS_GPIO_2 BT_COEX_STATUS2 FP_RESET# 23
UART_RTS_GPIO_3 A3 BT_COEX_STATUS2 43
+3.3V_ALW_USH
CLK
2 LPD# SSM3K7002FU_SC70-3~D @ R591 RST_N
1
BCM5882 G1 RST_N
1
@ R584 4.7K_0402_5%~D D R587 0_0402_5%~D 0_0402_5%~D
1 2 IRQ_SERIRQ_R 2USB_GPIO27
17 USBP7- 1 2 USBP7-_R P5 USBD_DN USBH_DN_0 P7 FP_USBD-
FP_USBD- 23 1 2
R581 4.7K_0402_5%~D G 1 2 USBP7+_R P6 P8 FP_USBD+ L14
D 17 USBP7+ USBD_UP USBH_UP_0 FP_USBD+ 23 NC D
1 2 USH_SMBCLK S USB_GPIO27 N7 P9 USBH_OC0# 2 1 JTAG_TDI_USH
3
R589 2.2K_0402_5%~D R588 0_0402_5%~D USBD_ATTACH_GPIO_27 USBH_OC_0 R590 4.7K_0402_5%~D JTAG_CLK_USH L1 JTAG_TCK
1 2 USH_SMBDAT USBH_DN_1 P11 JTAG_TDO_USH JTAG_TDI_USH M1 JTAG_TDI GPIO_4 J1 CONTACTLESS_DET#
R585 2.2K_0402_5%~D P12 @ R599 JTAG_TDO_USH N1 D2 SCC_CMDVCC_N_R
JTAG
USBH_UP_1 JTAG_TDO GPIO_14
1 2 BCM5882_ALERT# 15 CLK_PCI_TPM
CLK_PCI_TPM P2 LCLK USBH_OC_1 P10 USBH_OC1 0_0402_5%~D JTAG_TMS_USH N2 JTAG_TMS GPIO_15 C2 BCM5882_GPIO15
R592 2.2K_0402_5%~D R593 1 2 0_0402_5%~D N3 1 2 JTAG_RST#_USH L3 B1 BT_PRI_STATUS
14,34,41,42 LPC_LAD0 LAD0_GPIO_20 JTAG_TRSTN GPIO_16 BT_PRI_STATUS 43
1 2 USH_PWR_STATE# 14,34,41,42 LPC_LAD1
R594 1 2 0_0402_5%~D M4 LAD1_GPIO_21
JTCE_USH L2 JTCE
R586 4.7K_0402_5%~D R595 1 2 0_0402_5%~D K5 JTAG_TMS_USH
14,34,41,42 LPC_LAD2 LAD2_GPIO_22
1 2 USBH_OC1 R597 1 2 0_0402_5%~D N4 G3 SPI_CLK D3 CLKOUT
@
14,34,41,42 LPC_LAD3 LAD3_GPIO_23 SSP_CLK0_GPIO_6 CLKOUT T144 PAD~D
2
R596 4.7K_0402_5%~D R598 1 2 0_0402_5%~D K4 G2 SPI_CS JTAG_RST#_USH OVSTB E1
14,34,41,42 LPC_LFRAME# IRQ_SERIRQ_R LFRAME_N_GPIO_18 SSP_FSS0_GPIO_7 SPI_RXD @ R605 @ R601 OVSTB
14,34,41,42 IRQ_SERIRQ 1 2 L4 LSERIRQ_GPIO_19 SSP_RXD0_GPIO_8 H1
@ R600 0_0402_5%~D H2 SPI_TXD 0_0402_5%~D 0_0402_5%~D C1 SPI_RST
CLK_PCI_TPM PLTRST1#_USH SSP_TXD0_GPIO_9 SCANACCMODE RSTOUT_N
17 PLTRST_USH# 1 2 M3 LRESET_N_GPIO_17 1 2 E3 SCANACCMODE
SPI
R602 0_0402_5%~D USH_LPCEN M5 C3 BCMGPIO_10 @ T145 PAD~D
@@@@
T146PAD~D
LPC
1
LPCEN SSP_CLK1_GPIO_10
1
@
SSP_RXD1_GPIO_12 T148PAD~D SECURE_BOOT POR_MONITOR T149 PAD~D
10_0402_5%~D A1 BCMGPIO_13 T150PAD~D HF_RX_TEST0
USH_SMBCLK SSP_TXD1_GPIO_13 @ R621
42 USH_SMBCLK M9 SMBCLK
USH_SMBDAT L9 0_0402_5%~D USH_TESTMODE D1 K11 SWV
@
42 USH_SMBDAT T151 PAD~D
2
Smard Card
SC_DET R606 1 2 150_0402_5%~D R607 1 0_0402_5%~D BCM5882_SCCLK
PCI_TPM_TERM
2
BT_COEX_STATUS2 1 2 SMB_GPIO1 N8 M12 R608 2 1 0_0402_5%~D AUX1UC HF_RX_TEST1 POR_EXTR J14 C13 PLL_TESTOUT
@
SMB_GPIO_1 SC_FCB POR_EXTR PLL_TESTOUT T153 PAD~D
@ R1131 0_0402_5%~D F2 R609 2 1 0_0402_5%~D BCM5882_GPIO25 @ R626
SC_SEL5V_GPIO_25
4.7P_0402_50V8C~D
SM BUS
41 USH_PWR_STATE# 1 L7 WAKEUP_N SC_DET M2 2
1 2 USH_LPCEN R613 0_0402_5%~D L11 R616 2 1 0_0402_5%~D BCM5882_IO 0_0402_5%~D BCM5882KFBG_FBGA196~D
1
2@ R615 4.7K_0402_5%~D SC_IO R620 BCM5882_SCRST
1 2 K1 IDDQ_EN SC_RST M10 2 1 0_0402_5%~D 1 2
2 R619 1K_0402_5%~D N14 +SC_PWR
SC_PWR_N14
@ C486
1 2 P1 P14 HF_RX_TEST3
R622 1K_0402_5%~D CORE_PWRDN SC_PWR_P14 SC_TEST
SC_VCC L10 2 1 SCC_CMDVCC_N U33C
R623 0_0402_5%~D
C
1 R624
1 2
1K_0402_5%~D
E12 ALDO_PWRDN
1 2 RFTAG_VRXP A6
BCM5882 A8 RFREADER_TXP1 C
HF_RFIDTAG_VRX_P HF_TX_P
1 2 REF_XOUT R625 1 2 0_0402_5%~D RFTAG_VRXN B6 HF_RFIDTAG_VRX_N HF_TX_N B8 RFREADER_TXN1
R627 0_0402_5%~D R628 0_0402_5%~D
C5 A10 RFREADER_RXP
REF_XIN HF_RFIDTAG_VTX HF_RX_P RFREADER_RXN
1 2 All XTAL components and traces should be BCM5882KFBG_FBGA196~D C487 should be placed HF_RX_N B10
@ R612 10M_0402_5%~D
placed/layout on top layer. The gnd/pwr closer to pin A5
Y4 layer below will provide shielding from +3.3V_ALW_USH 1 2 A5 B9 HF_RX_TEST0
XI XO +1.2V_ALW_AVDD +2.5V_ALW_AVDD C487 0.01U_0402_16V7K~D HF_RFIDTAG_VREF HF_RX_TEST0 HF_RX_TEST1
1 IN OUT 3 27.12Mhz interference which might affect HF_RX_TEST1 C9
B4 C10 HF_RX_TEST2
2 4
cellular certification. +3.3V_ALW_SC +3.3V_ALW +1.2V_ALW_AVDD HF_RFIDTAG_DVDD1P2 HF_RX_TEST2
E9 HF_RX_TEST3
GND GND HF_RX_TEST3
4.7K_0402_5%~D
5.1M_0402_5%~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
10U_0603_6.3V6M~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
4.7U_0603_6.3V6K~D
10U_0603_6.3V6M~D
1 1
2
27.12MHZ_12PF_1N227120CC0B~D +2.5V_ALW_AVDD C6 D7 +RFID_AVDD1P2
HF_RFIDTAG_AVDD2P5_C6 HF_TX_AVDD1P2
R629
R630
C492 C493 PJP52 2 2 1 2 2 1 1 E6 F8
HF_RFIDTAG_AVDD2P5_E6 HF_RX_AVDD1P2
C490
C491
12P_0402_50V8J~D 15P_0402_50V8J~D 1 2 D10
2 2 HF_RX_ADC_AVDD1P2
C494
C495
C488
C496
C489
PAD-OPEN1x1m F9 +RFID_AVDD2P5
1
1
1 1 2 1 1 2 2 HF_RX_AVDD2P5
D6 HF_RFIDTAG_AVSS_D6 HF_TX_AVDD2P5 A7
B5
Smart Card +3.3V_ALW_SC
SBOOT
POR_EXTR
+5V_ALW_SC +5V_ALW
A4
HF_RFIDTAG_AVSS_B5
HF_RFIDTAG_DVSS
HF_TX_AVDD3P3_D8
HF_TX_AVDD3P3_B7
D8
B7
+RFID_AVDD3P3
+3.3V_ALW_SC
3.3M_0402_5%~D
PJP55
2
1 2 PORADJ 1 2 HF_TX_AVSS_C7 C7
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
10U_0805_10V6M~D
R634
1 2 PORADJ @ R631 4.7K_0402_5%~D 1 1 1 HF_TX_AVSS_C8 C8
R632 4.7K_0402_5%~D 1 2 CLKDIV2 +5V_ALW_SC PAD-OPEN1x1m E7
HF_TX_AVSS_E7
1
C497
C498
C499
2 2 2 HF_RX_AVSS_A9
0.1U_0402_16V4Z~D
10U_0805_10V6M~D
15K_0402_1%~D B11
C502 HF_RX_AVSS_B11
2 1
U34 0.1U_0402_16V4Z~D E8
2
HF_RX_ADC_AVSS1
C500
C501
1 RFREADER_RXP 1 2 RFREADER_RXP_C D9
B PORADJ VDD(intf) L39 HF_RX_ADC_AVSS2 B
18 PORadj VDD 17
CLKDIV1 1 2 150NH_0805CS-151EGTS_2%~D
6 CLKDIV1 +3.3V_ALW_USH 3
CLKDIV2 7 16 1 RFREADER_TXP1 1 2 BCM5882KFBG_FBGA196~D
SCC_CMDVCC_N_R CLKDIV2 VDDP
2
390P_0603_50V8G~D
390P_0603_50V8G~D
BCM5882_SCRST 3 15 +SC_VCC 1 1
RSTIN VCC
C503
C504
2 1SCC_CMDVCC_N 5 CMDVCCN
@ D25 DA204U_SOT323-3~D +3.3V_ALW_USH 3
BCM5882_GPIO25 2 14 R638 1 2 0_0402_5%~D SC_RST 1
@ R637 BCM5882_GPIO26 EN_5V/3VN RST R639 22_0402_5%~D SC_CLK
4 13 1 2 3 2
0_0402_5%~D
AUX1UC
AUX2UC
21
EN_1.8VN
AUX1UC
CLK
I/O
AUX1
9
10
R640
R641
R642
1
1
2
2
100_0402_5%~D
0_0402_5%~D
0_0402_5%~D
SC_IO
SC_C4
SC_C8
+3.3V_ALW_USH
2
1
@ D26
DA204U_SOT323-3~D
2 2
RFID
22 11 1 2
@
10P_0402_50V8J~D
2 2 3 3
1
25 GPAD GND 12 4 4
.47U_0402_6.3V6-K~D
C506
C507
R644 RFREADER_TXP1_PI 5 7
15K_0402_1%~D 5 G1
TDA8034HN_HVQFN24_4X4~D 2 18 CONTACTLESS_DET# 6 6 G2 8
1 1
C508
TYCO_2041084-6~D
2
SC_VCC should be 3X wide as +3.3V_ALW L40
1 CONN@ 150NH_0805CS-151EGTS_2%~D
+SC_VCC regular SC trace width to carry +3.3V_ALW_USH JBCM1 RFREADER_TXN1 1 2
~60mA max. current per ISO spec 1 connector list: 2041084-6
1
0.1U_0402_16V4Z~D
390P_0603_50V8G~D
390P_0603_50V8G~D
C1031 and C646 should be p UART_RX/GPIO0 2 1 1
2
10U_0805_10V4Z~D
0.22U_0402_10V6K~D
C511
C512
UART_TX/GPIO1 3 5 3
laced very close to SC cage pin Place C508 close 4
3 G1
6
+3.3V_ALW_USH
1
1 2 1 4 G2
@ C509
to U33 pin15 2
2 2 Hardware enable for USH TPM:Populate R841,
C510
C513
MOLEX_53398-0471~D
D28 @ No Stuff R483.
2 1 JSC1 CONN@ 2 DA204U_SOT323-3~D
A
Hardware disable for USH TPM:No Stuff A
1 +3.3V_ALW_USH
SC_RST 2
1 @ U35 U36 R841, Populate R483
SC_CLK 2 SPI_CS SPI_TXD SPI_RXD
3 3 1 /CS VCC 8 1 D Q 8
SC_C4 4 SPI_CLK 2 7 +3.3V_ALW_USH +2.5V_ALW_AVDD +1.2V_ALW_AVDD
4 SPI_RXD SPI_RST SPI_RST C VSS L41 BLM18BB100SN1D_2P~D L42 BLM18BB100SN1D_2P~D L43 BLM18BB100SN1D_2P~D
5 2 7 3 6
6
5
6
DO /HOLD SPI_CS 4
RESET#
S#
VCC
W# 5 BCM5882_GPIO15 2 1 +RFID_AVDD3P3 2 1 +RFID_AVDD2P5 2 1 +RFID_AVDD1P2 DELL CONFIDENTIAL/PROPRIETARY
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
SC_IO 7 BCM5882_GPIO15 3 6 SPI_CLK
7 /WP CLK
3.3U_0603_10V6K~D
1U_0603_10V6K~D
0.1U_0402_16V4Z~D
1U_0603_10V6K~D
1U_0603_10V6K~D
1U_0603_10V6K~D
1U_0603_10V6K~D
SC_C8
SC_DET
8
9
8
4 5 SPI_TXD
M45PE16-VMW6TG_SO8W8~D
1 2 1 2 2 1 1 1 1
Compal Electronics, Inc.
9 GND DIO Title
1 2 10 10
C516
C518
C519
C515
C517
C520
C521
C514
C522
BCM5882_GPIO15 1 2
R646 11 GND
W25X32VSSIG_SO8~D R647 4.7K_0402_5%~D USH BCM5882 (1/2)
1.5K_0402_5%~D 2 1 2 1 1 2 2 2 2 Size Document Number Rev
12 GND 1.0
FCI_10089709-010010LF~D LA-6591P
Date: Monday, January 10, 2011 Sheet 33 of 66
5 4 3 2 1
5 4 3 2 1
U33B
H14
BCM5882
+1.2V_ALW_PLL AVDD_1P2I_REF
+1.2V_ALW_AVDD A11 AVDD_1P2O_A11
A12 AVDD_1P2O_A12 AVSS_LDO12 C11
+2.5V_ALW_AVDD
H13 AVDD_2P5I AVSS_LDO25_B13 B13
E10 AVDD_2P5O_E10 AVSS_LDO25_C12 C12
+3.3V_ALW_USH E11 AVDD_2P5O_E11
B14
AVSS_PLL
A13
AVDD25_LDO12_A13
4.7U_0603_6.3V6K~D
B12 F13
D AVDD25_LDO12_B12 AVSS_REF D
1 D12
+1.2V_ALW_PLL PLL_AVSS
A14
AVDD25_PLL_A14
C523
E13
PLL_DVSS
+3.3V_ALW_USH 2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
10U_0603_6.3V6M~D
1 1 1 D11
AVDD33_LDO25
C524
C525
C526
G13
POR_AVSS
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
10U_0603_6.3V6M~D
+SC_PWR P13
2 2 2 OTP_PWR
2 2 2 2 2 2 2 1
C534
C527
C528
C529
C530
C531
C532
C533
1U_0402_6.3V6K~D
0.1U_0402_16V4Z~D
1 2 +1.2V_ALW_PLL D14 PLL_AVDD_1P2I
E14 PLL_AVDD_1P2O
1 1 1 1 1 1 1 2
C1161
C535
C14 PLL_DVDD_1P2I VSSC_F4 F4
VSSC_F5 F5
2 1 D13 F6
+VDDC_5882 VDDC_D13 VSSC_F6
F3 VDDC_F3 VSSC_F7 F7
J4 VDDC_J4 VSSC_F10 F10
J5 VDDC_J5 VSSC_F11 F11
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
J6 VDDC_J6 VSSC_F12 F12
2 2 2 2 2 2 2 J7 VDDC_J7 VSSC_G5 G5
J8 VDDC_J8 VSSC_G6 G6
C536
C537
C538
C539
C540
C541
C542
J10 VDDC_J10 VSSC_G7 G7
+VDDC_5882 J11 G8
1 1 1 1 1 1 1 VDDC_J11 VSSC_G8
K7 VDDC_K7 VSSC_G9 G9
+3.3V_ALW_USH K8 G10
VDDC_K8 VSSC_G10
VSSC_G11 G11
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
E4 VDDO_33_E4 VSSC_G12 G12
2 2 2 2 J2 VDDO_33_J2 VSSC_H5 H5
K3 VDDO_33_K3 VSSC_H6 H6
C543
C544
C545
C546
L8 VDDO_33_L8 VSSC_H7 H7
C C
N10 VDDO_33_N10 VSSC_H8 H8
1 1 1 1 H9
VSSC_H9
G4 VDDO_33CORE_G4 VSSC_H10 H10
H3 VDDO_33CORE_H3 VSSC_H11 H11
H4 VDDO_33CORE_H4 VSSC_H12 H12
J3 VDDO_33CORE_J3 VSSC_J9 J9
VSSC_J12 J12
M13 K2
VDDO_33SC_M13 VSSC_K2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
10U_0603_6.3V6M~D
N13 K6
VDDO_33SC_N13 VSSC_K6
2 2 1 K13
VSSC_K13
L6 K14
VDDO_LPC_L6 VSSC_K14
C547
C548
C549
M6 L5
VDDO_LPC_M6 VSSC_L5
M8
1 1 2 VSSC_M8
M14
VSSC_M14
K10 N9
VDDO_SC_K10 VSSC_N9
K12 N11
VDDO_SC_K12 VSSC_N11
L12 N12
VDDO_SC_L12 VSSC_N12
L13 P3
VDDO_SC_L13 VSSC_P3
P4
VSSC_P4
D5
VDDO_VAR_D5
E5
VDDO_VAR_E5
N5
VESD
LOW:Power Down Mode
High:Working Mode BCM5882KFBG_FBGA196~D
China TCM: NationZ & Jetway co-lay
+3.3V_RUN
4@ U37
B B
10
USH BCM5882 and China TCM Z8H172T Option
VDD_0
19
VDD_1 PART/PIN Ref Des TCM Enable TPM Enable ALL TPM/TCM Disable
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
10U_0603_6.3V6M~D
24
VDD_2
4@ C551
4@ C552
4@ C553
4@ C550
2 2 2 1 TCM circuit All 4@ POP @ @
1 2 C_TPM_LPC_EN 28
33,41 SP_TPM_LPC_EN
4@ R650 1 2 0_0402_5%~D LPC_LAD0_R 26
LPCPD#
11
PU R583 @ POP @
14,33,41,42 LPC_LAD0
4@ R649 1 2 0_0402_5%~D LPC_LAD1_R 23
LAD0 GND_11
18 1 1 1 2 USH_LPCEN
14,33,41,42 LPC_LAD1
4@ R648 1 2 0_0402_5%~D LPC_LAD2_R 20
LAD1 GND_18
25
PD R615 POP @ @
14,33,41,42 LPC_LAD2 LPC_LAD3_R LAD2 GND_25
4@ R651 1 2 0_0402_5%~D 17 4
14,33,41,42 LPC_LAD3
4@ R652 0_0402_5%~D LAD3 GND_4 SIO 5028 ->SP_TPM_LPC_EN PU R772 @ @ @
PU RH268 @ POP POP
21 5 JETWAY_PIN5 PCH GPIO39 ->TPM_ID1
15 CLK_PCI_TPM_CHA
1 2 LPC_LFRAME#_R 22 LCLK NC_5
12
PD RH271 POP @ @
14,33,41,42 LPC_LFRAME# LFRAME# NC_12
4@ R653 1 2 0_0402_5%~D PCI_RST#_R 16 13 JETWAY_CLK14M
+3.3V_RUN
14,17,36,37,41,42 PCH_PLTRST#_EC
4@ R654 0_0402_5%~D 27
LRESET# NC_13 JETWAY_CLK14M 15 PU RH267 @ POP @
14,33,41,42 IRQ_SERIRQ
1 2 CLKRUN#_R 15
SERIRQ
1
PCH GPIO38 ->TPM_ID0
1 2
16,41,42 CLKRUN#
4@ R655 0_0402_5%~D 7
CLKRUN# NC_1
2
PD RH270 POP @ POP
@ R656 4.7K_0402_5%~D TCM_BA1 PP NC_2
3 6
TCM_BA0 BA_1 NC_6
9 8
BA_0 NC_8
14
+3.3V_RUN NC_P
1 JETWAY_PIN5
4@ C554 2
1
1U_0402_6.3V6K~D
@ R657 @ R658
@R658 SSX44-B-D-T1_TSSOP28~D 2 @C555
@C555
10K_0402_5%~D 10K_0402_5%~D 0.1U_0402_16V4Z~D
1
2
A A
TCM_BA0
TCM Vender POP
TCM_BA1 NationZ R659, R660, C550, C554
Jetway C555, RH315
DELL CONFIDENTIAL/PROPRIETARY
1
4@ R659
1K_0402_5%~D
4@ R660
1K_0402_5%~D Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
USH BCM5882 (2/2)
2
1 1
+3.3V_RUN
L45
0.1U_0402_16V4Z~D
4.7U_0603_10V6K~D
@ L46 BLM18PG471SN1D_0603~D
1 2 1 2 1 1
+1.5V_RUN
4.7U_0603_10V6K~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
BLM18BD601SN1D_0603~D 1 1
0.1U_0402_16V4Z~D
4.7U_0603_10V6K~D
C559
C560
L47 1
C557
C558
1 2 1 1 2 2
4.7U_0603_10V6K~D
0.1U_0402_16V4Z~D
C556
BLM18BD601SN1D_0603~D
2 2
C563
C564
1 1 2
C561
C562
0.1U_0402_16V4Z~D
4.7U_0603_10V6K~D
U38
2 2
1 1
C566
+3.3VDDH 16 10 +OZ_DVDD
2 2 3.3VDDH DVDD
C565
+VDDH_SD 9 8 +OZ_AVDD
+PE_VDDH VDDH AVDD
1 2 32 PE_VDDH
L44 BLM18BD601SN1D_0603~D 2 2 +3.3V_RUN_CARD
17 +SKT_VCC
+PE_VDDH SKT_VCC
MMI_VCC_OUT 15
15 CLK_PCIE_MMI 2 PE_REFCLKP
1
0.1U_0402_16V4Z~D
0.01U_0402_16V7K~D
0.1U_0402_16V4Z~D
4.7U_0603_10V6K~D
10K_0402_5%~D
1 1 1 28 SD/MMCDAT1_R R663 1 2 33_0402_5%~D SD/MMCDAT1 1 1
15 CLK_PCIE_MMI# PE_REFCLKM SD_D1
@ C573
@ C574
C570
C572
R826
29 SD/MMC/MSDAT0_R R665 1 2 33_0402_5%~D SD/MMC/MSDAT0
C569 0.1U_0402_10V7K~D PCIE_PRX_MMITX_P6_C MMI_D0 MSDAT1_R R666 33_0402_5%~D MSDAT1
1 2 6 PE_TXP MS_D1 27 1 2
2 2 15 PCIE_PRX_MMITX_P6 C571 0.1U_0402_10V7K~D PCIE_PRX_MMITX_N6_C MSDAT2_R R667 33_0402_5%~D MSDAT2 2 2
1 2 7 25 1 2
2
15 PCIE_PRX_MMITX_N6 C567 0.1U_0402_10V7K~D PCIE_PTX_MMIRX_P6_C PE_TXM MS_D2 SD/MMC/MSDAT3_R R668 33_0402_5%~D SD/MMC/MSDAT3
15 PCIE_PTX_MMIRX_P6 1 2 5 24 1 2
C568 0.1U_0402_10V7K~D PCIE_PTX_MMIRX_N6_C PE_RXP MMI_D3 SD/MMCDAT4_R R669 33_0402_5%~D SD/MMCDAT4
15 PCIE_PTX_MMIRX_N6 1 2 4 PE_RXM MMI_D4 23 1 2
1 2 3 22 SD/MMCDAT5_R R670 1 2 33_0402_5%~D SD/MMCDAT5
2 R677 191_0402_1%~D PE_REXT MMI_D5 SD/MMCDAT6_R R672 33_0402_5%~D SD/MMCDAT6 2
MMI_D6 21 1 2
33 20 SD/MMCDAT7_R R673 1 2 33_0402_5%~D SD/MMCDAT7
GPAD MMI_D7
13 11 MS_CD#
PE_RST# MS_CD# SD/MMC/MS_CMD_R R674 1
place close to pin U38.32 17 PLTRST_MMI# 19 2 33_0402_5%~D SD/MMC/MS_CMD
SD_CMD/MS_BS SD/MMC/MS_CLK_R SD/MMC/MS_CLK
MMI_CLK 18 1 2
14 12 SD/MMCCD# R676 33_0402_5%~D
MULTI-IO1 SD_CD# SDWP
31 30
15 MMICLK_REQ# MULTI-IO2 SD_WPI
OZ600FJ0LN_QFN32_5X5~D
JSD1
+3.3V_RUN_CARD 7
VDD
9 44
VCC VCC
3 SD/MMC/MSDAT0 3
22
SD/MMCDAT1 DAT0
23 27
SD/MMCDAT2 DAT1 CD
1 28
SD/MMC/MSDAT3 DAT2 R/-B
EMI request SD/MMCDAT4
2
3
CD/DAT3 -RE
29
30
SD/MMCDAT5 DAT4 -CE
5 31
SD/MMC/MS_CLK SD/MMCDAT6 DAT5 CLE
19 32
SD/MMCDAT7 DAT6 ALE
21 33
DAT7 -WE
34
SD/MMC/MS_CMD -WP
4
CMD
2
SD/MMC/MS_CLK 18
@ RE678
@RE678 CLK
24 36
SD/MMCCD# COM(SW) D0
33_0402_5%~D 25 37
SDWP CD(SW) D1
45 38
WP(SW) D2
39
1
SD/MMC/MSDAT0 D3
14 40
MSDAT1 DATA0 D4
1 15 41
@CE757
@ CE757 MSDAT2 DATA1 D5
13 42
SD/MMC/MSDAT3 DATA2 D6
11 43
10P_0402_50V8J~D DATA3 D7
2 SD/MMC/MS_CLK 10
MS_CD# SCLK
12 26
SD/MMC/MS_CMD INS GND
16 35
BS GND
6 46
VSS GND1
8 47
VSS GND2
17 48
VSS GND3
20 49
VSS GND4
T-SOL_152-1300302601_NR
4 CONN@ 4
Support SD/MMC/MS
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT Card Reader OZ600FJ0
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Size Document Number Rev
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD 1.0
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. LA-6591P
Date: Monday, January 10, 2011 Sheet 35 of 66
A B C D E
5 4 3 2 1
+3.3V_PCIE_WWAN
1 2 +3.3V_ALW_PCH
+3.3V_RUN @ R693 0_0402_5%~D
PCIE_MCARD1_DET# 1 2
2.2K_0402_5%~D
2.2K_0402_5%~D
USB_MCARD2_DET# 2 1 1 2 WLAN_RADIO_DIS#_R R692 100K_0402_5%~D
41 WLAN_RADIO_DIS#
1
@ R1159
@ R1160
R694 100K_0402_5%~D
D31
+3.3V_PCIE_WWAN RB751S40T1_SOD523-2~D
PCIE_MCARD2_DET#_R 1 2
Mini WLAN/WIMAX H=4
2
R695 100K_0402_5%~D
2 1 WWAN_SMBCLK USB_MCARD1_DET# 1 2 PCIE_MCARD1_DET# +3.3V_RUN
7,12,13,14,15,28 DDR_XDP_WAN_SMBCLK
R1157 0_0402_5%~D @ R698 0_0402_5%~D
2 1 WWAN_SMBDAT +3.3V_WLAN +3.3V_WLAN
7,12,13,14,15,28 DDR_XDP_WAN_SMBDAT
R1158 0_0402_5%~D CONN@
D JMINI2 +1.5V_RUN PCIE_MCARD1_DET# 1 2 D
29,37,41 PCIE_WAKE# PCIE_WAKE# 1 2 @ R699 100K_0402_5%~D
Mini WWAN/GPS/LTE/UWB H=5.2 43 COEX2_WLAN_ACTIVE
43 COEX1_BT_ACTIVE
COEX2_WLAN_ACTIVE
COEX1_BT_ACTIVE
1
R7001
2
0_0402_5%~D
2
3
5
1
3
5
2
4
6
4
6
USB_MCARD1_DET# 1
R701
2
100K_0402_5%~D
R702 0_0402_5%~D 7 8
+3.3V_PCIE_WWAN CONN@ +3.3V_PCIE_WWAN 15 MINI2CLK_REQ# 7 8
9 10 1 2
JMINI1 9 10
15 CLK_PCIE_MINI2# 11 12
11 12 MSDATA C595 4700P_0402_25V7K~D
1 2 15 CLK_PCIE_MINI2 13 14
1 2 13 14
3 4 15 16 HOST_DEBUG_TX 42
3 4 15 16
5 6 +1.5V_RUN 17 18
MINI1CLK_REQ# 5 6 42 HOST_DEBUG_RX 17 18 WLAN_RADIO_DIS#_R
7 8 +SIM_PWR 19 20
15 MINI1CLK_REQ# 7 8 UIM_DATA 42 MSCLK 19 20
9 9 10 10 21 21 22 22 2 1 PCH_PLTRST#_EC
CLK_PCIE_MINI1# 11 12 UIM_CLK PCIE_PRX_WLANTX_N2 23 24 R703 0_0402_5%~D
15 CLK_PCIE_MINI1# CLK_PCIE_MINI1 11 12 UIM_RESET 15 PCIE_PRX_WLANTX_N2 PCIE_PRX_WLANTX_P2 23 24
13 13 14 14 25 25 26 26
15 CLK_PCIE_MINI1 UIM_VPP 15 PCIE_PRX_WLANTX_P2
15 15 16 16 27 27 28 28
17 18 C596 0.1U_0402_10V7K~D 29 30
17 18 29 30
19 19 20 20 WWAN_RADIO_DIS# 41 15 PCIE_PTX_WLANRX_N2 1 2 PCIE_PTX_WLANRX_N2_C 31 31 32 32
21 21 22 22 1 R704
2 PCH_PLTRST#_EC 14,17,34,37,41,42 15 PCIE_PTX_WLANRX_P2 1 2 PCIE_PTX_WLANRX_P2_C 33 33 34 34
PCIE_PRX_WANTX_N1 23 24 0_0402_5%~D C598 0.1U_0402_10V7K~D 35 36 USBP4-
15 PCIE_PRX_WANTX_N1 PCIE_PRX_WANTX_P1 23 24 PCIE_MCARD1_DET# 35 36 USBP4+ USBP4- 17
25 25 26 26 37 37 38 38 USBP4+ 17
15 PCIE_PRX_WANTX_P1 18 PCIE_MCARD1_DET# USB_MCARD1_DET#
27 27 28 28 39 39 40 40 USB_MCARD1_DET# 14,18
C597 0.1U_0402_10V7K~D 29 30 WWAN_SMBCLK 41 42 WIMAX_LED#
29 30 41 42
15 PCIE_PTX_WANRX_N1 1 2 PCIE_PTX_WANRX_N1_C 31 32 WWAN_SMBDAT COEX2_WLAN_ACTIVE 43 44 WLAN_LED#
31 32 43 44
15 PCIE_PTX_WANRX_P1 1 2 PCIE_PTX_WANRX_P1_C 33 33 34 34 15 PCH_CL_CLK1 45 45 46 46
C599 0.1U_0402_10V7K~D 35 36 USBP5- 1 47 48 1 2 MSDATA
35 36 USBP5- 17 15 PCH_CL_DATA1 47 48 MSDATA 42
17 PCIE_MCARD2_DET# R7251 2 PCIE_MCARD2_DET#_R 37 37 38 38 USBP5+
USBP5+ 17 15 PCH_CL_RST1# 1 2 49 49 50 50 @R706
@ R706 0_0402_5%~D
0_0402_5%~D 39 40 USB_MCARD2_DET# @ C600 R707 0_0402_5%~D 51 52
39 40 LED_WWAN_OUT# USB_MCARD2_DET# 18 51 52 WIMAX_LED# STUDY FOR DEBUG
41 42 33P_0402_50V8J~D
41 42 2
43 43 44 44 53 GND1 GND2 54
45
47
45 46 46
48
check
+1.5V_RUN 47 48 TYCO_1775861-1~D +3.3V_WLAN
49 49 50 50
C C
51 51 52 52
53 GND1 GND2 54
33P_0402_50V8J~D
0.047U_0402_16V4Z~D
USB_MCARD2_DET# 1 2 PCIE_MCARD2_DET#
100K_0402_5%~D
100K_0402_5%~D
@ R697 0_0402_5%~D
2
TYCO_1775861-1~D +1.5V_RUN +3.3V_WLAN
1 1
R718
R705
C593
C594
+3.3V_PCIE_WWAN
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
4.7U_0603_6.3V6K~D
5
2 2 DMN66D0LDW-7_SOT363-6~D
1
1 1 1 1 1 1 1 1
@ C603
WIMAX_LED# 4 3 WIRELESS_LED#
100K_0402_5%~D
C601
C602
C604
C605
C606
C607
C608
2
Q124B
2
2 2 2 2 2 2 2 2
R719
DMN66D0LDW-7_SOT363-6~D
+3.3V_PCIE_WWAN
WLAN_LED# 1 6
2
G
1
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
33P_0402_50V8J~D
22U_0805_6.3VAM~D
33P_0402_50V8J~D
330U_D2E_6.3VM_R25~D
330U_D2E_6.3VM_R25~D
Q124A
1 1 LED_WWAN_OUT# 3 1 WIRELESS_LED# 41,45
S
1 1 1 1 1
@ C1176
+ +
C610
C611
C612
C613
C614
C615
Q77
SSM3K7002FU_SC70-3~D
2 2 2 2 2 2 2
1/2 Minicard Flash Card H=4
+3.3V_PCIE_FLASH +3.3V_PCIE_FLASH
Primary Power Aux Power CONN@ USB_MCARD3_DET# 1 2 PCIE_MCARD3_DET#
PWR Voltage JMINI3 @R708
@ R708 0_0402_5%~D
PCIE_WAKE#
1 1 2
Rail Tolerance Peak Normal Normal COEX2_WLAN_ACTIVE 3 3 1 2
2
4
B R709 0_0402_5%~D 4 B
5 5 6 +1.5V_RUN
MINI3CLK_REQ# 6
15 MINI3CLK_REQ# 7 7 8
8
+3.3V +-9% 1000 750 9 9 10 Confirm with DELL about UWB
SIM Card Push-Push 250 (Wake enable)
15 CLK_PCIE_MINI3#
15 CLK_PCIE_MINI3
CLK_PCIE_MINI3#
CLK_PCIE_MINI3
11 11
13 13
10
12
14
12
14
+3.3Vaux +-9% 330 250 5 (Not wake enable) 15 15
16
16
17 17 18
18
19 19 20
+SIM_PWR 20
+1.5V +-5% 500 375 NA 21 21 22 2 1 PCH_PLTRST#_EC
PCIE_PRX_WPANTX_N5 22 R710 0_0402_5%~D
23 23 24
JSIM1 15 PCIE_PRX_WPANTX_N5 PCIE_PRX_WPANTX_P5 24
25 25 26
15 PCIE_PRX_WPANTX_P5 26
1 5 27 27 28
UIM_RESET VCC GND UIM_VPP C617 0.1U_0402_10V7K~D 28
2 6 29 29 30
UIM_CLK RST VPP UIM_DATA PCIE_PTX_WPANRX_N5_C 30
3 7 15 PCIE_PTX_WPANRX_N5 1 2 31 31 32
CLK I/O PCIE_PTX_WPANRX_P5_C 32
4 8 15 PCIE_PTX_WPANRX_P5 1 2 33 33 34
NC NC C618 0.1U_0402_10V7K~D 34 USBP6-
9 35 35 36 USBP6- 17
GND PCIE_MCARD3_DET# 36 USBP6+
10 37 37 38 USBP6+ 17
GND 18 PCIE_MCARD3_DET# 38 USB_MCARD3_DET#
1
MOLEX_475531001 1 2
39 39
41 41
40
40
42
just reserve
+3.3V_RUN 42
C616 CONN@ R711 100K_0402_5%~D 43 43 44 2 1 +3.3V_ALW_PCH
1U_0402_6.3V6K~D 44 @ R712 100K_0402_5%~D
45 45 46
2 46
47 47 48
48
49 49 50
50
51 51
52
52 WPAN Noise
+1.5V_RUN +3.3V_PCIE_FLASH 53 54 USB_MCARD3_DET#
@ U40 GND1 GND2
1
TYCO_1775861-1~D
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
4.7U_0603_6.3V6K~D
UIM_RESET 1 6 UIM_VPP @ C627
4700P_0402_25V7K~D
2
1 1 1 1 1 1 1 1
@C621
@
A A
2 5 +SIM_PWR
C619
C620
C621
C622
C623
C624
C625
C626
UIM_CLK 3 4 UIM_DATA 2 2 2 2 2 2 2 2
DELL CONFIDENTIAL/PROPRIETARY
33P_0402_50V8J~D
33P_0402_50V8J~D
33P_0402_50V8J~D
33P_0402_50V8J~D
1 1 1 1
@ C628
@ C629
@ C630
@ C631
SRV05-4.TCT_SOT23-6~D
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
2 2 2 2 TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Mini Card
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. 1.0
LA-6591P
Date: Monday, January 10, 2011 Sheet 36 of 66
5 4 3 2 1
5 4 3 2 1
D
100K_0402_5%~D
6
S
1
100K_0402_5%~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
10U_0603_6.3V6M~D
0.1U_0402_16V4Z~D
10U_0603_6.3V6M~D
0.1U_0402_16V4Z~D
10U_0603_6.3V6M~D
5 4
R714
2
R713
1 1 1 1 1 1 1 1 1 1
C635
C634
C633
C642
C643
C640
C641
C637
C638
2
3
R715
2
2 2 2 2 2 2 2 2 2
DMN66D0LDW-7_SOT363-6~D
20K_0402_5%~D
4700P_0402_25V7K~D
1 U41
2
Q39B
17 AUXIN AUXOUT 15
C632
5 2 3.3VIN 3.3VOUT 3
12 1.5VIN 1.5VOUT 11
6
Q39A 2
4
DMN66D0LDW-7_SOT363-6~D 20 8 CARD_RESET#
EXPRCRD_STBY_R# SHDN# PERST# EXPRCRD_CPPE#
11,41,44,49 RUN_ON 1 2 1 STBY# CPPE# 10
2 R717 0_0402_5%~D 6 9 CPUSB#
41 AUX_EN_WOWL 14,17,34,36,41,42 PCH_PLTRST#_EC SYSRST# CPUSB#
19 OC#
1
+3.3V_RUN 4 NC
R716 +3.3V_CARD 5 18
100K_0402_5%~D NC RCLKEN
+1.5V_CARD 13 NC
+1.5V_RUN 14 7
2
NC GND
16 NC PAD 21
TPS2231MRGPR-2_QFN20_4X4~D
C Power Control for Mini card2 Note: Add connection on pin4, pin5, pin 13 C
@ R720
D
6 0_0805_5%~D
S
1
100K_0402_5%~D
5 4 1 2 +3.3V_RUN
1
R722
2
R721
1
1
G
R723
Express Card Conn.
2
1K_0402_5%~D
2
DMN66D0LDW-7_SOT363-6~D
3
4700P_0402_25V7K~D
+3.3V_SUS +1.5V_CARD
1
Q41B
D
C644
SSM3K7002FU_SC70-3~D
MCARD_WWAN_PWREN# 5
Q73
2 MCARD_WWAN_PWREN#
6
2.2K_0402_5%~D
2.2K_0402_5%~D
Q41A G 1
4
1
DMN66D0LDW-7_SOT363-6~D S
3
R731
R732
1 2 C645
2 @R724
@ R724 0_0402_5%~D 0.1U_0402_16V4Z~D
41 MCARD_WWAN_PWREN 2
1
2
R726 1 2
100K_0402_5%~D @ R727
@R727 0_0402_5%~D CONN@
1 1 JEXP1
17 USBP10- 2 2
1
2
USBP10_D- GND1
2
USBP10_D+ USB_D-
17 USBP10+ 4 3 3
B 4 3 CPUSB# USB_D+ B
4
L49 DLW21SN900SQ2L_0805_4P~D CPUSB#
5
Power Control for Mini card3 42 CARD_SMBCLK
CARD_SMBCLK
CARD_SMBDAT
6
7
RESERVED
RESERVED
SMB_CLK
42 CARD_SMBDAT 8
SMB_DAT
9
+1.5V
10
+1.5V
11
+15V_ALW +3.3V_ALW Q42 +3.3V_PCIE_FLASH 29,36,41 PCIE_WAKE# WAKE#
+3.3V_CARDAUX 12
SI3456DDV-T1-GE3_TSOP6~D CARD_RESET# +3.3VAUX
13
PERST#
100K_0402_5%~D
+3.3V_CARD 14
+3.3V
D
6 1 15
S
+3.3V
1
100K_0402_5%~D
5 4 16
15 EXPCLK_REQ# CLKREQ#
1
R729
2 C646 EXPRCRD_CPPE# 17
CPPE#
R728
1 0.1U_0402_16V4Z~D 18
15 CLK_PCIE_EXP# REFCLK-
1
2 19
1
G
15 CLK_PCIE_EXP REFCLK+
R730 20
2
PER_N0
DMN66D0LDW-7_SOT363-6~D
0.1U_0402_16V4Z~D 15 PCIE_PRX_EXPTX_P3 22
PER_P0
3
2
4700P_0402_25V7K~D
C647 0.1U_0402_10V7K~D 23
2
GND
1 15 PCIE_PTX_EXPRX_N3 1 2 PCIE_PTX_EXPRX_N3_C 24
PET_N0
Q43B
15 PCIE_PTX_EXPRX_P3 1 2 PCIE_PTX_EXPRX_P3_C 25
PET_P0
C650
5 C648 0.1U_0402_10V7K~D 26
GND
6
Q43A 2 27
4
DMN66D0LDW-7_SOT363-6~D GND
28
GND
29
GND
41 MCARD_MISC_PWREN 2 30
GND
1
T-SOL_5421005002000-9_NR
1
R733
A 100K_0402_5%~D A
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, PCIE-SATA SW / PCIE PWR
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. 1.0
LA-6591P
Date: Monday, January 10, 2011 Sheet 37 of 66
5 4 3 2 1
5 4 3 2 1
D D
+USB_SIDE_PWR
0.1U_0402_16V4Z~D
1
C656
2
USB conn update ok-6/5
JUSB2
1 +5V
USBP0_D- 2
USBP0_D+ A-
3 A+ GND 6
4 GNDGND 5
SUYIN_020133GR004M53UZL
2
CONN@
C C
D72
PESD5V0U2BT_SOT23-3~D
1
L51 L52
4 3 USBP0_D+ 4 3 USBP1_D+
17 USBP0+ 4 3 17 USBP1+ 4 3
1 2 USBP0_D- 1 2 USBP1_D-
17 USBP0- 1 2 17 USBP1- 1 2
DLW21SN900SQ2L_0805_4P~D DLW21SN900SQ2L_0805_4P~D +USB_SIDE_PWR
1 2 1 2
@ R736 0_0402_5%~D @R737
@ R737 0_0402_5%~D
1 2 1 2
@ R738 0_0402_5%~D @R739
@ R739 0_0402_5%~D
150U_B2_6.3V-M~D
0.1U_0402_16V4Z~D
1 1
C657
C658
+
B 2
2 USB conn update ok-6/5 B
JUSB3
1
USBP1_D- +5V
2
USBP1_D+ A-
3 6
A+ GND
4 5
GNDGND
SUYIN_020133GR004M53UZL
2
CONN@
D73
PESD5V0U2BT_SOT23-3~D
1
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, USB x2
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. 1.0
LA-6591P
Date: Monday, January 10, 2011 Sheet 38 of 66
5 4 3 2 1
5 4 3 2 1
0.01U_0402_16V7K~D
0.1U_0402_16V4Z~D
1 1
2
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
@ R742
0_0402_5%~D
C662
R743
R1586
R1587
C661
+3.3V_RUN
2 2
1 2
1
R741 0_0402_5%~D
D D
U44
7 6 +ESATA_DEW2
EN VCC
18 10
ESATA_PTX_DRX_P4_C 2 ESATA_PTX_DRX_P4 CAD VCC +ESATA_DEW1
14 ESATA_PTX_DRX_P4_C 1 VCC
16
C664 0.01U_0402_16V7K~D 1 20
ESATA_PTX_DRX_N4_C 2 AINP VCC
14 ESATA_PTX_DRX_N4_C 1 ESATA_PTX_DRX_N4 2
AINM
C663 0.01U_0402_16V7K~D 9 ESATA_PE1
ESATA_PRX_DTX_N4_C 2 PA
1 ESATA_PRX_DTX_N4 4 8 ESATA_PE2
14 ESATA_PRX_DTX_N4_C C666 0.01U_0402_16V7K~D BOUTM PB
5
ESATA_PRX_DTX_P4_C 2 BOUTP
1 ESATA_PRX_DTX_P4 AOUTP 15 ESATA_PTX_DRX_P4_RP
14 ESATA_PRX_DTX_P4_C C665 0.01U_0402_16V7K~D ESATA_PTX_DRX_N4_RP
3 GND AOUTM 14
10K_0402_5%~D
10K_0402_5%~D
13 GND
1
@ R1588
@ R1589
0_0402_5%~D
0_0402_5%~D
+3.3V_RUN +ESATA_EQ1 17 11 ESATA_PRX_DTX_P4_RP
GND BINP
@ R746
@ R745
+ESATA_EQ2 19 12 ESATA_PRX_DTX_N4_RP
GND BINM
21 EP
10K_0402_5%~D
10K_0402_5%~D
1
1
@ R1582
@ R1583
MAX4951BECTP+TGH7_TQFN20_4X4~D
2
2
2
1
1
0_0402_5%~D
0_0402_5%~D
Note: +ESATA_DEW1, +ESATA_DEW2, +ESATA_EQ1, +ESATA_EQ2 need to
R1584
route 10 mils and R1584~R1587 need to change to 10k and no
R1585
stuff R1584, R1585 to support TI SN75LVCP601
2
C C
+USB_SIDE_PWR +SATA_SIDE_PWR
+SATA_SIDE_PWR
150U_B2_6.3V-M~D
0.1U_0402_16V4Z~D
+5V_ALW_FUSE
1
+5V_ALW U45 1
PJP7
C667
C668
1 10 +
GND FAULT1# USB_OC1# 17,31
2 1 +5V_ALW_FUSE 2 9
2 1 IN OUT1
10U_0805_10V4Z~D
3 8
IN OUT2 2 2
0.1U_0402_16V4Z~D
31,41 ESATA_USB_PWR_EN# 4 7
JUMP_43X79 EN1# ILIM
1 1 41 USB_SIDE_EN# 5 6 USB_OC0# 17
EN2# FAULT#2
11
T-PAD
1
C669
C670
2
D+
4
GND
B B
ESATA_PTX_DRX_P4_RP 1 2 SATA_PTX_DRX_P4 5
C671 0.01U_0402_16V7K~D GND
6
ESATA_PTX_DRX_N4_RP A+
L90 1 2 SATA_PTX_DRX_N4 7 ESATA
USBP2_D+ C672 0.01U_0402_16V7K~D A-
17 USBP2+ 1 2 8
1 2 ESATA_PRX_DTX_N4_RP GND
1 2 SATA_PRX_DTX_N4 9
B-
C673 0.01U_0402_16V7K~D 10
USBP2_D- ESATA_PRX_DTX_P4_RP B+
17 USBP2- 4
4 3
3 1 2 SATA_PRX_DTX_P4 11
GND
C674 0.01U_0402_16V7K~D
DLW21SN900SQ2L_0805_4P~D
1 2 12
GND
3
@ R1150 0_0402_5%~D 13
GND
14
GND
1 2 15
@ R1151 0_0402_5%~D GND
D74
TYCO_2129156-3
PESD5V0U2BT_SOT23-3~D
CONN@
1
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, USB/ESATA/IO/MDC
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. 1.0
LA-6591P
Date: Monday, January 10, 2011 Sheet 39 of 66
5 4 3 2 1
2 1
CONN@
JDOCK1
DOCK_DET_1 1 2 DOCK_AC_OFF
1 2 DOCK_AC_OFF 41,56
3 3 4 4
32 DOCK_LOM_SPD10LED_GRN# DPD_CA_DET DPC_CA_DET DOCK_LOM_SPD100LED_ORG# 32
5 5 6 6
27 DPD_CA_DET DPC_CA_DET 27
7 7 8 8
C690 2 1 0.1U_0402_10V7K~D DPD_DOCK_LANE_P0 9 10 DPC_DOCK_LANE_P0 C691 2 1 0.1U_0402_10V7K~D
16 DPD_PCH_LANE_P0 DPD_DOCK_LANE_N0 9 10 DPC_DOCK_LANE_N0 DPC_PCH_LANE_P0 16
C679 2 1 0.1U_0402_10V7K~D 11 12 C680 2 1 0.1U_0402_10V7K~D
16 DPD_PCH_LANE_N0 11 12 DPC_PCH_LANE_N0 16
13 14
C681 DPD_DOCK_LANE_P1 13 14 DPC_DOCK_LANE_P1
16 DPD_PCH_LANE_P1 2 1 0.1U_0402_10V7K~D 15
15 16
16 C682 2 1 0.1U_0402_10V7K~D
C683 DPD_DOCK_LANE_N1 DPC_DOCK_LANE_N1 DPC_PCH_LANE_P1 16
16 DPD_PCH_LANE_N1 2 1 0.1U_0402_10V7K~D 17
17 18
18 C684 2 1 0.1U_0402_10V7K~D DPC_PCH_LANE_N1 16
19 20
C692 DPD_DOCK_LANE_P2 19 20 DPC_DOCK_LANE_P2
16 DPD_PCH_LANE_P2 2 1 0.1U_0402_10V7K~D 21
21 22
22 C693 2 1 0.1U_0402_10V7K~D
C685 DPD_DOCK_LANE_N2 DPC_DOCK_LANE_N2 DPC_PCH_LANE_P2 16
16 DPD_PCH_LANE_N2 2 1 0.1U_0402_10V7K~D 23 24 C686 2 1 0.1U_0402_10V7K~D
23 24 DPC_PCH_LANE_N2 16
25 26
C687 DPD_DOCK_LANE_P3 25 26 DPC_DOCK_LANE_P3
16 DPD_PCH_LANE_P3 2 1 0.1U_0402_10V7K~D 27
27 28
28 C688 2 1 0.1U_0402_10V7K~D DPC_PCH_LANE_P3 16
C689 2 1 0.1U_0402_10V7K~D DPD_DOCK_LANE_N3 29 30 DPC_DOCK_LANE_N3 C694 2 1 0.1U_0402_10V7K~D
16 DPD_PCH_LANE_N3 29 30 DPC_PCH_LANE_N3 16
31 32
DPD_DOCK_AUX 31 32 DPC_DOCK_AUX
27 DPD_DOCK_AUX 33 34
DPD_DOCK_AUX# 33 34 DPC_DOCK_AUX# DPC_DOCK_AUX 27
27 DPD_DOCK_AUX# 35 36
35 36 DPC_DOCK_AUX# 27
37 38
DPD_PCH_DOCK_HPD 37 38 DPC_PCH_DOCK_HPD
16 DPD_PCH_DOCK_HPD 39 39 40 40 DPC_PCH_DOCK_HPD 16
+NBDOCK_DC_IN_SS 41 41 42 42 ACAV_DOCK_SRC# 56
1 43 43 44 44 1
BLUE_DOCK 45 46
25 BLUE_DOCK 45 46 DAT_DDC2_DOCK 25
C695 47 48 C696
B 47 48 CLK_DDC2_DOCK 25 B
0.033U_0402_16V7K~D 49 50 0.033U_0402_16V7K~D
2 49 50 2
Close to DOCK 51 51 52 52
RED_DOCK 53 54 SATA_PRX_DKTX_P5 2 1
Its for Enhance ESD on dock issue. 25 RED_DOCK 53 54 SATA_PRX_DKTX_N5 SATA_PRX_DKTX_P5_C 14
55 55 56 56 C697 2 1 0.01U_0402_16V7K~D SATA_PRX_DKTX_N5_C 14 Close to DOCK
57 58 C698 0.01U_0402_16V7K~D
GREEN_DOCK 59
57 58
60 SATA_PTX_DKRX_P5 1 2
Its for Enhance ESD on dock issue.
25 GREEN_DOCK 59 60 SATA_PTX_DKRX_N5 SATA_PTX_DKRX_P5_C 14
61 62 C699 1 2 0.01U_0402_16V7K~D
61 62 C700 0.01U_0402_16V7K~D SATA_PTX_DKRX_N5_C 14
63 63 64 64
25 HSYNC_DOCK 65 65 66 66 USBP8+ 17
25 VSYNC_DOCK 67 67 68 68 USBP8- 17
69 69 70 70
DPD_PCH_DOCK_HPD 71 72
42 CLK_MSE 71 72 USBP9+ 17
42 DAT_MSE 73 73 74 74 USBP9- 17
75 76 DPC_PCH_DOCK_HPD
75 76
30 DAI_BCLK# 77 77 78 78 CLK_KBD 42
2
30 DAI_LRCK# 79 79 80 80 DAT_KBD 42
R757 81 82
81 82
2
110K_0402_1%~D 30 DAI_DI 83 83 84 84
85 86 R758
30 DAI_DO# 85 86
87 88 110K_0402_1%~D
1
87 88
30 DAI_12MHZ# 89 89 90 90
91 92
1
91 92
93 93 94 94
95 96
95 96
41 D_LAD0 97 98
97 98 BREATH_LED# 42,45
41 D_LAD1 99 100
99 100 DOCK_LOM_ACTLED_YEL# 32
101 102
101 102
41 D_LAD2 103 104
103 104 DOCK_LOM_TRD0+ 32
41 D_LAD3 105 106
105 106 DOCK_LOM_TRD0- 32
107 108
107 108 +3.3V_ALW
41 D_LFRAME# 109 110
109 110 DOCK_LOM_TRD1+ 32 +LOM_VCT
41 D_CLKRUN# 111 112
111 112 DOCK_LOM_TRD1- 32
113 114
113 114 DOCK_DET#
41 D_SERIRQ 115 116 1 1 2
115 116 R755 100K_0402_5%~D
41 D_DLDRQ1# 117 118 +LOM_VCT
117 118 C701
119 120
119 120 1U_0402_6.3V6K~D
17 CLK_PCI_DOCK 121 122 DOCK_LOM_TRD2+ 32
121 122 2
123 124 DOCK_LOM_TRD2- 32
123 124
125 126
125 126
42 DOCK_SMB_CLK 127 128 DOCK_LOM_TRD3+ 32
127 128
42 DOCK_SMB_DAT 129 130 DOCK_LOM_TRD3- 32
129 130
131 132
131 132
42,46,56 DOCK_SMB_ALERT# 133 134 DOCK_DCIN_IS+ 54
133 134
46 DOCK_PSID 135 136 DOCK_DCIN_IS- 54
135 136
137 138
137 138 D32
42 DOCK_PWR_BTN# 139 140 DOCK_POR_RST# 42
139 140 RB751S40T1_SOD523-2~D
141 142
SLICE_BAT_PRES# 141 142 DOCK_DET_R#
41,46,56 SLICE_BAT_PRES# 143 144 1 2 DOCK_DET# 41
143 144
145 149 CLK_PCI_DOCK
GND1 PWR2 +DOCK_PWR_BAR
+DOCK_PWR_BAR 146 150
PWR1 PWR2
1
147 151
PWR1 PWR2
3
0.1U_0603_50V4Z~D
C703
D33
1 33_0402_5%~D
C702
1 153 159
@ Shield_G Shield_G
154 160
2
Shield_G Shield_G
155 161 1
Shield_G Shield_G 2
156 162
1
JAE_WD2F144WB1
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT DOCKING CONN
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Size Document Number Rev
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD 1.0
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. LA-6591P
Date: Monday, January 10, 2011 Sheet 40 of 66
2 1
5 4 3 2 1
+3.3V_ALW
1 2 PCIE_WAKE#
R759 10K_0402_5%~D
1 2 DCIN_CBL_DET# +3.3V_ALW
R761 100K_0402_5%~D
1 2 CPU_DETECT#
R763 100K_0402_5%~D
1 2 SLICE_BAT_PRES# 1 1 1 1 1 1
R760 100K_0402_5%~D
C705 C706 C707 C708 C709 C710
10U_0805_6.3V6M~D 0.1U_0402_16V4Z~D 0.1U_0402_16V4Z~D 0.1U_0402_10V7K~D 0.1U_0402_16V4Z~D 0.1U_0402_16V4Z~D
2 2 2 2 2 2
D D
A17
B30
A43
A54
B5
U46 +3.3V_ALW
+3.3V_ALW2
VCC1
VCC1
VCC1
VCC1
VCC1
ACAV_IN_NB 42,54,56 1 2 C711
B52 B63 0.1U_0402_16V4Z~D
25 CRT_SWITCH GPIOA0 GPIOI1 SIO_SLP_A# 16,50
5
1 2 USB_SIDE_EN# A49 A60 0.75V_DDR_VTT_ON
31 MDC_RST_DIS# GPIOA1 GPIOI2/TACH0 0.75V_DDR_VTT_ON 49
R768 10K_0402_5%~D B53 A61 1
P
37 MCARD_MISC_PWREN GPIOA2 GPIOI3 SIO_SLP_S4# 16 B
1 2 ESATA_USB_PWR_EN# DCIN_CBL_DET# A50 B65
O 4D34 2
46 DCIN_CBL_DET# SIO_SLP_S3# 16 1
R769 10K_0402_5%~D LID_CL_SIO# GPIOA3 GPIOI4 DOCK_AC_OFF 40,56
B54 A62 IMVP_PGOOD 52 2
GPIOA4 GPIOI5 A
G
A51 B66 1 2 RB751S40T1_SOD523-2~D
GPIOA5 GPIOI6 IMVP_VR_ON 52
1
PCIE_WAKE# B55 A63 R765 0_0402_5%~D U47
29,36,37 PCIE_WAKE#
3
GPIOA6 GPIOI7 DOCK_AC_OFF_EC TC7SH08FU_SSOP5~D R770
A52 GPIOA7
B67 33K_0402_5%~D
+3.3V_RUN USB_SIDE_EN# GPIOJ0 AUX_EN_WOWL 37
39 USB_SIDE_EN# A33 GPIOB0 GPIOJ1/TACH1 A64 WLAN_LAN_DISB# 32
30 EN_I2S_NB_CODEC# B36 A5 SIO_SLP_LAN# 16,32
2
GPIOB1 GPIOJ2/TACH2 DOCK_AC_OFF_EC 56
33 USH_PWR_STATE# A34 GPOC2 GPIOJ3 B6 SIO_SLP_SUS# 16
56 EN_DOCK_PWR_BAR B37 GPOC3 GPIOJ4 A6
PANEL_BKEN_EC GPIO_PSID_SELECT 46
24 PANEL_BKEN_EC A35 GPOC4 GPIOJ5 B7
WIRELESS_ON#/OFF MODC_EN 29
1 2 16,24 ENVDD_PCH B38 A7 DOCK_HP_DET 30
R766 100K_0402_5%~D LCD_TST GPOC5 GPIOJ6
24 LCD_TST A36 GPOC6/TACH4 GPIOJ7 B8 DOCK_MIC_DET 30
1 2 SP_TPM_LPC_EN PSID_DISABLE# A37
@ R772 10K_0402_5%~D 46 PSID_DISABLE# PBAT_PRES# GPIOC7 ME_FWP
46,56 PBAT_PRES# B40 GPIOD0 GPIOK0 A8 ME_FWP 14
1 2 LCD_TST DOCKED A38 B9 MASK_SATA_LED# 45
32 DOCKED GPIOC1 GPIOK1/TACH3
R767 100K_0402_5%~D DOCK_DET# B41 B10
40 DOCK_DET# GPIOC0 GPIOK2 1.8V_RUN_PWRGD 49
A39 GPIOB7 GPIOK3 A10 LED_SATA_DIAG_OUT# 45
30 AUD_NB_MUTE# MCARD_WWAN_PWREN TEMP_ALERT#_R 1
B42 GPIOB6 GPIOK4 B11 2 TEMP_ALERT# 14,18
SYS_LED_MASK# 37 MCARD_WWAN_PWREN LCD_VCC_TEST_EN R1591 0_0402_5%~D
1 2 24 LCD_VCC_TEST_EN A40 GPIOB5 GPIOK5 A11
R775 10K_0402_5%~D CCD_OFF B43 B12 RUN_ON +3.3V_RUN
24 CCD_OFF GPIOB4 GPIOK6 RUN_ON 11,37,44,49
AUD_HP_NB_SENSE A41 A12
30,31 AUD_HP_NB_SENSE ESATA_USB_PWR_EN# GPIOB3 GPIOK7 SPI_WP#_SEL 14 D_CLKRUN#
31,39 ESATA_USB_PWR_EN# B44 GPIOB2
2 1
C 5048_GPIOL0 R777 100K_0402_5%~D C
GPIOL0/PWM7 B60
A57 5048_GPIOL1 D_SERIRQ 2 1
GPIOL1/PWM8 5048_GPIOL2 R780 100K_0402_5%~D
56 MODULE_ON B32 GPIOD1 GPIOL2/PWM0 B64
A31 B68 5048_GPIOL3 D_DLDRQ1# 2 1
56 SLICE_BAT_ON SLICE_BAT_PRES# GPIOD2 GPIOL3/PWM1 5048_GPIOL4
B33 A9 R782 100K_0402_5%~D
40,46,56 SLICE_BAT_PRES# GPIOD3 GPIOL4/PWM3 5048_GPIOL5
46,56 MODULE_BATT_PRES# B15 GPIOD4 GPIOL5/PWM2 B1
A15 A18 5048_GPIOL6
56 CHARGE_MODULE_BATT GPIOD5 GPIOL6
B16 A44 5048_GPIOL7
56 CHARGE_PBATT GPIOD6 GPIOL7/PWM5 RUN_ON
56 DEFAULT_OVRDE A16 2 1
GPIOD7 5048_GPI0M1 R786 100K_0402_5%~D
B34
GPIOM1 5048_GPI0M3
B39
GPIOM3/PWM4 5048_GPI0M4 CPU_VTT_ON
A1 B51 2 1
GPIOE0/RXD GPIOM4/PWM6 R789 100K_0402_5%~D
B2
GPIOE1/TXD
A2
GPIOE2/RTS# 0.75V_DDR_VTT_ON 2
B3 A27 LPC_LAD0 14,33,34,42 1
+3.3V_ALW CPU_DETECT# GPIOE3/DSR# LAD0 R790 100K_0402_5%~D
7 CPU_DETECT# A3 A26 LPC_LAD1 14,33,34,42
GPIOE4/CTS# LAD1 SLICE_BAT_ON
B45 B26 LPC_LAD2 14,33,34,42 1 2
GPIOE5/DTR# LAD2 R791 100K_0402_5%~D
29 MOD_SATA_PCIE#_DET A42 B25 LPC_LAD3 14,33,34,42
GPIOE6/RI# LAD3
1 2 DYN_TUR_PWR_ALRT# B4
GPIOE7/DCD# LFRAME#
A21 LPC_LFRAME# 14,33,34,42
R796 10K_0402_5%~D B22 5048_GPIOL0 2 1
LRESET# CLK_PCI_5028 PCH_PLTRST#_EC 14,17,34,36,37,42 5048_GPIOL1 @ R1567 1
A28 2 10K_0402_5%~D
PCICLK CLK_PCI_5028 17
A59 B20 5048_GPIOL2 R1568 1 2 10K_0402_5%~D
29 ZODD_WAKE# GPIOF0 CLKRUN# CLKRUN# 16,34,42
B62 A23 ME_FWP PCH has internal 20K PD. 5048_GPIOL3 R1569 1 2 0_0402_5%~D
33 BCM5882_ALERT# SUSACK#_EC A58 GPIOF1 LDRQ0# LPC_LDRQ0# 14 5048_GPIOL4 @ R1570 1
1 2 A22 2 0_0402_5%~D
16 SUSACK# GPIOF2 LDRQ1# LPC_LDRQ1# 14
R1132 0_0402_5%~D B61
GPIOF3/TACH8 SER_IRQ
B21 IRQ_SERIRQ 14,33,34,42
(suspend power rail) 5048_GPIOL5 R1571 1 2 0_0402_5%~D
+3.3V_ALW A56 A32 CLK_SIO_14M ME_FWP 5048_GPIOL6 @ R1572 1 2 0_0402_5%~D
VGA_ID GPIOF4/TACH7 14.318MHZ/GPIOM0 CLK_SIO_14M 15 5048_GPIOL7 R1573 1
B59 B35 EC_32KHZ_ECE5048 42 2 0_0402_5%~D
GPIOF5 CLK32/GPIOM2
2
A55 R1574 0_0402_5%~D
SLP_ME_CSW_DEV# GPIOF6 @ R793 5048_GPI0M1
14,18 SLP_ME_CSW_DEV# B58 1 2
GPIOF7 1K_0402_5%~D 5048_GPI0M3@ R1575 1
DLAD0
B29 2 0_0402_5%~D
VGA_ID D_LAD0 40 5048_GPI0M4 R1576 1
1 2 DLAD1
B28 2 0_0402_5%~D
R800 100K_0402_5%~D D_LAD1 40 R1577 0_0402_5%~D
32 LAN_DISABLE#_R B47 A25
1
B GPIOG0/TACH5 DLAD2 D_LAD2 40 B
56 CHARGE_EN A45 A24
SYS_LED_MASK# GPIOG1 DLAD3 D_LAD3 40
45 SYS_LED_MASK# B48 B23 D_LFRAME# 40
DYN_TUR_PWR_ALRT# GPIOG2 DLFRAME# D_CLKRUN#
54 DYN_TUR_PWR_ALRT# A46 A19 D_CLKRUN# 40
R797 1 GPIOG3 DCLKRUN# D_DLDRQ1#
18 SIO_EXT_WAKE# 2 0_0402_5%~D B49 B24 D_DLDRQ1# 40
GPIOG4 DLDRQ1# D_SERIRQ
36,45 WIRELESS_LED# A47 A20 D_SERIRQ 40
VGA_ID PCH_PCIE_WAKE# GPIOG5 DSER_IRQ
1 2 B50
GPIOG6
@ R803 100K_0402_5%~D 16 PCH_PCIE_WAKE# CLK_SIO_14M CLK_PCI_5028
36 WLAN_RADIO_DIS# A48
GPIOG7/TACH6
A29 BC_INT#_ECE5028 42
BC_INT#
B31 BC_DAT_ECE5028 42
BC_DAT
1
WIRELESS_ON#/OFF B13 A30
31 WIRELESS_ON#/OFF GPIOH0 BC_CLK BC_CLK_ECE5028 42
A13 @ R794 @ R795
43 BT_RADIO_DIS# GPIOH1
VGA_ID A53 10_0402_5%~D 10_0402_5%~D
36 WWAN_RADIO_DIS# SYSOPT1/GPIOH2
7,16 SYS_PWROK B57 A4 RUNPWROK 7,42
SYSOPT0/GPIOH3 PWRGD
Discrete 0 B14
2
GPIOH4 SP_TPM_LPC_EN
A14 B56 SP_TPM_LPC_EN 33,34
CPU_VTT_ON GPIOH5 OUT65 +3.3V_ALW
UMA 1 51,55 CPU_VTT_ON B17
GPIOH6 1 1
16 PCH_DPWROK 1 2 B18
@R802
@ R802 0_0402_5%~D GPIOH7 @ C712 @ C713
B19 2 1
TEST_PIN R804 1K_0402_5%~D 4.7P_0402_50V8C~D 4.7P_0402_50V8C~D
1
+CAP_LDO 2 2
B46
CAP_LDO R805
1
B27 100K_0402_5%~D
VSS C714
C1
EP 4.7U_0603_6.3V6K~D
2
DB Version 0.4 2
ECE5028-LZY_DQFN132_11X11~D LID_CL_SIO# 2 1 LID_CL# 31,45
R807 10_0402_5%~D
1
C716
0.047U_0402_16V4Z~D
2
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, ECE5028
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. 1.0
LA-6591P
Date: Monday, January 10, 2011 Sheet 41 of 66
5 4 3 2 1
5 4 3 2 1
+3.3V_ALW +RTC_CELL
+RTC_CELL R815 +3.3V_ALW
0_0402_5%~D
1
+3.3V_ALW 1 2 +RTC_CELL_VBAT @ C721
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
10U_0805_6.3V6M~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
C720 1 R810 1U_0402_6.3V6K~D
1 2 BC_DAT_ECE5028 1 2 0.1U_0402_16V4Z~D 100K_0402_5%~D 1 2
R814 100K_0402_5%~D C723 1 1 1 1 1 1 1 1 1
2 1 BC_DAT_EMC4022 0.1U_0402_16V4Z~D
2
5
2
C724
C727
C728
C729
C730
C731
C725
C726
C732
R816 100K_0402_5%~D U50
2 1 BC_DAT_ECE1117 1 POWER_SW_IN# 1 2
P
51,55 1.05V_VTTPWRGD B 2 2 2 2 2 2 2 2 2 22 POWER_SW_IN# POWER_SW#_MB 31,43
R817 100K_0402_5%~D 4 1.05V_0.8V_PWROK 1 R811 10K_0402_5%~D
O 1.05V_0.8V_PWROK 14,52
55 VCCSAPWROK 2
B64
A11
A22
B35
A41
A58
A52
A26
A
G
PBAT_SMBDAT C722
B3
1 2
R818 2.2K_0402_5%~D TC7SH08FU_SSOP5~D U51 1U_0402_6.3V6K~D
3
1 2 PBAT_SMBCLK 2
VTR[1]
VTR[2]
VTR[3]
VTR[4]
VTR[5]
VTR[6]
VTR[7]
VTR[8]
VBAT
R820 2.2K_0402_5%~D
2 1 LPC_LDRQ#_MEC
D @ R821 100K_0402_5%~D +RTC_CELL D
PS/2 INTERFACE MISC INTERFACE
1 2 CHARGER_SMBDAT A5 A10 SYSTEM_ID
15 SML1_SMBDATA GPIO007/I2C1D_DATA/PS2_CLK0B/I2C3A_DATA GPIO021/RC_ID1
1
R827 2.2K_0402_5%~D B6 B10 BOARD_ID @ C733
15 SML1_SMBCLK GPIO010/I2C1D_CLK/PS2_DAT0B/I2C3A_CLK GPIO020/RC_ID2
1 2 CHARGER_SMBCLK A37 B14 DDR_ON R819 1U_0402_6.3V6K~D
43 CLK_TP_SIO GPIO110/PS2_CLK2/GPTP-IN6 GPIO025/UART_CLK DDR_ON 48,49
R828 2.2K_0402_5%~D B40 B44 HOST_DEBUG_TX 100K_0402_5%~D 1 2
43 DAT_TP_SIO GPIO111/PS2_DAT2/GPTP-OUT6 GPIO120/UART_TX HOST_DEBUG_TX 36
CLK_KBD A38 B46 HOST_DEBUG_RX
40 CLK_KBD GPIO112/PS2_CLK1A GPIO124/GPTP-OUT5/UART_RX HOST_DEBUG_RX 36
DAT_KBD B41 B26 RUNPWROK
40 DAT_KBD
2
CLK_MSE GPIO113/PS2_DAT1A VCC_PRWGD EN_INVPWR RUNPWROK 7,41
40 CLK_MSE A39 GPIO114/PS2_CLK0A GPIO060/KBRST A25 EN_INVPWR 24
DAT_MSE B42 B36 DOCK_PWR_SW# 1 2
40 DAT_MSE GPIO115/PS2_DAT0A GPIO101/ECGP_SCLK PCH_SATA_MOD_EN# 14 22 DOCK_PWR_SW# DOCK_PWR_BTN# 40
PBAT_SMBDAT B59 B37 1 R825 10K_0402_5%~D
46 PBAT_SMBDAT GPIO154/I2C1C_DATA/PS2_CLK1B GPIO103/ECGP_MISO TOUCH_SCREEN_PD# 24
PBAT_SMBCLK A56 B38 XFR_ID_BIT#
46 PBAT_SMBCLK GPIO155/I2C1C_CLK/PS2_DAT1B GPIO105/ECGP_MOSI XFR_ID_BIT# 31
A34 C734
GPIO102/HSPI_SCLK DYN_TUR_CURRNT_SET# DDR_HVREF_RST_GATE 7 1U_0402_6.3V6K~D
A35
GPIO104/HSPI_MISO CPU1.5V_S3_GATE DYN_TUR_CURRNT_SET# 54 2
A36
GPIO106/HSPI_MOSI MSDATA CPU1.5V_S3_GATE 11
JTAG INTERFACE GPIO116/MSDATA
A40 MSDATA 36
+3.3V_ALW JTAG_TDI A51 B43 MSCLK
GPIO145/I2C1K_DATA/JTAG_TDI GPIO117/MSCLK MSCLK 36
JTAG_TDO B55 A45 +RTC_CELL
GPIO146/I2C1K_CLK/JTAG_TDO GPIO127/A20M SIO_A20GATE 18
JTAG_CLK B56 A55
GPIO147/I2C1J_DATA/I2C2C_DATA/JTAG_CLK GPIO153/LED3 PS_ID 46
1
10K_0402_5%~D
1
R824
2
JTAG_RST# DOCK_POR_RST# B22 GENERAL PURPOSE I/O R884 1 2 1K_0402_5%~D LAT_ON_SW# 1 2
40 DOCK_POR_RST# GPIO050/FAN_TACH1 VOL_MUTE 31 LAT_ON_SW_BTN# 31
SUS_ON A21 B2 1 R877 10K_0402_5%~D
44 SUS_ON GPIO051/FAN_TACH2 GPIO001/ECSPI_CS1
AUX_ON B23 A2 DOCK_SMB_ALERT#
32 AUX_ON GPIO052/FAN_TACH3 GPIO002/ECSPI_CS2 DOCK_SMB_ALERT# 40,46,56
1
0.1U_0402_16V4Z~D
C735
1
10K_0402_5%~D
10K_0402_5%~D
100K_0402_5%~D
@ R850
R848
R849
10K_0402_5%~D
10K_0402_5%~D
10K_0402_5%~D
10K_0402_5%~D
R858
R859
R860
R861
VSS_RO
VR_CAP
B B34 B28 @ R864 1 2 0_0402_5%~D 0.1U_0402_16V4Z~D R852 4.7K_0402_5%~D B
2
VSS[1]
VSS[4]
NC1 I2S_WS 2
AGND
EP
1 41 EC_32KHZ_ECE5048 1 2 B68
1 JTAG_TDI @ R867 0_0402_5%~D NC3
2 should be populated
2 JTAG_TMS GPU_SMBDAT
7 3 Depopulated R867 for ECE5028 use MEC5055-LZY_DQFN132_11X11~D 2 1
B66
B11
B60
B12
B54
C1
G1 3 JTAG_CLK R829 2.2K_0402_5%~D
8 4
G2 4 JTAG_TDO GPU_SMBCLK
5 2 1
5 R822 2.2K_0402_5%~D
6
+VR_CAP
6
ACES_85204-06001~D least +3.3V_RUN +RTC_CELL
+3.3V_ALW R875 C919 REV 15mil 15mil +3.3V_ALW +3.3V_ALW
VCI_INT1# 2 1
4.7U_0603_6.3V6K~D
1
R1156 100K_0402_5%~D
240K 4700p X00 1
2
C739
R799
2
R875 10K_0402_5%~D MSDATA 1 2
32 KHz Clock 33K_0402_5%~D 130K 4700p X01 2
R871 R872 R869 10K_0402_5%~D
1K_0402_5%~D 10K_0402_5%~D A_ON
SSM3K7002FU_SC70-3~D
1 2
62K 4700p X02
2
RUNPWROK R873 100K_0402_5%~D
1
1
4700P_0402_25V7K~D
1 2 R874 2.7K_0402_5%~D
1
D SYSTEM_ID FWP# DDR_ON 2 1
8.2K 4700p
4700P_0402_25V7K~D
Q45
33P_0402_50V8J~D 1 2 R876 100K_0402_5%~D
44 RUN_ON_ENABLE#
Y6 G SUS_ON 2 1
4.3K 4700p
2
C744
3
G
@ R879 PCH_ALW_ON 2 1
2 2K 4700p
C742
10K_0402_5%~D R880 100K_0402_5%~D
MEC_XTAL1 1 DOCK_POR_RST# 2 1
G 2
1K 4700p 1 2 2 R881 100K_0402_5%~D
1
32.768KHZ_12.5PF_Q13MC1461000~D R868 0_0402_5%~D EN_INVPWR 2 1
C743 R882 100K_0402_5%~D
1 2 1.05V_0.8V_PWROK 2 1
@ Q126 R883 10K_0402_5%~D
33P_0402_50V8J~D +3.3V_ALW_PCH MMBT3906WT1G_SC70-3~D RESET_OUT# 2 1
+3.3V_M CHIPSET_ID for BID @ R843 8.2K_0402_5%~D
PCH_RSMRST# 3 1 CPU1.5V_S3_GATE 2 1
C
R889 100K_0402_5%~D
E
1
@ R866
R893
B
A 4.7K_0402_5%~D A
2
Place closely pin A29 +3.3V_RUN 100K_0402_5%~D @ D75A BAV99DW-7-F_SOT363-6~D 1=JTAG interface Reset disabled
1 0=Reset JTAG interface
2
6
2
PCH_PWRGD# 22 2
1
R1180
@ R885 @ R1179
1
D G SSM3K7002FU_SC70-3~D 3
2
G SSM3K7002FU_SC70-3~D
@ C747 1 2 S @ R823 Title
3
@ R812 2.2K_0402_5%~D
4.7P_0402_50V8C~D
2 100K_0402_5%~D EMC5055
Size Document Number Rev
2
+3.3V_RUN 1 2
Touch Pad
4.7K_0402_5%~D
4.7K_0402_5%~D
R1129 0_0603_5%~D
1
+3.3V_ALW 1 2 1 2
R903
R902
@R1130
@ R1130 0_0603_5%~D
Touch Pad Conn. Pitch=0.5mm C748
0.1U_0402_16V4Z~D
2
JTP1 CONN@
L54 2 1 BLM18AG601SN1D_0603~D TP_DATA 1 JBT1
D 42 DAT_TP_SIO TP_CLK 1 D
2 1
L55 2 TP_CLK TP_DATA 2 1
42 CLK_TP_SIO 1 BLM18AG601SN1D_0603~D 3
3
2
2
17 BT_DET#
4 36 COEX1_BT_ACTIVE 3
4 3
10P_0402_50V8J~D
10P_0402_50V8J~D
10P_0402_50V8J~D
10P_0402_50V8J~D
1 1 +3.3V_TP 5 BT_COEX_STATUS2 4
5 33 BT_COEX_STATUS2 4
C752
1 1 PS2_DAT_TS 6 9 BT_PRI_STATUS 5
6 G1 33 BT_PRI_STATUS 5
C751
PS2_CLK_TS 7 10 6
7 G2 45 BT_ACTIVE 6
C750
C749
8 41 BT_RADIO_DIS# 7
2 2 8 7
36 COEX2_WLAN_ACTIVE 8
2 2 TYCO_2041070-8 8
9
CONN@ 9
10
10
17 USBP11- 11
11
17 USBP11+ 12 12
13 G1
14 G2
E&T_3703-E12N-03R
100P_0402_50V8J~D
+3.3V_ALW +3.3V_RUN +3.3V_TP
33P_0402_50V8J~D
10K_0402_5%~D
1
+3.3V_TP
@ C754
1 1
C753
R904
TP_CLK R1161
TP_DATA 0_0603_5%~D
SD05.TCT_SOD323-2~D
SD05.TCT_SOD323-2~D
1 2
2 2
1
2
1
1
@ R1162
C755 0_0603_5%~D
@D36
@
@D37
@
0.1U_0402_16V4Z~D 1 2
2
D36
D37
2
2
+3.3V_BT 1 2 BT_COEX_STATUS2
@ R1133 1K_0402_5%~D
1 2 BT_PRI_STATUS
C @ R1134 1K_0402_5%~D C
1 2
KB Conn. Pitch=1.0mm 31,42 POWER_SW#_MB 1 2
1
JKB1 @ C759
+3.3V_ALW +5V_RUN KB_DET# 1 100P_0402_50V8J~D @ PWRSW1
18 KB_DET# PS2_CLK_TS 1 2 @SHORT PADS~D
2
PS2_DAT_TS 2
3
3
1 1 +3.3V_ALW 4
4 Place on Bottom
+5V_RUN 5
C756 C758 5
6
0.1U_0402_16V4Z~D 0.1U_0402_16V4Z~D 42 BC_INT#_ECE1117 6
42 BC_DAT_ECE1117 7
2 2 7
8
8
42 BC_CLK_ECE1117 9
9
10
10 @LED Board FFC @ MDC wire set cable
11 Part Number Part Number Description
GND Description
12
GND
B Place close to JKB1 FCI_10089709-010010LF~D
NBX0000RP0L FFC 6P H P1 PAD=0.7 87.4MM MB-LED/B 0FD DC30100BL0L CONN SET 0FD
MDC-RJ11
B
CONN@ @MEDIA Board FFC
Part Number @ T/P FFC
Description
Part Number Description
NBX0000RS0L FFC 12P G P.5 PAD.3 75MM MB-VOLUME/B 0FD
FFC 8P F P0.5
NBX0000RR0L PAD=0.3 136MM
@ LVDS cable
MB-TP/B 0FD
Part Number Description
@ LVDS cable @KB FFC
Part Number Description DC02C00180L H-CONN SET 0FD MB-LCD CAM LED 2CHANNEL Part Number Description
@ FAN
Part Number Description
@ Speak
A Part Number Description A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Touch PAD/Int KB/BT
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. 1.0
LA-6591P
Date: Monday, January 10, 2011 Sheet 43 of 66
5 4 3 2 1
5 4 3 2 1
DC/DC Interface
+3.3V_ALW_PCH Source
+15V_ALW +3.3V_ALW @ Q49 +3.3V_ALW_PCH +3.3V_ALW +5V_RUN Source
+3.3V_ALW2 SI3456DDV-T1-GE3_TSOP6~D
+3.3V_ALW2 +15V_ALW +5V_ALW Q50
D
6 PJP57 SI4164DY-T1-GE3_SO8~D +5V_RUN
S
1
5 4 1 2 8 1
1
10U_0805_6.3V6M~D
2 7 2
10U_0805_10V4Z~D
@ R907 @ R905 1 1 PAD-OPEN 4x4m R906 6 3
1
100K_0402_5%~D 100K_0402_5%~D @ R908 100K_0402_5%~D 5 1
C760
20K_0402_5%~D R909 R910
C761
ALW_ENABLE 100K_0402_5%~D 20K_0402_5%~D
4
20 ALW_ENABLE 2 5V_RUN_ENABLE
2
3
D 2 D
2
3
2200P_0402_50V7K~D
@ Q51B 1
ALW_ON_3.3V# 5 DMN66D0LDW-7_SOT363-6~D Q52B
@C762
@C762 RUN_ON_ENABLE# 5 DMN66D0LDW-7_SOT363-6~D 1
42 RUN_ON_ENABLE#
6
3300P_0402_50V7K~D
4
2
C763
@Q51A
@ Q51A
4
DMN66D0LDW-7_SOT363-6~D
6
2
42 PCH_ALW_ON 2
Q52A
DMN66D0LDW-7_SOT363-6~D
1 11,37,41,49 RUN_ON 2
1
+3.3V_SUS Source +15V_ALW +3.3V_RUN Source
+3.3V_ALW Q54 +3.3V_ALW Q55 +3.3V_RUN
SI3456DDV-T1-GE3_TSOP6~D +3.3V_SUS +15V_ALW NTMS4920NR2G_SO8~D
1
8 1
10U_0805_6.3V6M~D
R911 6 7 2
1
+3.3V_ALW2 100K_0402_5%~D 5 4 6 3 1
10U_0805_6.3V6M~D
C764
2 R912 5 R913
1
1 1 100K_0402_5%~D 20K_0402_5%~D
C765
R914
4
1
20K_0402_5%~D 2
2
R915 SUS_ENABLE
100K_0402_5%~D 2 3.3V_RUN_ENABLE
2
3
2
1
Q53B D
1
SUS_ON_3.3V# 5 DMN66D0LDW-7_SOT363-6~D 1 2
C G Q56 C766 C
6
3
Q53A 4700P_0402_25V7K~D 2
DMN66D0LDW-7_SOT363-6~D 2
42 SUS_ON 2
1
Discharg Circuit
+3.3V_M +1.5V_RUN Source
+3.3V_M Source
+3.3V_ALW Q58 Q59
1
+15V_ALW SI3456DDV-T1-GE3_TSOP6~D +3.3V_M +1.5V_MEM NTGS4141NT1G_TSOP6~D
+3.3V_ALW2 R916 +15V_ALW +1.5V_RUN
D
D
6 39_0603_5%~D 6
S
S
1
5 4 5 4
1
10U_0805_6.3V6M~D
10U_0805_6.3V6M~D
R917 2 2
2
1
1
100K_0402_5%~D R920
+3.3V_M_CHG
1 1 1 1
R918 @ R919 100K_0402_5%~D R921
G
G
C768
C769
100K_0402_5%~D 20K_0402_5%~D 20K_0402_5%~D
2
3
A_ENABLE
2
2 2
2
2
3
SSM3K7002FU_SC70-3~D
1.5V_RUN_ENABLE
Q57B
1
A_ON_3.3V# 5 DMN66D0LDW-7_SOT363-6~D D
1 1
1
D
Q60
A_ON_3.3V# 2
6
3
B DMN66D0LDW-7_SOT363-6~D 2 S 2 B
3
42,50 A_ON 2
1
1
7 2
10U_0805_6.3V6M~D
@ R922 @ R928 @ R923 @ R924 R929 @ R925 R926 R930 6 3
1
1K_0402_5%~D 1K_0402_5%~D 1K_0402_5%~D 1K_0402_5%~D 39_0603_5%~D 39_0402_5%~D 220_0402_5%~D R927 100K_0402_5%~D 5 1
22_0603_5%~D R931
C772
20K_0402_5%~D
2
4
1.05V_RUN_ENABLE
+3.3V_ALWPCH_CHG
+5V_RUN_CHG
+1.5V_RUN_CHG
+3.3V_RUN_CHG
+1.05V_RUN_CHG
+1.5V_CPU_VDDQ_CHG
2
+3.3V_SUS_CHG
2
+DDR_CHG
1
D
2200P_0402_50V7K~D
2 Q64
G SSM3K7002FU_SC70-3~D 1
7,11 RUN_ON_CPU1.5VS3# S
C773
1
1
D D D D D 2
SSM3K7002FU_SC70-3~D
@ Q67
SSM3K7002FU_SC70-3~D
@ Q68
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
@ Q70
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
1
D D
SSM3K7002FU_SC70-3~D
@ Q65
SSM3K7002FU_SC70-3~D
@ Q66
Q69
Q72
RUN_ON_ENABLE# 2 2 2 2 2
1
SUS_ON_3.3V# ALW_ON_3.3V# 2 G G G G D G
2
Q71
G G S S S S 2 S
3
3
A G A
S S
3
S
3
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, POWER CONTROL
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. 1.0
LA-6591P
Date: Monday, January 10, 2011 Sheet 44 of 66
5 4 3 2 1
5 4 3 2 1
3
+5V_ALW 100K_0402_5%~D Q83A
1
+5V_ALW 1 2
R932 +3.3V_ALW DMN66D0LDW-7_SOT363-6~D
10K_0402_5%~D 1 6 2
Q82A
6
Q74B DMN66D0LDW-7_SOT363-6~D Q81
Battery LED
2
DMN66D0LDW-7_SOT363-6~D Q74A PDTA114EU_SC70-3~D
2
1
D59 DMN66D0LDW-7_SOT363-6~D MASK_BASE_LEDS#
4 3 1 2 1 6 2 R940 1 2 2
14 SATA_ACT#
1
47K_0402_5%~D +5V_ALW 1 2 BATT_WHITE 31
D D
RB751S40T1_SOD523-2~D Q75 C774 R941 4.7K_0402_5%~D
1
5
1
PDTA114EU_SC70-3~D 0.1U_0402_16V4Z~D
1
+5V_ALW BATT_YELLOW 31
NC
P
2 4 BAT2_LED R942
41 MASK_SATA_LED# 42 BAT2_LED#
1
A Y 100K_0402_5%~D
3
G
D62 1 2 U54
MASK_BASE_LEDS# R934 4.7K_0402_5%~D SATA_LED 31 NC7SZ04P5X-G_SC70-5~D Q83B
41 LED_SATA_DIAG_OUT# 1 2
2
DMN66D0LDW-7_SOT363-6~D
RB751S40T1_SOD523-2~D 5 4 3 2
Q82B Q84
4
DMN66D0LDW-7_SOT363-6~D PDTA114EU_SC70-3~D
5
SYS_LED_MASK#
WLAN LED solution for White LED
1
+3.3V_ALW
+3.3V_ALW
R945
3
+5V_ALW 100K_0402_5%~D
Q92A
1
+3.3V_ALW 1 2
R937 DMN66D0LDW-7_SOT363-6~D
100K_0402_5%~D 1 6 2
3
Q78A Q88
2
2
1 6 2 Q89A MASK_BASE_LEDS#
36,41 WIRELESS_LED#
6
DMN66D0LDW-7_SOT363-6~D
1
Q79
1
PDTA114EU_SC70-3~D
2
R947 1 2 2 +3.3V_ALW
MASK_BASE_LEDS# 47K_0402_5%~D 1 2
1
C775 R946 150_0402_5%~D
1
3
1
0.1U_0402_16V4Z~D
2
Q78B R948 +3.3V_ALW
NC
P
DMN66D0LDW-7_SOT363-6~D 2 4 BAT1_LED 100K_0402_5%~D
42 BAT1_LED# A Y
43 BT_ACTIVE 5
3
G
U55
2
NC7SZ04P5X-G_SC70-5~D Q92B R949
4
3
C 1 2 DMN66D0LDW-7_SOT363-6~D 4.7K_0402_5%~D C
WLAN_LED 31
1
4
DMN66D0LDW-7_SOT363-6~D PDTA114EU_SC70-3~D
5
R951
2
150_0402_5%~D
1
SYS_LED_MASK# 1 2 BATT_YELLOW_LED 24
+5V_ALW
1
+5V_ALW
R953
100K_0402_5%~D
3
Q95B
2
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
4 3 2
+3.3V_ALW
6
Q94
PDTA114EU_SC70-3~D
5
C777
Q95A
0.1U_0402_16V4Z~D 2 +5V_ALW
1
1
1 2 SYS_LED_MASK# 1 2 BREATH_WHITE_LED 24
R954 R955 4.7K_0402_5%~D
1
47K_0402_5%~D +5V_ALW
R956
B B
100K_0402_5%~D
3
Q101B
NC
P
40,42 BREATH_LED#
2
DMN66D0LDW-7_SOT363-6~D
2 4 BREATH_LED#_R DMN66D0LDW-7_SOT363-6~D
A Y
4 3 2
G
U57
6
NC7SZ04P5X-G_SC70-5~D Q96
3
PDTA114EU_SC70-3~D
5
Q101A
2
1
MASK_BASE_LEDS# LED1
1 2 BREATH_WHITE_LED_SNIFF 2 1
1
R957 1K_0402_5%~D
LTW-C193TS5_WHITE~D
+3.3V_ALW
C778
0.1U_0402_16V4Z~D
EMI CLIP
1 2 CLIP1
5 EMI_CLIP
U58 1
LED Circuit Control Table SYS_LED_MASK# 1
GND
Fiducial Mark
P
41 SYS_LED_MASK# B
4 MASK_BASE_LEDS#
@ FD1 LID_CL# O CLIP2
SYS_LED_MASK# LID_CL# 31,41 LID_CL# 2
A
G
1 EMI_CLIP
TC7SH08FU_SSOP5~D
3
FIDUCIAL MARK~D 1
GND
A
@ FD2
Mask All LEDs (Sniffer Function) 0 X A
+3.3V_ALW
+COINCELL
ESD Diodes
COIN RTC Battery
DA204U_SOT323~D
DA204U_SOT323~D
DA204U_SOT323~D
3
1
PR1
PD33
PD34
PD32
PL21 +3.3V_ALW 1K_0402_5%~D
@ @ @ FBMJ4516HS720NT_1806~D +3.3V_RTC_LDO
1 2
2
Media Bay Battery Connector
1
JRTC1
Z4012
1
PJP36 +COINCELL 1 3
100K_0402_5%~D
MBATT+_C 1 G
2 1 MPBATT+ 2 4
MBATT1 PR501 2 G
PR504
0.1U_0603_25V7K~D
1
D D
1 100_0402_5%~D PR502 PAD-OPEN 2x2m~D TYCO_2-1775293-2~D
1
2
Z5304 100_0402_5%~D PR503
PC302
2 1 2 BAY_SMBCLK 29,42
2
2 Z5305 100_0402_5%~D +RTC_CELL
3 1 2 BAY_SMBDAT 29,42
2
3 Z5306
4 1 2 MODULE_BATT_PRES# 41,56
2200P_0402_50V7K~D
4
5
5
6
6
1
PD1
PC301
1
7
GND RB715FGT106_UMD3
8 1
2
GND PC1
+3.3V_ALW 1U_0603_10V4Z~D
SUYIN_150010GR006M500ZR
2
ESD Diodes Move to power schematic
GND PL22
DA204U_SOT323~D FBMJ4516HS720NT_1806~D
DA204U_SOT323~D
DA204U_SOT323~D
3
2
1 2
PD2
PD3
PD4
PL1 +3.3V_ALW
@ @ @ FBMJ4516HS720NT_1806~D
1 2
Primary Battery Connector
1
1
PJP43
100K_0402_5%~D
PBATT+_C 1 2 PBATT+
PR2
11
0.1U_0603_25V7K~D
GND
1
10 PAD-OPEN 4x4m
GND PR4
PC2
9
2
9 100_0402_5%~D PR3
8
2
8 Z4304 100_0402_5%~D PR5
7 1 2 PBAT_SMBCLK 42
2200P_0402_50V7K~D
7 Z4305 100_0402_5%~D
6 1 2 PBAT_SMBDAT 42
6 Z4306
5 1 2 PBAT_PRES# 41,56
5
1
PC3
4
4 @ PQ1
3
3
2
2
2 FDN338P_G_NL_SOT23-3~D
C 1 C
1 @ PD5
3
1 2 1 3 DOCK_SMB_ALERT# 40,42,56
PBATT1
SUYIN_200275MR009G50PZR RB751V-40GTE-17_SOD323~D
2
2
@ PR6
GND 1 2
40,41,56 SLICE_BAT_PRES#
0_0402_5%~D
1
@ PC4
1500P_0402_7K~D
2
+5V_ALW
+3.3V_ALW
DA204UGT106_SOT323~D
3
2
PD6
@ PR7 PU1
2.2K_0402_5%~D
2
1 2 GND 40 DOCK_PSID 1 6 GPIO_PSID_SELECT 41
0_0402_5%~D NO IN
PR8
2 5 +5V_ALW
PL2 PR9 GND V+
1
BLM18BD102SN1D_0603~D 33_0402_5%~D
NB_PSID NB_PSID_TS5A63157
D
S
2 1 1 3 1 2 3 4 PS_ID 42
NC COM
PQ2 TS5A63157DCKR_SC70-6~D
100K_0402_1%~D
2
FDV301N_G_NL_SOT23-3~D +5V_ALW
G
2
+5V_ALW
PR10
+5V_ALW
DA204U_SOT323~D
2
2
10K_0402_1%~D
DA204U_SOT323~D
1
B B
C
PD8
PQ3
PR11
2
3
B MMST3904-7-F_SOT323~D
PD9
E @
15K_0402_1%~D
3
2
@
1
1
@ PD7
PR12
SM24_SOT23 PR13
GND 1 2
1
PSID_DISABLE# 41
1
PR14 @ 10K_0402_5%~D
0_0402_5%~D
1 2 DCIN_CBL_DET# 41
.47U_0402_6.3V6-K~D
DC_IN+ Source
2
PC5
1M_0402_5%~D
VZ0603M260APT_0603
2
0.022U_0805_50V7K~D
100K_0402_5%~D
10U_1206_25V6M~D
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
1
1
PC6
PR15
1
PD10
1
1
PC7
PC8
PC9
PR16
PC11
2
2
0.1U_0603_25V7K~D
1
PJPDC1 PR18
4.7K_0805_5%~D
2
1
1 @ 1 2 SOFT_START_GC 56
2
0.1U_0603_25V7K~D
1
1
PC10
2
2
2 -DCIN_JACK 10K_0402_5%~D
@ PR17
3
3
1
2
PC12
4
1M_0402_5%~D
2
4 +DCIN_JACK
5
2
5
PR19
A 6 A
6 @
7
7
2
MOLEX_87438-0743 PL4
FBMJ4516HS720NT_1806~D
1 2
DELL CONFIDENTIAL/PROPRIETARY
0.1U_0603_25V7K~D
1
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D +DCIN
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Size Document Number Rev
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 1.0
LA-6591
Date: Monday, January 10, 2011 Sheet 46 of 66
5 4 3 2 1
5 4 3 2 1
+DC1_PWR_SRC
PJP44
+PWR_SRC 1 2
2
PJP45 +5V_VCC1
0_0805_5%~D
0_0805_5%~D
D D
1 2
+5V_ALW2
Peak current : 6.725A
0.1U_0805_50V7M~D
2200P_0402_50V7K~D
PR20
PR21
5 Volt +/-5%
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
0.1U_0805_50V7M~D
2200P_0402_50V7K~D
@ PR22
OCP_MIN : 8A
1
PAD-OPEN1x1m 10_0603_5%~D
Thermal Design Current : 7.462A
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
1
1
PC19
PC20
PC21
PC22
PC23
2 1
4.7U_0603_6.3V6K~D
PC14
PC15
PC16
PC17
PC18
Peak Current : 10.660A
2
Fsw = 300KHz
1
PC24
OCP_MIN : 12.792A
+3.3V_ALW2
2
0.1U_0603_25V7K~D
Fsw = 400KHz
1
PC25
1U_0402_6.3V4Z~D
@ PR24
0_0402_5%~D
1U_0603_10V6K~D
1
1
0_0402_5%~D
PC26
2
1
PR23
PC27
1 2
+5V_ALW2P
@ PR25
2
0_0402_5%~D
2
1 2
EN_3V_5V
+3.3V_ALW2
+3.3V_RTC_LDO +5V_3V_REF PC28
0.1U_0603_25V7K~D
VIN
1
GNDA_3V5V 1 2 GNDA_3V5V PR27
0_0402_5%~D
LDOREFIN 1 2
0.1U_0402_10V7K~D
@ PR26 0_0603_5%~D
PR28
2
0.1U_0402_10V7K~D
3
PC30
8
7
6
5
4
3
2
1
5
6
7
8
FDS8878_G 1N SO8
1
+5V_ALWP 0_0402_5%~D
PC29
VREF3
TONSEL
VREF2
LDOREFIN
VIN
LDO
V5FILT
EN_LDO
AO4466L_SO8~D
REFIN2
PQ5
PQ6
2
2 @ PR29
G 274K_0402_1%~D
9 32 4
+5V_ALWP PR30 VSW REFIN2 GNDA_3V5V
10 31 1 2
VOUT1 TRIP2
S
3
2
1
3.3UH_FDVE1040-H-3R3M=P3_11.3A_20%~D EN_3V_5V PGOOD1 PGOOD2 EN_3V_5V PL6
14 27
+5V_ALW_UGATE EN1 EN2 +3.3V_ALW_UGATE 4.7UH_FDVE1040-H-4R7M=P3_10A_20%~D
15 26
+5V_ALWP +5V_ALW_PHASE DRVH1 DRVH2 +3.3V_ALW_PHASE +3.3V_ALWP
2 1 16 25 2 1
LL1 LL2
SECFB
V5DRV
VBST1
DRVL1
DRVL2
VBST2
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
1
1
PGND
GNDA_3V5V @
0_0402_5%~D
0_0402_5%~D
GND
PAD
0.1U_0603_25V7K~D
5
6
7
8
1
FDMS7692 1N POWER56-8
PC32
PC31
D
330U_V_6.3VM~D
330U_V_6.3VM~D
0.1U_0603_25V7K~D
PR32
PR33
2
2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1
1
PC34
PC35
1 1
AO4406AL_SO8~D
33
17
18
19
20
21
22
23
24
PQ7
@
2
1
1
+ @ +
PC33
PC36
PC37
PC38
2 GNDA_3V5V
2
G
PQ8
4
2
2
PR34 PR35 @ PR37
2
2
2 2
S
0_0402_5%~D
1
1
1
@
0_0402_5%~D
4.7_1206_5%~D
3
2
1
+3.3V_ALW_LGATE
PR36
PR39
1
1
PR38
SECFB
@
2
2
+5V_ALW_LGATE GNDA_3V5V
GNDA_3V5V
GNDA_3V5V PC39 PJP46
1U_0603_10V6K~D
1
+5V_ALWP 2 0.1U_0603_25V7K~D 1 2
+3.3V_ALWP +3.3V_ALWP
PC40
1 1 2
3
+5V_ALW2
2
0.1U_0603_25V7K~D
PAD-OPEN1x1m
1
PD11 GNDA_3V5V
100K_0402_1%~D
100K_0402_1%~D
PC41
BAT54SW-7-F_SOT323-3~D
2
2
PC42
PR40
PR41
2 0.1U_0603_25V7K~D PD13
1
1 1 2 BAT54CW_SOT323~D
B B
3 @
1
PR42 PD12 POK2
2K_0402_5%~D
2 1 BAT54SW-7-F_SOT323-3~D
42 ALWON
3
0_0402_5%~D
1
200K_0402_5%~D
2
PR43
PR45
0_0402_5%~D
PR44
22 THERM_STP# 2 1
2
1
POK1
PJP47 ALW_PWRGD_3V_5V 42
1 2
PAD-OPEN1x1m
2
PR47
PC43
PJP50 39K_0402_5%~D
PU2 PR22
1 2 +3.3V_ALW
2
+3.3V_ALWP
1
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL DC/DC +3V/ +5V
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
LA-6591
Date: Monday, January 10, 2011 Sheet 47 of 66
5 4 3 2 1
5 4 3 2 1
+1.5V_SUS_P
@ PL601
FBMJ4516HS720NT_1806~D
1 2
PJP601
1.5V_PWR_SRC 1 2 +PWR_SRC
PAD-OPEN 4x4m
0.1U_0805_50V7M~D
2200P_0402_50V7K~D
10U_1206_25V6M~D
10U_1206_25V6M~D
10U_1206_25V6M~D
1
1
PC605
PC604
PC603
PC602
PC601
5
PQ601
FDMS7692_SO8~D
2
PR603 @ @
255K_0402_1%~D
1 2
4
PR606 PR604
GNDA_1.5V PC612
0_0402_5%~D 2.2_0603_5%~D
42,49 DDR_ON 1 2 BST_1.5VP 1 2 1 2
3
2
1
1
0.1U_0603_25V7K~D
1
@ PR611 PL602
15
14
1
300K_0402_5%~D @ PC613 PU601 1UH 20% FDUE1040D-H-1R0M=P3_21.3A_20%~D
1U_0402_6.3V4Z~D 1 2
NC
BOOT
EN/DEM
+1.5V_SUS_P
2
2
2 13 DH_1.5VP
TON UGATE
1
@
C PR607 3 12 LX_1.5VP PC610 C
330U_SX_2VY~D
330U_SX_2VY~D
2200P_0402_50V7K~D
0.1U_0402_10V7K~D
VOUT PHASE
5
10_0402_5%~D 0.1U_0603_25V7K~D
2
+5V_ALW
PQ602
1 2 4 11 1 2 1 1
0_0402_5%~D
+5V_ALW
FDMS0310S_DFN8-5
VDD CS
1
PR605
6.98K_0402_1%~D + +
PR601
PC609
PC608
PC607
PC606
5 10
FB VDDP
2
1
6 9 DL_1.5VP 4
PGOOD LGATE
2
PGND
PC614 @ PR602 2 2
GND
1
4.7U_0603_6.3V6K~D 4.7_1206_5%~D
PC615
2
2
@ PC611
2 1 RT8209MGQW_WQFN14_3P5X3P5 4.7U_0805_10V4Z~D
7
3
2
1
1
1
GNDA_1.5V +3.3V_ALW 47P_0402_50V8J~D
GNDA_1.5V
PR608
10K_0402_1%~D
100K_0402_1%~D
1 2 GNDA_1.5V
1
1
PR610
PR609
10K_0402_1%~D
2
42 1.5V_SUS_PWRGD
GNDA_1.5V
1.5V_SUS_PWRGD
* connect to U51 (EC) Pin B9 (Vih => 2V)
PJP602
B B
PJP604 1 2
1 2
PAD-OPEN 4x4m
PAD-OPEN1x1m PJP603
+1.5V_SUS_P 1 2 +1.5V_MEM
GNDA_1.5V
PAD-OPEN 4x4m
A A
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
DELL CONFIDENTIAL/PROPRIETARY
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. Compal Electronics, Inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL +1.5V_MEM
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
LA-6591
Date: Monday, January 10, 2011 Sheet 48 of 66
5 4 3 2 1
5 4 3 2 1
+1.8V_RUNP
1.8 Volt +/-5%
Thermal Design Current: 0.824A
Peak current: 1.177 A
+3.3V_ALW @ PJP14
OCP_MIN: 1.412A
2 1 +1.8V_PWR_SRC
D D
PAD-OPEN 2x2m~D
10U_0805_6.3V6M~D
22U_0805_6.3V4Z~D
0.1U_0603_25V7K~D
PC68
2
1
PC66
PC67
1
PR60
2
@ 0_0603_5%~D
13
14
15
16
17
PU4
+1.8V_VDD
VIN
VIN
PGND
PGND
TPAD
PR61
PC69
24k_0402_1%~D
1 2 12 1 +1.8V_EN 2 1 RUN_ON 11,37,41,44
VDD EN
GNDA_1.8V .1U_0402_16V7K~D
11 2
AGND RES
TPS51311RGTR_QFN16_3X3~D
PC70 PR63
1 2 2 1 +1.8V_FB 10 3 2 1 +3.3V_RUN
FB PGOOD
0.012U_0402_16V7K~D 10_0402_1%~D PR66 PC71 PR64
+1.8V_RUNP
3.3_0603_1%~D
MODE
2
1K_0402_1%~D PC72 100P_0402_50V8J~D
SW
SW
SW
PR67
2 1
1
1.8V_RUN_PWRGD connect to
PR68
C C
+1.8V_MODE 8
5
U46 Pin B10 (EC)
1
PC73
2
2 1
GNDA_1.8V 0.22U_0603_10V7K~D
2
@ PJP15 PL8
1 2 PR69 2UH_#A915AY-H-2R0M=P3_3.3A_20%~D
57.6K_0402_1%~D +1.8V_SW 2 1 +1.8V_RUNP
PAD-OPEN1x1m
680P_0603_50V8J~D
47P_0402_50V8J~D
22U_0805_6.3V4Z~D
22U_0805_6.3V4Z~D
GNDA_1.8V
PC74
1
1
GNDA_1.8V
PC75
PC76
PC77
@
2
1
PR70
4.7_0805_5%~D
2
@
@ PJP16
+0.75V_DDR_VTT +1.8V_RUNP 2 1 +1.8V_RUN
PAD-OPEN 2x2m~D
B B
DDR3 Termination
0.75Volt +/-5%
Thermal Design Current: 0.525A
+5V_ALW Peak current: 0.75A
PU5
PJP17 +V_DDR_REF
1
+1.5V_MEM 2 1DC_1+0.75V_VTT_PWR_SRC 1 10
VDDQSNS VIN PC78
PJP18
PAD-OPEN 2x2m~D 2 4.7U_0805_10V4Z~D
2
VLDOIN
2 1 +0.75V_DDR_VTT
+0.75V_P +0.75V_P
8
GND PAD-OPEN 2x2m~D
6
VTTREF
3
0.1U_0603_25V7K~D
VTT
5 9 +0.75V_S5
10U_0805_6.3V6M~D
0.1U_0603_25V7K~D
VTTSNS S5
2
PC79
PGND
7 +0.75V_S3
GND
10U_0805_6.3V6M~D
10U_0805_6.3V6M~D
S3
2
1
PC82
1
PC83
RT9026GFP_MSOP10~D
PC80
PC81
1
11
1
A A
1 2 DDR_ON 42,48
PR72 0_0402_5%~D
1 2 0.75V_DDR_VTT_ON 41
+1.05V_M
D D
PC84
PJP19
1U_0402_6.3V6K~D +1.05V_PWR_SRC 1 2 +5V_ALW
2 1 PAD-OPEN 4x4m
1.05 Volt +/-5%
10U_1206_25V6M~D
10U_1206_25V6M~D
10U_1206_25V6M~D
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
PC88
PC89
Thermal Design Current : 2.921A
1
+1.05VM_VX
@ PC85
PC86
PC87
Peak current : 4.173A
2
GNDA_1.05VM
17
16
OCP_MIN :5.008A
2
PU6
+3.3V_ALW PC90
VIN
VIN
0.22U_0603_10V7K~D
1
PR74 PR75 @
PC91 100P_0402_50V8J~D 3.3_0603_1%~D 0_0402_5%~D
2 1 1 15 +1.05VM_BST 1 2 2 1 SIO_SLP_A# 16,41
VCCA VBST
C 2 14 +1.05VM_PWRGD PR78 C
PR76 5.6K_0402_5%~D PC92 680P_0402_50V7K~D GND PGOOD 0_0402_5%~D
2 1 2 1 +1.05VM_COMP 3 13 +1.05VM_EN 2 1 A_ON 42,44
COMP EN 22.1K_0402_1%~D
+1.05VM_VFB 4 12 +1.05VM_FSET 2 1
PR80 2K_0402_1%~D VFB FSET @ PR79
2 1 +1.05V_MP 5 11 +1.05VM_MODE
VOUT MODE
10K_0402_1%~D
2
2 1 1 2 +1.05VM_SS 6 10 +1.05VM_IMON
SS IMON GNDA_1.05VM
PR83
+1.05V_MP
2.67K_0402_1%~D
0.01U_0402_25V7K~D
1
0_0402_5%~D 1800P_0402_50V7K~D
PGND
PGND
PC94
+1.05V_MP
SW
PR81 PC93
PR82
1
SN1003055RUWR_QFN17_3P5X3P5~D
2
GNDA_1.05VM PL9
0.42UH_ETQP4LR42AFM_17A_20%~D
+1.05VM_VX
GNDA_1.05VM +1.05VM_VX 2 1
GNDA_1.05VM
1
1
@
1.33K_0402_1%~D
PC95
@ PR84
PC106
PC107
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
6800P_0402_25V7K~D
0.1U_0603_25V7K~D
1
1
0.1U_0603_25V7K~D
2
@ PR85 0_0402_5%~D
PC96
PC97
PC98
PC99
PC100
PC101
PC102
PC103
PC104
PC105
2
2 1
2
2
@ PR86
7.68K_0805_1%~D
GNDA_1.05VM
1
B B
+3.3V_ALW
100K_0402_1%~D
1
PR87
PJP21
PJP20 1 2
1 2
2
PAD-OPEN 4x4m
PR88 0_0402_5%~D
+1.05VM_PWRGD 2 1 1.05V_A_PWRGD 42 PAD-OPEN1x1m PJP22
+1.05V_MP 1 2 +1.05V_M
GNDA_1.05VM
PAD-OPEN 4x4m
1.05V_A_PWRGD
* connect to U51 (EC) Pin A14 (Vih => 2V)
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
+1.05V_M
Size Document Number Rev
1.0
LA-6591
Date: Monday, January 10, 2011 Sheet 50 of 66
5 4 3 2 1
5 4 3 2 1
+1.05VTT
PC108 1.05Volt
PJP23
1U_0402_6.3V6K~D +1.05VTT_PWR_SRC 1 2 +5V_ALW
=> (+/- 5% AC + DC +Ripple )
D
2 1 PAD-OPEN 4x4m => (+/- 2% DC + Ripple) D
22U_0805_6.3V4Z~D
22U_0805_6.3V4Z~D
Thermal Design Current : 5.980A
10U_1206_25V6M~D
10U_1206_25V6M~D
10U_1206_25V6M~D
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
PC112
PC113
2
1
+1.05VTT_VX
PC351
PC350
Peack current : 8.970A
PC109
PC110
PC111
1
2
GNDA_1.05VTT @ @ OCP_MIN : 10.764A
17
16
2
PU7
PC114
VIN
VIN
+3.3V_ALW 0.22U_0603_10V7K~D
1
PR89
PC115 100P_0402_50V8J~D 2.2_0603_5%~D
2 1 1 15 +1.05VTT_BST 1 2
VCCA VBST PR91
PR90 PC116 2 14 +1.05VTT_PWRGD
5.6K_0402_5%~D 680P_0402_50V7K~D GND PGOOD 41,55
0_0402_5%~D CPU_VTT_ON
2 1 2 1 +1.05VTT_COMP 3 13 +1.05VTT_EN 1 2
COMP EN 22.1K_0402_1%~D
+1.05VTT_VFB 4 12 +1.05VTT_FSET 2 1
PR93 2K_0402_0.5%~D VFB FSET @ PR92
2 1 +1.05VTT_SENSE 5 11 +1.05VTT_MODE
VOUT MODE
+1.05VTT_SENSE
2
2 1 1 2 +1.05VTT_SS 6 10 +1.05VTT_IMON
0_0402_5%~D
SS IMON
PR95
0.01U_0402_25V7K~D
0_0402_5%~D 1800P_0402_50V7K~D 1 GNDA_1.05VTT
PGND
PGND
PR94 PC117
PC118
SW
2
1
SN1003055RUWR_QFN17_3P5X3P5~D
20K_0402_0.5%~D
9
1
1
3.09K_0402_0.5%~D
PL10 +1.05VTTP
PR105
GNDA_1.05VTT 0.42UH_ETQP4LR42AFM_17A_20%~D
+1.05VTT_VX
+1.05VTT_VX
PR96
2 1
GNDA_1.05VTT
2
1
@
22.1K_0402_1%~D
PC119
PR97
PC128
PC131
47U_0805_4V6M~D
47U_0805_4V6M~D
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
0.1U_0603_25V7K~D
6800P_0402_25V7K~D
1
1
C 0.1U_0603_25V7K~D C
2
@ PR98 0_0402_5%~D
PC120
PC129
PC121
PC122
PC130
PC123
PC124
PC125
PC126
PC127
2
2 1 @
2
2
1
PR100
10_0402_5%~D
GNDA_1.05VTT @ PR99
7.68K_0805_1%~D
GNDA_1.05VTT
2
PR101
2 1 +5V_RUN PR102
+1.05VTT_SENSE 1 2 VTT_SENSE 10
9.31K_0402_1%~D
PR103 0_0402_5%~D
+1.05VTT_PWRGD 1 2 1.05V_VTTPWRGD 42,55
0_0402_5%~D
PR104 PR461
2 1 GNDA_1.05VTT 1 2 VTT_GND 10
13.3K_0402_1%~D 0_0402_5%~D
1.05V_VTTPWRGD
* connect to PU13 Pin 15 (Vih => 2V)
* connect to U50 Pin 1 (Vih => 2.31V)
B B
PJP25
PJP24
1 2 2 1
PAD-OPEN 43X118
PAD-OPEN1x1m
PJP26
+1.05VTTP 1 2 +1.05V_RUN_VTT
GNDA_1.05VTT
PAD-OPEN 43X118
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL ISL95870A +1.05V_RUN_VTT
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-6591
Date: Monday, January 10, 2011 Sheet 51 of 66
5 4 3 2 1
5 4 3 2 1
+VCC_PWR_SRC
10U_1206_25VAK~D
10U_1206_25VAK~D
2200P_0402_50V7K~D
0.1U_0603_25V7K~D
5
PQ9
10U_1206_25VAK~D
AON6414AL 1N DFN
PC701 0.033U_0402_16V7K~D
VCC_Core
1
PC132
PC400
PC133
PC134
PC135
2 1
Thermal Design Current : 38A
2
UGATE3 4
Peak current : 53A PC136
3
2
1
PC138 BOST3 2 1 BT3_1 1 2
1_0603_1%~D 1U_0603_10V6K~D PU8 PL11
2 1 5 1 0.36UH_FDUE1040J-H-R36M=P3 33A_20%~D
PR109 VDD BST
2 1 6 8 PHASE3 4 1 +VCC_CORE
D
40.2K_0402_1%~D P1_SW SKIP DH D
2 1
1
2 7 P3_SW 3 2P3_Vo
470P_0603_50V8J~D
PWM LX
Layout Note: PH1 PR111 PR110 4.32K_0402_1%~D
PQ11
PQ12
PC139
AON6704L_DFN8-5
AON6704L_DFN8-5
1
1 2 2 1 2 1 P2_SW 3 4
PC142 close to PIN19
2
GND DL 2.1K_0402_1%~D PR114
10K_0402_1%_ERTJ0EG103FA~D 2.1K_0402_1%~D PR112 4.32K_0402_1%~D 9 @ @ PR113 1_0402_5%~D
P3_SW EP LGATE3
2 1 4 4
1
MAX17491GTA+T_TQFN8_3X3~D
2
PR115 4.32K_0402_1%~D
2.2_1206_1%~D
PR117
1
+Vcore_VCC PC140 PR120
3
2
1
3
2
1
PR121 0_0402_5%~D PR122 10_0402_5%~D 2200P_0402_50V7K~D 2 1
2
+5V_ALW 1 2 +Vcore_VDD 1 2 @ 22.1K_0402_1%~D
1
1K_0402_1%~D
169K_0402_1%~D
165K_0402_1%~D
5.62K_0402_1%~D
5.62K_0402_1%~D
2.2U_0603_10V7K~D
1
2
PC143 PR128 @ PC144
1
2.2U_0603_10V7K~D
PC142
PR123
PR124
PR125
PR126
PR127
0_0402_5%~D 1 2
1U_0603_10V6K~D
+Vcore_CSPA3
PC141
GNDA_VCC 1 2
2
@ PC145 1000P_0402_50V7K~D
2
2
14,42 1.05V_0.8V_PWROK 1 2 GNDA_VCC 1 2 PC146
1
@ PR129 0_0402_5%~D 0.22U_0603_16V7K~D
1000P_0402_50V7K~D 2 1
41 IMVP_VR_ON 1 2 +Vcore_IMAXA
@ PR131 0_0402_5%~D
+GFX_IMAXB +Vcore_CSNA
100K_0402_1%_TSM0B104F4251RZ~D
100K_0402_1%_TSM0B104F4251RZ~D
+Vcore_CSPAAVE
+VGFX_THERMB
+Vcore_THERMA
1 2
127K_0402_1%
10K_0402_1%~D
105K_0402_1%~D
+VCC_PWR_SRC
2
+Vcore_CSPA3
+Vcore_CSPA2
+Vcore_CSPA1
+Vcore_PWMA
PR132 200K_0402_1%~D
+Vcore_CSNA
+Vcore_TONA
2
+Vcore_VCC
PR133
PR134
PR135
+Vcore_EN
+Vcore_SR
GNDA_VCC +VCC_PWR_SRC PJP27
PH2
PH3
1 2 +PWR_SRC
+VGFX_PWR_SRC 1 2 +VGFX_TONB @
1
PR136 200K_0402_1%~D PAD-OPEN 4x4m
10U_1206_25VAK~D
10U_1206_25VAK~D
2200P_0402_50V7K~D
1
0.1U_0603_25V7K~D
5
PQ13
100U_25V_M~D
100U_25V_M~D
100U_25V_M~D
10U_1206_25VAK~D
AON6414AL 1N DFN
@ PR410 10_0402_1%~D 1 1 1
1
PC148
PC154
PC155
PC156
1 2
49
48
47
46
45
44
43
42
41
40
39
38
37
PU9 + + +
PC401
PC151
PC152
PC153
PR138 10_0402_1%~D GNDA_VCC
CSPA3
CSPA2
CSPA1
TPAD
EN
VCC
SR
TONA
CSNA
CSPAAVE
THERMB
THERMA
DRVPWMA
2
10 VSSSENSE 1 2 +Vcore_GNDSA 4
C 2 2 2 C
1
PC149
@ PC150 1000P_0402_50V7K~D
1
1 36 +GFX_IMAXB
Local sense resister put HW side
2
3
2
1
1000P_0402_50V7K~D GNDA_VCC TONB IMAXB
2 35 +Vcore_IMAXA PR141 PC157 PL12
2
PR139 10_0402_1%~D PR140 11.5K_0402_1%~D GNDSA IMAXA 2.2_0603_5%~D 0.22U_0603_10V7K~D 0.36UH_FDUE1040J-H-R36M=P3 33A_20%~D
10 VCCSENSE 1 2 2 1 +Vcore_FBA 3 34 BOST2 2 1 BT2_1 1 2
FBA BSTA2
4 1 +VCC_CORE
1
1
1 2 1000P_0402_50V7K~D GNDA_VCC P2_SW 3 2P2_Vo
470P_0603_50V8J~D
UGATE2
PQ15
PQ16
PC159
5 32
2
AON6704L_DFN8-5
AON6704L_DFN8-5
AGND DHA2
1
@ PR143 75_0402_5%~D GNDA_VCC
2
+1.05V_RUN_VTT 1 2 +VGFX_FBB 6 31 LGAT2 2.1K_0402_1%~D PR145
FBB DLA2 @ @ PR144 1_0402_5%~D
+VGFX_GNDSB 7 30 4 4
GNDSB PGNDA
1
1 2
2
7,42,54 H_PROCHOT# +Vcore_VDD
8 29
2.2_1206_1%~D
PR146 0_0402_5%~D 53 +GFX_CSPBAVE CSPBAVE VDDA
PR148
2.2U_0603_10V7K~D
1
1
PR149 10_0402_5%~D GNDA_VCC 1 2 9 28 PC161 PR152
3
2
1
3
2
1
53 +GFX_CSPB1 CSPB1 DLA1 2200P_0402_50V7K~D
PC160
1 2 2 1
2
@
2
CSNB DHA1
1
53 +GFX_CSNB
PR153 10_0402_1%~D 11 26 PR154 @ PC162
11 VSS_AXG_SENSE +VGFX_GNDSB 53 +GFX_CSPB2 CSPB2 LXA1
1 2 0_0402_5%~D 1 2
+GFX_POKB 12 25 +Vcore_CSPA2
POKB BSTA1
1
2
DRVPWMB
ALERT#
@ PC165 0.22U_0603_16V7K~D
PGNDB
2
AGND
POKA
VDDB
BSTB
2 1
DHB
DLB
CLK
LXB
2
14
15
16
17
18
19
20
+Vcore_VDIO 21
+Vcore_ALERT# 22
23
+Vcore_POKA 24
1
PC167
+Vcore_VDD
+Vcore_CLK
1 2 1000P_0402_50V7K~D
53 +GFX_DRVPWMB
+VCC_GFXCORE
2
10U_1206_25VAK~D
10U_1206_25VAK~D
0.1U_0603_25V7K~D
2200P_0402_50V7K~D
53 +GFX_LXB
5
PQ17
10U_1206_25VAK~D
AON6414AL 1N DFN
53 +GFX_DHB
1
PC169
PC402
PC170
PC171
PC172
53 +GFX_DLB
2
PC173 0.1U_0402_25V6K~D UGATE1 4
1 2
2 1 PR161 PC174
PR159 130_0402_1%~D 2.2_0603_5%~D 0.22U_0603_10V7K~D
3
2
1
+3.3V_RUN 2 1 BOST1 2 1 BT1_1 1 2
+1.05V_RUN_VTT
@ PR160 130_0402_1%~D PL13
2 1 0.36UH_FDUE1040J-H-R36M=P3 33A_20%~D
+GFX_POKB PR162 54.9_0402_1%~D
PHASE1 4 1 +VCC_CORE
10 VIDSOUT 1 2
10K_0402_1%~D
2
1
PR164 0_0402_5%~D P1_SW 3 2P1_Vo
0_0402_5%~D
470P_0603_50V8J~D
10 VIDALERT_N
PQ19
PQ20
PR165
PR166
PC175
1 2
AON6704L_DFN8-5
AON6704L_DFN8-5
1
PR167 0_0402_5%~D
2
10 VIDSCLK 1 2 2.1K_0402_1%~D PR170
@ PR168 0_0402_5%~D @ @ PR169 1_0402_5%~D
PR171
1
LGATE1 4 4
1
41 IMVP_PGOOD 2 1 +Vcore_POKA
2
2.2_1206_1%~D
PR173
0_0402_5%~D
1
PC176 PR176
3
2
1
3
2
1
2200P_0402_50V7K~D 2 1
2
@ 22.1K_0402_1%~D
2
1
IMVP_PGOOD connect to PR177 @ PC177
1 2
U46 Pin A62 (EC) +Vcore_CSPA1
0_0402_5%~D
@ PC178 1000P_0402_50V7K~D
2
GNDA_VCC 1 2 PC179
0.22U_0603_16V7K~D
A 1000P_0402_50V7K~D 2 1 A
PJP28 Vcore/VAXG H/S Mosfet PQ9, PQ13, PQ17, PQ24, PQ60 Vcore/VAXG L/S Mosfet PQ11, PQ15, PQ19, PQ25, PQ26
1 2 +Vcore_CSNA
AON6414AL AON6704L @ PC180
Main (X7630031L06) Main (X7630031L06) GNDA_VCC 1 2
PAD-OPEN1x1m
GNDA_VCC SIR472 SIR164DP 1000P_0402_50V7K~D
2nd 2nd DELL CONFIDENTIAL/PROPRIETARY
3rd (X7630031L07) MDU2657RH 3rd (X7630031L07) MDU2653RH Compal Electronics, Inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Vcore
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-6591
Date: Monday, January 10, 2011 Sheet 52 of 66
5 4 3 2 1
5 4 3 2 1
+VGFX_PWR_SRC
10U_1206_25VAK~D
10U_1206_25VAK~D
2200P_0402_50V7K~D
0.1U_0603_25V7K~D
5
PQ21
10U_1206_25VAK~D
AON6414AL 1N DFN
VCC_AXG
1
@
PC181
PC403
PC182
PC183
PC184
Thermal Design Current : 21.5A
2
G_UGATE2 4 @
@ @ @ @ Peak current : 33A
D
+5V_ALW @PR179 @ PC185 OCP_MIN :39.6A D
2.2_0603_5%~D 0.22U_0603_10V7K~D
3
2
1
@ PC186 G_BOST2 2 1 GBT2_1 1 2
1U_0603_10V6K~D @ PU10 @ PL14
2 1 5 1 0.36UH_FDUE1040J-H-R36M=P3 33A_20%~D
VDD BST
6 8 G_PHASE2 4 1 +VCC_GFXCORE
SKIP DH
1
2 7 GP2_SW 3 2 GP2_Vo
470P_0603_50V8J~D
AON6704L_DFN8-5
52 +GFX_DRVPWMB PWM LX @ PQ22
PC187
AON6704L_DFN8-5
1
PQ23
3 4
2
GND DL 2.74K_0402_1%~D @ PR181
9 @ @ PR180 1_0402_5%~D
EP G_LGATE2 @
4 4
1
MAX17491GTA+T_TQFN8_3X3~D
2
2.2_1206_1%~D
PR182
1
@ PC188 +Vcore_VCC @ PR186
3
2
1
3
2
1
4700P_0402_25V7K~D 2 1
0_0402_5%~D
2
1
@ 7.5K_0402_1%~D
1
PR198
@ PR187 @ PC189
0_0402_5%~D 1 2
2
52 +GFX_CSPB2 @ PC190 1000P_0402_50V7K~D
2
GNDA_VCC 1 2 @ PC191
0.22U_0603_16V7K~D
1000P_0402_50V7K~D 2 1
52 +GFX_CSNB
C C
+VGFX_PWR_SRC
PJP29
1 2 +PWR_SRC
PAD-OPEN 4x4m
10U_1206_25VAK~D
10U_1206_25VAK~D
2200P_0402_50V7K~D
0.1U_0603_25V7K~D
5
5
PQ24
PQ60
10U_1206_25VAK~D
AON6414AL 1N DFN
AON6414AL 1N DFN
1
PC193
PC404
PC194
PC195
PC196
2
2
4 4
52 +GFX_DHB
PR189 PC197
2.2_0603_5%~D 0.22U_0603_10V7K~D
3
2
1
3
2
1
2 1 GBT1_1 1 2
52 +GFX_BSTB PL15
0.36UH_FDUE1040J-H-R36M=P3 33A_20%~D
4 1 +VCC_GFXCORE
52 +GFX_LXB
2200P_0402_50V7K~D
5
470U_D2_2VM_R4.5M~D
470U_D2_2VM_R4.5M~D
GP1_SW 3 2 GP1_Vo
470P_0603_50V8J~D
0.1U_0402_10V7K~D
PQ25 +GFX_CSPBAVE
PQ26
PC198
1 1
AON6704L_DFN8-5
AON6704L_DFN8-5
1
2
1
2.74K_0402_1%~D + +
PC201
PC202
PC199
0_0402_5%~D
1_0402_5%~D
1
@ @ PR190
PR191
PC200
2
PR199
4 4
2
1
52 +GFX_DLB 2 2
2
2.2_1206_1%~D
PR193
2
1
PC203 @ PR196
3
2
1
3
2
4700P_0402_25V7K~D 1 2 1
2
@ 7.5K_0402_1%~D
2
1
@ PR197 @ PC204
B B
0_0402_5%~D 1 2
+GFX_CSPB1
52 +GFX_CSPB1 @ PC205 1000P_0402_50V7K~D
2
GNDA_VCC 1 2 @ PC206
0.22U_0603_16V7K~D
1000P_0402_50V7K~D 2 1
+GFX_CSNB
52 +GFX_CSNB PC207
GNDA_VCC 1 2
PC702 0.022U_0402_25V7K~D
2 1 .1U_0402_16V7K~D
PC208
0.33U_0603_10V7K~D PR119
1 2 2 1
1_0603_1%~D
PR201
2 1
40.2K_0402_1%~D 2 1 GP1_SW
52 +GFX_CSNB
A A
52 +GFX_CSPBAVE
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Vcore
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-6591
Date: Monday, January 10, 2011 Sheet 53 of 66
5 4 3 2 1
5 4 3 2 1
0.1U_0603_25V7K~D
5 3 2 PAD-OPEN 4x4m
0.1U_0603_25V7K~D
@
47P_0402_50V8J~D
1
1
D D
PC209
PC211
Main 316K 220P 4.7K
PC210
PR206
2
1
1 2 PR207 D @ 226K @ 2.2K
DC_BLOCK_GC 56
1 2 2 PQ28 Adapter Protection Event 2nd
56 CSS_GC
0_0402_5%~D G NTR4502PT1G_SOT23-3~D
1
0_0402_5%~D D S
3
2 PQ30A
G NTGD4161PT1G_TSOP6~D PR813 PR814 PR812 PC231 PR224 PR225
PQ29 S
S
NTR4502PT1G_SOT23-3~D
D
5 6 DOCK_DCIN_IS+ 40
E2 AC_OK=17.7 Volt SW 0 Ohm @ 100k Main @ 200K 7.5K
CSSN_1
CSSP_1
G
1
PR218 PQ30B 0.01u @ @
PR208 NTGD4161PT1G_TSOP6~D 2nd
TI bq24747 = 316K 10K_0402_5%~D HW @ 0 Ohm @
S
Intersil ISL88731 = 226K
D
2 1 2 4
0_0402_5%~D
DOCK_DCIN_IS- 40
100K_0402_1%~D
0_0402_5%~D
Maxim = 383K
1
PR228 PC225 PC227
PR209
100K_0402_1%~D
1
1
PR216
PR210
PR211
G
3
+SDC_IN 0_0402_5%~D
MAX8731A_LDO MAX8731_REF PC212 PC213 10K 2200P 56P
PR212
1 2
PR213 0.1U_0603_25V7K~D 0.1U_0603_25V7K~D
DK_CSS_GC 56
@ PR813 0_0402_5%~D Main
10K_0402_1%~D
10K_0402_5%~D
2
56 +CHGR_DC_IN 1 2 1 2 1 2 1 2 1 2
2
1
1
DYN_TUR_PWR_ALRT# 41
2nd @ @ @
316K_0402_1%~D
PR215
2
1 2
GNDA_CHG @ PC803
28
27
1
@ PC215 GNDA_CHG PU11 ICOUT 2 1 1 2 GNDA_CHG
2
CSSN
ICREF
CSSP
PR218 2 1 DCIN 22 26 @ PR220 @ PR811 220P_0402_50V8J~D
1U_0603_10V6K~D
1
DCIN ICOUT
1
49.9K_0402_1%~D PR219 33_0603_1%~D 0_0402_5%~D
10U_1206_25V6M~D
10U_1206_25V6M~D
2200P_0402_50V7K~D
0.1U_0603_25V7K~D
1
2.2_0603_1%~D 120P 1u @
PC214
2 1 2
PR221 ACIN BOOT 1
25 2 BOOT_D @ PR812 Main
BOOT
1
PC218
PC219
PC220
PC221
1 2 13 100K_0402_5%~D
15.8K_0402_1%~D
PC216
2
BAT54HT1G_SOD323-2~D
22,42,56 ACAV_IN ACOK
1
0_0402_5%~D @ @ @ 0.01u
2nd
2
0.1U_0603_25V7K~D
1
1
PC217
C 2 1 11 C
2
VDDSMB
5
PQ31
PD15
PR222
SIR472DP-T1-GE3_SO8~D
0.01U_0402_25V7K~D 10 GNDA_CHG +3.3V_ALW
2
SCL
2
GNDA_CHG +5V_ALW @ 9 21 MAX8731A_LDO 1 2 PC240 PC241 PR232
2
SDA VDDP
3300P_0402_50V7K~D
VICM
1
23 2 PR223 1 +VCHGR_B
PC223 PHASE
6
2nd @ 0.22u 10 ohm
3
2
1
FBO
1
0.1U_0402_10V7K~D 1_0603_1%~D
2
1
1 2 5 @ PC224
EAI 220P_0402_50V7K~D
PC226
2
GNDA_CHG PR224 2 1 1 2 4 20 CHG_LGATE
4.7K_0402_5%~D
2
200K_0402_5%~D PC225 PR225 EAO LGATE PR227 +VCHGR
42 CHARGER_SMBCLK
56P_0402_50V8~D
1
42 CHARGER_SMBDAT
2
MAX8731_REF 1+VCHGR_L
PC227
3 19 2 4 1
VREF PGND
18
PC228 PR228 CSOP 5.6UH 20% FDVE1040-H-5R6M=P3_9.2A_20%~D
3 2
1.8K_1206_5%~D
2
22 MAX8731_IINP
1
120P_0402_50VNPO~D 1 2 7 17
10U_1206_25V6M~D
10U_1206_25V6M~D
10U_1206_25V6M~D
0.1U_0603_25V7K~D
CE CSON
5
6
7
8
10K_0402_5%~D
PR231
1 2
0_0402_5%~D
0_0402_5%~D
8.45K_0402_1%~D
220P_0402_50V8J~D
1
1
15 VFB 1 PR230 2 +VCHGR PC230
2
0.1U_0402_10V7K~D
VFB
1
1
SI4812BDY-T1-GE3_SO8~D
1000P_0603_50V7K~D
PR229
PC229
12
1U_0603_10V6K~D
GND
0.01U_0402_25V7K~D
0.01U_0402_25V7K~D
0.01U_0402_25V7K~D
100_0402_5%~D @
PR232
PR233
PC236
PC237
PC238
PC239
16 <BOM Structure>
2
NC
1
PQ33
PC231
PC232
PC233
PC234
PC235
29
2
2
TP
2
@ 4 PR234
2
2
4.7_1206_5%~D
2
@ @ @ @ BQ24747RHDR_QFN28_5X5~D
PJP34
1
PC240 D
1 2
3
2
1
1
0.1U_0603_25V7K~D PC241 0.1U_0603_25V7K~D 2
1 2 1 2 1 2 G
PAD-OPEN1x1m S
3
GNDA_CHG 0.1U_0603_25V7K~D @ PC293
GNDA_CHG GNDA_CHG GNDA_CHG
Maximum charging current is 6.3A ACAV_IN @
B B
PQ34
MAX8731_REF RHU002N06_SOT323-3~D
+3.3V_ALW
+DC_IN MAX8731_REF
PR236
10K_0402_1%~D
1M_0402_1%~D
47K_0402_1%~D
232K_0402_1%~D
1
1
+5V_ALW +5V_ALW 1 2
100K_0402_1%~D
1
PR235
PR237
PR239
DYN_TUR_CURRENT_SET# +5V_ALW
+3.3V_ALW2
PR238
2
DYN_TUR_PWR_VO
100P_0402_50V8J~D
2
0.01U_0402_25V7K~D
PR809
65W High
2
1
8
221K_0402_1%~D PU12A @
2
PR240
@ PC244
PC245
P
PR810 +
1 1 2
2
22.6K_0402_1%~D
41.2K_0402_1%~D
100P_0402_50V8J~D
-
G
1.8M_0402_1%~D
42.2K_0402_1%~D
100P_0402_50V8J~D
1
1
1 2 LM393DR_SO8~D
1
4
1
1
PR803 PC242
PR241
PC243
PR243
150K_0402_1%~D PR805
PR242
20K_0402_1%~D PR807 2
2
8
2N7002W-7-F_SOT323-3~D
0_0402_5%~D @
2
2
1
MAX8731_IINP 1 D
2 1 2 5
P
2
@ PR801 +
PQ802
7 2
ICOUT ICREF O G
1 2 1 2 6
-
G
S
3
LM393DR_SO8~D
1
1
PC802
150K_0402_1%~D @
Main 1 ohm @ @ @ 0 ohm 0 ohm 0.1u
100P_0402_50V8J~D
2
66.5K_0402_1%~D
1
2N7002W-7-F_SOT323-3~D
PR804
PC801
1
D
2nd 0 ohm 4.7 ohm 1u 0.1u 10 ohm 10 ohm 0.047u
PQ801
A 42 DYN_TUR_CURRNT_SET# 2 A
2
G
1
S
3
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
Adapter Protection Circuit for Turbo Mode THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Charger
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-6591
Date: Monday, January 10, 2011 Sheet 54 of 66
5 4 3 2 1
5 4 3 2 1
VCCSA
Thermal Design Current : 4.2A
Peak current : 6A
OCP_MIN :7.2A
D D
PJP35
+VCCSA_PWR_SRC 1 2 +PWR_SRC
PAD-OPEN 43X118
10U_1206_25V6M~D
10U_1206_25V6M~D
0.1U_0603_25V7K~D
2200P_0402_50V7K~D
+5V_RUN
1 1 2
1
PC246
PC247
PC249
PC248
2
PC250 2 2 1
1
1U_0603_10V6K~D
1 2 PR244
2.2_0805_5%~D
+VCCSA_LGATE
5
6
7
8
+VCCSA_VCC
AO4466L_SO8~D
1U_0603_10V6K~D
0.1U_0402_10V7K~D
PQ35
1
1
PC251
PC252
4
2
2
20
1
PU13
PVCC
LGATE
3
2
1
GNDA_VCCSA GNDA_VCCSA
PL18
2 19 1UH 20% FDVE0630-H-1R0M=P3 11.9A
PGND VCC PR245
C 2 1 +VCCSA_P C
2.2_0603_1%~D PC253
10U_0805_6.3V6M~D
10U_0805_6.3V6M~D
2200P_0402_50V7K~D
330U_D2_2VY_R7M~D
GNDA_VCCSA 3 18 +VCCSA_BT 1 2 1 2
0.1U_0402_10V7K~D
GND BOOT
1
5
6
7
8
1
0.22U_0603_10V7K~D @ PC254
1
+VCCSA_RTN +VCCSA_UGATE 1000P_0603_50V7K~D +
PC255
PC256
PC257
PC260
4 17
10_0402_5%~D
RTN UGATE
PR246
PC258
AO4406AL_SO8~D
1 2
2
2
2
VCCSA_VID_1 5 16 +VCCSA_PHASE PR247 2
VID1 PHASE @ PR248
@PR248
PQ36
4 12.7K_0402_1%~D
2
2.2_1206_1%~D
+VCCSA_VID0 6 15 +VCCSA_EN +VCCSA_LGATE
PC261
1
+1.05V_RUN VID0 EN
2
2 1
3
2
1
+VCCSA_SREF 7 14 +VCCSA_PWRGD
SREF PGOOD PR251 .015U_0603_25V7K~D
.068U_0603_16V7~D
0_0402_5%~D
PR253
2
1
@PR249
@ PR249 113K_0402_1%~D
PC262
2 1 +VCCSA_SENSE 11
0_0402_5%~D PR252
1
1
0_0402_5%~D 2 1
FB
10_0402_5%~D
11 VCCSA_VID_1 +3.3V_RUN
1
GNDA_VCCSA PR255
PR257
PR256 10K_0402_5%~D
10
11
2
140K_0402_1%~D GNDA_VCCSA
PR295 1 2 VCCSAPWROK 42
2
+VCCSA_FB
1K_0402_5%~D ISL95870AHRUZ_UTQFN20_1P8X3P2
2
PR258
@ PR260 +VCCSA_OCSET 0_0402_5%~D
PR259
1
4.12K_0402_1%~D
1 2 1 2
PR262
47.5K_0402_1%~D
0_0402_5%~D
1
+VCCSA_VO 2 1
+1.05V_RUN
PR261
GNDA_VCCSA
B 12.7K_0402_1%~D B
2
2
@ PR263
10K_0402_5%~D
1
PR265
2 1 +GND_VCC_SA 11
2
PR266 0_0402_5%~D
1
1K_0402_5%~D
@ PR267
4.12K_0402_1%~D
VCCSAPWROK
1
GNDA_VCCSA
A A
PJP37
2 1
0.9V 0.8V
PAD-OPEN1x1m
VCCSA_VID_1 0 1
PJP38
+VCCSA_P 1 2 +VCC_SA DELL CONFIDENTIAL/PROPRIETARY
GNDA_VCCSA
PAD-OPEN 4x4m
Compal Electronics, Inc.
Title
output voltage adjustable network
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL ISL95870A 0.8V_VCC_SA
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-6591
Date: Monday, January 10, 2011 Sheet 55 of 66
5 4 3 2 1
5 4 3 2 1
PQ39 PD17
SI4835DDY-T1-GE3_SO8~D 2
1 8 MPBATT+ PR283 1
2 7 1 8 330K_0402_5%~D 3
+VCHGR S D
3 6 2 7
S D PDS5100H-13_POWERDI5-3~D ES2AA-13-F SMA
5 3 6 1 2
0.1U_0603_25V7K~D
S D PQ41 PD16
4 5
100K_0402_5%~D
G D
1
8 1 2 1
390K_0402_5%~D
620K_0402_5%~D
4
D S
1
FDS6679AZ_G_SO8~D
PR270
PC264
PR271
PR272
7 2
0.47U_0805_25V7K~D
PQ40 MPBATT_IN_SS D S
6 3 PQ37
D S
5 4
2
D G
8 1
2
PR274 FDS6679AZ_G_SO8~D D S
7 2
33_0603_5%~D D S
+DOCK_PWR_BAR 6 3
D S
1
PD18
PC263
1 2 5 4
D G
2N7002DW-T/R7_SOT363-6~D
RB751V-40GTE-17_SOD323~D
1
2 1
10K_0402_5%~D
2
0.22U_0603_25V7K~D
3
PR273 FDS6679AZ_G_SO8~D
2
D D
PD19
1
2N7002DW-T/R7_SOT363-6~D
PQ42B
RB751V-40GTE-17_SOD323~D PR268
PC265
390K_0402_5%~D
PR276
2 5 2 1 330K_0402_5%~D
2
2
1
PR269
499K_0402_1%~D
4
1
6
PR275
0_0402_5%~D
2
PQ42A
41 CHARGE_MODULE_BATT
1
1 2 2
2
PR277 0_0402_5%~D PR278
STSTART_DCBLOCK_GC
330K_0402_5%~D
1
PQ45 1 2 PD20
FDS6679AZ_G_SO8~D 2
PQ44 PBATT+ 1 8 1
SI4835DDY-T1-GE3_SO8~D S D
2 7 3
S D PBATT_IN_SS
1 8 3 6
S D PDS5100H-13_POWERDI5-3~D
2 7 4 5
390K_0402_5%~D
+VCHGR G D
1
3 6 PQ46
620K_0402_5%~D
1
PR282
5 8 1
0.1U_0603_25V7K~D
D S
PR281
7 2
100K_0402_5%~D
D S
2
6 3 +PWR_SRC
4
D S
1
PR279
PC266
5 4
2200P_0402_50V7K~D
0.1U_0603_25V7K~D
PR284 D G
2
2
33_0603_5%~D FDS6679AZ_G_SO8~D
2
1
PR297
PC267
PC268
1 2
1
20K_0402_1%~D
3
2N7002DW-T/R7_SOT363-6~D
PD21
2
1 RB751V-40GTE-17_SOD323~D
0.22U_0603_25V7K~D
2 1
5
1
1
PQ49B
PC270
10K_0402_5%~D
390K_0402_5%~D
1
PD23
PR286
4
2
2N7002DW-T/R7_SOT363-6~D
RB751V-40GTE-17_SOD323~D
PR291
2
6
2N7002DW-T/R7_SOT363-6~D
PR280 2 1
20K_0402_1%~D
2
PQ47A
1
2N7002DW-T/R7_SOT363-6~D
C 2 C
499K_0402_1%~D
1
6
2N7002DW-T/R7_SOT363-6~D
PR292
PQ49A
6
PQ47B
2N7002DW-T/R7_SOT363-6~D
41 CHARGE_PBATT 1 2 2 5
2
3
PQ48A
2N7002DW-T/R7_SOT363-6~D
PR293 0_0402_5%~D
6
2
1
PQ48B
PR287
PQ50A
1 5 2 PR323
0_0402_5%~D
MODULE_ON 41
1
2
RB751V-40GTE-17_SOD323~D
PD30 2 1 2 DEFAULT_OVRDE 41
RB751V-40GTE-17_SOD323~D
RB751V-40GTE-17_SOD323~D
0_0402_5%~D
PR285
499K_0402_1%~D
4
1
RB751V-40GTE-17_SOD323~D
2 1 0_0402_5%~D
1
2
PR289
PD22
1
RB751V-40GTE-17_SOD323~D
RB751V-40GTE-17_SOD323~D
PD24
PD25
PD26
2
MPBATT+ @
PD31
2
PR355
1
PBATT+
PD27
CHARGE_EN 1 2 2 1
0_0402_5%~D
200K_0402_1%~D
510K_0402_5%~D
1
1
2N7002DW-T/R7_SOT363-6~D
1
RB751V-40GTE-17_SOD323~D
2N7002DW-T/R7_SOT363-6~D
PR290
PR471
0_0402_5%~D
3
41 SLICE_BAT_ON
3
PR296
PQ54B
2
2
PQ50B
5 @ PR473 100K_0402_5%~D
2N7002DW-T/R7_SOT363-6~D
5 1 2
2
6
2 4
4
PQ54A
PR472
0_0402_5%~D
1 2 2
41 DEFAULT_OVRDE PR294 0_0402_5%~D 1 2 MODULE_BATT_PRES# 41,46
1
1
499K_0402_1%~D
PBATT+
1
PR288
2
1 2 0_0402_5%~D
B +DC_IN_SS PR302 0_0402_5%~D @ PR306
B
0_0402_5%~D
1
1 2
54 +CHGR_DC_IN PR305 0_0402_5%~D
1
CHGVR_DCIN
DK_PWRBAR
+DC_IN 1 2 CD3301_DCIN
DC_IN_SS
PR307 47_0805_5%~D
1
PC271
0.1U_0603_50V4Z~D
2
+5V_ALW
P50ALW
36
35
34
33
32
31
30
29
28
1 2
PU14 PR309 0_0402_5%~D
46 SOFT_START_GC
1 2
NC
CHARGERVR_DCIN
DK_PWRBAR
GND
NC
BLK_MOSFET_GC
DSCHRG_MOSFET_GC
PBatt+
DC_IN_SS
+3.3V_ALW2
CD_PBATT_OFF 1 2 SLICE_BAT_ON 41
PR310 100K_0402_5%~D PR311 0_0402_5%~D
40 ACAV_DOCK_SRC# 1 2ACAVDK_SRC
1 2 DOCK_AC_OFF 40,41
PR312 0_0402_5%~D 1 27 PR313 0_0402_5%~D
DC_IN P50ALW
2 26
ERC1 SS_GC PBATT_OFF DK_AC_OFF
+SDC_IN 1 2 3 25 1 2
PR314 0_0402_5%~D ERC1 DK_AC_OFF_EN
4 24 1 2 3301_ACAV_IN_NB ACAV_IN_NB 41,42,54
ACAVDK_SRC ACAV_IN_NB PR316
0_0402_5%~D 1M_0402_5%~D
5 23
CD3301_SDC_IN GND GND DK_AC_OFF_EN PR315
6 22 1 2 DOCK_AC_OFF_EC 41
SDC_IN DK_AC_OFF_EN SL_BAT_PRES# PR317 0_0402_5%~D
7 21
54 DC_BLOCK_GC ACAVIN DC_BLK_GC SL_BAT_PRES# BLKNG_MOSFET_GC
8 20
P33ALW2 9 ACAV_IN BLKNG_MOSFET_GC
19
P33ALW2 NBDK_DCINSS
EN_DK_PWRBAR
22,42,54 ACAV_IN 1 2
SS_DCBLK_GC
PR318 0_0402_5%~D
DK_CSS_GC
1 2 SLICE_BAT_PRES# 40,41,46
PWR_SRC
RB751V-40GTE-17_SOD323~D
PR320 0_0402_5%~D
CSS_GC
P33ALW
RB751V-40GTE-17_SOD323~D
37
TP
1
ERC3
ERC2
1 2 1 2
GND
+3.3V_ALW2 +NBDOCK_DC_IN_SS
PR319 0_0402_5%~D PR322 0_0402_5%~D
PD29
PD28
CD3301RHHR_QFN36_6X6~D
10
11
12
13
14
15
16
17
18
A PQ51 A
2
0.1U_0603_25V7K~D
54 DK_CSS_GC +3.3V_ALW
PR324 0_0402_5%~D
1
ERC3
PC273
1 3
1
DOCK_SMB_ALERT# 40,42,46
EN_DK_PWRBAR 1 2 EN_DOCK_PWR_BAR 41
2
0.047U_0603_25V7K~D
PR325 0_0402_5%~D
DELL CONFIDENTIAL/PROPRIETARY
2
2
0.1U_0402_25V4Z~D
PR321 1 2
PC274
0,41,46 SLICE_BAT_PRES# 1 2
1
1M_0402_5%~D
0_0402_5%~D STSTART_DCBLOCK_GC
Compal Electronics, Inc.
PC275
@ PR326
1
Title
2
PC272 @ 3301_PWRSRC PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
1500P_0402_7K~D
1
PR327
2
0_0402_5%~D
+PWR_SRC TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT Selector
2
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Size Document Number Rev
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD 1.0
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. LA-6591
Date: Monday, January 10, 2011 Sheet 56 of 66
5 4 3 2 1
5 4 3 2 1
2 55 VCCSA 6/30 Intel Change VCCSA VID pull down resistor value Change PR295 and PR266 to 1k (SD02810018L) from 10k (SD02810028L) X01
C C
7 47 3V/5V 7/16 Compal PC24 down size to 0603 from 0805 Change PC24 to 4.7u/6.3V/0603 (SE107475K8L) from 4.7u/6.3V/0805 (SE093475K8L) X01
B B
Reserve Pull down resister on EN pin for Add PR611 0402 resister pad on EN pin X01
10 48 1.5V_SUS 7/16 Richtek
power consumption issue
12 56 Selector 7/18 Compal Leakage issue on PD16 Change PD16 to ES2AA (SC100005A0L) from SBR3A40SA (SC100003J00) X01
Axg_core
14 54 7/20 MAXIM Reserve 0402 cap pad for transient fine tune Add PC701 and PC702 0402 cap pad X01
Vcore
Vcore Phase node switching waveform abnormal issue Change PR118 to 1 Ohm (SD014100B8L) from 2 Ohm (SD013200B8L)
18 52,53 VAXG_core 7/24 MAXIM for Pass 2 IC X01
Change PR119 to 1 Ohm (SD014100B8L) from 2 Ohm (SD013200B8L)
21 56 Selector 9/2 Compal Change parts to HF parts Change PQ51 FDN338P_G (SB90338001L) from FDN338P (SB90338008L)
Change PD18, PD19, PD21, PD22, PD23, PD24, PD25, PD26, PD27, PD28, PD29, PD30 and PD31
RB751V-40GTE-17 (SCS00004L0L) from RB751V (SC1B751V08L) X02
Change PQ37, PQ40, PQ41, PQ45 and PQ46 FDS6679AZ_G (SB000009D1L) from FDS6679AZ (SB000009D8L)
23 47 +5V/3.3 9/2 Compal Change parts to HF parts Change PQ5 FDS8878_G (SB00000BV1L) from FDS8878 (SB00000BV8L) X02
/+15VALW
25 48 +1.5V_SUS 9/2 Compal Change parts to HF parts Change PL602 FDUE1040D-H-1R0M=P3 (SH000009U1L) from FDUE1040D-1R0M=P3 (SH000009U0L) X02
27 56 Selector 9/13 Compal Change parts to HF parts Change PQ39 and PQ44 SI4835DDY-T1-GE3 (SB00000FF1L) from SI4835DDY-T1-E3 (SB00000FF0L) X02
30 46 DCIN 9/16 Compal 6 ~ 7mA leakage current in slice Change PR2 and PR504 to 100K (SD02810038L) from 10K (SD03410028L) X02
31 50 +1.05VM 10/14 Compal 22u/1206/6.3V COS issue Change PC98 ~ PC105 to 22u/0805 (SE00000110L) from 22u/1206 (SE077226M8L) X03
Change PC123 ~ PC125, PC121, PC127, PC120, PC129 and PC130 to 22u/0805 (SE00000110L)
32 51 +1.05VTT 10/14 Compal 22u/1206/6.3V COS issue from 22u/1206 (SE077226M8L) X03
Change PC122 and PC126 to 47u/0805 (SE00000G60L) from 22u/1206 (SE077226M8L)
C C
Change adapter protection circuit Change PR802 to 95.3k (SD03495328L) from 73.2K (SD00000B18L)
36 56 Charger 11/01 Compal X03
trip point. (Adapter rated current + 0.75A) Change PR801 to 649K (SD03464938L) from 1.87M (SD00000WN0L)
H_PROCHOT# can not pull high issue with Change PR803.1 net nam to +3.3V_ALW2 from MAX8731_REF
38 56 Charger 12/21 Compal external circuit at DC mode Change PQ801.3, PR804.1 and PC801.2 net nam to PGND from GAND_CHG A00
42 56 Charger 01/07 COMPAL Adapter protection trip point for 2nd source Change PR804 to 66.5k (SD03466528L) from 68.1k (SD03468128L) A00
43 56 Charger 01/07 COMPAL Change parts for HF Change PQ801 and PQ802 to 2N7002W (SB57002040L) from RHU002N06 (SB50206008L) A00
A A
5 14 HW 6/15/2010 COMPAL Change HDA_SYNC topology Add QH7 and RH37 X01
C C
Change ODD connector to 31 pin, add @R1189,RH340 and remove C1168,
6 17,29,42 HW 6/15/2010 COMPAL Change ODD connector from 13 pin to 31 pin X01
C1169,C1170,U87,U88,U89, and connect ODD_DET# to U51.B36
7 18 HW 6/17/2010 COMPAL Remove touch screen PAID pull down circuit Remove RH241 X01
8 18 HW 6/17/2010 COMPAL Follow Intel Design Guide Rev1.0 Change RH149 to 1k and RH150 to 4.7k X01
9 22 HW 6/17/2010 COMPAL Change EMC4002 to EMC4022 Change U9 to EMC4022, remove R866,R404,C279 X01
10 26 HW 6/17/2010 COMPAL For Safety request Add no stuff D4 and co-lay with F2, change F2 to 2A_8V X01
Chagne U25, U44 to MAX4591BE and change R1169,R1171,R1174,R1176 to 0
11 28, 39 HW 6/17/2010 COMPAL Change SATA repeater to MAX4951BE X01
ohm and stuff R1174,R1176
Change Codec to ZB version and speaker Change JSPK1 to TYCO_1734595-6 and change U72 to ZB version and stuff
12 30 HW 6/17/2010 COMPAL X01
connector C962
B B
13 33 HW 6/17/2010 COMPAL Add Jumper for power consumption measurement Add PJP52,PJP55 X01
15 33 HW 6/17/2010 BRCOM Change RFID capacitors for more popular Change C502,C505 from 1uF to 0.1uF X01
Link R677 to CIS to have the correct part number and swap SD/MMCCD#
16 35 HW 6/17/2010 COMPAL Link R677 to CIS and modify JSD1 connection X01
from JSD1 pin16 to pin17, SDWP from JSD1 pin17 to pin 18
19 11,14,42 HW 6/18/2010 COMPAL EOL concern Change CC176 to SGA00005H0L, change YH1,Y6 to SJ132P7KW1L X01
A A
20 43 HW 6/18/2010 COMPAL Change connector Change JKB1 to same as JSC1 X01
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT EE P.I.R (1/7)
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Size Document Number Rev
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD 1.0
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. LA-6591P
Date: Monday, January 10, 2011 Sheet 60 of 66
5 4 3 2 1
5 4 3 2 1
22 14 HW 6/18/2010 COMPAL Add RTC PAID function Add RTC_DET# and RH355 on PCH GPIO33 X01
25 41 HW 6/18/2010 COMPAL Correct net name Modify R1132.2 from SUSACK#_R to SUSACK#_EC X01
26 32 HW 6/21/2010 INTEL Remove useless resistors Remove R556, R558, R559, R560 and short the pin1 and pin2 together X01
27 14 HW 6/22/2010 COMPAL Modify BOM Structure Correct RH45 BOM structure X01
C C
24,28,29,
28 HW 6/22/2010 COMPAL Change part for Halogen free Change Q18,Q27,Q30,Q34,Q38,Q40,Q42,Q49,Q54,Q58 to HF part X01
32,37,44
31 44 HW 6/23/2010 COMPAL Solution +1.5V_RUN voltage drop issue Change Q59 from SI3456BDV to NTGS4141NT1G X01
32 41 HW 6/23/2010 COMPAL Remove double pull high resistor Remove R1177 X01
35 10 HW 6/25/2010 COMPAL CC129~CC134 D2T LESR5M EOL Change CC129~CC134 to SGA00004X0L X01
36 24 HW 6/25/2010 COMPAL Change LVDS connector to 40 pin Change JLVDS1 to 40 pin X01
37 31 HW 6/25/2010 COMPAL Change I/O connector to TYCO Change JIO1 vendor from Lotes to TYCO X01
B B
38 24 HW 6/25/2010 COMPAL PT panel change touch screen pin definition Change JTS1 pin definition for new TS pin define X01
39 14,29, HW 7/1/2010 COMPAL Modify Module Bay circuit 1.Remove R1181,R1182,R1189. 2.Change BAY_SMBUS, DEVICE_DET# pull up X01
36,42 power rail from +3.3V_RUN to +3.3V_ALW. 3.Change net name ODD_DET# to
PCH_SATA_MOD_EN#. 4.Add Q123,Q76,R513,R514,R515 for USB_SMI# circuit.
5.De-pop C627,R712
15,18, HW 7/1/2010 COMPAL Base on GPIO map to modify 1. Move SLP_ME_CSW_DEV# from GPIO45 to GPIO28, add MCARD_PCIE_SATA# on
41
41,42 5028 GPIOE3. 2. Remove RH238. 3. Change SLICE_BAT_PRES# pull up power X01
rail from +3.3V_ALW2 to +3.3V_ALW. 4. Add R889
42 24 HW 7/1/2010 COMPAL PWM function Remove R1139,R1140 and add D68,D69 X01
A 43 11 HW 7/1/2010 COMPAL VCCSA VID circuit Change VCCSA_VID_0 to VCCSA_VID_1 and pop RC138 X01 A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT EE P.I.R (2/7)
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Size Document Number Rev
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD 1.0
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. LA-6591P
Date: Monday, January 10, 2011 Sheet 61 of 66
5 4 3 2 1
5 4 3 2 1
45 22 HW 7/2/2010 COMPAL Modify thermal diode for thermal request Remove C268,C269,use DP1/DN1 for CPU,DP3/DN3 for DIMM,DN5/DP5 for WWAM X01
46 15,32 HW 7/5/2010 COMPAL EOL concern Change Y3 and YH2 from 1Y725000CE1A to 7A25000110
X01
11,24, Change QC5 to NTR4501NT1G, U21,U24,U54,U55,U57 change to
47 HW 7/7/2010 COMPAL Change part for Halogen free part X01
27,45 NC7SZ04P5X-G, Q21 change to FDC654P-G
48 29 HW 7/7/2010 COMPAL USB30 SMI circuit Stuff R513 due to this pin is OD type on USB30 module X01
49 29 HW 7/8/2010 COMPAL Link CIS symbol Link JSATA2 CIS symbol X01
50 35 HW 7/9/2010 O2-Mirco Add discharge circuit for +3.3V_RUN_CARD Add R826 on +3.3V_RUN_CARD X01
Move C408,C409,C460,C461,C567,C568,C596,C597,C598,C599,C617,C618,
15,29,32, Move PCIE TX AC coupling capacitors close
C 51 HW 7/9/2010 COMPAL C647,C648 to page 15 to close to PCH X01 C
35,36,37 to PCH
52 14 HW 7/12/2010 COMPAL To solve SPI EA Add R933,R935 on SPI chip select signals X01
56 31,41,45 HW 7/13/2010 Dell Remove Mic mute function and LED Remove R773,R806, R1108,R1161, Q105 and delete MIC_MUTE# signal X01
59 33 HW 7/14/2010 COMPAL Change power rail for smart card Change R632,R635 pull up power rail from +3.3V_ALW to +3.3V_ALW_SC X01
60 22 HW 7/14/2010 COMPAL Reserve capacitor for WWAN thermal diode Add @C277 X01
Move SIO_EXT_SMI# from PCH GPIO1 to GPIO14, remove RH254, and change X01
61 14,17,18 HW 7/14/2010 COMPAL To solve back drive issue
RH164 pull up power rail from +3.3V_RUN to +3.3V_ALW_PCH
63 38,39 HW 7/15/2010 COMPAL Remove one TPS2560 for cost saving Remove U43,C659,C660,R740,PJP6, and share with power source of U45 X01
65 17,18 HW 7/15/2010 COMPAL Add pull up for PCH GPIO1 Add RH41 and change reference RH164 to RH41 X01
A A
66 24,30,35 HW 7/16/2010 COMPAL Change part reference for EMI request Change L92 to LE92,L93 to LE93,R678 to RE678,CE757 to CE757 X01
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT EE P.I.R (3/7)
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Size Document Number Rev
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD 1.0
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. LA-6591P
Date: Monday, January 10, 2011 Sheet 62 of 66
5 4 3 2 1
5 4 3 2 1
92 41 HW 7/23/2010 COMPAL Add 0 ohm R on TEMP_ALERT# for backup Add R1591 X01
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT EE P.I.R (4/7)
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Size Document Number Rev
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD 1.0
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. LA-6591P
Date: Monday, January 10, 2011 Sheet 63 of 66
5 4 3 2 1
5 4 3 2 1
100 14,18,30 HW 8/23/2010 DELL Remove PAID function of RTC and speaker Change speaker connector to 4 pin and remove RTC_DET# and SPEAKER_DET# X01
C C
101 17 HW 8/26/2010 Intel Follow Intel check list rev1.2 Add @RH332 X01
102 14,18 HW 8/26/2010 Intel Follow Intel request Add RH51 and RH356 X01
103 33 HW 8/27/2010 BRCOM Follow BRCOM request Change L39,L40 to rated current is 400mA X01
104 26 HW 8/27/2010 Intel Follow Intel design guide rev1.2 Remove R1164,D65, change R1128 to 20k, X01
106 16 HW 8/27/2010 COMPAL Reserve pull down R for ME_SUS_PWR_ACK Add @RH145 X01
108 11 HW 9/2/2010 COMPAL Change QC5 VGS to 20V part Change QC5 to SB00000HK0L X01
B B
109 26 HW 9/3/2010 COMPAL Follow safety request Pop F2 and de-pop R5 X01
110 24 HW 9/8/2010 COMPAL Change RB751V to HF part Change D63,D64,D68,D69 to SCS00004L0L X01
111 30,31 HW 9/9/2010 IDT To solve pop noise and detect issue Add U6,Q33,Q46,D70,D71,R425,R33,R38,R424,R161,R352,R1088,C967,C307,C308 X01
113 30,38,39 HW 9/14/2010 COMPAL For EMI request Change C973~C976 to 680pF and pop, add L91~L94, D72~D74, remove U90~U92 X01
114 35 HW 9/14/2010 O2 Modify circuit Remove R661,R662, add L46,L47, change L45 to SM01000GG0L X01
A 116 24 HW 10/11/2010 DELL Solve PWM leakage issue Change R1137 to 10k X02 A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT EE P.I.R (5/7)
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Size Document Number Rev
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD 1.0
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. LA-6591P
Date: Monday, January 10, 2011 Sheet 64 of 66
5 4 3 2 1
5 4 3 2 1
X02
126 31 HW 10/18/2010 IDT Change GND reference Change Mic detect circuit DGND to AGND
X02
127 37,38,39 HW 10/18/2010 COMPAL Link CIS Link CIS for L49,L51,L52,L90
X02
128 30 HW 10/18/2010 COMPAL Change Mic detect to external detect Remove R161 and add C1164
X02
129 14,18 HW 10/19/2010 COMPAL Follow Intel debug port DG Connect PCH_GPIO15 to PCH XDP
X02
130 42 HW 10/19/2010 COMPAL Change borad ID to X02 Change R875 to 62k
1. Add PJP65, 2. Change C307,C308 to 0402 size 3. Change C308
X02
131 30,31 HW 10/21/2010 COMPAL Modify Mic detect circuit connection, 4. Change Mic detect power from +5V_ALW to +5V_RUN,
5. De-pop Q33,Q46,R424, 6. Move C1180 to +VREFOUT_R
Change RH177 to 10k X02
132 18 HW 10/21/2010 COMPAL Follow check list
B B
137 37 HW 11/16/2010 COMPAL To fix soldering issue Change express card connector JEXP1 to TAISOL 5-421005002000-9 X02
138 28 HW 11/17/2010 Intel Follow CRB design Change R501,R502 to 10k X02
139 12,13 HW 11/18/2010 COMPAL Follow part reference design rule Change JDIMMA1 & JDIMMB1 to JDIMM1 & JDIMM2 X02
X02
140 28,44 HW 11/19/2010 COMPAL For cost saving De-pop R499,R500,C393,Q28,R905,R907,C762,Q51
A A
X02
141 31 HW 11/22/2010 COMPAL Follow part reference design rule Change JMEDIA1 to JMDIA1
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT EE P.I.R (6/7)
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Size Document Number Rev
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD 1.0
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. LA-6591P
Date: Monday, January 10, 2011 Sheet 65 of 66
5 4 3 2 1
5 4 3 2 1
143 42 HW 12/17/2010 COMPAL Follow INTEL DG1.5 RSMRST# timing cicuit Just add RSMRST# circuit for backup. but de-pop A00
144 34 HW 12/17/2011 COMPAL Follow NXP design guide Add @C575 A00
148 33,34 HW 12/24/2011 COMPAL Change USH chip to CID7 Change U33 to SA00003AO1L A00
149 34 HW 1/6/2011 COMPAL update TPM/TCM pop option table Correct pop option table A00
C C
B B
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT EE P.I.R (7/7)
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Size Document Number Rev
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD 1.0
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. LA-6591P
Date: Monday, January 10, 2011 Sheet 66 of 66
5 4 3 2 1
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