SERCOS III

Contents

Advantages
Topology
Communication cycle
Telegram structure
Initialization
Synchronization
Cross Communication
Start-up and Diagnostics
Hardware Strategy
Performance

S III public-01v22; Bosch Rexroth; Rigobert Kynast Nr. 2

Advantages
 Advantages (1)

Well proven SERCOS-Mechanism in combination with worldwide known

physical layer (Ethernet)
Compatible with SERCOS II
Easy migration of existing software drivers
Identical data exchange mechanism and service channel
Physical layer
CAT5e cable or fiber optic cable (100 Mbit/s)
Reduction of costs
CAT5e cable
SERCOS III-controller with sufficient CPU horsepower to realize
smart I/O devices, single-chip drives and gateways
Low cost (PC-) controls with standard Ethernet controller and RTOS
Hardware based Synchronization with Ring and Line Topology

S III public-01v22; Bosch Rexroth; Rigobert Kynast Nr. 4

 Advantages (2)

Real-time and non real-time communication is kept in SERCOS III protocol

RT channel: command and actual values
IP channel: Integration of existing Ethernet units (via gateway),
routing capability for proprietary protocols
Reduction of cycle time down to 31.25 s
Capability to support centralized drive concepts
Integration of I/O functionality
Cross communication of devices
Takes place in the RT channel, all telegrams are transparent for each device
Safe communication for drive-integrated safety functions
Transmission of safe and unsafe data via the same mechanism
Hot plugging of devices during operation
Hardware redundancy with ring topology

S III public-01v22; Bosch Rexroth; Rigobert Kynast Nr. 5

Topology

Ring and Line

 Topology
Ring and Line

P1 = Port1
P2 = Port2
Ports are interchangeable (see slave 3)
master ring
P1 P2

P1 P2 P1 P2 P2 P1 P1 P2

slave 1 slave 2 slave 3 slave N

Switches or hubs are not necessary

CAT5e (S/UTP)
Patch cable or crossover cable
master line
Ethernet PHY with crossover function P1 P2

P1 P2 P1 P2 P2 P1 P1 P2

slave 1 slave 2 slave 3 slave N

S III public-01v22; Bosch Rexroth; Rigobert Kynast Nr. 7

 Signal flow with line
(single ring)

xmt

master rcv

P1
master
P1 = Port1
P2 = Port2
processing

processing

slave 1,2
P1 P2 P1 P2 P2 P1

slave 1 slave 2 slave 3

processing
Port1 and Port2 are interchangeable (see slave 3)

slave 3
S III public-01v22; Bosch Rexroth; Rigobert Kynast Nr. 8
 Signal flow with ring
(double ring)

xmt rcv

master rcv xmt

P1 = Port1
primary channel
P1 P2 P2 = Port2
master
secondary channel

processing

processing
P1 P2 P1 P2 P2 P1
slave
slave 1 slave 2 slave 3
Port1 and Port2 are interchangeable (see slave 3)

S III public-01v22; Bosch Rexroth; Rigobert Kynast Nr. 9

 Signal flow during
interrupted ring

primary channel Interruption may be either

secondary channel master accidental or intentional

P1 = Port1
P1 P2 P2 = Port2

primary line secondary line

P1 P2 P1 P2 P2 P1

slave 1 slave 2 slave 3

Port1 and Port2 are interchangeable (see slave 3)

S III public-01v22; Bosch Rexroth; Rigobert Kynast Nr. 10

Communication Cycle
Timing in CP3/4
 Communication cycle CP3/4

MDT0 MDT1 MDT2 MDT3 AT0 AT1 AT2 AT3 IP telegrams MDT0
H M H M H M H M H M H M H M H M H M
D S D S D S D S D S D S D S D S D S
R T R T R T R T R T R T R T R T R T

RT channel IP channel
method 1
communication cycle

MDT0 MDT1 MDT2 MDT3 IP telegrams AT0 AT1 AT2 AT3 MDT0
H M H M H M H M H M H M H M H M H M
D S D S D S D S D S D S D S D S D S
R T R T R T R T R T R T R T R T R T

RT channel IP channel RT channel

method 2
communication cycle

S III public-01v22; Bosch Rexroth; Rigobert Kynast Nr. 12

 Communication cycle CP3/4
Timing

MDT0...3 AT0...3 IP channel MDT0...3

H M H M H M
D S D S D S
R T R T R T

t1
t6 (begin of IP)
method 1
t7 (end of IP)
tscyc

MDT0...3 IP channel AT0...3 MDT0...3

H M H M H M
D S D S D S
R T R T R T

t6

t7 method 2
t1
tscyc

S III public-01v22; Bosch Rexroth; Rigobert Kynast Nr. 13

Telegram Structure
CP3 / CP4
 General telegram structure
Ethernet_II-Frame

SERCOS III Ethernet type

media layer
MAC layer

Data field will be padded

destination source S III

IDLE SSD preamble SFD 0x88CD data field FCS ESD
address address header

11+1 Byte 7+1 Byte 6 Byte 6 Byte 2 Byte 6 Byte 40-1494 Byte 4 Byte 1 Byte

S III data length

checked via FCS

telegram length: 72 - 1526 Byte (overhead: 26+6 = 32 Byte)

telegram time: 5.8s 122.1s

telegram length: 84 - 1538 Byte (overhead: 38+6 = 44 Byte)

telegram time: 6.8s 123.1s

S III public-01v22; Bosch Rexroth; Rigobert Kynast Nr. 15

 MDT structure CP0 to CP4

MDT data are protected via FCS by the master.

The MDT is repeated only, not changed by the slave
Every slave receives the same telegram and take its data.
MST field has to be valid in MDT0...3.
MST field in MDT0 only is used for synchronization purposes.

destination source MDT MDT

IDLE SSD preamble SFD type FCS ESD
address address MST data field
11+1Byte 7+1 Byte 6 Byte 6 Byte 2 Byte 4 Byte 1 Byte

SERCOS type
phase CRC
(MDT)
1 Byte 1 Byte 4Byte
checked via CRC

S III public-01v22; Bosch Rexroth; Rigobert Kynast Nr. 16

 AT structure CP0 to CP4

Master transmits an AT with 0 in the AT data field.

MST-part is valid in AT0...3 also.
The Slaves ignore the received data (except on cross communication)
The Slaves insert the data in the AT data field
Every slave checks the Rx-FCS and determines the Tx-FCS

destination source AT AT
IDLE SSD preamble SFD type FCS ESD
address address MST data field

SERCOS type
phase CRC
(AT)
1 Byte 1 Byte 4 Byte

S III public-01v22; Bosch Rexroth; Rigobert Kynast Nr. 17

 Partitioning
MDT and AT

MDT
H M H F
SVC SVC . . . SVC . . . SVC RTD RTD . . . RTD . . . RTD
D S O C
1 2 n N 1 2 k K
R T T S

SVC = Service channel

MDT-Pointer of SVC RTD = Real-time data
MDT-Pointer of RTD HOT = Hot plug field
MST = S III header, SYNC
HDR = Ethernet header
FCS = Frame check sequence
AT
HM H F
SVC SVC . . . SVC . . . SVC RTD RTD . . . RTD . . . RTD
D S O C
1 2 n N 1 2 m M
R T T S

AT-Pointer of SVC
AT-Pointer of RTD

S III public-01v22; Bosch Rexroth; Rigobert Kynast Nr. 18

Initialization
 Device configuration

Master expects 3 devices with addresses #1, #10 and #254

Master Master Master

device wrong device same device

1. 1. addr. #1 1. OK
addr. #5 address address addr. #10

device device same device

2. OK 2. addr. #1 2. OK
addr. #1 address addr. #1

device device device

3. addr. #254 OK 3. addr. #254 OK 3. addr. #254 OK

device additional
physical order 4. addr. #11
address

S III public-01v22; Bosch Rexroth; Rigobert Kynast Nr. 20

Synchronization
 Synchronization
Communication cycle

MDT0 AT0 IP telegrams MDT0

H M H M H M
D S D S D S
R T R T R T

RT channel IP channel
communication cycle

synchronization signal
(once per cycle)

Synchronization is generated by the MST field of MDT0 only.

S III public-01v22; Bosch Rexroth; Rigobert Kynast Nr. 22

 Synchronization
Definitions

Master determines the Synchronization Accuracy

SERCOS cycle

AT transmission time
Start in Master
stable synchronization signal IP channel
? IEEE1588 Synchronization time
propagation delay?

2,24 s (28 Byte, constant duration)

destination source MDT

IDLE SSD preamble SFD type MST FCS ESD
address address data field

12 Byte 7+1 Byte 6 Byte 6 Byte 2 Byte 4 Byte

SERCOS type
phase CRC
(MDT0)
1 Byte 1 Byte 4Byte

S III public-01v22; Bosch Rexroth; Rigobert Kynast Nr. 23

Cross Communication
 Cross Communication
between drives and I/O

Master

MS

Drive with
integrated PLC
I/O

CC CC
CC = cross communication between slaves (AT only)
MS = master - slave communication (MDT & AT)

S III public-01v22; Bosch Rexroth; Rigobert Kynast Nr. 25

 Cross Communication
between control units

Hierarchical Architecture
MS

MS CC
Master 1 Slave Slave
Master 2 Master Master

CC = cross communication between slaves (AT only)

CC
MS = master - slave communication (MDT & AT)

S III public-01v22; Bosch Rexroth; Rigobert Kynast Nr. 26

Startup and diagnostics
via IP Channel
 Startup and diagnosis via IP
Real-time mode with Ring

Ring structure:
Double ring closed
Coupling via MC/PLC

MC/PLC

I/O
M M M M M

S III public-01v22; Bosch Rexroth; Rigobert Kynast Nr. 28

 Startup and diagnosis via IP
Real-time mode with Line

Line structure:
Single ring
S III Master or device with
bridge function

MC/PLC

I/O
M M M M M

S III public-01v22; Bosch Rexroth; Rigobert Kynast Nr. 29

 Download / Upload via IP
Non-real-time mode with Line

Line structure:

without S III Master

I/O
M M M M M

S III public-01v22; Bosch Rexroth; Rigobert Kynast Nr. 30

Hardware Strategy
 Hardware Strategy

FPGA-solution with option of Gate-Array-Realization

Used in medium quantity applications. The realization of a fixed
programmed gate array is very simple and cost effective.
FPGA for master
FPGA for slave
Core, Netlist or IP-Source of FPGA are available from IGS

Integration of SERCOS III controller in a standard

communication controller
This option is very cost effective and allows the realization of
Single-chip-devices
Examples are:
netX from Hilscher (Master & Slave)
Xscale from Intel (Master)

S III public-01v22; Bosch Rexroth; Rigobert Kynast Nr. 32

 Hardware Support

Development and Support

First development by BRC

FPGA Transfer to a Technology Partner
-Master Product Sourcing (IP) and Support
-Slave via Partner. (Member of IGS)

SERCOS III Development of Hardware driver for

Specification Master and
Slave

GPCC Development per SERCOS III Spec.

-Master Product Sourcing and support via Partner:
-Slave Chips
Starter kits

S III public-01v22; Bosch Rexroth; Rigobert Kynast Nr. 33

 Hardware costs

Planning for SERCOS III

1 2
PHY SERCOS III
FPGA controller
PHY

Interface costs: Interface costs:

Material costs of Material costs of
main parts: main parts:
ca. 16 / 50k ca. 12 / 50k

no CPU power ARM 9

S III public-01v22; Bosch Rexroth; Rigobert Kynast Nr. 34

 Communication layer

Application
SERCOS
FTP, HTTP, ...
Application profile
Software
TCP, UDP, ...
SERCOS Driver
Master / Slave IP

SERCOS
Real-time
FPGA

Ethernet MAC
Hardware
netX
PHY (100Base-Tx /Fx)

S III public-01v22; Bosch Rexroth; Rigobert Kynast Nr. 35

Performance
 Performance
No. of devices, data, cycle

Cyclic Cycle No. of No. of MDT / AT

data time devices (1) devices (2)
8 Byte 31.25 us 8 1/1
12 Byte 62.5 us 16 1/1
16 Byte 125 us 30 1/1
12 Byte 250 us 67 33 1/1
32 Byte 250 us 35 18 1/1
12 Byte 500 us 130 100 2/2
50 Byte 1 ms 100 85 4/4
32 Byte 1 ms 140 120 4/4
12 Byte 1 ms 254 220 4/4

1) without IP channel
2) with IP channel (125 s)

S III public-01v22; Bosch Rexroth; Rigobert Kynast Nr. 37