Sie sind auf Seite 1von 2

# Reg. No.

## MANIPAL INSTITUTE OF TECHNOLOGY

Manipal University

## FIRST SEMESTER B. TECH. DEGREE END-SEMESTER EXAMINATION

DECEMBER 2013
SUBJECT: BASIC ELECTRONICS (ECE-101)

## TIME: 3 HOURS MAX. MARKS: 50

Instructions to candidates
Missing data may be suitably assumed

1A. Explain the working of a bridge rectifier with and without filter, showing neat
diagrams. Suppose, a bridge rectifier feeds a DC current of 10 A to a resistive load
from a sinusoidal alternating supply of 30 V (rms), determine the resistance of the
load and the efficiency of the rectifier.
1B. Draw the block diagram of AM super-heterodyne receiver and explain its each
block showing the waveforms at each stage. (5+5)

2A. Design a high-pass filter having a cut-off frequency of 1 kHz and pass-band gain of
2, given that C = 0.01F and RF =10 k. Draw the circuit & frequency response of
the filter.
2B. Explain the working of astable multivibrator using IC 555 with neat circuit diagram
and waveforms. Give the expression for the frequency of its output.
2C. Write the truth table of a binary half adder. Draw its logic circuit using only basic
gates. (4+4+2)

## 3A. Explain the working of positive edge-triggered 3-bit asynchronous down-counter

using JK flip-flops, with timing diagrams.
3B. With a neat circuit diagram & waveforms, explain the operation of triangular
waveform generator using OP-AMP.
3C. What is a clipper circuit? Explain using the circuit diagram and waveform of a
clipper that clips part of the positive half-cycle. What is its application? (4+3+3)

ECE-101 Page 1 of 2
4A. Draw a suitable OP-AMP circuit that implements the following expression:
dVin
VOut 5Vin 3
dt
4B. Define amplitude modulation (AM). Derive the equation of AM wave, also draw its
spectrum, and explain. (5+5)

5A. For the transistor circuit shown in Fig. Q5A, if = 0.98, VBE = 0.7V and IE = 2 mA,
find the value of R1 neglecting ICEO.
5B. Perform (18)10 (85)10 using 2s complement binary addition. Convert the answer
back to decimal.
5C. Design a Zener regulator for the following specifications: Output voltage 5V, Input
voltage 12 3 V, IL = 20 mA, PZMax = 500 mW, IZmin = 5 mA. (4+3+3)

6A. Simplify the Boolean expression f (x, y, z) = m (0, 1, 2, 4, 6) using K-map, and
implement the simplified expression using only NAND gates.
6B. With a neat diagram explain the shifting of data 1011 in Serial-in Serial-out 4-bit
shift register. Also mention how many clock cycles are required to shift the MSB of
above mentioned data to the output.
6C. State and explain the Barkhausen criterion for sustained oscillations. (4+3+3)

Fig. Q5A

ECE-101 Page 2 of 2