Compal La-6901p r2.0 Schematics

A B C D E
Compal Confidential
Model Name : JE50-HR/SJV50-HR
Compal Project Name : P5WE0/P5WS0
1 1
File Name : LA-6901P
Compal Confidential
2 2
JE50-HR/SJV50-HR(P5WE0/P5WS0) M/B Schematics Document

Intel Sandy Bridge Processor with DDRIII + Cougar Point PCH
Nvidia N12P GS/GV
3 2011-02-08 3
REV:2.0
4 4
Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2011/02/08 Deciphered Date 2012/02/08 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Cover Page
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
JE50-HR/SJV50-HR M/B SchematicsE
Date: Wednesday, June 08, 2011 Sheet 1 of 61
A B C D E
A B C D E
Fan Control
page 42
1 1
100MHz PCI-E 2.0x16 5GT/s PER LANE

PEG(DIS) Intel Memory BUS(DDRIII)
Nvidia 133MHz Dual Channel 204pin DDRIII-SO-DIMM X2
N12P GS/GV Sandy Bridge BANK 0, 1, 2, 3 page 11,12
1.5V DDRIII 1066/1333
Processor
page22~30
rPGA989
page 4~10
HDMI(DIS) CRT(DIS) LVDS(DIS) FDI x8 DMI x4 USB 2.0 conn x2 Bluetooth CMOS Camera 3G connector
Conn USB port 9,12 on 3G/B
USB port 0,1 on USB port 13 USB port 10
HDMI Conn. CRT Conn. LVDS Conn. 100MHz 100MHz USB/B page 38 page 38 page 31 page 37
page 33 page 32 page 31 2.7GT/s 1GB/s x4
2 USBx14 3.3V 48MHz 2
LVDS(UMA/OPTIMUS)
Intel
CRT(UMA/OPTIMUS) HD Audio 3.3V 24MHz
TMDS(UMA/OPTIMUS) Cougar Point-M

PCH
PCI-Express x 8 (ARD PCIE2.0 2.5GT/s) 100MHz HDA Codec
SATA x 6 (GEN1 1.5GT/S ,GEN2 3GT/S) 100MHz 989pin BGA ALC271X/277X
port 5 port 2,3 port 1 page 41
page 13~21 SPI
USB 3.0 conn x1 MINI Card x2 LAN(GbE) &
NEC uPD720200AF1 WLAN, WWAN Card Reader
BCM57785
with USB3.0 Conn. USB port 12,13
page 37 page 35,36 SPI ROM x1 Int. Speaker Phone Jack x 2
page 45
port 0 port 1 page 13
page 41 page 41
SATA HDD SATA CDROM
3
Card Reader RJ45 Conn. page Conn. page 34 LPC BUS 3
34
Conn. page 35,36 page 36
33MHz
Sub-board ENE KB930

page 39
LS-6901P
USB 2.0/B 2Port
RTC CKT. USB Port0,1
page 38
page 13 LF-6901P Touch Pad Int.KBD
FPC for USB3.0 page 40 page 40
LS-6904P page 38
Power On/Off CKT. USB 3.0 /B
1 port as USB3.0
page 40
1 port as USB2.0
page 38
BIOS ROM
page 40
DC/DC Interface CKT. LS-6903P
4
page 43,44 4
3G/B
page 37
Power Circuit DC/DC

page 46~59 LS-6902P + LS-6905P Security Classification Compal Secret Data Compal Electronics, Inc.
PWR/B Issued Date 2011/02/08 Deciphered Date 2012/02/08 Title
Block Diagrams
page 40 AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
JE50-HR/SJV50-HR M/B Schematics E
A B C D E
A B C D E
Voltage Rails
SIGNAL
STATE SLP_S1# SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock
Power Plane Description S1 S3 S5
VIN Adapter power supply (19V) N/A N/A N/A Full ON HIGH HIGH HIGH HIGH ON ON ON ON
BATT+ Battery power supply (12.6V) N/A N/A N/A
S1(Power On Suspend) LOW HIGH HIGH HIGH ON ON ON LOW
B+ AC or battery power rail for power circuit. N/A N/A N/A
1 1
+CPU_CORE Core voltage for CPU ON OFF OFF S3 (Suspend to RAM) LOW LOW HIGH HIGH ON ON OFF OFF
+VGA_CORE Core voltage for GPU ON OFF OFF
S4 (Suspend to Disk) LOW LOW LOW HIGH ON OFF OFF OFF
+VGFX_CORE Core voltage for UMA graphic ON OFF OFF
+0.75VS +0.75VP to +0.75VS switched power rail for DDR terminator ON OFF OFF S5 (Soft OFF) LOW LOW LOW LOW ON OFF OFF OFF
+1.05VSDGPU +1.0VSPDGPU to +1.0VSDGPU switched power rail for GPU ON OFF OFF
+1.05VS_VTT +1.05VS_VCCPP to +1.05VS_VCCP switched power rail for CPU ON OFF OFF
+1.05VS_PCH +1.05VS_VCCP to +1.05VS_PCH power for PCH ON OFF OFF Board ID / SKU ID Table for AD channel
+1.5V +1.5VP to +1.5V power rail for DDRIII ON ON OFF Vcc 3.3V +/- 5%
+1.5VS +1.5V to +1.5VS switched power rail ON OFF OFF Ra/Rc/Re 100K +/- 5%
+1.5VSDGPU +1.5VS to +1.5VSDGPU switched power rail for GPU ON OFF OFF Board ID Rb / Rd / Rf V AD_BID min V AD_BID typ V AD_BID max
+1.8VS (+5VALW or +3VALW) to 1.8V switched power rail to PCH & GPU ON OFF OFF 0 0 0 V 0 V 0 V EVT
+1.8VSDGPU +1.8VS to +1.8VSDGPU switched power rail for GPU ON OFF OFF 1 8.2K +/- 5% 0.216 V 0.250 V 0.289 V EVT2
+3VALW +3VALW always on power rail ON ON ON* 2 18K +/- 5% 0.436 V 0.503 V 0.538 V DVT
+3VALW_EC +3VALW always to KBC ON ON ON* 3 33K +/- 5% 0.712 V 0.819 V 0.875 V PVT
+3V_LAN +3VALW to +3V_LAN power rail for LAN ON ON ON* 4 56K +/- 5% 1.036 V 1.185 V 1.264 V Pre-MP
+3VALW_PCH +3VALW to +3VALW_PCH power rail for PCH (Short Jumper) ON ON ON* 5 100K +/- 5% 1.453 V 1.650 V 1.759 V
2 2
+3VS +3VALW to +3VS power rail ON OFF OFF 6 200K +/- 5% 1.935 V 2.200 V 2.341 V
+5VALW +5VALWP to +5VALW power rail ON ON ON* 7 NC 2.500 V 3.300 V 3.300 V
+5VALW_PCH +5VALW to +5VALW_PCH power rail for PCH (Short resister) ON ON ON*
+5VS +5VALW to +5VS switched power rail ON OFF OFF
BOARD ID Table BTO Option Table
+VSB +VSBP to +VSB always on power rail for sequence control ON ON ON*
+RTCVCC RTC power ON ON ON
BTO Item BOM Structure
Board ID PCB Revision
UMA Only UMAO@
0 0.1
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
UMA with OPTIMUS UMA@
1 0.2
Dis with OPTIMUS DIS@
EC SM Bus1 address EC SM Bus2 address 2 0.3
DIS Only DISO@
3 0.4
Device Address Device Address
OPTIMUS OPT@
4 1.0
Smart Battery 0001 011X b
Non-OPTIMUS NOPT@
5
3G 3G@
6
Blue Tooth BT@
7
USB2.0 USB20@
PCH SM Bus address USB3.0 USB30@
3
Device Address
VRAM X76@ 3
USB Port Table Connector CONN@

Clock Generator (9LVS3199AKLFT, 1101 0010b Unpop @
RTM890N-631-VB-GRT) 3 External
USB 2.0 USB 1.1 Port LAN Chip A0 version A0@
DDR DIMM0 1001 000Xb USB Port
DDR DIMM2 1001 010Xb
LAN Chip B0 version B0@
0 USB/B (Right Side)
UHCI0 N12P-GS GS@
1 USB/B (Right Side)
3G & BT & USB30 & USB20 Config N12P-GV GV@
2 USB3.0 colay USB2.0 Conn.
3G SKU: 3G@ USB30 SKU: USB30@ OPTMIUS SKU: OPT@ UHCI1
3 USB/B Colay USB3.0
BT SKU: BT@ USB20 SKU: USB20@ Non-OPTMIUS SKU: NOPT@ EHCI1
4
LAN Chip A0 version: A0@ N12P-GS: GS@ UHCI2
5
LAN chip B0 Version: B0@ N12P-GV: GV@
6
BOM Config UHCI3
7
UMA Only: BT@/3G@/USB30@/UMA@/UMAO@/NOPT@/A0@
8 Mini Card 1(WLAN)
OPTIMUS(N12P-GS): BT@/3G@/USB30@/UMA@/DIS@/X76@/OPT@/A0@/GS@ UHCI4
9 3G/B(WWAN)
DIS Only(N12P-GS): BT@/3G@/USB30@/DISO@/DIS@/X76@/NOPT@/A0@/GS@
10 Camera
OPTIMUS(N12P-GV): BT@/3G@/USB30@/UMA@/DIS@/X76@/OPT@/A0@/GV@ EHCI2 UHCI5
11 Mini Card 2(Reserved)
4 DIS Only(N12P-GV): BT@/3G@/USB30@/DISO@/DIS@/X76@/NOPT@/A0@/GV@ 4
12 3G/B(SIM Card)
VRAM P/N : UHCI6
64*16 13 BlueTooth
Samsung : SA000035700
Hynix : SA000032400/SA0000324C0
128*16 Security Classification Compal Secret Data Compal Electronics, Inc.
Samsung : SA00003MQ40 Issued Date 2011/02/08 Deciphered Date 2012/02/08 Title
Hynix : SA00003VS00
Notes List
Custom
A B C D E
5 4 3 2 1
+1.05VS_VTT
PEG_ICOMPI and PEG_RCOMPO signals should be
ZZZ shorted and routed,
1
DA60000KC10
R517
max length = 500 mils,trace width=4mils
24.9_0402_1% PEG_ICOMPO signals should be routed with - max
JCPU1A
length = 500 mils,trace width=12mils
2
D
PEG_ICOMPI J22 PEG_COMP spacing =15mils D
PEG_ICOMPO J21
15 DMI_CRX_PTX_N0 B27 DMI_RX#[0] PEG_RCOMPO H22
15 DMI_CRX_PTX_N1 B25 DMI_RX#[1]
15 DMI_CRX_PTX_N2 A25 DMI_RX#[2]
15 DMI_CRX_PTX_N3 B24 K33 PEG_GTX_C_HRX_N15 C46 1 2 DIS@ 0.22U_0402_10V6K PEG_GTX_HRX_N15
DMI_RX#[3] PEG_RX#[0] PEG_GTX_C_HRX_N14 C49 DIS@ 0.22U_0402_10V6K PEG_GTX_HRX_N14
PEG_RX#[1] M35 1 2
15 DMI_CRX_PTX_P0 B28 L34 PEG_GTX_C_HRX_N13 C51 1 2 DIS@ 0.22U_0402_10V6K PEG_GTX_HRX_N13
DMI_RX[0] PEG_RX#[2] PEG_GTX_C_HRX_N12 C53 DIS@ 0.22U_0402_10V6K PEG_GTX_HRX_N12
15 DMI_CRX_PTX_P1 B26 DMI_RX[1] PEG_RX#[3] J35 1 2
DMI
15 DMI_CRX_PTX_P2 A24 J32 PEG_GTX_C_HRX_N11 C60 1 2 DIS@ 0.22U_0402_10V6K PEG_GTX_HRX_N11
DMI_RX[2] PEG_RX#[4] PEG_GTX_HRX_N[0..15] 22
15 DMI_CRX_PTX_P3 B23 H34 PEG_GTX_C_HRX_N10 C71 1 2 DIS@ 0.22U_0402_10V6K PEG_GTX_HRX_N10
DMI_RX[3] PEG_RX#[5] PEG_GTX_HRX_P[0..15] 22
H31 PEG_GTX_C_HRX_N9 C75 1 2 DIS@ 0.22U_0402_10V6K PEG_GTX_HRX_N9
PEG_RX#[6] PEG_GTX_C_HRX_N8 C82 DIS@ 0.22U_0402_10V6K PEG_GTX_HRX_N8
15 DMI_CTX_PRX_N0 G21 DMI_TX#[0] PEG_RX#[7] G33 1 2 PEG_HTX_C_GRX_N[0..15] 22
E22 G30 PEG_GTX_C_HRX_N7 C92 1 2 DIS@ 0.22U_0402_10V6K PEG_GTX_HRX_N7
15 DMI_CTX_PRX_N1 DMI_TX#[1] PEG_RX#[8] PEG_HTX_C_GRX_P[0..15] 22
F21 F35 PEG_GTX_C_HRX_N6 C93 1 2 DIS@ 0.22U_0402_10V6K PEG_GTX_HRX_N6
15 DMI_CTX_PRX_N2 DMI_TX#[2] PEG_RX#[9]
D21 E34 PEG_GTX_C_HRX_N5 C102 1 2 DIS@ 0.22U_0402_10V6K PEG_GTX_HRX_N5
15 DMI_CTX_PRX_N3 DMI_TX#[3] PEG_RX#[10]
E32 PEG_GTX_C_HRX_N4 C111 1 2 DIS@ 0.22U_0402_10V6K PEG_GTX_HRX_N4
PEG_RX#[11] PEG_GTX_C_HRX_N3 C113 DIS@ 0.22U_0402_10V6K PEG_GTX_HRX_N3
15 DMI_CTX_PRX_P0 G22 DMI_TX[0] PEG_RX#[12] D33 1 2
D22 D31 PEG_GTX_C_HRX_N2 C125 1 2 DIS@ 0.22U_0402_10V6K PEG_GTX_HRX_N2
15 DMI_CTX_PRX_P1 DMI_TX[1] PEG_RX#[13]
PCI EXPRESS* - GRAPHICS

F20 B33 PEG_GTX_C_HRX_N1 C129 1 2 DIS@ 0.22U_0402_10V6K PEG_GTX_HRX_N1
C21 C32 PEG_GTX_C_HRX_N0 C144 1 2 DIS@ 0.22U_0402_10V6K PEG_GTX_HRX_N0
J33 PEG_GTX_C_HRX_P15 C47 1 2 DIS@ 0.22U_0402_10V6K PEG_GTX_HRX_P15
PEG_RX[0] PEG_GTX_C_HRX_P14 C50 DIS@ 0.22U_0402_10V6K PEG_GTX_HRX_P14
PEG_RX[1] L35 1 2
K34 PEG_GTX_C_HRX_P13 C52 1 2 DIS@ 0.22U_0402_10V6K PEG_GTX_HRX_P13
15 FDI_CTX_PRX_N0 A21 FDI0_TX#[0] PEG_RX[3] H35 1 2
H19 H32 PEG_GTX_C_HRX_P11 C66 1 2 DIS@ 0.22U_0402_10V6K PEG_GTX_HRX_P11
15 FDI_CTX_PRX_N1 FDI0_TX#[1] PEG_RX[4]
E19 G34 PEG_GTX_C_HRX_P10 C68 1 2 DIS@ 0.22U_0402_10V6K PEG_GTX_HRX_P10
15 FDI_CTX_PRX_N2 FDI0_TX#[2] PEG_RX[5] PEG_GTX_C_HRX_P9 C81 DIS@ 0.22U_0402_10V6K PEG_GTX_HRX_P9
Intel(R) FDI
15 FDI_CTX_PRX_N3 F18 FDI0_TX#[3] PEG_RX[6] G31 1 2
C B21 F33 PEG_GTX_C_HRX_P8 C86 1 2 DIS@ 0.22U_0402_10V6K PEG_GTX_HRX_P8 C
C20 F30 PEG_GTX_C_HRX_P7 C89 1 2 DIS@ 0.22U_0402_10V6K PEG_GTX_HRX_P7
D18 E35 PEG_GTX_C_HRX_P6 C100 1 2 DIS@ 0.22U_0402_10V6K PEG_GTX_HRX_P6
E17 E33 PEG_GTX_C_HRX_P5 C105 1 2 DIS@ 0.22U_0402_10V6K PEG_GTX_HRX_P5
F32 PEG_GTX_C_HRX_P4 C106 1 2 DIS@ 0.22U_0402_10V6K PEG_GTX_HRX_P4
PEG_RX[12] D34 1 2
A22 E31 PEG_GTX_C_HRX_P2 C119 1 2 DIS@ 0.22U_0402_10V6K PEG_GTX_HRX_P2
15 FDI_CTX_PRX_P0 FDI0_TX[0] PEG_RX[13]
G19 C33 PEG_GTX_C_HRX_P1 C135 1 2 DIS@ 0.22U_0402_10V6K PEG_GTX_HRX_P1
E20 B32 PEG_GTX_C_HRX_P0 C138 1 2 DIS@ 0.22U_0402_10V6K PEG_GTX_HRX_P0
15 FDI_CTX_PRX_P3 G18 FDI0_TX[3]
B20 M29 PEG_HTX_GRX_N15 C516 1 2 DIS@ 0.22U_0402_10V6K PEG_HTX_C_GRX_N15
15 FDI_CTX_PRX_P4 FDI1_TX[0] PEG_TX#[0]
C19 M32 PEG_HTX_GRX_N14 C520 1 2 DIS@ 0.22U_0402_10V6K PEG_HTX_C_GRX_N14
D19 M31 PEG_HTX_GRX_N13 C529 1 2 DIS@ 0.22U_0402_10V6K PEG_HTX_C_GRX_N13
F17 L32 PEG_HTX_GRX_N12 C534 1 2 DIS@ 0.22U_0402_10V6K PEG_HTX_C_GRX_N12
L29 PEG_HTX_GRX_N11 C538 1 2 DIS@ 0.22U_0402_10V6K PEG_HTX_C_GRX_N11
+1.05VS_VTT PEG_TX#[4] PEG_HTX_GRX_N10 C540 DIS@ 0.22U_0402_10V6K PEG_HTX_C_GRX_N10
15 FDI_FSYNC0 J18 FDI0_FSYNC PEG_TX#[5] K31 1 2
15 FDI_FSYNC1 J17 K28 PEG_HTX_GRX_N9 C542 1 2 DIS@ 0.22U_0402_10V6K PEG_HTX_C_GRX_N9
FDI1_FSYNC PEG_TX#[6] PEG_HTX_GRX_N8 C544 DIS@ 0.22U_0402_10V6K PEG_HTX_C_GRX_N8
PEG_TX#[7] J30 1 2
eDP_COMPIO and ICOMPO signals should 15 FDI_INT H20 J28 PEG_HTX_GRX_N7 C546 1 2 DIS@ 0.22U_0402_10V6K PEG_HTX_C_GRX_N7
FDI_INT PEG_TX#[8] PEG_HTX_GRX_N6 C548 DIS@ 0.22U_0402_10V6K PEG_HTX_C_GRX_N6
H29 1 2
be shorted near balls, PEG_TX#[9]
1
15 FDI_LSYNC0 J19 G27 PEG_HTX_GRX_N5 C550 1 2 DIS@ 0.22U_0402_10V6K PEG_HTX_C_GRX_N5

R145 FDI0_LSYNC PEG_TX#[10] PEG_HTX_GRX_N4 C552 DIS@ 0.22U_0402_10V6K PEG_HTX_C_GRX_N4
Trace Width for EDP_COMPIO=4mils, 15 FDI_LSYNC1 H17 FDI1_LSYNC PEG_TX#[11] E29 1 2
24.9_0402_1% F27 PEG_HTX_GRX_N3 C554 1 2 DIS@ 0.22U_0402_10V6K PEG_HTX_C_GRX_N3
EDP_ICOMPO=12mils, PEG_TX#[12]
D28 PEG_HTX_GRX_N2 C556 1 2 DIS@ 0.22U_0402_10V6K PEG_HTX_C_GRX_N2
PEG_TX#[13] PEG_HTX_GRX_N1 C558 DIS@ 0.22U_0402_10V6K PEG_HTX_C_GRX_N1
and both length less than 500 mils... F26 1 2
2
PEG_TX#[14] PEG_HTX_GRX_N0 C560 DIS@ 0.22U_0402_10V6K PEG_HTX_C_GRX_N0

E25 1 2
should not be left floating EDP_COMP A18
PEG_TX#[15]
eDP_COMPIO
,even if disable eDP function... A17 eDP_ICOMPO PEG_TX[0] M28 PEG_HTX_GRX_P15 C515 1 2 DIS@ 0.22U_0402_10V6K PEG_HTX_C_GRX_P15
B16 M33 PEG_HTX_GRX_P14 C528 1 2 DIS@ 0.22U_0402_10V6K PEG_HTX_C_GRX_P14
B eDP_HPD PEG_TX[1] PEG_HTX_GRX_P13 C533 DIS@ 0.22U_0402_10V6K PEG_HTX_C_GRX_P13 B
PEG_TX[2] M30 1 2
L31 PEG_HTX_GRX_P12 C536 1 2 DIS@ 0.22U_0402_10V6K PEG_HTX_C_GRX_P12
PEG_TX[3] PEG_HTX_GRX_P11 C539 DIS@ 0.22U_0402_10V6K PEG_HTX_C_GRX_P11
C15 eDP_AUX PEG_TX[4] L28 1 2
D15 K30 PEG_HTX_GRX_P10 C541 1 2 DIS@ 0.22U_0402_10V6K PEG_HTX_C_GRX_P10
eDP_AUX# eDP PEG_TX[5] PEG_HTX_GRX_P9 C543 DIS@ 0.22U_0402_10V6K PEG_HTX_C_GRX_P9
PEG_TX[6] K27 1 2
J29 PEG_HTX_GRX_P8 C545 1 2 DIS@ 0.22U_0402_10V6K PEG_HTX_C_GRX_P8
PEG_TX[7] PEG_HTX_GRX_P7 C547 DIS@ 0.22U_0402_10V6K PEG_HTX_C_GRX_P7
C17 eDP_TX[0] PEG_TX[8] J27 1 2
F16 H28 PEG_HTX_GRX_P6 C549 1 2 DIS@ 0.22U_0402_10V6K PEG_HTX_C_GRX_P6
eDP_TX[1] PEG_TX[9] PEG_HTX_GRX_P5 C551 DIS@ 0.22U_0402_10V6K PEG_HTX_C_GRX_P5
C16 eDP_TX[2] PEG_TX[10] G28 1 2
G15 E28 PEG_HTX_GRX_P4 C553 1 2 DIS@ 0.22U_0402_10V6K PEG_HTX_C_GRX_P4
eDP_TX[3] PEG_TX[11] PEG_HTX_GRX_P3 C555 DIS@ 0.22U_0402_10V6K PEG_HTX_C_GRX_P3
PEG_TX[12] F28 1 2
C18 D27 PEG_HTX_GRX_P2 C557 1 2 DIS@ 0.22U_0402_10V6K PEG_HTX_C_GRX_P2
eDP_TX#[0] PEG_TX[13] PEG_HTX_GRX_P1 C559 DIS@ 0.22U_0402_10V6K PEG_HTX_C_GRX_P1
E16 eDP_TX#[1] PEG_TX[14] E26 1 2
D16 D25 PEG_HTX_GRX_P0 C561 1 2 DIS@ 0.22U_0402_10V6K PEG_HTX_C_GRX_P0
eDP_TX#[2] PEG_TX[15]
F15 eDP_TX#[3]
Sandy Bridge_rPGA_Rev0p61
CONN@
Typ- suggest 220nF. The change in AC capacitor
value from 100nF to 220nF is to enable
compatibility with future platforms having PCIE
Gen3 (8GT/s)
A A
Security Classification Compal Secret Data

PROCESSOR(1/7) DMI,FDI,PEG
Custom E
JE50-HR/SJV50-HR M/B Schematics
5 4 3 2 1
5 4 3 2 1
Buffered reset to CPU

D +3VS D
+3VALW
+1.05VS_VTT +1.5V_CPU_VDDQ
1
C162
0.1U_0402_16V4Z 1
1
C307
1
2 R90 0.1U_0402_16V4Z
75_0402_1% R205
2
5
U7 R87 U11 200_0402_1%
2
1 43_0402_1% 74AHC1G09GW_TSSOP5
2
NC
5
4 BUFO_CPU_RST# 1 2 BUF_CPU_RST#
PLT_RST# Y
2 1
P
17 PLT_RST# A 15 SYS_PWROK B
1
SN74LVC1G07DCKR_SC70-5 4 PM_SYS_PWRGD_BUF 1 2 PM_DRAM_PWRGD_R
O R204 130_0402_5%
15 PM_DRAM_PWRGD 2
3
A
1
R88
0_0402_5% R203
3
@ 39_0402_1%
2
RESET#:okCPUreset
@
2
SNB_IVB# had changed the name to JCPU1B
C C
PROC_SELCT#,function for future platform,
connect to the DF_TVS strap on the PCH
A28 CLK_CPU_DMI
CLK_CPU_DMI 14
MISC
BCLK
CLOCKS
C26 A27 CLK_CPU_DMI#
17 H_SNB_IVB# SNB_IVB# BCLK# CLK_CPU_DMI# 14
AN34 SKTOCC#
A16 R516 2 1 1K_0402_5%
DPLL_REF_SSCLK R518
DPLL_REF_SSCLK# A15 2 1 1K_0402_5% +1.05VS_VTT
If use External Graphic or
T6 PAD H_CATERR# AL33
@ CATERR# use integrated without eDP
DPLL_REF_SSCLK PD 1K_5% to GND
THERMAL
DPLL_REF_SSCLK# PH 1K_5% to +1.05VS_VTT
Processor Pullups H_PECI AN33 R8 SM_DRAMRST#
18,40 H_PECI PECI SM_DRAMRST# SM_DRAMRST# 6
DDR3
MISC
+1.05VS_VTT 2 R91 1 62_0402_5% R92
56_0402_5%
40,50 H_PROCHOT# H_PROCHOT# 1 2 H_PROCHOT#_R AL32 AK1 SM_RCOMP0 R231 2 1 140_0402_1%
PROCHOT# SM_RCOMP[0] SM_RCOMP1 R566
SM_RCOMP[1] A5 2 1 25.5_0402_1%
A4 SM_RCOMP2 R571 2 1 200_0402_1%
SM_RCOMP[2]
H_THEMTRIP# AN32 DDR3 Compensation Signals
18 H_THRMTRIP# THERMTRIP#
PRDY# AP29 R03 modify

PREQ# AP27
B
AR26 TCK @ +3VS B
TCK PAD T66
PWR MANAGEMENT
TMS @
JTAG & BPM

TMS AR27 PAD T67
H_PM_SYNC AM34 AP30 TRST# PAD @
15 H_PM_SYNC PM_SYNC TRST# T68
1
R84 2 1 10K_0402_5% AR28 TDI PAD @
TDI T69
AP26 TDO PAD @ R40
TDO T70
18 H_CPUPWRGD H_CPUPWRGD AP33 1K_0402_5%
UNCOREPWRGOOD
UNCOREPWRGOOD:COREOK
2
AL35 XDP_DBRESET# XDP_DBRESET# 15
PM_DRAM_PWRGD_R DBR#
V8 SM_DRAMPWROK
BPM#[0] AT28
SM_DRAMPWROK:DRAM power ok BPM#[1] AR29
BPM#[2] AR30
BUF_CPU_RST# AR33 AT30
RESET# BPM#[3]
BPM#[4] AP32
BPM#[5] AR31
BPM#[6] AT31
BPM#[7] AR32
CONN@
A A

PROCESSOR(2/7) PM,XDP,CLK
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom JE50-HR/SJV50-HR M/B Schematics E
5 4 3 2 1
5 4 3 2 1
JCPU1C JCPU1D
11 DDR_A_D[0..63] SA_CLK[0] AB6 SA_CLK_DDR0 11 12 DDR_B_D[0..63] SB_CLK[0] AE2 SB_CLK_DDR0 12

SA_CLK#[0] AA6 SA_CLK_DDR#0 11 SB_CLK#[0] AD2 SB_CLK_DDR#0 12
DDR_A_D0 C5 V9 DDR_B_D0 C9 R9
SA_DQ[0] SA_CKE[0] DDRA_CKE0_DIMMA 11 SB_DQ[0] SB_CKE[0] DDRB_CKE0_DIMMB 12
DDR_A_D1 D5 DDR_B_D1 A7
DDR_A_D2 SA_DQ[1] DDR_B_D2 SB_DQ[1]
D3 SA_DQ[2] D10 SB_DQ[2]
DDR_A_D3 D2 DDR_B_D3 C8
D6 SA_DQ[4] SA_CLK[1] AA5 SA_CLK_DDR1 11 A9 SB_DQ[4] SB_CLK[1] AE1 SB_CLK_DDR1 12
D DDR_A_D5 DDR_B_D5 D
C6 SA_DQ[5] SA_CLK#[1] AB5 SA_CLK_DDR#1 11 A8 SB_DQ[5] SB_CLK#[1] AD1 SB_CLK_DDR#1 12
DDR_A_D6 C2 V10 DDR_B_D6 D9 R10
SA_DQ[6] SA_CKE[1] DDRA_CKE1_DIMMA 11 SB_DQ[6] SB_CKE[1] DDRB_CKE1_DIMMB 12
DDR_A_D7 C3 DDR_B_D7 D8
F10 SA_DQ[8] G4 SB_DQ[8]
DDR_A_D9 F8 DDR_B_D9 F4
G10 SA_DQ[10] SA_CLK[2] AB4 F1 SB_DQ[10] SB_CLK[2] AB2
DDR_A_D11 G9 AA4 DDR_B_D11 G1 AA2
DDR_A_D12 SA_DQ[11] SA_CLK#[2] DDR_B_D12 SB_DQ[11] SB_CLK#[2]
F9 SA_DQ[12] SA_CKE[2] W9 G5 SB_DQ[12] SB_CKE[2] T9
DDR_A_D13 F7 DDR_B_D13 F5
G8 SA_DQ[14] F2 SB_DQ[14]
DDR_A_D15 G7 DDR_B_D15 G2
K4 SA_DQ[16] SA_CLK[3] AB3 J7 SB_DQ[16] SB_CLK[3] AA1
DDR_A_D17 K5 AA3 DDR_B_D17 J8 AB1
DDR_A_D18 SA_DQ[17] SA_CLK#[3] DDR_B_D18 SB_DQ[17] SB_CLK#[3]
K1 SA_DQ[18] SA_CKE[3] W10 K10 SB_DQ[18] SB_CKE[3] T10
DDR_A_D19 J1 DDR_B_D19 K9
J5 SA_DQ[20] J9 SB_DQ[20]
DDR_A_D21 J4 DDR_B_D21 J10
J2 SA_DQ[22] SA_CS#[0] AK3 DDRA_CS0_DIMMA# 11 K8 SB_DQ[22] SB_CS#[0] AD3 DDRB_CS0_DIMMB# 12
DDR_A_D23 K2 AL3 DDR_B_D23 K7 AE3
SA_DQ[23] SA_CS#[1] DDRA_CS1_DIMMA# 11 SB_DQ[23] SB_CS#[1] DDRB_CS1_DIMMB# 12
DDR_A_D24 M8 AG1 DDR_B_D24 M5 AD6
DDR_A_D25 SA_DQ[24] SA_CS#[2] DDR_B_D25 SB_DQ[24] SB_CS#[2]
N10 SA_DQ[25] SA_CS#[3] AH1 N4 SB_DQ[25] SB_CS#[3] AE6
DDR_A_D26 N8 DDR_B_D26 N2
N7 SA_DQ[27] N1 SB_DQ[27]
DDR_A_D28 M10 DDR_B_D28 M4
M9 SA_DQ[29] SA_ODT[0] AH3 SA_ODT0 11 N5 SB_DQ[29] SB_ODT[0] AE4 SB_ODT0 12
DDR SYSTEM MEMORY B

DDR_A_D30 DDR_B_D30
DDR SYSTEM MEMORY A

N9 SA_DQ[30] SA_ODT[1] AG3 SA_ODT1 11 M2 SB_DQ[30] SB_ODT[1] AD4 SB_ODT1 12
DDR_A_D31 M7 AG2 DDR_B_D31 M1 AD5
DDR_A_D32 SA_DQ[31] SA_ODT[2] DDR_B_D32 SB_DQ[31] SB_ODT[2]
AG6 SA_DQ[32] SA_ODT[3] AH2 AM5 SB_DQ[32] SB_ODT[3] AE5
DDR_A_D33 AG5 DDR_B_D33 AM6
AK6 SA_DQ[34] AR3 SB_DQ[34]
DDR_A_D35 AK5 DDR_B_D35 AP3
AH5 SA_DQ[36] DDR_A_DQS#[0..7] 11 AN3 SB_DQ[36] DDR_B_DQS#[0..7] 12
C DDR_A_D37 DDR_A_DQS#0 DDR_B_D37 DDR_B_DQS#0 C
AH6 SA_DQ[37] SA_DQS#[0] C4 AN2 SB_DQ[37] SB_DQS#[0] D7
DDR_A_D38 AJ5 G6 DDR_A_DQS#1 DDR_B_D38 AN1 F3 DDR_B_DQS#1
DDR_A_D39 SA_DQ[38] SA_DQS#[1] DDR_A_DQS#2 DDR_B_D39 SB_DQ[38] SB_DQS#[1] DDR_B_DQS#2
AJ6 SA_DQ[39] SA_DQS#[2] J3 AP2 SB_DQ[39] SB_DQS#[2] K6
DDR_A_D40 AJ8 M6 DDR_A_DQS#3 DDR_B_D40 AP5 N3 DDR_B_DQS#3
AK8 SA_DQ[41] SA_DQS#[4] AL6 AN9 SB_DQ[41] SB_DQS#[4] AN5
DDR_A_D42 AJ9 AM8 DDR_A_DQS#5 DDR_B_D42 AT5 AP9 DDR_B_DQS#5
AK9 SA_DQ[43] SA_DQS#[6] AR12 AT6 SB_DQ[43] SB_DQS#[6] AK12
DDR_A_D44 AH8 AM15 DDR_A_DQS#7 DDR_B_D44 AP6 AP15 DDR_B_DQS#7
DDR_A_D45 SA_DQ[44] SA_DQS#[7] DDR_B_D45 SB_DQ[44] SB_DQS#[7]
AH9 SA_DQ[45] AN8 SB_DQ[45]
DDR_A_D46 AL9 DDR_B_D46 AR6
AL8 SA_DQ[47] AR5 SB_DQ[47]
DDR_A_D48 AP11 DDR_B_D48 AR9
SA_DQ[48] DDR_A_DQS[0..7] 11 SB_DQ[48] DDR_B_DQS[0..7] 12
DDR_A_D49 AN11 D4 DDR_A_DQS0 DDR_B_D49 AJ11 C7 DDR_B_DQS0
DDR_A_D50 SA_DQ[49] SA_DQS[0] DDR_A_DQS1 DDR_B_D50 SB_DQ[49] SB_DQS[0] DDR_B_DQS1
AL12 SA_DQ[50] SA_DQS[1] F6 AT8 SB_DQ[50] SB_DQS[1] G3
DDR_A_D51 AM12 K3 DDR_A_DQS2 DDR_B_D51 AT9 J6 DDR_B_DQS2
AM11 SA_DQ[52] SA_DQS[3] N6 AH11 SB_DQ[52] SB_DQS[3] M3
DDR_A_D53 AL11 AL5 DDR_A_DQS4 DDR_B_D53 AR8 AN6 DDR_B_DQS4
AP12 SA_DQ[54] SA_DQS[5] AM9 AJ12 SB_DQ[54] SB_DQS[5] AP8
DDR_A_D55 AN12 AR11 DDR_A_DQS6 DDR_B_D55 AH12 AK11 DDR_B_DQS6
AJ14 SA_DQ[56] SA_DQS[7] AM14 AT11 SB_DQ[56] SB_DQS[7] AP14
DDR_A_D57 AH14 DDR_B_D57 AN14
AL15 SA_DQ[58] AR14 SB_DQ[58]
DDR_A_D59 AK15 DDR_B_D59 AT14
AL14 SA_DQ[60] DDR_A_MA[0..15] 11 AT12 SB_DQ[60] DDR_B_MA[0..15] 12
DDR_A_D61 AK14 AD10 DDR_A_MA0 DDR_B_D61 AN15 AA8 DDR_B_MA0
DDR_A_D62 SA_DQ[61] SA_MA[0] DDR_A_MA1 DDR_B_D62 SB_DQ[61] SB_MA[0] DDR_B_MA1
AJ15 SA_DQ[62] SA_MA[1] W1 AR15 SB_DQ[62] SB_MA[1] T7
DDR_A_D63 AH15 W2 DDR_A_MA2 DDR_B_D63 AT15 R7 DDR_B_MA2
SA_DQ[63] SA_MA[2] DDR_A_MA3 SB_DQ[63] SB_MA[2] DDR_B_MA3
SA_MA[3] W7 SB_MA[3] T6
V3 DDR_A_MA4 T2 DDR_B_MA4
SA_MA[4] DDR_A_MA5 SB_MA[4] DDR_B_MA5
SA_MA[5] V2 SB_MA[5] T4
W3 DDR_A_MA6 T3 DDR_B_MA6
11 DDR_A_BS0 AE10 SA_BS[0] SA_MA[7] W6 12 DDR_B_BS0 AA9 SB_BS[0] SB_MA[7] R2
B DDR_A_MA8 DDR_B_MA8 B
11 DDR_A_BS1 AF10 SA_BS[1] SA_MA[8] V1 12 DDR_B_BS1 AA7 SB_BS[1] SB_MA[8] T5
V6 W5 DDR_A_MA9 R6 R3 DDR_B_MA9
11 DDR_A_BS2 SA_BS[2] SA_MA[9] 12 DDR_B_BS2 SB_BS[2] SB_MA[9]
AD8 DDR_A_MA10 AB7 DDR_B_MA10
SA_MA[11] V4 SB_MA[11] R1
W4 DDR_A_MA12 T1 DDR_B_MA12
11 DDR_A_CAS# AE8 SA_CAS# SA_MA[13] AF8 12 DDR_B_CAS# AA10 SB_CAS# SB_MA[13] AB10
AD9 V5 DDR_A_MA14 AB8 R5 DDR_B_MA14
11 DDR_A_RAS# SA_RAS# SA_MA[14] 12 DDR_B_RAS# SB_RAS# SB_MA[14]
AF9 V7 DDR_A_MA15 AB9 R4 DDR_B_MA15
11 DDR_A_WE# SA_WE# SA_MA[15] 12 DDR_B_WE# SB_WE# SB_MA[15]
Sandy Bridge_rPGA_Rev0p61 CONN@ Sandy Bridge_rPGA_Rev0p61

CONN@
Follow CRB1.0 +1.5V

1
@R184
@ R184
0_0402_5% R217
CPUDIMMreset 1 2 1K_0402_5%
R155
2
1K_0402_5%
S
5 SM_DRAMRST# SM_DRAMRST# 3 1 DIMM_DRAMRST#_R 1 2 DIMM_DRAMRST# 11,12

Q12
2
BSS138_NL_SOT23-3
R186 S0
G
2
4.99K_0402_1% RST_GATE hgih ,MOS ON

A SM_DRAMRST# HIGH,DIMM_DRAMRST# HIGH A
1
Dimm not reset

S3
11,12,14 RST_GATE RST_GATE Low ,MOS OFF
SM_DRAMRST# lo,DIMM_DRAMRST# HIGH
Dimm not reset
1
C293
S4,5
RST_GATE Low ,MOS OFF
0.047U_0402_16V7K SM_DRAMRST# lo,DIMM_DRAMRST# low
2
Dimm reset THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PROCESSOR(3/7) DDRIII
5 4 3 2 1
5 4 3 2 1
CFG Straps for Processor
CFG2
1
R112
1K_0402_5%
2
D D
JCPU1E PEG Static Lane Reversal - CFG2 is for the 16x
RSVD28 L7 1: Normal Operation; Lane # definition matches

RSVD29 AG7 CFG2 socket pin map definition
T8 PAD CFG0 AK28 AE7
@ CFG[0] RSVD30
AK29 CFG[1] RSVD31 AK2
CFG2 AL26 W8 0:Lane Reversed
CFG4
AL27
AK26
CFG[2]
CFG[3]
CFG[4]
RSVD32
*
CFG5 AL29 AT26 CFG4
CFG6 CFG[5] RSVD33
AL30 CFG[6] RSVD34 AM33
1
CFG7 AM31 AJ27 @
CFG[7] RSVD35
AM32 CFG[8]
AM30 R109
CFG[9] 1K_0402_5%
AM28 CFG[10]
AM26
2
CFG[11]
AN28 CFG[12]
AN31 CFG[13] RSVD37 T8
AN26 CFG[14] RSVD38 J16
AM27 CFG[15] RSVD39 H16
AK31 CFG[16] RSVD40 G16
AN29 CFG[17]
Display Port Presence Strap
C C
AR35 1 : Disabled; No Physical Display Port
AJ31
AH31
RSVD1
RSVD2
RSVD41
RSVD42
RSVD43
AT34
AT33
CFG4 * attached to Embedded Display Port
AJ33 RSVD3 RSVD44 AP35
AH33 RSVD4 RSVD45 AR34 0 : Enabled; An external Display Port device is
connected to the Embedded Display Port
AJ26 RSVD5
RESERVED
RSVD6 and RSVD7 had changed to
SA_DIMM_VREFDQ and SB_DIMMVREFDQ CFG6
RSVD46 B34
11 SA_DIMM_VREFDQ SA_DIMM_VREFDQ B4 A33
SB_DIMM_VREFDQ RSVD6 RSVD47 CFG5
12 SB_DIMM_VREFDQ D1 RSVD7 RSVD48 A34
RSVD49 B35
1
SA_DIMM_VREFDQ RSVD50 C35
1
R107 R108
SB_DIMM_VREFDQ F25 1K_0402_5% @ @ 1K_0402_5%
R154 R164 RSVD8
For Future CPU M3 support, 1K_0402_5% 1K_0402_5%
F24 RSVD9
F23
2
Sandey bridge not supportM3, RSVD10
D24 AJ32
2
RSVD11 RSVD51
Check list1.0&CRB say can NC G25 RSVD12 RSVD52 AK32
G24 RSVD13
E23 RSVD14 AH27 change to VCC_DIE_SENSE
D23 RSVD15
C30 AH27 PAD T7
RSVD16 RSVD53 @
A31 RSVD17
B30 RSVD18
B29 RSVD19 PCIE Port Bifurcation Straps
D30 RSVD20 RSVD54 AN35
VCCIO_SEL B31 AM35
RSVD21 RSVD55
A30 RSVD54 and RSVD55 had changed to 11: (Default) x16 - Device 1 functions 1 and 2 disabled
RSVD22
*10: x8, x8 - Device 1 function 1 enabled ; function 2
1
C29 RSVD23 BCLK_ITP and BCLK_ITP#

B R513 B
CFG[6:5]
@ 10K_0402_5%
J20
disabled
RSVD24
B18 AT2 01: Reserved - (Device 1 function 1 disabled ; function
2
VCCIO_SEL RSVD25 RSVD56

A19 AT1
RSVD26 RSVD57
AR1
2 enabled)
RSVD58
00: x8,x4,x4 - Device 1 functions 1 and 2 enabled
VCCIO_SEL For 2012 CPU support J15 RSVD27
1/NC : (Default) +1.05VS_VTT B1

A19 * 0: +1.0VS_VTT
KEY CFG7
1
R102
RSVD26 had changed the name to VCCIO_SEL @ 1K_0402_5%
Need PH +3VALW 10K at +1.05VS_VTT source Sandy Bridge_rPGA_Rev0p61
2
for 2012 processor +1.05V and +1.0V select
CONN@
PEG DEFER TRAINING
1: (Default) PEG Train immediately following xxRESETB

CFG7 de assertion
A
0: PEG Wait for BIOS for training A

PROCESSOR(4/7) RSVD,CFG
5 4 3 2 1
5 4 3 2 1
SV type CPU JCPU1F POWER

+CPU_CORE
QC 94A
+1.05VS_VTT
DC 53A 8.5A
AG35 VCC1
1 1 1 1 1 AG34 AH13 +1.05VS_VTT
VCC2 VCCIO1
10U_0805_10V4Z
C206
10U_0805_10V4Z
C205
10U_0805_10V4Z
C204
10U_0805_10V4Z
C203
10U_0805_10V4Z
C202
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
AG33 VCC3 VCCIO2 AH10 1 1 1 1 1 1 1 1 1 1
AG32 VCC4 VCCIO3 AG10
C290
C647
C652
C289
C288
C232
C229
C292
C291
C641
AG31 VCC5 VCCIO4 AC10
2 2 2 2 2
AG30 VCC6 VCCIO5 Y10
D 2 2 2 2 2 2 2 2 2 2 D
AG29 VCC7 VCCIO6 U10
AG28 VCC8 VCCIO7 P10
AG27 VCC9 VCCIO8 L10
AG26 VCC10 VCCIO9 J14
AF35 VCC11 VCCIO10 J13
1 1 1 1 1 AF34 VCC12 VCCIO11 J12
10U_0805_10V4Z
C227
10U_0805_10V4Z
C223
10U_0805_10V4Z
C218
10U_0805_10V4Z
C207
10U_0805_10V4Z
C222
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
220U_B2_2.5VM_R35
AF33 VCC13 VCCIO12 J11 1 1 1 1 1 1 1
330U_D2_2V_Y
330U_D2_2V_Y
AF32 VCC14 VCCIO13 H14 R02 modify
C651
C650
C649
C648
C616
C638
C816
AF31 H12 + + +
2 2 2 2 2 VCC15 VCCIO14 @ @ @ @
AF30 VCC16 VCCIO15 H11
2 2 2 2
AF29 VCC17 VCCIO16 G14
2 2 2 ME interefer,not pop!!
PEG AND DDR

AF26 VCC20 VCCIO19 F14
AD35 VCC21 VCCIO20 F13
+CPU_CORE
AD32 E14
AD31
VCC24
VCC25
VCCIO23
VCCIO24 E12 INTEL Recommend
AD30
1 1 1 1 1 1 1 1 AD29
VCC26
VCC27 VCCIO25 E11 2*330uF,12*22uF
22U_0805_6.3V6M
C622
22U_0805_6.3V6M
C574
22U_0805_6.3V6M
C627
22U_0805_6.3V6M
C635
22U_0805_6.3V6M
C575
22U_0805_6.3V6M
C172
22U_0805_6.3V6M
C171
22U_0805_6.3V6M
C160
AD28 VCC28 VCCIO26 D14
AD27
AD26
VCC29 VCCIO27 D13
D12
from PDDG 1.0
2 2 2 2 2 2 2 2 VCC30 VCCIO28
AC35 VCC31 VCCIO29 D11
AC34 VCC32 VCCIO30 C14
AC30 VCC36 VCCIO34 B14
22U_0805_6.3V6M
AC29 B12
INTEL Recommend 1 1 1 1 1 1 1 1 VCC37 VCCIO35
22U_0805_6.3V6M
C224
22U_0805_6.3V6M
C225
22U_0805_6.3V6M
C226
22U_0805_6.3V6M
C610
22U_0805_6.3V6M
C609
22U_0805_6.3V6M
C608
22U_0805_6.3V6M
C607
C606
AC28 VCC38 VCCIO36 A14
C C
AC27 A13
4*470uF,16*22uF and 10*10uF 2 2 2 2 2 2 2 2
AC26
VCC39
VCC40
VCCIO37
VCCIO38 A12
AA35 VCC41 VCCIO39 A11
from PDDG 1.0 AA34
AA33
VCC42
J23
VCC43 VCCIO40
AA32 VCC44
AA31 VCC45
AA30 VCC46
AA29 VCC47
AA28 VCC48
AA27 VCC49
AA26 VCC50
CORE SUPPLY
+CPU_CORE +1.05VS_VTT +1.05VS_VTT
Y35 VCC51
Follow Power Suggestion , Y34 VCC52
place 3-pin Cap for CPU_CORE Y33 VCC53
1
Y32 VCC54
Y31 R450 R447
VCC55 130_0402_5% 75_0402_1%
Y30
PAW00 1 1 1 1 1 VCC56
470U_D2_2VM_R4M
470U_D2_2VM_R4M
470U_D2_2VM_R4M
470U_D2_2VM_R4M
330U_D2_2V_Y
Y29 VCC57
C152
C233
C626
C151
C562
+ + + + + Y28
use 470uF*2
2
VCC58
Y27 VCC59
Y26 R448
2 3 2 3 2 3 2 3 2 VCC60
330uF*3 V35 43_0402_1%
SVID
VCC61 H_CPU_SVIDALRT#
V34 VCC62 VIDALERT# AJ29 1 2 VR_SVID_ALRT# 55
V33 AJ30 H_CPU_SVIDCLK R446 1 2 0_0402_5%
VCC63 VIDSCLK VR_SVID_CLK 55
V32 AJ28 H_CPU_SVIDDAT R449 1 2 0_0402_5%
VCC64 VIDSOUT VR_SVID_DAT 55
QC@ QC@ QC@ QC@ V31 VCC65
V30 VCC66
V29 VCC67
V28 VCC68
V27 VCC69 Place the PU
V26
B
U35
VCC70 resistors close to VR B
VCC71
U34 VCC72
U33 VCC73
DC@ DC@ DC@ DC@ U32 VCC74
U31 VCC75
U30 VCC76
U29 VCC77
U28 VCC78
U27 VCC79
U26 VCC80 +CPU_CORE
Place the PU
C152 C233 C626 C151 R35
330U_D2_2V_Y 330U_D2_2V_Y 330U_D2_2V_Y 330U_D2_2V_Y R34
VCC81 resistors close to CPU
VCC82
R33 VCC83
1
R32 VCC84
R31 R445
VCC85
R30 VCC86 100_0402_1%
R29 VCC87
SENSE LINES
R28
2
VCC88
R27 VCC89 VCC_SENSE AJ35 VCCSENSE_R R444 1 2 0_0402_5%
VCCSENSE 55
R26 VCC90 VSS_SENSE AJ34 VSSSENSE_R R443 1 2 0_0402_5%
VSSSENSE 55
P35 VCC91
P34 VCC92
1
P33 VCC93
P32 B10 R442
VCC94 VCCIO_SENSE VCCIO_SENSE 53
P31 A10 VSSIO_SENSE 100_0402_1%
VCC95 VSSIO_SENSE
P30 VCC96 VSSIO_SENSE
1
P29 change to
2
VCC97
P28 VCC98
P27 VSS_SENSE_VCCIO R163
VCC99 10_0402_5%
P26 VCC100
2
A
Should change to connect form A
power cirucit & layout differential
with VCCIO_SENSE.
Security Classification
CONN@
Compal Secret Data Compal Electronics, Inc.
PROCESSOR(5/7) PWR,BYPASS
5 4 3 2 1
5 4 3 2 1
D D
INTEL Recommend
2*470uF,12*22uF POWER
+VGFX_CORE
from PDDG 1.0 QC 33A JCPU1G
DC 26A
SENSE
LINES
AT24 VAXG1 VAXG_SENSE AK35 VCC_AXG_SENSE 55
1
UMA@ UMA@ UMA@ UMA@ UMA@ UMA@ AT23 AK34

VAXG2 VSSAXG_SENSE VSS_AXG_SENSE 55
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
R151 1 1 1 1 1 1 AT21 VAXG3
C611
C625
C212
C272
C211
C231
0_0402_5% AT20 VAXG4 +1.5V_CPU_VDDQ
DISO@ AT18 VAXG5
AT17
2
2 2 2 2 2 2 VAXG6
AR24 VAXG7
1
C
AR23 VAXG8 +V_SM_VREF should R582 C
AR21 VAXG9
AR20 have 20 mil trace width 100_0402_1%
VREF
VAXG10
AR18 VAXG11
AR17
2
VAXG12 +V_SM_VREF
AP24 VAXG13 SM_VREF AL1
AP23 VAXG14
1
UMA@ UMA@ UMA@ UMA@ UMA@ UMA@ AP21 1
VAXG15
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
1 1 1 1 1 1 AP20 C688 R575
VAXG16
C210
C209
C274
C271
C242
C275
AP18 0.1U_0402_16V4Z 100_0402_1%
VAXG17
AP17 VAXG18 2
AN24
2
2 2 2 2 2 2 VAXG19
AN23 VAXG20
AN21 VAXG21
AN20 +1.5V_CPU_VDDQ
VAXG22
DDR3 -1.5V RAILS

AN18 +1.5V
VAXG23 J4
AN17 VAXG24 10A
GRAPHICS
AM24 VAXG25 VDDQ1 AF7 1 2
AM23 VAXG26 VDDQ2 AF4
AM21 AF1 1 PAD-OPEN 4x4m
VAXG27 VDDQ3
10U_0805_10V4Z
10U_0805_10V4Z
10U_0805_10V4Z
10U_0805_10V4Z
10U_0805_10V4Z
10U_0805_10V4Z
330U_D2_2V_Y
AM20 AC7 1 1 1 1 1 1 @
VAXG28 VDDQ4
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
C355
AM18 AC4 +
1 1 1 1 1 1 VAXG29 VDDQ5 +1.5VS
330U_D2_2V_Y
330U_D2_2V_Y
C208
C273
C600
C599
C363
C364
C362
C341
C365
C361
AM17 VAXG30 VDDQ6 AC1
C646
C645
@ + + UMA@ AL24 Y7 J5
@ @ VAXG31 VDDQ7 2 2 2 2 2 2 2
AL23 VAXG32 VDDQ8 Y4 1 2
2 2 UMA@ 2 UMA@ 2 AL21 VAXG33 VDDQ9 Y1
2 2 PAD-OPEN 4x4m
AL20 VAXG34 VDDQ10 U7
AL18 U4 @
VAXG35 VDDQ11
AL17 VAXG36 VDDQ12 U1
AK24 VAXG37 VDDQ13 P7
AK23
AK21
VAXG38 VDDQ14 P4
P1
Short for +1.5VS to +1.5V_1
Vaxg AK20
VAXG39 VDDQ15
B
AK18
VAXG40
VAXG41
INTEL Recommend B
Can connect to GND if motherboard only AK17

INTEL Recommend
supports external graphics and if GFX VR is not
AJ24
VAXG42
VAXG43 1*330uF,6*10uF
AJ23
stuffed in a common motherboard design, AJ21
VAXG44
VAXG45 1*330uF,3*10uF from PDDG 1.0
AJ20 VAXG46
VAXG can be left floating in a common AJ18 VAXG47 from PDDG 1.0
motherboard design (Gfx VR keeps VAXG from AJ17 VAXG48
AH24 R06 Modify +VCCSA
6A
SA RAIL
VAXG49
floating) if the VR is stuffed AH23 VAXG50
AH21 M27 +VCCSA
VAXG51 VCCSA1
AH20 VAXG52 VCCSA2 M26
AH18 VAXG53 VCCSA3 L26
10U_0805_10V4Z
10U_0805_10V4Z
10U_0805_10V4Z
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
AH17 J26 1 1 1 1 1 1 R1371 2 0_0402_5% VCCSA_SENSE
VAXG54 VCCSA4
220U_B2_2.5VM_R35
C221
VCCSA5 J25 1
C214
C605
C219
C213
C828
C829
VCCSA6 J24 If possible,use os-con cap
H26 @ +
VCCSA7 2 2 2 2 2 2 @ if not,use the D2 size
VCCSA8 H25
1.8V RAIL
2 R1411 2 0_0402_5% VSSSA_SENSE 52

+1.8VS R528 R06 Modify 1.2A
0_0805_5%
1 2 +1.8VS_VCCPLL B6 H23 VCCSA_SENSE 52
MISC
VCCPLL1 VCCSA_SENSE
A6 VCCPLL2
10U_0603_6.3V6M
10U_0603_6.3V6M
220U_B2_2.5VM_R35
C664
1U_0402_6.3V6K
C654
1U_0402_6.3V6K
C653
1 1 1 1 1 A2 VCCPLL3
10U_0805_10V4Z
C655
1 VCCSA
C831
C830
+ C22 VCCSA_VID0
FC_C22 VCCSA_VID1
VCCSA_VID1 C24 VCCSA_VID1 52 VID0 VID1 Vout 2011CPU 2012CPU
2 2 2 2
2
2 2 0 0 0.9V V V
FC_C22
1
R143
A @ Sandy Bridge_rPGA_Rev0p61 change to R138 0 1 0.8V V V A
10K_0402_5%
VCCSA_VID0 @ 0_0402_5%
CONN@ 1 0 0.725V X V
1
2
1 1 0.675V X V
INTEL Recommend
1*330uF,1*10uF and 2*1uF(0402) Security Classification Compal Secret Data Compal Electronics, Inc.
from PDDG 1.0 Issued Date 2011/02/08 Deciphered Date 2012/02/08 Title
PROCESSOR(6/7) PWR
5 4 3 2 1
5 4 3 2 1
JCPU1H JCPU1I
D D
AT35 VSS1 VSS81 AJ22
AT32 VSS2 VSS82 AJ19
AT29 VSS3 VSS83 AJ16 T35 VSS161 VSS234 F22
AT27 VSS4 VSS84 AJ13 T34 VSS162 VSS235 F19
AT25 VSS5 VSS85 AJ10 T33 VSS163 VSS236 E30
AT7 VSS11 VSS91 AH35 T27 VSS169 VSS242 E13
AT4 VSS12 VSS92 AH34 T26 VSS170 VSS243 E10
AT3 VSS13 VSS93 AH32 P9 VSS171 VSS244 E9
AR25 VSS14 VSS94 AH30 P8 VSS172 VSS245 E8
AR10 VSS19 VSS99 AH22 N35 VSS177 VSS250 E3
AR2 VSS22 VSS102 AH7 N32 VSS180 VSS253 D35
AP34 VSS23 VSS103 AH4 N31 VSS181 VSS254 D32
AP31 VSS24 VSS104 AG9 N30 VSS182 VSS255 D29
AP22 VSS27 VSS107 AF6 N27 VSS185 VSS258 D17
AP19 VSS28 VSS108 AF5 N26 VSS186 VSS259 C34
AP16 VSS29 VSS109 AF3 M34 VSS187 VSS260 C31
AP13 VSS30 VSS110 AF2 L33 VSS188 VSS261 C28
AP10 VSS31 VSS111 AE35 L30 VSS189 VSS262 C27
C C
AN30 VSS35 VSS115 AE31 L6 VSS193 VSS266 C1
AN27 VSS36 VSS116 AE30 L5 VSS194 VSS267 B22
AN25 AE29 L4 B19
AN22
AN19
VSS37
VSS38
VSS39
VSS VSS117
VSS118
VSS119
AE28
AE27
L3
L2
VSS195
VSS196
VSS197
VSS VSS268
VSS269
VSS270
B17
B15
AN16 VSS40 VSS120 AE26 L1 VSS198 VSS271 B13
AN13 VSS41 VSS121 AE9 K35 VSS199 VSS272 B11
AN10 VSS42 VSS122 AD7 K32 VSS200 VSS273 B9
AN7 VSS43 VSS123 AC9 K29 VSS201 VSS274 B8
AN4 VSS44 VSS124 AC8 K26 VSS202 VSS275 B7
AM29 VSS45 VSS125 AC6 J34 VSS203 VSS276 B5
AM25 VSS46 VSS126 AC5 J31 VSS204 VSS277 B3
AM22 VSS47 VSS127 AC3 H33 VSS205 VSS278 B2
AM19 VSS48 VSS128 AC2 H30 VSS206 VSS279 A35
AM16 VSS49 VSS129 AB35 H27 VSS207 VSS280 A32
AM2 VSS55 VSS135 AB29 H10 VSS213
AM1 VSS56 VSS136 AB28 H9 VSS214
AL34 VSS57 VSS137 AB27 H8 VSS215
AL31 VSS58 VSS138 AB26 H7 VSS216
AL28 VSS59 VSS139 Y9 H6 VSS217
B B
AL10 VSS65 VSS145 W35 G35 VSS223
AK33 VSS69 VSS149 W31 G23 VSS227
AK22 VSS73 VSS153 W27 F34 VSS231
AK19 VSS74 VSS154 W26 F31 VSS232
AK16 VSS75 VSS155 U9 F29 VSS233
AK13 VSS76 VSS156 U8
AK10 VSS77 VSS157 U6
AK7 VSS78 VSS158 U5
AK4 VSS79 VSS159 U3
AJ25 VSS80 VSS160 U2
Sandy Bridge_rPGA_Rev0p61 Sandy Bridge_rPGA_Rev0p61
CONN@ CONN@
A A

PROCESSOR(7/7) VSS
5 4 3 2 1
5 4 3 2 1
+1.5V
1
R320
1K_0402_5%
@ R133 +1.5V +1.5V
M3 support 0_0402_5% JDIMM1
2
7 SA_DIMM_VREFDQ 1 2 +V_DDR_REFA 1 2
VREF_DQ VSS1 DDR_A_D4
3 VSS2 DQ4 4
2.2U_0603_6.3V6K
0.1U_0402_16V4Z
DDR_A_D0 5 6 DDR_A_D5
DQ0 DQ5
C408
C411
DDR_A_D1 7 8
DQ1 VSS3
D
3 1 R319 1 1 9 10 DDR_A_DQS#0
Q46 1K_0402_5% DDR_A0_DM0 VSS4 DQS#0 DDR_A_DQS0
11 DM0 DQS0 12
BSS138_NL_SOT23-3 @ 13 14
2
DDR_A_D2 VSS5 VSS6 DDR_A_D6
G
D 15 16 D
2
2 2 DDR_A_D3 DQ2 DQ6 DDR_A_D7
6,12,14 RST_GATE 17 DQ3 DQ7 18
19 VSS7 VSS8 20
DDR_A_DQS#[0..7] 6 DQ8 DQ12
DQ9 DQ13
DDR_A_DQS[0..7] 6 25 VSS9 VSS10 26
DDR_A_DQS#1 27 28 DDR_A0_DM1
DDR_A_DQS1 DQS#1 DM1 DDR3_DRAMRST#
DDR_A_D[0..63] 6 29 DQS1 RESET# 30 DIMM_DRAMRST# 6,12
All VREF traces should DDR_A_D10
31 VSS11 VSS12 32
DDR_A_D14
DDR_A_MA[0..15] 6 33 DQ10 DQ14 34
have 10 mil trace width DDR_A_D11 35 36 DDR_A_D15
DQ11 DQ15
37 VSS13 VSS14 38
DDR_A_D17 DQ16 DQ20 DDR_A_D21
41 DQ17 DQ21 42
Layout Note: 43 VSS15 VSS16 44
Place near JDIMM1 DDR_A_DQS2 47
DQS#2 DM2
48
+1.5V DQS2 VSS17 DDR_A_D22
49 VSS18 DQ22 50
DDR_A_D19 DQ18 DQ23
53 DQ19 VSS19 54
55 56 DDR_A_D28
VSS20 DQ28
1U_0402_6.3V6K
C371
1U_0402_6.3V6K
C385
1U_0402_6.3V6K
C410
1U_0402_6.3V6K
C409
DDR_A_D25 DQ24 DQ29
1 1 1 1 59 DQ25 VSS21 60
61 62 DDR_A_DQS#3
DDR_A0_DM3 VSS22 DQS#3 DDR_A_DQS3
63 DM3 DQS3 64
65 VSS23 VSS24 66
2 2 2 2 DDR_A_D26 67 68 DDR_A_D30
69 DQ27 DQ31 70
71 VSS25 VSS26 72
6 DDRA_CKE0_DIMMA DDRA_CKE0_DIMMA 73 74 DDRA_CKE1_DIMMA DDRA_CKE1_DIMMA 6

+1.5V CKE0 CKE1
75 VDD1 VDD2 76
77 78 DDR_A_MA15
DDR_A_BS2 NC1 A15 DDR_A_MA14
6 DDR_A_BS2 79 BA2 A14 80
81 VDD3 VDD4 82
10U_0603_6.3V6M
C384
10U_0603_6.3V6M
C378
10U_0603_6.3V6M
C415
10U_0603_6.3V6M
C414
C DDR_A_MA12 83 84 DDR_A_MA11 C
DDR_A_MA9 A12/BC# A11 DDR_A_MA7
1 1 1 1 85 A9 A7 86
87 VDD5 VDD6 88
DDR_A_MA8 89 90 DDR_A_MA6
DDR_A_MA5 A8 A6 DDR_A_MA4
91 A5 A4 92
2 2 2 2 93 94
DDR_A_MA3 VDD7 VDD8 DDR_A_MA2
95 A3 A2 96
DDR_A_MA1 97 98 DDR_A_MA0
A1 A0
99 VDD9 VDD10 100
6 SA_CLK_DDR0 SA_CLK_DDR0 101 102 SA_CLK_DDR1 SA_CLK_DDR1 6
SA_CLK_DDR#0 CK0 CK1 SA_CLK_DDR#1
6 SA_CLK_DDR#0 103 CK0# CK1# 104 SA_CLK_DDR#1 6
105 106 +1.5V
DDR_A_MA10 VDD11 VDD12 DDR_A_BS1
107 A10/AP BA1 108 DDR_A_BS1 6
+1.5V DDR_A_BS0 109 110 DDR_A_RAS#
6 DDR_A_BS0 BA0 RAS# DDR_A_RAS# 6
111 VDD13 VDD14 112
1
R05 modify 6 DDR_A_WE# DDR_A_WE# 113 114 DDRA_CS0_DIMMA# DDRA_CS0_DIMMA# 6
DDR_A_CAS# WE# S0# SA_ODT0 R267
6 DDR_A_CAS# 115 CAS# ODT0 116 SA_ODT0 6
10U_0603_6.3V6M
C413
10U_0603_6.3V6M
C412
10U_0603_6.3V6M
1 117 118 1K_0402_5%

VDD15 VDD16
330U_D2_2V_Y
1 1 1 DDR_A_MA13 119 120 SA_ODT1 SA_ODT1 6

A13 ODT1
C383
C407
+ DDRA_CS1_DIMMA# 121 122

6 DDRA_CS1_DIMMA#
2
S1# NC2
123 VDD17 VDD18 124
@ @ 125 126 +VREF_CA
2 2 2 2 NCTEST VREF_CA
127 VSS27 VSS28 128
2.2U_0603_6.3V6K
DDR_A_D32 129 130 DDR_A_D36
DQ32 DQ36
1
C372
0.1U_0402_16V4Z
C373
DDR_A_D33 131 132 DDR_A_D37
DQ33 DQ37 R266
133 VSS29 VSS30 134 1 1
DDR_A_DQS#4 135 136 DDR_A0_DM4 1K_0402_5%
DDR_A_DQS4 DQS#4 DM4
137 DQS4 VSS31 138
139 140 DDR_A_D38
2
DDR_A_D34 VSS32 DQ38 DDR_A_D39 2 2
141 DQ34 DQ39 142
DDR_A_D35 143 144
DQ35 VSS33 DDR_A_D44
145 VSS34 DQ44 146
+0.75VS DDR_A_D40 147 148 DDR_A_D45
DDR_A_D41 DQ40 DQ45
149 DQ41 VSS35 150
151 152 DDR_A_DQS#5
DDR_A0_DM5 VSS36 DQS#5 DDR_A_DQS5
153 DM5 DQS5 154
1U_0402_6.3V6K
C393
1U_0402_6.3V6K
C395
1U_0402_6.3V6K
C394
1U_0402_6.3V6K
C388
155 VSS37 VSS38 156

B 1 1 1 1 DDR_A_D42 157 158 DDR_A_D46 B
159 DQ43 DQ47 160
161 VSS39 VSS40 162
DDR_A_D48 163 164 DDR_A_D52
2 2 2 2 DDR_A_D49 DQ48 DQ52 DDR_A_D53
165 DQ49 DQ53 166
167 VSS41 VSS42 168
DDR_A_DQS6 DQS#6 DM6
171 DQS6 VSS43 172
173 174 DDR_A_D54
DDR_A_D50 VSS44 DQ54 DDR_A_D55
175 DQ50 DQ55 176
DDR_A_D51 177 178
DQ51 VSS45 DDR_A_D60
Layout Note: 179 VSS46 DQ60 180
DDR_A_D56 181 182 DDR_A_D61
Place near JDIMM1.203,204 DDR_A_D57 183
DQ56 DQ61
184
DQ57 VSS47 DDR_A_DQS#7
185 VSS48 DQS#7 186
DDR_A0_DM7 187 188 DDR_A_DQS7
DM7 DQS7
189 VSS49 VSS50 190
DDR_A0_DM0 DDR_A_D58 191 192 DDR_A_D62
DDR_A0_DM1 DDR_A_D59 DQ58 DQ62 DDR_A_D63
193 DQ59 DQ63 194
DDR_A0_DM2 195 196
DDR_A0_DM3 VSS51 VSS52
197 SA0 EVENT# 198
DDR_A0_DM4 +3VS 199 200 D_CK_SDATA
VDDSPD SDA D_CK_SDATA 12,14
DDR_A0_DM5 201 202 D_CK_SCLK
SA1 SCL D_CK_SCLK 12,14
DDR_A0_DM6 +0.75VS 203 204 +0.75VS
DDR_A0_DM7 VTT1 VTT2
0.1U_0402_16V4Z
C404
2.2U_0603_6.3V6K
C416
10K_0402_5%
R301
205 G1 G2 206
1
2
10K_0402_5%
R302
R05 modify 1 1
FOX_AS0A626-U8SN-7F
CONN@
2 2
2
<Address(SA1,SA0): 00>
DIMM_1 Reserve H:8mm

A A

DDRIII DIMMA
Custom E
5 4 3 2 1
5 4 3 2 1
+1.5V
1
+1.5V +1.5V
R341 JDIMM2
1K_0402_5% +V_DDR_REFC 1 2
@ R346 VREF_DQ VSS1 DDR_B_D4
M3 support 3 VSS2 DQ4 4
2.2U_0603_6.3V6K
0.1U_0402_16V4Z
0_0402_5% DDR_B_D0 5 6 DDR_B_D5
2
DQ0 DQ5
C438
C437
7 SB_DIMM_VREFDQ 1 2 DDR_B_D1 7 8
DQ1 VSS3 DDR_B_DQS#0
1 1 9 VSS4 DQS#0 10
1
DDR_B0_DM0 11 12 DDR_B_DQS0
DM0 DQS0
13 VSS5 VSS6 14
D
3 1 R340 DDR_B_D2 15 16 DDR_B_D6
Q47 1K_0402_5% 2 2 DDR_B_D3 DQ2 DQ6 DDR_B_D7
17 DQ3 DQ7 18
BSS138_NL_SOT23-3 @ 19 20
2
DDR_B_D8 VSS7 VSS8 DDR_B_D12
G
21 22
2
DDR_B_D9 DQ8 DQ12 DDR_B_D13
6,11,14 RST_GATE 23 DQ9 DQ13 24
D 25 VSS9 VSS10 26 D
DDR_B_DQS#1 27 28 DDR_B0_DM1
DDR_B_DQS1 DQS#1 DM1 DDR3_DRAMRST#
29 DQS1 RESET# 30 DIMM_DRAMRST# 6,11
DDR_B_DQS#[0..7] 6 All VREF traces should DDR_B_D10
31 VSS11 VSS12 32
DDR_B_D14
33 DQ10 DQ14 34
DDR_B_DQS[0..7] 6
have 10 mil trace width DDR_B_D11 35 36 DDR_B_D15
DQ11 DQ15
37 VSS13 VSS14 38
DDR_B_D16 39 40 DDR_B_D20
DDR_B_D[0..63] 6 DQ16 DQ20
DQ17 DQ21
DDR_B_MA[0..15] 6 43 VSS15 VSS16 44
DDR_B_DQS2 DQS#2 DM2
47 DQS2 VSS17 48
49 50 DDR_B_D22
DDR_B_D18 VSS18 DQ22 DDR_B_D23
51 DQ18 DQ23 52
Layout Note: DDR_B_D19 53 54
DQ19 VSS19 DDR_B_D28
55 56
Place near JDIMM2 DDR_B_D24 57
VSS20 DQ28
58 DDR_B_D29
+1.5V DDR_B_D25 DQ24 DQ29
59 DQ25 VSS21 60
61 62 DDR_B_DQS#3
DDR_B0_DM3 VSS22 DQS#3 DDR_B_DQS3
63 DM3 DQS3 64
65 VSS23 VSS24 66
1U_0402_6.3V6K
C445
1U_0402_6.3V6K
C444
1U_0402_6.3V6K
C430
1U_0402_6.3V6K
C429
1 1 1 1 69 DQ27 DQ31 70
71 VSS25 VSS26 72
2 2 2 2
6 DDRB_CKE0_DIMMB DDRB_CKE0_DIMMB 73 74 DDRB_CKE1_DIMMB DDRB_CKE1_DIMMB 6
CKE0 CKE1
75 VDD1 VDD2 76
77 78 DDR_B_MA15
DDR_B_BS2 NC1 A15 DDR_B_MA14
6 DDR_B_BS2 79 BA2 A14 80
81 VDD3 VDD4 82
DDR_B_MA12 83 84 DDR_B_MA11
+1.5V DDR_B_MA9 A12/BC# A11 DDR_B_MA7
85 A9 A7 86
87 VDD5 VDD6 88
DDR_B_MA8 89 90 DDR_B_MA6
DDR_B_MA5 A8 A6 DDR_B_MA4
91 A5 A4 92
10U_0603_6.3V6M
C424
10U_0603_6.3V6M
C425
10U_0603_6.3V6M
C450
10U_0603_6.3V6M
C449
C 93 VDD7 VDD8 94 C
1 1 1 1 DDR_B_MA3 95 96 DDR_B_MA2
DDR_B_MA1 A3 A2 DDR_B_MA0
97 A1 A0 98
99 VDD9 VDD10 100
6 SB_CLK_DDR0 SB_CLK_DDR0 101 102 SB_CLK_DDR1 SB_CLK_DDR1 6
2 2 2 2 SB_CLK_DDR#0 CK0 CK1 SB_CLK_DDR#1
6 SB_CLK_DDR#0 103 CK0# CK1# 104 SB_CLK_DDR#1 6
105 106 +1.5V
DDR_B_MA10 VDD11 VDD12 DDR_B_BS1
107 A10/AP BA1 108 DDR_B_BS1 6
6 DDR_B_BS0 DDR_B_BS0 109 110 DDR_B_RAS# DDR_B_RAS# 6
BA0 RAS#
111 VDD13 VDD14 112
1
6 DDR_B_WE# DDR_B_WE# 113 114 DDRB_CS0_DIMMB# DDRB_CS0_DIMMB# 6
<BOM Structure> DDR_B_CAS# WE# S0# SB_ODT0 R351
6 DDR_B_CAS# 115 CAS# ODT0 116 SB_ODT0 6
117 118 1K_0402_5%
+1.5V DDR_B_MA13 VDD15 VDD16 SB_ODT1
119 A13 ODT1 120 SB_ODT1 6
6 DDRB_CS1_DIMMB# DDRB_CS1_DIMMB# 121 122
2
S1# NC2
123 VDD17 VDD18 124
125 126 +VREF_CC
NCTEST VREF_CA
10U_0603_6.3V6M
C448
10U_0603_6.3V6M
C447
10U_0603_6.3V6M
1 127 VSS27 VSS28 128

330U_D2_2V_Y
2.2U_0603_6.3V6K
1 1 1 DDR_B_D32 129 130 DDR_B_D36
DQ32 DQ36
1
C426
C359
C451
0.1U_0402_16V4Z
C446
+ DDR_B_D33 131 132 DDR_B_D37
DQ33 DQ37 R350
133 VSS29 VSS30 134 1 1
DDR_B_DQS#4 135 136 DDR_B0_DM4 1K_0402_5%
2 2 2 2 DDR_B_DQS4 DQS#4 DM4
137 DQS4 VSS31 138
139 140 DDR_B_D38
2
DDR_B_D34 VSS32 DQ38 DDR_B_D39 2 2
141 DQ34 DQ39 142
DDR_B_D35 143 144
@ DQ35 VSS33 DDR_B_D44
145 VSS34 DQ44 146
DDR_B_D40 147 148 DDR_B_D45
DDR_B_D41 DQ40 DQ45
149 DQ41 VSS35 150
151 152 DDR_B_DQS#5
153 DM5 DQS5 154
155 VSS37 VSS38 156
+0.75VS DDR_B_D42 157 158 DDR_B_D46
159 DQ43 DQ47 160
161 VSS39 VSS40 162
DDR_B_D48 163 164 DDR_B_D52
DQ48 DQ52
1U_0402_6.3V6K
C440
1U_0402_6.3V6K
C427
1U_0402_6.3V6K
C439
1U_0402_6.3V6K
C428
DDR_B_D49 165 166 DDR_B_D53

DQ49 DQ53
B 1 1 1 1 167 VSS41 VSS42 168 B
DDR_B_DQS6 DQS#6 DM6
171 DQS6 VSS43 172
173 174 DDR_B_D54
2 2 2 2 DDR_B_D50 VSS44 DQ54 DDR_B_D55
175 DQ50 DQ55 176
DDR_B_D51 177 178
DQ51 VSS45 DDR_B_D60
179 VSS46 DQ60 180
DDR_B_D56 181 182 DDR_B_D61
+3VS DDR_B_D57 DQ56 DQ61
183 DQ57 VSS47 184
185 186 DDR_B_DQS#7
187 DM7 DQS7 188
10K_0402_5%
R344
Layout Note: 189 VSS49 VSS50 190

2
DDR_B_D58 191 192 DDR_B_D62

Place near JDIMM2.203,204 DDR_B_D59 193
DQ58 DQ62
194 DDR_B_D63
DQ59 DQ63
195 VSS51 VSS52 196
197 SA0 EVENT# 198
+3VS 199 200 D_CK_SDATA
D_CK_SDATA 11,14
1
DDR_B0_DM0 VDDSPD SDA D_CK_SCLK

201 SA1 SCL 202 D_CK_SCLK 11,14
DDR_B0_DM1 +0.75VS 203 204 +0.75VS
DDR_B0_DM2 VTT1 VTT2
0.1U_0402_16V4Z
C435
2.2U_0603_6.3V6K
C436
DDR_B0_DM3 205 206

G1 G2
1
10K_0402_5%
R345
DDR_B0_DM4 1 1
DDR_B0_DM5 FOX_AS0A626-U4RN-7F
DDR_B0_DM6 CONN@
DDR_B0_DM7
2 2
2
R05 modify <Address(SA1,SA0): 10>
DIMM_2 Reserve H:4mm
A A

DDRIII DIMMB
Custom E
5 4 3 2 1
5 4 3 2 1
PCH_RTCX1
1 2 PCH_RTCX2
R568 10M_0402_5%
R05 modify
32.768KHZ_12.5PF_Q13MC14610002
1
4
Y3 +RTCBATT
OSC
OSC
18P_0402_50V8J
1 1
1
C686
NC
NC
C682 18P_0402_50V8J JBATT2
+
2
2 3 2
D D
+RTCVCC
R567 1 2 1M_0402_5% SM_INTRUDER#
-
R585 1 2 330K_0402_5% PCH_INTVRMEN CONN@ SUYIN_060003HA002G202ZL
2
INTVRMEN
HIntegrated VRM enable
* LIntegrated VRM disable
(INTVRMEN should always be pull high.)
RTCRST close RAM door
+3VS
R05 modify
R294 1 @ 2 1K_0402_5% PCH_SPKR U33A
1
HIGH= Enable ( No Reboot ) +RTCVCC J1 PCH_RTCX1 A20 C38 LPC_AD0
1 RTCX1 FWH0 / LAD0 LPC_AD0 40
LOW= Disable (Default) 0_0603_5% A38 LPC_AD1
*
LPC
FWH1 / LAD1 LPC_AD1 40
C360 @ PCH_RTCX2 C20 B37 LPC_AD2
RTCX2 FWH2 / LAD2 LPC_AD2 40
1U_0603_10V6K C37 LPC_AD3
LPC_AD3 40
2
+3VALW_PCH R556 2 PCH_RTCRST# FWH3 / LAD3
1 2 D20 RTCRST#
1K_0402_5% R248 20K_0402_1% D36 LPC_FRAME# +3VS
FWH4 / LFRAME# LPC_FRAME# 40
2 @ 1 HDA_SDOUT_PCH 1 2 PCH_SRTCRST# G22
R557 R243 20K_0402_1% SRTCRST# SERIRQ R275
1 E36 2 1 10K_0402_5%
RTC
LDRQ0#
1
0_0402_5% SM_INTRUDER# K22 K36
C
C356 J2 INTRUDER# LDRQ1# / GPIO23 PCH_SATALED# R640 C
40 HDA_SDO 2 1 2 1 10K_0402_5%
1U_0603_10V6K 0_0603_5% PCH_INTVRMEN C17 V5 SERIRQ SERIRQ 40
2 INTVRMEN SERIRQ
HDA_SDO as Capella ME override (GPIO33) 2 @
PCH_GPIO19 R624 1 2 4.7K_0402_5%
ME debug mode,this signal has a weak internal PD SATA0RXN AM3 SATA_PRX_DTX_N0 34
Low = Disabled (Default) HDA_BITCLK_PCH N34 AM1 R02 modify
* HDA_BCLK SATA0RXP SATA_PRX_DTX_P0 34
SATA 6G
High = Enabled [Flash Descriptor Security Overide] SATA0TXN AP7 SATA_PTX_DRX_N0 34 HDD
SRTCRST close RAM door HDA_SYNC_PCH L34 AP5
HDA_SYNC SATA0TXP SATA_PTX_DRX_P0 34
+3VALW_PCH PCH_SPKR T10 AM10 SATA_PRX_DTX_N1
42 PCH_SPKR SPKR SATA1RXN SATA_PRX_DTX_N1 34
SATA1RXP AM8 SATA_PRX_DTX_P1 SATA_PRX_DTX_P1 34
R539 2 1 1K_0402_5% HDA_SYNC_PCH HDA_RST_PCH# K34 AP11 SATA_PTX_DRX_N1 ODD R20 modify
HDA_RST# SATA1TXN SATA_PTX_DRX_N1 34
SATA1TXP AP10 SATA_PTX_DRX_P1 SATA_PTX_DRX_P1 34
This signal has a weak internal pull-down
42 HDA_SDIN0 HDA_SDIN0 E34 AD7
HDA_SDIN0 SATA2RXN
SATA2RXP AD5
On Die PLL VR Select is supplied by
1.5V when smapled high
G34 HDA_SDIN1 SATA2TXN AH5
AH4
change to port1 cause by intel
* 1.8V when sampled low Prevent back drive issue. C34
SATA2TXP
SATA II issue (20110201)
IHDA
HDA_SDIN2
SATA3RXN AB8
Needs to be pulled High for Huron River platfrom A34 AB10
HDA_SDIN3 SATA3RXP
SATA3TXN AF3
+3VS AF1
R544 HDA_SDOUT_PCH SATA3TXP
A36
SATA
HDA_SDO
2
G
33_0402_5% Q36 Y7
SATA4RXN
42 HDA_BITCLK_AUDIO 1 2 HDA_BITCLK_PCH BSS138_NL_SOT23-3
SATA4RXP Y5
R542 3 1HDA_SYNC_PCH C36 HDA_DOCK_EN# / GPIO33 SATA4TXN AD3
33_0402_5%
S
SATA4TXP AD1
42 HDA_SYNC_AUDIO 1 2 HDA_SYNC_PCH_R N32 HDA_DOCK_RST# / GPIO13
R545 Y3 +3VS
33_0402_5% R674 SATA5RXN
1 2 SATA5RXP Y1
1
42 HDA_RST_AUDIO# 1 2 HDA_RST_PCH# @ 51_0402_5%
SATA5TXN AB3
B R555 R540 2 1 PCH_JTAG_TCK J3 AB1 R259 B
33_0402_5% 0_0402_5% JTAG_TCK SATA5TXP
10K_0402_5%
1 2 HDA_SDOUT_PCH PCH_JTAG_TMS H7 Y11 R260 +1.05VS_PCH
JTAG
42 HDA_SDOUT_AUDIO JTAG_TMS SATAICOMPO
R03 modify 37.4_0402_1% SGEN#
12
1
PCH_JTAG_TDI K5 Y10 SATA_COMP 1 2

R792 JTAG_TDI SATAICOMPI R258
1M_0402_5% PCH_JTAG_TDO H1 10K_0402_5%
+3VALW_PCH +3VALW_PCH +3VALW_PCH JTAG_TDO R241 +1.05VS_PCH
SATA3RCOMPO AB12 @
49.9_0402_1%
2
2
AB13 SATA3_COMP 1 2
SATA3COMPI
1
R666 R637 R646

200_0402_1% 200_0402_1% 200_0402_1% PCH_SPI_CLK_1 1 2 PCH_SPI_CLK T3 AH1 RBIAS_SATA3 1 2
GPIO21
R681 0_0402_5% SPI_CLK SATA3RBIAS R625 750_0402_1% SGEN#
PCH_SPI_CS0#_1 1 2 PCH_SPI_CS0# Y14
2
PCH_JTAG_TDO PCH_JTAG_TMS PCH_JTAG_TDI R651 0_0402_5% SPI_CS0#

T1 <BOM Structure> Switchable GPU 0
SPI
SPI_CS1#
1
PCH_SATALED#
R671 R636 R648 SATALED# P3 PCH_SATALED# 41 * Non-Switchable 1
100_0402_1% 100_0402_1% 100_0402_1% PCH_SPI_MOSI_1 1 2 PCH_SPI_MOSI V4 V14 SGEN#
R684 0_0402_5% SPI_MOSI SATA0GP / GPIO21
PCH_SPI_MISO_1 1 2 PCH_SPI_MISO U3 P1 PCH_GPIO19
2
R652 0_0402_5% SPI_MISO SATA1GP / GPIO19
COUGARPOINT_FCBGA989~D
+RTCBATT +RTCBATT +3VS Boot BIOS Strap

U36
+CHGRTC PCH_SPI_CS0#_1 1 8
Boot BIOS GPIO51 GPIO19
CS# VCC
2
R654 1 2 3.3K_0402_5% SPI_WP1# 3 6 PCH_SPI_CLK_1

+3VS WP# SCLK LPC 0 0
1
R375 R667 1 2 3.3K_0402_5% SPI_HOLD1# 7 5 PCH_SPI_MOSI_1

JBATT1 HOLD# SI PCH_SPI_MISO_1
1K_0402_5% 4 2 Reserved 0 1
+
GND SO
A A
EN25F32-100HIP SOP 8P
- 1 0
3 1
+RTCBATT_R SA00003IN00
2
D13 20mil SPI ROM FOR ME (4MB)

Footprint 200mil
* SPI 1 1
+RTCVCC
20mil Security Classification Compal Secret Data Compal Electronics, Inc.
1
CHN202UPT_SC70-3 2011/02/08 2012/02/08

-
1 Issued Date Title

C471 CONN@ SUYIN_060003HA002G202ZL Deciphered Date
PCH (1/8) SATA,HDA,SPI, LPC, XDP
2
0.1U_0402_16V4Z AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
2 Custom E
20100416 add
5 4 3 2 1
5 4 3 2 1
U33B +3VALW_PCH
35 PCIE_PRX_DTX_N1 PCIE_PRX_DTX_N1 BG34 EC_LID_OUT# R240 1 2 10K_0402_5%

PCIE_PRX_DTX_P1 PERN1 EC_LID_OUT#
35 PCIE_PRX_DTX_P1 BJ34 PERP1 SMBALERT# / GPIO11 E12 EC_LID_OUT# 40
PCIE LAN C672 1 2 0.1U_0402_10V7K PCIE_PTX_DRX_N1 AV32 RST_GATE R608 2 1 1K_0402_5%
35 PCIE_PTX_C_DRX_N1 PETN1
C669 1 2 0.1U_0402_10V7K PCIE_PTX_DRX_P1 AU32 H14 PCH_SMBCLK
35 PCIE_PTX_C_DRX_P1 PETP1 SMBCLK PCH_SMBCLK 38
38 PCIE_PRX_DTX_N2 PCIE_PRX_DTX_N2 BE34 C9 PCH_SMBDATA PCH_SMBDATA 38 PCH_SMBCLK R677 1 2 2.2K_0402_5%

PCIE_PRX_DTX_P2 PERN2 SMBDATA
38 PCIE_PRX_DTX_P2 BF34 PERP2
Mini Card 1 C675 1 2 0.1U_0402_10V7K PCIE_PTX_DRX_N2 BB32 PCH_SMBDATA R662 1 2 2.2K_0402_5%
38 PCIE_PTX_C_DRX_N2 PETN2
C677 1 2 0.1U_0402_10V7K PCIE_PTX_DRX_P2 AY32
SMBUS
38 PCIE_PTX_C_DRX_P2 PETP2
A12 RST_GATE
SML0ALERT# / GPIO60 RST_GATE 6,11,12
38 PCIE_PRX_DTX_N3 PCIE_PRX_DTX_N3 BG36 PCH_GPIO74 R647 1 2 10K_0402_5%
PCIE_PRX_DTX_P3 PERN3
38 PCIE_PRX_DTX_P3 BJ36 PERP3 SML0CLK C8
D C663 PCIE_PTX_DRX_N3 D
Mini Card 2 38 PCIE_PTX_C_DRX_N3 1 2 0.1U_0402_10V7K AV34 PETN3
C665 1 2 0.1U_0402_10V7K PCIE_PTX_DRX_P3 AU34 G12 PCH_SML1CLK R642 1 2 2.2K_0402_5%
38 PCIE_PTX_C_DRX_P3 PETP3 SML0DATA
39 PCIE_PRX_DTX_N4 PCIE_PRX_DTX_N4 BF36 PCH_SML1DATA R643 1 2 2.2K_0402_5%

PCIE_PRX_DTX_P4 PERN4
39 PCIE_PRX_DTX_P4 BE36 PERP4
USB3.0 Right C661 1 2 0.1U_0402_10V7K PCIE_PTX_DRX_N4 AY34 C13 PCH_GPIO74
39 PCIE_PTX_C_DRX_N4 PETN4 SML1ALERT# / PCHHOT# / GPIO74
C660 1 2 0.1U_0402_10V7K PCIE_PTX_DRX_P4 BB34 PCH_GPIO47 R280 1 2 10K_0402_5%
39 PCIE_PTX_C_DRX_P4 PETP4
E14 PCH_SML1CLK
PCI-E*
PCIE_PRX_DTX_N5 SML1CLK / GPIO58
46 PCIE_PRX_DTX_N5 BG37 PERN5
46 PCIE_PRX_DTX_P5 PCIE_PRX_DTX_P5 BH37 M16 PCH_SML1DATA
C813 PCIE_PTX_DRX_N5 PERP5 SML1DATA / GPIO75
USB3.0 Left 46 PCIE_PTX_C_DRX_N5 1 2 0.1U_0402_10V7K AY36 PETN5
C814 1 2 0.1U_0402_10V7K PCIE_PTX_DRX_P5 BB36 For DDR
46 PCIE_PTX_C_DRX_P5 PETP5 +3VS
BJ38 PERN6
+3VS R05 modify BG38 R669
Controller
PERP6 4.7K_0402_5%
AU36 PETN6 CL_CLK1 M7
2
R638 2 1 10K_0402_5% MINI1_CLKREQ# AV36 1 2 +3VS
PETP6
Link
R273 2 1 10K_0402_5% USB30_CLKREQ# BG40 T11 PCH_SMBDATA 6 1 D_CK_SDATA D_CK_SDATA 11,12
PERN7 CL_DATA1
BJ40 PERP7
+3VALW_PCH AY40 Q40A
PETN7 DMN66D0LDW-7_SOT363-6 R670
R05 modify BB40 PETP7 CL_RST1# P10
R618 2 1 10K_0402_5% PCH_GPIO73 4.7K_0402_5%
5
BE38 PERN8 1 2 +3VS
R630 2 1 10K_0402_5% LAN_CLKREQ# BC38 PERP8 PCH_SMBCLK D_CK_SCLK
AW38 PETN8 3 4 D_CK_SCLK 11,12
R653 2 1 10K_0402_5% MINI2_CLKREQ# AY38 PETP8 Q40B
R238 2 1 10K_0402_5% USB30_CLKREQ#_L M10 PCH_GPIO47 DMN66D0LDW-7_SOT363-6
PEG_A_CLKRQ# / GPIO47
Y40 CLKOUT_PCIE0N
R293 2 1 10K_0402_5% PCH_GPIO45 Y39 CLKOUT_PCIE0P
CLKOUT_PEG_A_N AB37
CLOCKS
C R295 PCH_GPIO46 PCH_GPIO73 C
2 1 10K_0402_5% J2 PCIECLKRQ0# / GPIO73 CLKOUT_PEG_A_P AB38
+3VS Pull up at EC side.
38 CLK_PCIE_MINI1#
CLK_PCIE_MINI1# AB49 AV22 CLK_CPU_DMI#
CLK_CPU_DMI# 5
For VGA,EC
CLK_PCIE_MINI1 CLKOUT_PCIE1N CLKOUT_DMI_N CLK_CPU_DMI
38 CLK_PCIE_MINI1 AB47 CLKOUT_PCIE1P CLKOUT_DMI_P AU22 CLK_CPU_DMI 5
Mini Card 1
2
38 MINI1_CLKREQ# MINI1_CLKREQ# M1 PCIECLKRQ1# / GPIO18
CLKOUT_DP_N / CLKOUT_BCLK1_N AM12
AM13 PCH_SML1DATA 6 1 EC_SMB_DA2 EC_SMB_DA2 22,40
CLK_PCIE_USB30# AA48 CLKOUT_DP_P / CLKOUT_BCLK1_P
39 CLK_PCIE_USB30# CLKOUT_PCIE2N
USB3.0 CLK_PCIE_USB30 AA47 Q38A
39 CLK_PCIE_USB30 CLKOUT_PCIE2P
BF18 CLK_BUF_CPU_DMI# R2331 2 10K_0402_5% DMN66D0LDW-7_SOT363-6
CLKIN_DMI_N
5
39 USB30_CLKREQ# USB30_CLKREQ# V10 BE18 CLK_BUF_CPU_DMI R2341 2 10K_0402_5%
PCIECLKRQ2# / GPIO20 CLKIN_DMI_P
PCH_SML1CLK 3 4 EC_SMB_CK2 EC_SMB_CK2 22,40
CLK_PCIE_LAN# Y37 BJ30 CLKIN_GND1# R5631 2 10K_0402_5%
35 CLK_PCIE_LAN# CLKOUT_PCIE3N CLKIN_DMI2_N
PCIE LAN CLK_PCIE_LAN Y36 BG30 CLKIN_GND1 R5611 2 10K_0402_5% Q38B
35 CLK_PCIE_LAN CLKOUT_PCIE3P CLKIN_DMI2_P DMN66D0LDW-7_SOT363-6
35 LAN_CLKREQ# LAN_CLKREQ# A8 PCIECLKRQ3# / GPIO25 CLK_BUF_DREF_96M# R2201
CLKIN_DOT_96N G24 2 10K_0402_5%
E24 CLK_BUF_DREF_96M R2211 2 10K_0402_5% Pull down 10K ohm
CLKIN_DOT_96P
38 CLK_PCIE_MINI2# Y43 CLKOUT_PCIE4N for using internal Clock
Mini Card 2 38 CLK_PCIE_MINI2 Y45 CLKOUT_PCIE4P
AK7 CLK_BUF_PCIE_SATA# R2641 2 10K_0402_5%
MINI2_CLKREQ# CLKIN_SATA_N / CKSSCD_N CLK_BUF_PCIE_SATA R2651
38 MINI2_CLKREQ# L12 PCIECLKRQ4# / GPIO26 CLKIN_SATA_P / CKSSCD_P AK5 2 10K_0402_5%
CLK_PCIE_USB30_L# V45 K45 CLK_BUF_ICH_14M R1751 2 10K_0402_5%

46 CLK_PCIE_USB30_L# CLKOUT_PCIE5N REFCLK14IN
USB3.0 Left CLK_PCIE_USB30_L V46
46 CLK_PCIE_USB30_L CLKOUT_PCIE5P
46 USB30_CLKREQ#_L USB30_CLKREQ#_L L14 H45 CLK_PCI_LPBACK

PCIECLKRQ5# / GPIO44 CLKIN_PCILOOPBACK CLK_PCI_LPBACK 17
B B
CLK_PEG_VGA# AB42 V47 XTAL25_IN
22 CLK_PEG_VGA# CLKOUT_PEG_B_N XTAL25_IN
CLK_PEG_VGA AB40 V49 XTAL25_OUT
22 CLK_PEG_VGA CLKOUT_PEG_B_P XTAL25_OUT
PEG_CLKREQ#_R E6 R526 +1.05VS_VTT
PEG_B_CLKRQ# / GPIO56 90.9_0402_1%
Y47 XCLK_RCOMP 1 2
XCLK_RCOMP
V40 CLKOUT_PCIE6N
V42 XTAL25_IN
CLKOUT_PCIE6P
PCH_GPIO45 T13 XTAL25_OUT 1 2
PCIECLKRQ6# / GPIO45 R527 1M_0402_5%
V38 K43 CLK_FLEX0 @ PAD R04 modify
CLKOUT_PCIE7N CLKOUTFLEX0 / GPIO64 T9
FLEX CLOCKS
V37 Y2
CLKOUT_PCIE7P CLK_FLEX1 @
CLKOUTFLEX1 / GPIO65 F47 T73 PAD 2 1
PCH_GPIO46 K12 R05 modify
PCIECLKRQ7# / GPIO46
CLKOUTFLEX2 / GPIO66 H47 CLK_FLEX2 @
T29 PAD 1 25MHZ_20PF_7A25000012 1
AK14 CLKOUT_BCLK0_N / CLKOUT_PCIE8N
AK13 K49 DGPU_PRSNT# C630 C631
CLKOUT_BCLK0_P / CLKOUT_PCIE8P CLKOUTFLEX3 / GPIO67 +3VS 27P_0402_50V8J 27P_0402_50V8J
2 2
1
R159
10K_0402_5%
+3VALW_PCH DGPU_PWR_EN 17,45 UMAO@
2
DGPU_PRSNT#
1
1
2
R632
R663 DIS@
GPIO67 R160 R530 C642
10K_0402_5% DGPU_PRSNT# 10K_0402_5% 33_0402_5% 22P_0402_50V8J
A 10K_0402_5% DIS@ CLK_PCI_LPBACK A
2 1 1 2
2
@
DIS,OPTIMUS 0
2
1
@
2
Q39 Reserve for EMI please close to UH4

G
2N7002H_SOT23-3 R631 Pull high @ VGA side

UMA 1
PEG_CLKREQ#_R 1 3 1 2 PEG_CLKREQ# 22
0_0402_5%
D
S
1
DIS@
R668
@
R644
@
for safe Issued Date 2011/02/08 Deciphered Date 2012/02/08 Title
2.2K_0402_5% 2.2K_0402_5%
PCH (2/8) PCIE, SMBUS, CLK
2
5 4 3 2 1
5 4 3 2 1
U33C
+3VALW_PCH DMI_CTX_PRX_N0 BC24 BJ14 FDI_CTX_PRX_N0
4 DMI_CTX_PRX_N0 DMI0RXN FDI_RXN0 FDI_CTX_PRX_N0 4
4 DMI_CTX_PRX_N1 DMI_CTX_PRX_N1 BE20 AY14 FDI_CTX_PRX_N1 FDI_CTX_PRX_N1 4
DMI_CTX_PRX_N2 DMI1RXN FDI_RXN1 FDI_CTX_PRX_N2
4 DMI_CTX_PRX_N2 BG18 DMI2RXN FDI_RXN2 BE14 FDI_CTX_PRX_N2 4
4 DMI_CTX_PRX_N3 DMI_CTX_PRX_N3 BG20 BH13 FDI_CTX_PRX_N3 FDI_CTX_PRX_N3 4
R607 SUS_PWR_DN_ACK DMI3RXN FDI_RXN3 FDI_CTX_PRX_N4
2 1 10K_0402_5% FDI_RXN4 BC12 FDI_CTX_PRX_N4 4
4 DMI_CTX_PRX_P0 DMI_CTX_PRX_P0 BE24 BJ12 FDI_CTX_PRX_N5 FDI_CTX_PRX_N5 4
R218 DMI0RXP FDI_RXN5
2 1 200K_0402_5% PCH_ACIN 4 DMI_CTX_PRX_P1 DMI_CTX_PRX_P1 BC20 DMI1RXP FDI_RXN6 BG10 FDI_CTX_PRX_N6 FDI_CTX_PRX_N6 4
4 DMI_CTX_PRX_P2 DMI_CTX_PRX_P2 BJ18 BG9 FDI_CTX_PRX_N7 FDI_CTX_PRX_N7 4
R247 DMI2RXP FDI_RXN7
2 1 10K_0402_5% PCH_GPIO72 4 DMI_CTX_PRX_P3 DMI_CTX_PRX_P3 BJ20 DMI3RXP
BG14 FDI_CTX_PRX_P0 FDI_CTX_PRX_P0 4
R610 FDI_RXP0
2 1 10K_0402_5% RI#
4 DMI_CRX_PTX_N0
DMI_CRX_PTX_N0 AW24 DMI0TXN FDI_RXP1 BB14 FDI_CTX_PRX_P1 FDI_CTX_PRX_P1 4
+3VS DMI_CRX_PTX_N1 AW20 BF14 FDI_CTX_PRX_P2
D 4 DMI_CRX_PTX_N1 DMI1TXN FDI_RXP2 FDI_CTX_PRX_P2 4 D
DMI_CRX_PTX_N2 BB18 BG13 FDI_CTX_PRX_P3 FDI_CTX_PRX_P3 4
4 DMI_CRX_PTX_N2 DMI2TXN FDI_RXP3
R597 2 1 200_0402_1% PM_DRAM_PWRGD DMI_CRX_PTX_N3 AV18 BE12 FDI_CTX_PRX_P4
DMI
FDI
4 DMI_CRX_PTX_N3 DMI3TXN FDI_RXP4 FDI_CTX_PRX_P4 4
BG12 FDI_CTX_PRX_P5 FDI_CTX_PRX_P5 4
DMI_CRX_PTX_P0 FDI_RXP5 FDI_CTX_PRX_P6
4 DMI_CRX_PTX_P0 AY24 DMI0TXP FDI_RXP6 BJ10 FDI_CTX_PRX_P6 4
R559 2 1 10K_0402_5% PCH_RSMRST# DMI_CRX_PTX_P1 AY20 BH9 FDI_CTX_PRX_P7 FDI_CTX_PRX_P7 4
4 DMI_CRX_PTX_P1 DMI1TXP FDI_RXP7 +RTCVCC
DMI_CRX_PTX_P2 AY18
4 DMI_CRX_PTX_P2 DMI2TXP
DMI_CRX_PTX_P3 AU18
4 DMI_CRX_PTX_P3 DMI3TXP
AW16 FDI_INT
FDI_INT FDI_INT 4
DSWODVREN R577 2 1 330K_0402_5%
+1.05VS_PCH BJ24 AV12 FDI_FSYNC0
DMI_ZCOMP FDI_FSYNC0 FDI_FSYNC0 4
R581 2 1 330K_0402_5%
1 2 DMI_IRCOMP BG25 BC10 FDI_FSYNC1 @
DMI_IRCOMP FDI_FSYNC1 FDI_FSYNC1 4
R223 49.9_0402_1% DSWODVREN - On Die DSW VR Enable
1 2 RBIAS_CPY BH21 AV14 FDI_LSYNC0 HEnable
R578 750_0402_1% DMI2RBIAS FDI_LSYNC0 FDI_LSYNC0 4 * LDisable
4mil width and place BB10 FDI_LSYNC1
FDI_LSYNC1 FDI_LSYNC1 4
within 500mil of the PCH
A18 DSWODVREN
DSWVRMEN
not support Deep S4,S5 mux
System Power Management

with SUS_PWR_DN_ACK not support Deep S4,S5 DPWROK mux with PWROK
SUS_PWR_DN_ACK 1 2 SUSACK#_R C12 E22 PCH_RSMRST# check list1.0 P.42
R599 0_0402_5% SUSACK# DPWROK
5 XDP_DBRESET# 1 2 XDP_DBRESET#_R K3 SYS_RESET# WAKE# B9 PCH_PCIE_WAKE# PCH_PCIE_WAKE# 35,38,39,46

R678 0_0402_5%
R05 modify
SYS_PWROK P12 N3 PCH_GPIO32 +3VALW_PCH
SYS_PWROK CLKRUN# / GPIO32
C not support AMT APWROK can mux C
with PWROK (check list1.0 P.40) PCH_PCIE_WAKE# R613 1 2 10K_0402_5%
PCH_PWROK 1 2 PCH_PWROK_R L22 G8 SUS_STAT# T22 PAD
R635 0_0402_5% PWROK SUS_STAT# / GPIO61 PCH_GPIO29 R235 1 2 10K_0402_5%
@
L10 N14 SUSCLK +3VS
APWROK SUSCLK / GPIO62 SUSCLK 40
T23 PAD PCH_GPIO32 R622 1 2 10K_0402_5%
PM_DRAM_PWRGD B13 D10 PM_SLP_S5#
5 PM_DRAM_PWRGD DRAMPWROK SLP_S5# / GPIO63 PM_SLP_S5# 40
@
R05 modify T21 PAD
40 PCH_RSMRST# PCH_RSMRST# C21 H4 PM_SLP_S4#
RSMRST# SLP_S4# PM_SLP_S4# 40
@
T20 PAD
SUS_PWR_DN_ACK K16 F4 PM_SLP_S3# Can be left NC
40 SUS_PWR_DN_ACK SUSWARN# / SUS_PWR_DN_ACK / GPIO30 SLP_S3# PM_SLP_S3# 40
@ when IAMT is not
support on the
40 PBTN_OUT# PBTN_OUT# E20 G10 PAD T47
PWRBTN# SLP_A# @
platfrom
22,40,44,45,48 ACIN 1 2 PCH_ACIN H20 G16 not support

D9 CH751H-40PT_SOD323-2 ACPRESENT / GPIO31 SLP_SUS#
Deep S4,S5 can NC
T16 PAD PCH EDS1.2 P.74
PCH_GPIO72 E10 AP14 H_PM_SYNC
BATLOW# / GPIO72 PMSYNCH H_PM_SYNC 5
@
RI# A10 K14 PCH_GPIO29
RI# SLP_LAN# / GPIO29
Ring Indicator CRB1.0 PH 10K +3VALW
B B
tell PCH all power ok +3VS

but cpu core
ALL power OK
5
U35
2 B
P
40 PCH_PWROK
4 SYS_PWROK
Y SYS_PWROK 5
40,55 VGATE 1 A
G
1
MC74VHC1G08DFT2G_SC70-5
3
R645 R629
10K_0402_5% 10K_0402_5%
2
A A

PCH (3/8) DMI,FDI,PM,
Custom E
5 4 3 2 1
5 4 3 2 1
Pull high at LVDS conn side.

U33D
ENBKL R532 2 1 0_0402_5% IGPU_BKLT_EN IGPU_BKLT_EN J47 AP43
22,40 ENBKL L_BKLTEN SDVO_TVCLKINN
31 PCH_ENVDD M45 L_VDD_EN SDVO_TVCLKINP AP45
UMA@
31 DPST_PWM P45 L_BKLTCTL SDVO_STALLN AM42
SDVO_STALLP AM40
31 PCH_LCD_CLK T40 L_DDC_CLK
31 PCH_LCD_DATA K47 L_DDC_DATA SDVO_INTN AP39
1 1
0.01U_0402_16V7K CTRL_CLK SDVO_INTP AP40 SDVO_CTRLDATA strap pull high
T45 L_CTRL_CLK
C193 C191 CTRL_DATA P39 at level shift page
0.01U_0402_16V7K 2.37K_0402_1% L_CTRL_DATA
D 2 @ 2 @ R189 LVDS_IBG SDVO_SCLK D
2 1 AF37 LVD_IBG SDVO_CTRLCLK P38 SDVO_SCLK 33
UMA@ AF36 M39 SDVO_SDATA
LVD_VBG SDVO_CTRLDATA SDVO_SDATA 33
For RF request 0_0402_5% LVD_VREF AE48
R177 LVD_VREFH
2 1 AE47 LVD_VREFL DDPB_AUXN AT49
UMA@ AT47
+3VS DDPB_AUXP
DDPB_HPD AT40 PCH_DPB_HPD PCH_DPB_HPD 33
PCH_TXCLK- AK39
LVDS
31 PCH_TXCLK- LVDSA_CLK#
R174 1 UMA@ 2 2.2K_0402_5% CTRL_CLK PCH_TXCLK+ AK40 AV42 PCH_DPB_N0 PCH_DPB_N0 33
31 PCH_TXCLK+ LVDSA_CLK DDPB_0N
AV40 PCH_DPB_P0 PCH_DPB_P0 33 HDMI D2
R158 CTRL_DATA PCH_TXOUT0- DDPB_0P PCH_DPB_N1
1 UMA@ 2 2.2K_0402_5% 31 PCH_TXOUT0- AN48 LVDSA_DATA#0 DDPB_1N AV45 PCH_DPB_N1 33
PCH_TXOUT1- PCH_DPB_P1
Digital Display Interface

31 PCH_TXOUT1- AM47 LVDSA_DATA#1 DDPB_1P AV46 PCH_DPB_P1 33 HDMI D1
PCH_TXOUT2- AK47 AU48 PCH_DPB_N2 PCH_DPB_N2 33
31 PCH_TXOUT2- LVDSA_DATA#2 DDPB_2N
R156 1 UMA@ 2 2.2K_0402_5% PCH_LCD_CLK AJ48 AU47 PCH_DPB_P2 PCH_DPB_P2 33 HDMI D0
LVDSA_DATA#3 DDPB_2P PCH_DPB_N3
DDPB_3N AV47 PCH_DPB_N3 33
R157 1 UMA@ 2 2.2K_0402_5% PCH_LCD_DATA PCH_TXOUT0+ AN47 AV49 PCH_DPB_P3 PCH_DPB_P3 33 HDMI CLK
31 PCH_TXOUT0+ LVDSA_DATA0 DDPB_3P
PCH_TXOUT1+ AM49
31 PCH_TXOUT1+ LVDSA_DATA1
PCH_TXOUT2+ AK49
31 PCH_TXOUT2+ LVDSA_DATA2
AJ47 LVDSA_DATA3 DDPC_CTRLCLK P46
DDPC_CTRLDATA P42
AF40 LVDSB_CLK#
AF39 LVDSB_CLK DDPC_AUXN AP47
DDPC_AUXP AP49
AH45 LVDSB_DATA#0 DDPC_HPD AT38
AH47 LVDSB_DATA#1
+3VS AF49 AY47
LVDSB_DATA#2 DDPC_0N
AF45 LVDSB_DATA#3 DDPC_0P AY49
R521 1 UMA@ 2 2.2K_0402_5% PCH_CRT_CLK AY43
DDPC_1N
AH43 LVDSB_DATA0 DDPC_1P AY45
R522 1 UMA@ 2 2.2K_0402_5% PCH_CRT_DATA AH49 BA47
LVDSB_DATA1 DDPC_2N
AF47 LVDSB_DATA2 DDPC_2P BA48
C C
AF43 LVDSB_DATA3 DDPC_3N BB47
DDPC_3P BB49
R534 1 UMA@ 2 150_0402_1% PCH_CRT_B
R533 1 UMA@ 2 150_0402_1% PCH_CRT_G PCH_CRT_B N48 M43

32 PCH_CRT_B CRT_BLUE DDPD_CTRLCLK
PCH_CRT_G P49 M36
32 PCH_CRT_G CRT_GREEN DDPD_CTRLDATA
R535 1 UMA@ 2 150_0402_1% PCH_CRT_R PCH_CRT_R T49
32 PCH_CRT_R CRT_RED
AT45
CRT
PCH_CRT_CLK DDPD_AUXN
32 PCH_CRT_CLK T39 CRT_DDC_CLK DDPD_AUXP AT43
PCH_CRT_DATA M40 BH41
32 PCH_CRT_DATA CRT_DDC_DATA DDPD_HPD
DDPD_0N BB43
32 PCH_CRT_HSYNC M47 CRT_HSYNC DDPD_0P BB45
32 PCH_CRT_VSYNC M49 CRT_VSYNC DDPD_1N BF44
DDPD_1P BE44
DDPD_2N BF42
CRT_IREF T43 BE42
DAC_IREF DDPD_2P
T42 CRT_IRTN DDPD_3N BJ42
DDPD_3P BG42
1
R178
1K_0402_0.5%
2
B B
A A

PCH (4/9) LVDS,CRT,DP,HDMI
5 4 3 2 1
5 4 3 2 1
U33E
+3VS AY7
NV_CE#0
NV_CE#1 AV7
BG26 TP1 NV_CE#2 AU3
R173 1 2 10K_0402_5% PCI_PIRQA# BJ26 BG4
R180 10K_0402_5% PCI_PIRQD# TP2 NV_CE#3
1 2 BH25 TP3
R181 1 2 10K_0402_5% PCI_PIRQC# BJ16 AT10
R183 10K_0402_5% PCI_PIRQB# TP4 NV_DQS0
1 2 BG16 TP5 NV_DQS1 BC8
AH38 TP6
AH37 TP7 NV_DQ0 / NV_IO0 AU2
R03 modify AK43 TP8 NV_DQ1 / NV_IO1 AT4
D D
AK45 TP9 NV_DQ2 / NV_IO2 AT3
R152 1 2 10K_0402_5% PCH_GPIO55 C18 AT1
R153 10K_0402_5% PCH_GPIO51 TP10 NV_DQ3 / NV_IO3
1 2 N30 TP11 NV_DQ4 / NV_IO4 AY3
R161 1 2 10K_0402_5% PCH_GPIO5 H3 AT5
R162 10K_0402_5% PCH_GPIO52 TP12 NV_DQ5 / NV_IO5
1 2 AH12 AV3
NVRAM
TP13 NV_DQ6 / NV_IO6
AM4 TP14 NV_DQ7 / NV_IO7 AV1
AM5 TP15 NV_DQ8 / NV_IO8 BB1
Y13 TP16 NV_DQ9 / NV_IO9 BA3
K24 TP17 NV_DQ10 / NV_IO10 BB5
R166 1 2 10K_0402_5% PCH_GPIO2 L24 BB3
R169 10K_0402_5% DGPU_PWR_EN TP18 NV_DQ11 / NV_IO11
1 2 AB46 TP19 NV_DQ12 / NV_IO12 BB7
R170 1 2 10K_0402_5% PCH_GPIO4 AB45 BE8
RSVD
R172 10K_0402_5% ODD_DA# TP20 NV_DQ13 / NV_IO13
1 2 NV_DQ14 / NV_IO14 BD4
NV_DQ15 / NV_IO15 BF6
B21 TP21 NV_ALE AV5

M20 AY1 DF_TVS
TP22 NV_CLE
AY16 TP23 DMI Termination Voltage
R165 1 2 8.2K_0402_5% PCH_GPIO53 BG46 AV10
TP24 NV_RCOMP
Set to Vcc when HIGH
NV_RB# AT8 DF_TVS
Set to Vss when LOW
BE28 TP25 NV_RE#_WRB0 AY5
BC30 TP26 NV_RE#_WRB1 BA2
R188 1 2 8.2K_0402_5% DGPU_HOLD_RST# BE32 DG 1.2 CRB1.0 PH 2.2K series 1K
TP27
BJ32 TP28 NV_WE#_CK0 AT12
BC28 TP29 NV_WE#_CK1 BF3
BE30 TP30
BF32 +1.8VS
TP31 USB20_N0
BG32 TP32 USBP0N C24 USB20_N0 39
AV26 A24 USB20_P0 USB/B (Right side)
TP33 USBP0P USB20_P0 39
1
BB26 C25 USB20_N1
C TP34 USBP1N USB20_N1 46 C
AU28 B25 USB20_P1 USB Conn. Colay USB3.0 R633
AY30 C26 USB20_N2 2.2K_0402_5%
TP36 USBP2N USB20_N2 39
AU26 A26 USB20_P2 USB/B (Right side)
AY26 K28 USB20_N3
USB20_N3 39
2
TP38 USBP3N USB20_P3 DF_TVS
AV28 TP39 USBP3P H28 USB20_P3 39 USB/B (Right side) ,colay USB3.0 R626
2 1
1K_0402_5%
H_SNB_IVB# 5
AW30 TP40 USBP4N E28
USBP4P D28
USBP5N C28 CLOSE TO THE BRANCHING POINT
USBP5P A28
USBP6N C29
USBP6P B29
PCI_PIRQA# K40 N28 Some PCH config not support USB port 6 & 7.
PCI_PIRQB# PIRQA# USBP7N
K38 M28
PCI
PCI_PIRQC# PIRQB# USBP7P USB20_N8
H38 PIRQC# USBP8N L30 USB20_N8 38
PCI_PIRQD# G38 K30 USB20_P8 Mini Card 1 (WLAN)
PIRQD# USBP8P USB20_P8 38
G30 USB20_N9
USBP9N USB20_N9 38 +3VALW_PCH
GPIO51 Internal pull high DGPU_HOLD_RST# C46 E30 USB20_P9 3G/B (WWAN)
USB
REQ1# / GPIO50 USBP9P USB20_P9 38
PCH_GPIO52 C44 C30 USB20_N10
REQ2# / GPIO52 USBP10N USB20_N10 31
DGPU_PWR_EN E40 A30 USB20_P10 CMOS Camera (LVDS)
14,45 DGPU_PWR_EN REQ3# / GPIO54 USBP10P USB20_P10 31
Boot BIOS Strap bit1 BBS1 L32 USB20_N11 USB_OC0# R596 1 2 10K_0402_5%
USBP11N USB20_N11 38
PCH_GPIO51 D47 K32 USB20_P11 Mini2 Card 2 (Reserved) USB_OC2# R588 1 2 10K_0402_5%
GNT1# / GPIO51 USBP11P USB20_P11 38
Boot BIOS PCH_GPIO53 E42 G32 USB20_N12 USB_OC7# R595 1 2 10K_0402_5%
GNT2# / GPIO53 USBP12N USB20_N12 38
PCH_GPIO55 F46 E32 USB20_P12 3G/B(SIM Card ) USB_OC5# R590 1 2 10K_0402_5%
Bit11 Bit10 Destination GNT3# / GPIO55 USBP12P USB20_P12 38
C32 USB20_N13
USBP13N USB20_N13 39
A32 USB20_P13 BlueTooth
USBP13P USB20_P13 39
0 1 Reserved PCH_GPIO2 G42
ODD_DA# PIRQE# / GPIO2
GNT1#/ 34 ODD_DA# G40 PIRQF# / GPIO3 Within 500 mils
1 0 PCI PCH_GPIO4 C42 C33 USBRBIAS 1 2
GPIO51 PCH_GPIO5 D44
PIRQG# / GPIO4 USBRBIAS# R558 22.6_0402_1%
PIRQH# / GPIO5 USB_OC1# R773 10K_0402_5%
1 1 SPI 1 2
B33 USB_OC4# R612 1 2 10K_0402_5%
PAD T18 @ USBRBIAS USB_OC3# R592 10K_0402_5%
B
0 0 LPC K10 PME# 1 2
B
R03 modify USB_OC6# R616 1 2 10K_0402_5%
PLT_RST# C6 A14 USB_OC0#
5 PLT_RST# PLTRST# OC0# / GPIO59
K20 USB_OC1#
OC1# / GPIO40 USB_OC1# 46
B17 USB_OC2#
CLK_PCI_LPBACK R531 OC2# / GPIO41
14 CLK_PCI_LPBACK 2 1 22_0402_5% CLK_PCI0 H49 CLKOUT_PCI0 OC3# / GPIO42 C16 USB_OC3#
CLK_PCI_LPC R529 1 2 22_0402_5% CLK_PCI1 H43 L16 USB_OC4#
40 CLK_PCI_LPC CLKOUT_PCI1 OC4# / GPIO43
PAD T30 @ CLK_PCI2 J48 A16 USB_OC5#
PAD T10 @ CLK_PCI3 CLKOUT_PCI2 OC5# / GPIO9 USB_OC6#
K42 CLKOUT_PCI3 OC6# / GPIO10 D14
1 1 PAD T12 @ CLK_PCI4 H40 C14 USB_OC7#
CLKOUT_PCI4 OC7# / GPIO14
C633 C632
22P_0402_50V8J @ @ 22P_0402_50V8J COUGARPOINT_FCBGA989~D
2 2 R282
0_0402_5%
2 1
For RF request @
+3VS +3VS
5
5
U14 R296 U15
PLT_RST# 2 100_0402_1%
P
VCC
B PLT_RST#
Y 4 1 2 PLTRST_VGA# 22 1 IN1
DGPU_HOLD_RST# 1 DIS@ 4
A OUT PLT_RST_BUF# 35,38,39,40,46
G
R03 modify 2
GND
IN2
1
1
NC7SZ08P5X_NL_SC70-5
3
DIS@ R281 R297

100K_0402_5% 100K_0402_5%
3
DIS@ MC74VHC1G08DFT2G_SC70-5
2
2
A A

PCH (5/9) PCI, USB, NVRAM
5 4 3 2 1
5 4 3 2 1
HDA_SYNC PH(PLL =+1.5VS)

GPIO28
On-Die PLL Voltage Regulator
This signal has a weak internal pull up
HOn-Die voltage regulator enable
* LOn-Die PLL Voltage Regulator disable
R272 1 2 1K_0402_5% PCH_GPIO28
@ +3VS
ODD_EN# R771 1 2 10K_0402_5%

D R768 D
+3VALW_PCH 1 2 4.7K_0402_5%
EC_KBRST# R279 1 2 10K_0402_5%
U33F
PCH_GPIO0 T7 C40 ODD_EN#

BMBUSY# / GPIO0 TACH4 / GPIO68 ODD_EN# 34
R05 modify
WL_EN# A42 B41 PCH_GPIO69
39 WL_EN# TACH1 / GPIO1 TACH5 / GPIO69
DGPU_HPD_INT# H36 C41 PCH_GPIO70 +3VS
33 DGPU_HPD_INT# TACH2 / GPIO6 TACH6 / GPIO70
40 EC_SCI# EC_SCI# E38 A40 PCH_GPIO71

TACH3 / GPIO7 TACH7 / GPIO71
2
Deep S4,S5 wake event signal
40 EC_SMI# EC_SMI# C10 R278
RTC alarm,Power BTN,GPIO27 GPIO8
10K_0402_5%
PCH_GPIO27 (Have internal Pull-High) PCH_GPIO12 C4 LAN_PHY_PWR_CTRL / GPIO12
Deep S4,S5 wake event signal
1
39,46 SMIB SMIB G2 P4
GPIO15 A20GATE GATEA20 40
No use PD to GND Check list1.0 P.70
AU16 PCH_PECI_R 1 2 PECI CPU-EC
CPU/MISC
PECI H_PECI 5,40
R661 1 2 10K_0402_5% PCH_GPIO27 PCH_GPIO16 U2 0_0402_5% @ R239
SATA4GP / GPIO16 EC_KBRST# CTRL+ALT+DEL
RCIN# P5 EC_KBRST# 40
GPIO
54 VGA_PWROK R193 1 2 0_0402_5% DGPU_PWROK D40 AY11 non CPU power ok
TACH0 / GPIO17 PROCPWRGD H_CPUPWRGD 5
DIS@
PCH_GPIO22 T5 AY10 PCH_THRMTRIP#_R 1 2 H_THRMTRIP# H_THRMTRIP# 5 130 degree
SCLOCK / GPIO22 THRMTRIP# R627 390_0402_5%
R05 modify shut sown
PCH_GPIO24 E8 T14
GPIO24 / MEM_LED INIT3_3V#
PCH_GPIO27 E16 INIT3_3V Checklist1.0 P.59
C +3VS GPIO27 C
PCH_GPIO28 P8 This signal has weak internal
GPIO28
NC_1 AH8 PU, can't pull low,leave NC
R623 1 NOPT@ 2 10K_0402_5% OPTIMUS_EN# BT_ON# K1
38,39 BT_ON# STP_PCI# / GPIO34
NC_2 AK11
K4 GPIO35
R639 1 OPT@ 2 10K_0402_5% AH10
ODD_DETECT# NC_3
34 ODD_DETECT# V8 SATA2GP / GPIO36
TS_VSS1~4
NC_4 AK10 PD to GND
R03 modify 38 WWAN_OFF# WWAN_OFF# M5 SATA3GP / GPIO37
NC_5 P37
OPTIMUS_EN# N2 SLOAD / GPIO38
GPIO38 PCH_GPIO39 M3 SDATAOUT0 / GPIO39
OPTIMUS_EN#
PCH_GPIO48 V13 BG2 T58 PAD
SDATAOUT1 / GPIO48 VSS_NCTF_15 @
* OPTIMUS 0 R03 modify WL_OFF# V3 BG48 T39 PAD
38 WL_OFF# SATA5GP / GPIO49 VSS_NCTF_16 @ R02 modify
Non-OPTIMUS 1 PCH_GPIO57 D6 BH3 T59 PAD
GPIO57 VSS_NCTF_17 @
BH47 T40 PAD +3VS +3VS +3VS
VSS_NCTF_18 @
PAD T61 @ A4 BJ4 T60 PAD
VSS_NCTF_1 VSS_NCTF_19
1
@
+3VS R04 modify PAD T46 @ A44 BJ44 T45 PAD R554 R548 R550
VSS_NCTF_2 VSS_NCTF_20 @ 10K_0402_5% 10K_0402_5% 10K_0402_5%
R277 1 2 200K_0402_5% WWAN_OFF# PAD T44 @ A45 BJ45 T43 PAD @ @ X76@
VSS_NCTF_3 VSS_NCTF_21 @
NCTF
2
R276 1 2 10K_0402_5% PCH_GPIO0 PAD T41 @ A46 BJ46 T42 PAD PCH_GPIO69 PCH_GPIO70 PCH_GPIO71
2
R546 1 2 10K_0402_5% WL_EN# PAD T52 @ A5 BJ5 T50 PAD
B VSS_NCTF_5 VSS_NCTF_23 @ R553 R549 R551 B
R191 1 2 10K_0402_5% DGPU_HPD_INT# PAD T51 @ A6 BJ6 T49 PAD 10K_0402_5% 10K_0402_5% 10K_0402_5% X76@
R641 1 2 10K_0402_5% PCH_GPIO16 PAD T64 @ B3 C2 T65 PAD
1
R194 1 2 10K_0402_5% DGPU_PWROK PAD T37 @ B47 C48 T38 PAD
R290 1 2 10K_0402_5% PCH_GPIO22 PAD T55 @ BD1 D1 T63 PAD
PAD T34 @ T32 PAD
Project ID GPIO69 GPIO70
BD49 VSS_NCTF_10 VSS_NCTF_28 D49
@
GPIO71
R649 1 2 10K_0402_5% PCH_GPIO39 PAD T56 @ BE1 E1 T54 PAD
* P5WE0 0 0 PCH_GPIO71
R04 modify PAD T35 @ BE49 E49 T33 PAD
P7YE0 0 0
*VRAM 800 MHz 0
R291 2 200K_0402_5% ODD_DETECT# PAD T57 @ T53 PAD
x 1 0
1 BF1 VSS_NCTF_13 VSS_NCTF_31 F1
@
VRAM 900 MHz 1
R619 1 2 10K_0402_5% BT_ON# PAD T36 @ BF49 F49 T31 PAD
x 1 1
R292 1 2 10K_0402_5% PCH_GPIO48
R274 1 2 10K_0402_5% WL_OFF#
GPIO24 Unmultiplexed
+3VALW_PCH NOTE: GPIO24 configuration
register bits are not cleared by
CF9h reset event.
R262 1 2 10K_0402_5% PCH_GPIO24
CRB1.0 PH10K to +3VALW
R620 1 2 10K_0402_5% PCH_GPIO12
A R672 A
1 2 1K_0402_5% SMIB
R263 1 2 10K_0402_5% PCH_GPIO57

PCH (6/9) GPIO, CPU, MISC
5 4 3 2 1
5 4 3 2 1
+VCCADAC should be powered up during S0

system state.Note that Thermal Sensor +3VS
shares the same power supply rail with DAC L31
R05 modify MBK1608221YZF_2P
+VCCADAC 2 1
+1.05VS_VTT U33G POWER 1 1 1 1
12P_0402_50V8J
0.01U_0402_16V7K
C640
0.1U_0402_10V7K
C644
22U_0805_6.3V6M
C629
1300mA 1 1 1 1
0.1U_0402_10V7K
C777
C710
10P_0402_50V8J
C833
J3 R523 C276 C615
2 1 +1.05VS_PCH AA23 U48 0_0402_5% 22U_0805_6.3V6M @ 22U_0805_6.3V6M
VCCCORE[1] VCCADAC @ 2 2 2 2 @
AC23 VCCCORE[2] 1mA 2 2 2 2
10U_0805_10V4Z
C334
1U_0402_6.3V6K
C346
1U_0402_6.3V6K
C319
1U_0402_6.3V6K
C320
CRT
PAD-OPEN 4x4m 1 1 1 1 AD21
2
VCCCORE[3]
AD23 VCCCORE[4] VSSADAC U47
VCC CORE
@ AF21 VCCCORE[5]
AF23 VCCCORE[6]
D 2 2 2 2 R149 +3VS D
AG21 VCCCORE[7]
AG23 0_0805_5% R06 Modify
VCCCORE[8] +VCCA_LVDS
AG24 VCCCORE[9] VCCALVDS AK36 1 2
AG26 UMA@
VCCCORE[10] 1mA
1
AG27 VCCCORE[11] VSSALVDS AK37 R05 modify
AG29 R176
VCCCORE[12] 0_0402_5%
AJ23
LVDS
VCCCORE[13] DISO@
AJ26 VCCCORE[14] VCCTX_LVDS[1] AM37
AJ27 +1.8VS
2
VCCCORE[15] L16 UMA@
AJ29 VCCCORE[16] VCCTX_LVDS[2] AM38
AJ31 0.1UH_MLF1608DR10KT_10%_1608
+1.05VS_PCH VCCCORE[17] +VCCTX_LVDS
60mA VCCTX_LVDS[3] AP36 2 1
1 1 1 0.1uH inductor, 200mA
1
AP37 C300
VCCTX_LVDS[4] C305 C310 22U_0805_6.3V6M R210
AN19 VCCIO[28] 0.01U_0402_16V7K 0.01U_0402_16V7K UMA@
2 UMA@ 2 UMA@ 2 DISO@
PAD T48 @ +VCCAPLLEXP BJ22 0_0402_5%
266mA
2
VCCAPLLEXP +3VS
PCH Power Rail Table
On-Die PLL Voltage Regulator V33
HVCMOS
VCC3_3[6]
HOn-Die PLL voltage regulator enable AN16 VCCIO[15] I/O Buffer Voltage S0 Iccmax
1 Voltage Rail Voltage Current(A)
VCCFDIPLL,VCCAPLLEXP,VCCAPLLDMI2 AN17 VCCIO[16]
V34 C313
,VCCAPLLSATA VCC3_3[7]
0.1U_0402_10V7K V_PROC_IO 1.05 0.001 Processor I/F
AN21
2925mA 2
VCCIO[17]
AN26 VCCIO[18]
V5REF 5 0.001 PCH Core Well Reference Voltage
Internal PLL and VRM(+1.5VS)
AN27 AT16 +VCCAFDI_VRM
VCCIO[19] VCCVRM[3]
V5REF_Sus 5 0.001 Suspend Well Reference Voltag
+1.05VS_PCH AP21 +1.05VS_PCH
C VCCIO[20] C
AP23 VCCIO[21] VCCDMI[1] AT20 Vcc3_3 3.3 0.266 I/O Buffer Voltage
1 DMI buffer logic
DMI
10U_0805_10V4Z
C314
1U_0402_6.3V6K
C353
1U_0402_6.3V6K
C325
1U_0402_6.3V6K
C342
1U_0402_6.3V6K
C332
1 1 1 1 1 AP24 Display DAC Analog Power. This power is
VCCIO
VCCIO[22] C344
20mA VccADAC 3.3 0.001 supplied by the core well.
AP26 AB36 1U_0402_6.3V6K
VCCIO[23] VCCIO[1] 2
2 2 2 2 2 1 place near AT20
AT24 VCCIO[24]
VccADPLLA 1.05 0.08 Display PLL A power
C308
1U_0402_6.3V6K Core Well I/O Buffer
2 VccADPLLB 1.05 0.08
AN33 VCCIO[25] 190mA place near AB36 Display PLL B power
AN34 VCCIO[26] VCCPNAND[1] AG16
+3VS +1.8VS VccCore 1.05 1.3 Internal Logic Voltage
NAND / SPI
BH29 VCC3_3[3] VCCPNAND[2] AG17
1 1 VccDFTERM should PH +1.8VS or +3VS VccDMI 1.05 0.042 DMI Buffer Voltage
C322 C349
0.1U_0402_10V7K AJ16 0.1U_0402_10V7K
VCCPNAND[3]
VccIO 1.05 2.925 Core Well I/O buffers
2 +VCCAFDI_VRM 2
AP16 VCCVRM[2]
AJ17 1.05 V Supply for Intel R Management
VCCPNAND[4]
VccASW 1.05 1.01 Engine and Integrated LAN
PAD T19 @ +1.05VS_VCCAPLL_FDI BG6 VCCFDIPLL
+1.05VS_PCH VccSPI 3.3 0.02 3.3 V Supply for SPI Controller Logic
AP17 +3VS
VCCIO[27]
FDI
VCCSPI V1
Trace 20mil 20mA VccDSW 3.3 0.003 3.3v supply for Deep S4/S5 well
1 AU20 VCCDMI[2] 1 For SPI control logi
C347 C703 VccpNAND 1.8 0.19 1.8V power supply for DF_TVS
B COUGARPOINT_FCBGA989~D 1U_0402_6.3V6K B
2 1U_0402_6.3V6K 2
VccRTC 3.3 6 uA Battery Voltage
GPIO28 VccSus3_3 3.3 0.266 Suspend Well I/O Buffer Voltage

On-Die PLL Voltage Regulator
HOn-Die PLL voltage regulator enable High Definition Audio Controller Suspend
VccSusHDA 3.3 / 1.5 0.01 Voltage
VCCFDIPLL,VCCAPLLEXP,VCCAPLLDMI2 +VCCAFDI_VRM
+1.5VS 1.8 V Internal PLL and VRMs (1.8 V for
VccVRM 1.8 / 1.5 0.16 Desktop)
R257 2 1 0_0603_5% +VCCAFDI_VRM
VccCLKDMI 1.05 0.02 DMI Clock Buffer Voltage
VCCVRM==>1.5V FOR MOBILE
VCCVRM==>1.8V FOR DESKTOP VccSSC 1.05 0.095 Spread Modulators Power Supply
VCCVRM = 160mA detal waiting for newest spec
HDA_SYNC PH(PLL =+1.5VS) VccDIFFCLKN 1.05 0.055 Differential Clock Buffers Power Supply
Analog power supply for LVDS (Mobile
VccALVDS 3.3 0.001 Only)
Analog power supply for LVDS (Mobile
VccTX_LVDS 1.8 0.06 Only)
A A

PCH (7/9) PWR
5 4 3 2 1
5 4 3 2 1
Have internal VRM

+3VS R150
0_0805_5% +1.05VS_PCH R167
1 2 +1.05V analog 0_0603_5%
@ internal clock PLL 2 1 +VCCACLK
L14 Can NC VCC3_3 = 266mA detal waiting for newest spec
10UH_LB2012T100MR_20% @
1 2 +3VS_VCC_CLKF33 VCCDMI = 42mA detal waiting for newest spec
1 1
+3VALW_PCH U33J POWER +1.05VS_PCH
10U_0805_10V4Z
C277
1U_0402_6.3V6K
C304
1 AD49 VCCACLK VCCIO[29] N26
Not support Deep S4,S5 1
2 2 C340
connect to +3VALW VCCIO[30] P26
0.1U_0402_10V7K T16 C321
D 2 VCCDSW3_3 1U_0402_6.3V6K D
VCCIO[31] P28
2
PAD T17 @ +PCH_VCCDSW V12
3mA T27
DCPSUSBYP VCCIO[32]
VCCIO[33] T29
suppied by internal +3VS_VCC_CLKF33 T38 +3VALW_PCH
VCC3_3[5]
1.05V VR must NC
VCCSUS3_3[7] T23
PAD T11 @ +VCCAPLL_CPY_PCH BH23 VCCAPLLDMI2 119mA T24 1 1
VCCSUS3_3[8] C330 C333 +5VALW_PCH +3VALW_PCH
GPIO28 +1.05VS_PCH AL29 VCCIO[14]
On-Die PLL Voltage Regulator V23 0.1U_0402_10V7K 0.1U_0402_10V7K
USB
VCCSUS3_3[9]
HOn-Die PLL voltage regulator enable Place near Place near
2
PAD T13 @ +VCCSUS1 2 2
AL24 DCPSUS[3] VCCSUS3_3[10] V24 P24 P24
VCCFDIPLL,VCCAPLLEXP,VCCAPLLDMI2 R202 D8
P24 100_0402_1% CH751H-40PT_SOD323-2
,VCCAPLLSATA VCCSUS3_3[6]
AA19 +1.05VS_PCH
1
VCCASW[1] +PCH_V5REF_SUS
1010mA VCCIO[34] T26
+1.05VS_PCH AA21 VCCASW[2] 1
R06 Modify
+1.05VS_PCH L12 AA24 M26 +PCH_V5REF_SUS C318
10UH_LB2012T100MR_20% 1 1
VCCASW[3] 1mA V5REF_SUS 0.1U_0603_25V7K
2
22U_0805_6.3V6M
C336
22U_0805_6.3V6M
C335
Clock and Miscellaneous

1 2 +1.05VS_VCCA_A_DPL AA26 VCCASW[4] +VCCA_USBSUS @ T14 PAD
DCPSUS[4] AN23
+3VALW_PCH
220U_B2_2.5VM_R35
C279
1U_0402_6.3V6K
C296
1 AA27 VCCASW[5]
suppied by internal
2 2
1 VCCSUS3_3[1] AN24 1.05V VR Must NC
2
+ AA29
R808 VCCASW[6]
0_0603_5% +5VS +3VS
AA31 VCCASW[7]
2 2
@ AC26 P34 +PCH_V5REF_RUN +3VALW_PCH
1mA
1
VCCASW[8] V5REF
2
C C
1 1 1
1U_0402_6.3V6K
C326
1U_0402_6.3V6K
C327
1U_0402_6.3V6K
C316
AC27 R148 D7
+1.05VS_VCCA_B_DPL VCCASW[9] +3V_VCCPSUS 100_0402_1% CH751H-40PT_SOD323-2
1 2 N20 1
PCI/GPIO/LPC
L11 VCCSUS3_3[2] C352
AC29 VCCASW[10]
2 2 2
220U_B2_2.5VM_R35
C278
1U_0402_6.3V6K
C295
10UH_LB2012T100MR_20% 1 N22 1U_0402_6.3V6K
1
VCCSUS3_3[3] +PCH_V5REF_RUN
1 AC31 VCCASW[11]
+ 2
VCCSUS3_3[4] P20 1
SGA00001700 AD29 VCCASW[12]
P22 +3VS C244
220U 2.5V M B2 2 2 VCCSUS3_3[5] 1U_0603_10V6K
AD31 VCCASW[13]
ESR 35mohm@100Khz 2
W21 VCCASW[14] VCC3_3[1] AA16
1 1 1
W23 W16 C704 C343 C309
VCCASW[15] VCC3_3[8] 0.1U_0402_10V7K 0.1U_0402_10V7K 0.1U_0402_10V7K
W24 VCCASW[16] VCC3_3[4] T34 Place near Place near Place near
2 2 2
AJ2 AA16,W16 T34
W26 VCCASW[17]
W29 VCCASW[18]
W31 AJ2 +1.05VS_PCH
VCCASW[19] VCC3_3[2]
W33 VCCASW[20]
VCCIO[5] AF13
1
+VCCRTCEXT N16 DCPRTC C350
1 VCCIO[12] AH13
C348 1U_0402_6.3V6K
0.1U_0402_10V7K +VCCAFDI_VRM 2
Y49 VCCVRM[4] VCCIO[13] AH14
2
B GPIO28 B
VCCIO[6] AF14
+1.05VS_VCCA_A_DPL BD47 On-Die PLL Voltage Regulator
80mA
SATA
VCCADPLLA +VCCSATAPLL @ T62 PAD HOn-Die PLL voltage regulator enable
VCCAPLLSATA AK1
+1.05VS_VCCA_B_DPL BF47 +VCCAFDI_VRM
+1.05VS_PCH VCCADPLLB 80mA VCCFDIPLL,VCCAPLLEXP,VCCAPLLDMI2
AF11 +VCCAFDI_VRM
AF17
VCCVRM[1] ,VCCAPLLSATA
VCCIO[7]
AF33 VCCIO[8]
AF34 AC16 +1.05VS_PCH
1 C311 1 C312 1 C317 AG34
VCCIO[9] 55mA VCCIO[2]
1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K VCCIO[11]
VCCIO[3] AC17 1
C351
Place Place Place AG33 AD17 1U_0402_6.3V6K
2 2 2 VCCIO[10] VCCIO[4]
near AF17 near AG33 near AF33, 95mA 2
AF34,AG34 +1.05VS_PCH
1 2 C354 +VCCSST V16 DCPSST
0.1U_0402_10V7K
PAD T15 @ +1.05VM_VCCSUS T17 T21 +VCCME_22 R237 2 1 0_0603_5%

DCPSUS[1] VCCASW[22]
suppied by internal V19
MISC
DCPSUS[2]
1.05V VR Must NC
+1.05VS_PCH V21 +VCCME_23 R224 2 1 0_0603_5%
VCCASW[23]
1mA
CPU
BJ8 V_PROC_IO
T19 +VCCME_21 R236 2 1 0_0603_5%
VCCASW[21]
1 1 1
+RTCVCC +3VALW_PCH
4.7U_0603_6.3V6K
C700
0.1U_0402_10V7K
C694
0.1U_0402_10V7K
C693
RTC
A22 P32 +VCCSUSHDA R206 2 1 0_0603_5% Need +3VALW and 0.1U close PCH
10mAVCCSUSHDA
HDA
2 2 2 VCCRTC
1U_0402_6.3V6K
C331
0.1U_0402_10V7K
C685
0.1U_0402_10V7K
C687
1 1 1 1
COUGARPOINT_FCBGA989~D C315
A 0.1U_0402_16V4Z A
2 2 2 2
Close P32
Place
near BJ8

2011/02/08 2012/02/08 Title
Issued Date Deciphered Date PCH (8/9) PWR
5 4 3 2 1
5 4 3 2 1
U33I
AY4 VSS[159] VSS[259] H46

AY42 VSS[160] VSS[260] K18
AY46 VSS[161] VSS[261] K26
AY8 VSS[162] VSS[262] K39
B11 VSS[163] VSS[263] K46
D U33H D
B15 VSS[164] VSS[264] K7
H5 VSS[0] B19 VSS[165] VSS[265] L18
B23 VSS[166] VSS[266] L2
AA17 VSS[1] VSS[80] AK38 B27 VSS[167] VSS[267] L20
AB11 VSS[6] VSS[85] AL16 F45 VSS[172] VSS[272] M12
AB14 VSS[7] VSS[86] AL17 BB12 VSS[173] VSS[273] P16
AB39 VSS[8] VSS[87] AL19 BB16 VSS[174] VSS[274] M18
AC19 VSS[13] VSS[92] AL27 BB30 VSS[179] VSS[279] M34
AC33 VSS[17] VSS[96] AL48 BC14 VSS[183] VSS[283] M46
AC34 VSS[18] VSS[97] AM11 BC18 VSS[184] VSS[284] M8
AC48 VSS[19] VSS[98] AM14 BC2 VSS[185] VSS[285] N18
AD10 VSS[20] VSS[99] AM36 BC22 VSS[186] VSS[286] P30
AD11 VSS[21] VSS[100] AM39 BC26 VSS[187] VSS[287] N47
AD19 VSS[24] VSS[103] AM46 BC36 VSS[190] VSS[290] T33
AD26 VSS[26] VSS[105] AN2 BC42 VSS[192] VSS[292] P43
AD27 VSS[27] VSS[106] AN29 BC48 VSS[193] VSS[293] P47
AD33 VSS[28] VSS[107] AN3 BD46 VSS[194] VSS[294] P7
AD34 VSS[29] VSS[108] AN31 BD5 VSS[195] VSS[295] R2
C C
AD36 VSS[30] VSS[109] AP12 BE22 VSS[196] VSS[296] R48
AD37 VSS[31] VSS[110] AP19 BE26 VSS[197] VSS[297] T12
AD38 VSS[32] VSS[111] AP28 BE40 VSS[198] VSS[298] T31
AD39 VSS[33] VSS[112] AP30 BF10 VSS[199] VSS[299] T37
AD40 VSS[35] VSS[114] AP38 BF16 VSS[201] VSS[301] W34
AD46 VSS[39] VSS[118] AP8 BF26 VSS[205] VSS[305] V11
AD8 VSS[40] VSS[119] AR2 BF28 VSS[206] VSS[306] V17
AE2 VSS[41] VSS[120] AR48 BD3 VSS[207] VSS[307] V26
AE3 VSS[42] VSS[121] AT11 BF30 VSS[208] VSS[308] V27
AF10 VSS[43] VSS[122] AT13 BF38 VSS[209] VSS[309] V29
AF12 VSS[44] VSS[123] AT18 BF40 VSS[210] VSS[310] V31
AD14 VSS[45] VSS[124] AT22 BF8 VSS[211] VSS[311] V36
AD16 VSS[46] VSS[125] AT26 BG17 VSS[212] VSS[312] V39
AF16 VSS[47] VSS[126] AT28 BG21 VSS[213] VSS[313] V43
AF19 VSS[48] VSS[127] AT30 BG33 VSS[214] VSS[314] V7
AF24 VSS[49] VSS[128] AT32 BG44 VSS[215] VSS[315] W17
AF26 VSS[50] VSS[129] AT34 BG8 VSS[216] VSS[316] W19
AF27 VSS[51] VSS[130] AT39 BH11 VSS[217] VSS[317] W2
AF38 VSS[54] VSS[133] AT7 BH19 VSS[220] VSS[320] Y12
AF4 VSS[55] VSS[134] AU24 H10 VSS[221] VSS[321] Y38
AF42 VSS[56] VSS[135] AU30 BH27 VSS[222] VSS[322] Y4
AF46 VSS[57] VSS[136] AV16 BH31 VSS[223] VSS[323] Y42
AF8 VSS[60] VSS[139] AV30 BH39 VSS[226] VSS[328] BG29
AG19 VSS[61] VSS[140] AV38 BH43 VSS[227] VSS[329] N24
B B
AG2 VSS[62] VSS[141] AV4 BH7 VSS[228] VSS[330] AJ3
AG31 VSS[63] VSS[142] AV43 D3 VSS[229] VSS[331] AD47
AG48 VSS[64] VSS[143] AV8 D12 VSS[230] VSS[333] B43
AH11 VSS[65] VSS[144] AW14 D16 VSS[231] VSS[334] BE10
AH3 VSS[66] VSS[145] AW18 D18 VSS[232] VSS[335] BG41
AH36 VSS[67] VSS[146] AW2 D22 VSS[233] VSS[337] G14
AH39 VSS[68] VSS[147] AW22 D24 VSS[234] VSS[338] H16
AH40 VSS[69] VSS[148] AW26 D26 VSS[235] VSS[340] T36
AH7 VSS[72] VSS[151] AW34 D34 VSS[238] VSS[344] C22
AJ19 VSS[73] VSS[152] AW36 D38 VSS[239] VSS[345] AP13
AJ21 VSS[74] VSS[153] AW40 D42 VSS[240] VSS[346] M14
AJ24 VSS[75] VSS[154] AW48 D8 VSS[241] VSS[347] AP3
AJ33 VSS[76] VSS[155] AV11 E18 VSS[242] VSS[348] AP1
AJ34 VSS[77] VSS[156] AY12 E26 VSS[243] VSS[349] BE16
AK12 VSS[78] VSS[157] AY22 G18 VSS[244] VSS[350] BC16
AK3 VSS[79] VSS[158] AY28 G20 VSS[245] VSS[351] BG28
G26 VSS[246] VSS[352] BJ28
COUGARPOINT_FCBGA989~D G28 VSS[247]
G36 VSS[248]
G48 VSS[249]
H12 VSS[250]
H18 VSS[251]
H22 VSS[252]
H24 VSS[253]
H26 VSS[254]
H30 VSS[255]
H32 VSS[256]
H34 VSS[257]
F3 VSS[258]
A A

PCH (9/9) VSS
5 4 3 2 1
A B C D E
U27A
4 PEG_HTX_C_GRX_P0 AP17 Part 1 of 7 K1 GPIO I/O USAGE

PEX_RX0 GPIO0 VGA_HDMI_DET
4 PEG_HTX_C_GRX_N0 AN17 PEX_RX0_N GPIO1 K2 VGA_HDMI_DET 33
4 PEG_HTX_C_GRX_P1 AN19 K3 VGA_PNL_PWM
PEX_RX1 GPIO2 VGA_PNL_PWM 31
4 PEG_HTX_C_GRX_N1 AP19 H3 ENVDD GPIO0 IN N/A
PEX_RX1_N GPIO3 ENVDD 31
4 PEG_HTX_C_GRX_P2 AR19 H2 VGA_BKL_EN
PEX_RX2 GPIO4 GPU_VID0
4 PEG_HTX_C_GRX_N2 AR20 PEX_RX2_N GPIO5 H1 GPU_VID0 54
4 PEG_HTX_C_GRX_P3 AP20 H4 GPU_VID1 GPU_VID1 54 GPIO1 IN HPD_IFPC
PEX_RX3 GPIO6 GPU_VID2
4 PEG_HTX_C_GRX_N3 AN20 PEX_RX3_N GPIO7 H5 GPU_VID2 54
4 PEG_HTX_C_GRX_P4 AN22 H6 R78 2 DIS@ 1 10K_0402_5% +3VSDGPU
PEX_RX4 GPIO8 R70 2 DIS@ 1 10K_0402_5%
4 PEG_HTX_C_GRX_N4 AP22 PEX_RX4_N GPIO9 J7 R05 modify GPIO2 OUT N/A
4 PEG_HTX_C_GRX_P5 AR22 PEX_RX5 GPIO10 K4
4 PEG_HTX_C_GRX_N5 AR23 PEX_RX5_N GPIO11 K5
VGA_ACIN R74 2 DIS@ 1 10K_0402_5% GPIO3 OUT N/A
GPIO
4 PEG_HTX_C_GRX_P6 AP23 PEX_RX6 GPIO12 H7 +3VSDGPU
1
AN23 J4 +3VSDGPU 1
4 PEG_HTX_C_GRX_N6 PEX_RX6_N GPIO13
4 PEG_HTX_C_GRX_P7 AN25 J6 2 1 ACIN_BUF
PEX_RX7 GPIO14 D31 CH751H-40PT_SOD323-2
4 PEG_HTX_C_GRX_N7 AP25 PEX_RX7_N GPIO15 L1 GPIO4 OUT N/A
4 PEG_HTX_C_GRX_P8 AR25 PEX_RX8 GPIO16 L2 DIS@
4 PEG_HTX_C_GRX_N8 AR26 PEX_RX8_N GPIO17 L4 R03 modify
5
4 PEG_HTX_C_GRX_P9 AP26 M4 U42 GPIO5 OUT GPU Core VID0
PEX_RX9 GPIO18 DIS@
AN26 L7 2
P
4 PEG_HTX_C_GRX_N9 PEX_RX9_N GPIO19 B
4 PEG_HTX_C_GRX_P10 AN28 L5 VGA_HDMI_DET 2 R118 1 10K_0402_5% ACIN_BUF 4
PEX_RX10 GPIO20 DIS@ Y
4 PEG_HTX_C_GRX_N10 AP28 PEX_RX10_N GPIO21 K6 A 1 ACIN GPIO6
15,40,44,45,48 OUT GPU Core VID1
G
4 PEG_HTX_C_GRX_P11 AR28 L6 VGA_PNL_PWM 2 R117 1 10K_0402_5%
PEX_RX11 GPIO22 DIS@ DIS@ NC7SZ08P5X_NL_SC70-5
4 PEG_HTX_C_GRX_N11 AR29 M6
3
PEX_RX11_N GPIO23 ENVDD R72
4 PEG_HTX_C_GRX_P12 AP29 PEX_RX12 GPIO24 M7 2 1 10K_0402_5% GPIO7 OUT N/A
4 PEG_HTX_C_GRX_N12 AN29 DIS@
PEX_RX12_N VGA_BKL_EN R115
4 PEG_HTX_C_GRX_P13 AN31 PEX_RX13 MIOA_D0_NC N1 2 1 10K_0402_5%
4 PEG_HTX_C_GRX_N13 AP31 PEX_RX13_N MIOA_D1_NC P4 GPIO8 IN OVERT
4 PEG_HTX_C_GRX_P14 AR31 PEX_RX14 MIOA_D2_NC P1
4 PEG_HTX_C_GRX_N14 AR32 PEX_RX14_N MIOA_D3_NC P2
4 PEG_HTX_C_GRX_P15 AR34 PEX_RX15 MIOA_D4_NC P3 GPIO9 OUT ALERT
4 PEG_HTX_C_GRX_N15 AP34 PEX_RX15_N MIOA_D5_NC T3
MIOA_D6_NC T2
MIOA_D7_NC T1 GPIO10 OUT N/A
4 PEG_GTX_HRX_P0 AL17 PEX_TX0 MIOA_D8_NC U4
AM17 U1
PCI EXPRESS
4 PEG_GTX_HRX_N0 PEX_TX0_N MIOA_D9_NC
AM18 U2 VGA_BKL_EN 2 DISO@ 1 R116 ENBKL GPIO11 OUT N/A
4 PEG_GTX_HRX_P1 PEX_TX1 MIOA_D10_NC ENBKL 16,40
AM19 U3 0_0402_5%
4 PEG_GTX_HRX_P2 AL19 PEX_TX2 MIOA_D12_NC R6
AK19 T6 GPIO12 IN PWR_LEVEL
DVO
4 PEG_GTX_HRX_P3 AL20 PEX_TX3 MIOA_D14_NC N6
4 PEG_GTX_HRX_N3 AM20 PEX_TX3_N +3VSDGPU
4 PEG_GTX_HRX_P4 AM21 PEX_TX4 MIOB_D0_NC Y1 GPIO13 OUT N/A
4 PEG_GTX_HRX_N4 AM22 PEX_TX4_N MIOB_D1_NC Y2
AL22 Y3 I2CS_SCL R495 1 DIS@ 2 2.2K_0402_5%
2 4 PEG_GTX_HRX_P5 PEX_TX5 MIOB_D2_NC 2
AK22 AB3 I2CS_SDA R494 1 DIS@ 2 2.2K_0402_5% GPIO14 OUT N/A
4 PEG_GTX_HRX_N5 PEX_TX5_N MIOB_D3_NC
AL23 AB2 I2CH_SCL R122 1 DIS@ 2 2.2K_0402_5%
4 PEG_GTX_HRX_P6 PEX_TX6 MIOB_D4_NC
AM23 AB1 I2CH_SDA R121 1 DIS@ 2 2.2K_0402_5%
AM24 AC4 I2CB_SCL R120 1 DIS@ 2 2.2K_0402_5%
AM25 AC1 I2CB_SDA R119 1 DIS@ 2 2.2K_0402_5%
AL25 AC2 VGA_LCD_CLK R502 1 DIS@ 2 2.2K_0402_5%
4 PEG_GTX_HRX_P8 PEX_TX8 MIOB_D8_NC R497
AK25 AC3 VGA_LCD_DATA 1 DIS@ 2 2.2K_0402_5%
4 PEG_GTX_HRX_P9 AL26 PEX_TX9 MIOBD_10_NC AE3
AM26 AE2 VGA_DDC_CLK R123 1 DIS@ 2 2.2K_0402_5% XTALOUT @ XTALIN
AM27 U6 VGA_DDC_DATA R124 1 DIS@ 2 2.2K_0402_5% R474 1M_0402_5%
4 PEG_GTX_HRX_N10 AM28 PEX_TX10_N MIOB_D13_NC W6
4 PEG_GTX_HRX_P11 AL28 PEX_TX11 MIOB_D14_NC Y6
AK28 VGA_CRT_R R45 1 DIS@ 2 150_0402_1% 2 1
4 PEG_GTX_HRX_N11 PEX_TX11_N
AK29 N3 VGA_CRT_G R48 1 DIS@ 2 150_0402_1%
4 PEG_GTX_HRX_P12 PEX_TX12 MIOA_HSYNC_NC
AL29 L3 VGA_CRT_B R49 1 DIS@ 2 150_0402_1% 1 Y1 DIS@ 1
4 PEG_GTX_HRX_N12 PEX_TX12_N MIOA_VSYNC_NC
AM29 27MHZ_16PF_X5H027000FG1H
4 PEG_GTX_HRX_P13 PEX_TX13 DIS@ C576 DIS@ C577
4 PEG_GTX_HRX_N13 AM30 PEX_TX13_N MIOB_HSYNC_NC W1
AM31 W2 18P_0402_50V8J 18P_0402_50V8J
4 PEG_GTX_HRX_P14 PEX_TX14 MIOB_VSYNC_NC 2 2
4 PEG_GTX_HRX_N14 AM32 PEX_TX14_N
4 PEG_GTX_HRX_P15 AN32 PEX_TX15 MIOA_DE_NC N2
4 PEG_GTX_HRX_N15 AP32 PEX_TX15_N MIOA_CTL3_NC P5
MIOA_VREF_NC N5
MIOB_DE_NC Y5
+3VSDGPU 1 DIS@ 2 14 CLK_PEG_VGA AR16 PEX_REFCLK MIOB_CTL3_NC W3
R418 10K_0402_5% AR17 AF1
14 CLK_PEG_VGA# PEX_REFCLK_N MIOB_VREF_NC
AR13
14 PEG_CLKREQ# PEX_CLKREQ_N
N4 R479 1 DIS@ 2 10K_0402_5%
External Spread Spectrum OSC_OUT R477 1 @ 2 22_0402_5% XTAL_OUTBUFF
MIOA_CLKIN_NC
AJ17 PEX_TSTCLK_OUT MIOA_CLKOUT_NC R4
1
2 1 AJ18 U29
R44 @ 200_0402_1% PEX_TSTCLK_OUT_N R465 1 DIS@
MIOB_CLKIN_NC AE1 2 10K_0402_5% 1 REFOUT VSS 6 R455
V4 10K_0402_5%
3 MIOB_CLKOUT_NC OSC_SPREAD DIS@ 3
17 PLTRST_VGA# AM16 PEX_RST_N 2 XOUT MODOUT 5
2 1 AG21 T4
2
R67 DIS@ 2.49K_0402_1% PEX_TERMP MIOA_CLKOUT_NC_N OSC_OUT
MIOB_CLKOUT_NC_N W4 3 XIN/CLKIN VDD 4 +3VSDGPU
FBMA-L10-160808-300LMT 0603 1
+1.05VSDGPU DIS@ R458 1 DIS@ 2 10K_0402_5% @ OSC_SPREAD R476 1 @ 2 22_0402_5% XTAL_SSIN
150mA +GPU_PLLVDD
MIOACAL_PD_VDDQ_NC U5
@ ASM3P2872AF-06OR_TSOT-23-6 C581
2 1 AE9 PLLVDD MIOACAL_PU_GND_NC T5
1
4700P_0402_25V7K
22U_0805_6.3V6M
10U_0603_6.3V6M
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
L9 0.1U_0402_16V4Z
2
DIS@ C189
DIS@ C190
@ C187
DIS@ C146
DIS@ C180
DIS@ C186
DIS@ C184
1 1 1 1 1 1 1 AF9 AA7 R462 1 DIS@ 2 10K_0402_5%

SP_PLLVDD MIOBCAL_PD_VDDQ_NC R454
MIOBCAL_PU_GND_NC AA6
AD9 10K_0402_5%
VID_PLLVDD DIS@
CLK
2
2 2 2 2 2 2 2 XTALIN B1 XTAL_IN
XTALOUT B2 AM15
XTAL_OUT DACA_RED
AM14
VGA_CRT_R 32
VGA_CRT_G 32
If External Spread Spectrum not stuff then stuff resistor
under GPU XTAL_OUTBUFFD1 DACA_GREEN
XTAL_OUTBUFF DACA_BLUE AL14 VGA_CRT_B 32
XTAL_SSIN D2 XTAL_SSIN
DACA_HSYNC AM13 VGA_CRT_HSYNC 32
DACA_VSYNC AL13 VGA_CRT_VSYNC 32
I2CS_SCL E2 AJ12 +DACA_VDD 120 mA 1 2
I2CS_SCL DACA_VDD +3VSDGPU
I2CS_SDA E1 AK12 L5
I2CS_SDA DACA_VREF
1U_0402_6.3V6K
4.7U_0603_6.3V6K
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
AK13 FBMA-L10-160808-301LMT_2P
DACA_RSET
10K_0402_5%
VGA_LCD_CLK E3 DISO@
I2CC_SCL
1
31 VGA_LCD_CLK
124_0402_1%
DIS@ C124
DISO@ C140
DISO@ C136
DISO@ C132
DISO@ C176
OPT@ R113
VGA_LCD_DATA
DACs
E4 I2CC_SDA DACB_RED AK4 1 1 1 1 1
1
+3VSDGPU 31 VGA_LCD_DATA
R65
1 1 DACB_GREEN AL4
For RF request @ @ I2CB_SCL G3 AJ4
C197 C195 I2CB_SDA I2CB_SCL DACB_BLUE
I2C
G2 I2CB_SDA
2
2 2 2 2 2
DIS@
0.01U_0402_16V7K 0.01U_0402_16V7K AM1
2
2 2 VGA_DDC_CLK G1 DACB_HSYNC
AM2
2
I2CS_SCL 32 VGA_DDC_CLK VGA_DDC_DATA G4 I2CA_SCL DACB_VSYNC

1 6 EC_SMB_CK2 14,40 CRT 32 VGA_DDC_DATA I2CA_SDA R466 2
DIS@
DACB_VDD AG7 1 10K_0402_5%
DMN66D0LDW-7_SOT363-6 I2CH_SCL @C154
@ C154 0.1U_0402_16V4Z
4
Q31A DIS@ I2CH_SDA
F6
G6
I2CH_SCL DACB_VREF AK6
AH7 @R467
@ R467 1
1 2
2 124_0402_1%
Under GPU 4
I2CH_SDA DACB_RSET
+3VSDGPU
5
N12P-GV1-A1_BGA973 DIS@
I2CS_SDA 4 3 EC_SMB_DA2 14,40

DMN66D0LDW-7_SOT363-6 Security Classification Compal Secret Data Compal Electronics, Inc.
Q31B DIS@ Issued Date 2011/02/08 Deciphered Date 2012/02/08 Title
N12P PEG 1/9
A B C D E
A
VRAM Interface 27
27
MDA[15..0]
MDA[31..16]
MDA[15..0]
MDA[31..16] 29 MDC[15..0]
MDC[15..0]
MDC[31..16]
MDA[47..32] 29 MDC[31..16]
28 MDA[47..32] MDC[47..32]
MDA[63..48] 30 MDC[47..32]
28 MDA[63..48] MDC[63..48]
30 MDC[63..48]
U27B U27C
CMDA[30..0] 27,28 CMDC[30..0] 29,30
Part 2 of 7 U30 CMDA0 Part 3 of 7 F18 CMDC0
MDA0 FBA_CMD0 CMDA1 MDC0 FBC_CMD0 CMDC1
L32 FBA_D0 FBA_CMD1 V30 B13 FBC_D0 FBC_CMD1 E19
MDA1 N33 U31 CMDA2 MDC1 D13 D18 CMDC2
MDA2 FBA_D1 FBA_CMD2 CMDA3 MDC2 FBC_D1 FBC_CMD2 CMDC3
L33 FBA_D2 FBA_CMD3 V32 A13 FBC_D2 FBC_CMD3 C17
MDA3 N34 T35 CMDA4 MDC3 A14 F19 CMDC4
N35 FBA_D4 FBA_CMD5 U33 C16 FBC_D4 FBC_CMD5 C19
MDA5 P35 W32 CMDA6 MDC5 B16 B17 CMDC6
P33 FBA_D6 FBA_CMD7 W33 A17 FBC_D6 FBC_CMD7 E20
MDA7 P34 W31 CMDA8 MDC7 D16 B19 CMDC8
K35 FBA_D8 FBA_CMD9 W34 C13 FBC_D8 FBC_CMD9 D20
MDA9 K33 U34 CMDA10 MDC9 B11 A19 CMDC10
K34 FBA_D10 FBA_CMD11 U35 C11 FBC_D10 FBC_CMD11 D19
MDA11 H33 U32 CMDA12 MDC11 A11 C20 CMDC12
G34 FBA_D12 FBA_CMD13 T34 C10 FBC_D12 FBC_CMD13 F20
MDA13 G33 T33 CMDA14 MDC13 C8 B20 CMDC14
E34 FBA_D14 FBA_CMD15 W30 B8 FBC_D14 FBC_CMD15 G21
MDA15 E33 AB30 CMDA16 MDC15 A8 F22 CMDC16
G31 FBA_D16 FBA_CMD17 AA30 E8 FBC_D16 FBC_CMD17 F24
MDA17 F30 AB31 CMDA18 MDC17 F8 F23 CMDC18
G30 FBA_D18 FBA_CMD19 AA32 F10 FBC_D18 FBC_CMD19 C25
MDA19 G32 AB33 CMDA20 MDC19 F9 C23 CMDC20
K30 FBA_D20 FBA_CMD21 Y32 F12 FBC_D20 FBC_CMD21 F21
MDA21 K32 Y33 CMDA22 MDC21 D8 E22 CMDC22
H30 FBA_D22 FBA_CMD23 AB34 D11 FBC_D22 FBC_CMD23 D21
MDA23 K31 AB35 CMDA24 MDC23 E11 A23 CMDC24
L31 FBA_D24 FBA_CMD25 Y35 D12 FBC_D24 FBC_CMD25 D22
MDA25 L30 W35 CMDA26 MDC25 E13 B23 CMDC26
MEMORY INTERFACE C
MEMORY INTERFACE

M32 FBA_D26 FBA_CMD27 Y34 F13 FBC_D26 FBC_CMD27 C22
MDA27 N30 Y31 CMDA28 MDC27 F14 B22 CMDC28
M30 FBA_D28 FBA_CMD29 Y30 F15 FBC_D28 FBC_CMD29 A22
MDA29 P31 W29 CMDA30 MDC29 E16 A20 CMDC30
MDA30 FBA_D29 FBA_CMD30 MDC30 FBC_D29 FBC_CMD30
R32 FBA_D30 FBA_CMD31 Y29 F16 FBC_D30 FBC_CMD31 G20
MDA31 R30 MDC31 F17
FBA_D31 DQMA[3..0] 27 FBC_D31 DQMC[3..0] 29
MDA32 AG30 P32 DQMA0 MDC32 D29 A16 DQMC0
MDA33 FBA_D32 FBA_DQM0 DQMA1 MDC33 FBC_D32 FBC_DQM0 DQMC1
AG32 FBA_D33 FBA_DQM1 H34 F27 FBC_D33 FBC_DQM1 D10
MDA34 AH31 J30 DQMA2 MDC34 F28 F11 DQMC2
AF31 FBA_D35 FBA_DQM3 P30 DQMA[7..4] 28 E28 FBC_D35 FBC_DQM3 D15 DQMC[7..4] 30
MDA36 AF30 AF32 DQMA4 MDC36 D26 D27 DQMC4
AE30 FBA_D37 FBA_DQM5 AL32 F25 FBC_D37 FBC_DQM5 D34
MDA38 AC32 AL34 DQMA6 MDC38 D24 A34 DQMC6
AD30 FBA_D39 FBA_DQM7 AF35 E25 FBC_D39 FBC_DQM7 D28
MDA40 AN33 MDC40 E32
FBA_D40 DQSA#[3..0] 27 FBC_D40 DQSC#[3..0] 29
MDA41 AL31 L35 DQSA#0 MDC41 F32 B14 DQSC#0
FBA_D41 FBA_DQS_RN0 FBC_D41 FBC_DQS_RN0
A
MDA42 AM33 G35 DQSA#1 MDC42 D33 B10 DQSC#1

MDA43 FBA_D42 FBA_DQS_RN1 DQSA#2 MDC43 FBC_D42 FBC_DQS_RN1 DQSC#2
AL33 FBA_D43 FBA_DQS_RN2 H31 E31 FBC_D43 FBC_DQS_RN2 D9
1 MDA44 AK30 N32 DQSA#3 MDC44 C33 E14 DQSC#3
DQSA#[7..4] 28 DQSC#[7..4] 30
1

AK32 FBA_D45 FBA_DQS_RN4 AD32 F29 FBC_D45 FBC_DQS_RN4 F26
MDA46 AJ30 AJ31 DQSA#5 MDC46 D30 D31 DQSC#5
AH30 FBA_D47 FBA_DQS_RN6 AJ35 E29 FBC_D47 FBC_DQS_RN6 A31
MDA48 AH33 AC34 DQSA#7 MDC48 B29 A26 DQSC#7
MDA49 FBA_D48 FBA_DQS_RN7 MDC49 FBC_D48 FBC_DQS_RN7
AH35 FBA_D49 DQSA[3..0] 27 C31 FBC_D49 DQSC[3..0] 29
MDA50 AH34 L34 DQSA0 MDC50 C29 C14 DQSC0
MDA51 FBA_D50 FBA_DQS_WP0 DQSA1 MDC51 FBC_D50 FBC_DQS_WP0 DQSC1
AH32 FBA_D51 FBA_DQS_WP1 H35 B31 FBC_D51 FBC_DQS_WP1 A10
MDA52 AJ33 J32 DQSA2 MDC52 C32 E10 DQSC2
AL35 FBA_D53 FBA_DQS_WP3 N31 DQSA[7..4] 28 B32 FBC_D53 FBC_DQS_WP3 D14 DQSC[7..4] 30
MDA54 AM34 AE31 DQSA4 MDC54 B35 E26 DQSC4
AM35 FBA_D55 FBA_DQS_WP5 AJ32 B34 FBC_D55 FBC_DQS_WP5 D32
MDA56 AF33 AJ34 DQSA6 MDC56 A29 A32 DQSC6
AE32 FBA_D57 FBA_DQS_WP7 AC33 B28 FBC_D57 FBC_DQS_WP7 B26
MDA58 AF34 MDC58 A28
MDA59 FBA_D58 MDC59 FBC_D58
AE35 FBA_D59 FBA_WCK0 P29 C28 FBC_D59 FBC_WCK0 G14
MDA60 AE34 R29 MDC60 C26 G15
MDA61 FBA_D60 FBA_WCK0_N MDC61 FBC_D60 FBC_WCK0_N
AE33 FBA_D61 FBA_WCK1 L29 D25 FBC_D61 FBC_WCK1 G11
MDA62 AB32 M29 MDC62 B25 G12
MDA63 FBA_D62 FBA_WCK1_N MDC63 FBC_D62 FBC_WCK1_N
AC35 FBA_D63 FBA_WCK2 AG29 A25 FBC_D63 FBC_WCK2 G27
FBA_WCK2_N AH29 FBC_WCK2_N G28
+FB_PLLAVDD_0 AG27 AD29 +1.5VSDGPU G24
FB_DLLAVDD_0 FBA_WCK3 DIS@ 1 FBC_WCK3
AF27 FB_PLLAVDD_0 FBA_WCK3_N AE29 2 K27 FBCAL_PD_VDDQ FBC_WCK3_N G25
40.2_0402_1% R36
+FB_PLLAVDD_1 J19 2 DIS@ 1 L27
FB_DLLAVDD_1 40.2_0402_1% R42 FBCAL_PU_GND
J18 FB_PLLAVDD_1 FBA_CLK0 T32 CLKA0 27 FBC_CLK0 E17 CLKC0 29
T31 CLKA0# 27 2 DIS@ 1 M27 D17 CLKC0# 29
FBA_CLK0_N 60.4_0402_1% R41 FBCAL_TERM_GND FBC_CLK0_N
J27 FB_VREF_NC
FBA_DEBUG0 T30 AC31 CLKA1 28 FBB_DEBUG0 G19 D23 CLKC1 30
FBA_DEBUG1 T29 FBA_DEBUG0 FBA_CLK1 FBB_DEBUG1 FBC_DEBUG0 FBC_CLK1
FBA_DEBUG1 FBA_CLK1_N AC30 CLKA1# 28 G16 FBB_DEBUG1 FBC_CLK1_N E23 CLKC1# 30
N12P-GV1-A1_BGA973
N12P-GV1-A1_BGA973 DIS@ DIS@
DIS@ DIS@
+1.5VSDGPU +FB_PLLAVDD_0 2 1 +FB_PLLAVDD_1 2 1
+1.05VSDGPU +1.05VSDGPU
10U_0805_10V4Z
10U_0805_10V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2 DIS@ 1 FBA_DEBUG0 100mA L25 100mA L26
1U_0603_10V6K
1U_0603_10V6K
DIS@ C505
DIS@ C504
DIS@ C501
DIS@ C583
DIS@ C101
DIS@ C582
DIS@ C584
DIS@ C578
C54
C55
60.4_0402_1% R38 1 1 1 1 1 BLM18PG330SN1_2P 1 1 1 1 1 BLM18PG330SN1_2P

2 DIS@ 1 FBB_DEBUG0
60.4_0402_1% R43
DIS@
DIS@
2 2 2 2 2 2 2 2 2 2
2 DIS@ 1 FBA_DEBUG1
10K_0402_5% R34
2 DIS@ 1 FBB_DEBUG1
10K_0402_5% R478

2011/02/08 2012/02/08 Title
Issued Date Deciphered Date N12P VRAM 2/9
A
5 4 3 2 1
For GB2-128 & GB2b-128 colayout....

U27D +3VSDGPU
Part 4 of 7
2
31 VGA_TXCLK+ AM11 IFPA_TXC NC_0 A2
31 VGA_TXCLK- AM12 A7 R774
IFPA_TXC_N NC_1
31 VGA_TXOUT0+ AM8 IFPA_TXD0 NC_2 B7 10K_0402_5%
31 VGA_TXOUT0- AL8 IFPA_TXD0_N NC_3 C5 @
31 VGA_TXOUT1+ AM10 C7 STRAP4
1
D IFPA_TXD1 NC_4 STRAP4 D
31 VGA_TXOUT1- AM9 IFPA_TXD1_N NC_5 D5 R04 modify
31 VGA_TXOUT2+ AK10 IFPA_TXD2 NC_6 D6 R04 modify
2
31 VGA_TXOUT2- AL10 D7 STRAP3 Straps MULTI LEVEL STRAPS
IFPA_TXD2_N NC_7 R775
AK11 IFPA_TXD3 NC_8 E5
AL11 E7 PGOOD 2 R778 1 20K_0402_5% +3VSDGPU +3VSDGPU
IFPA_TXD3_N NC_9 GV@ X76@
NC_10 F4
G5 10K_0402_5%
1
NC_11
1
15K_0402_1%
10K_0402_1%
15K_0402_1%
34.8K_0402_1%
X76@ R480
15K_0402_1%
45.3K_0402_1%
@ R482
R125
DIS@ R481
R475
R128
AP13 IFPB_TXC NC_12 H32
AN13 IFPB_TXC_N NC_13 J25
AN8 IFPB_TXD4 NC_14 J26
AP8 P6 STRAP_REF2 2 R779 1
X76@
IFPB_TXD4_N NC_15
X76@
X76@
AP10 U7
2
IFPB_TXD5 NC_16 40.2K_0402_1% +3VSDGPU
AN10 IFPB_TXD5_N NC_17 V6
AR11 Y4 GV@ STRAP0 ROM_SI
IFPB_TXD6 NC_18 STRAP1 ROM_SO
AR10 IFPB_TXD6_N NC_19 AA4
2
AN11 AB4 STRAP2 ROM_SCLK
IFPB_TXD7 NC_20 R776
AP11 IFPB_TXD7_N NC_21 AB7
NC_22 AC5 10K_0402_5%
20K_0402_1%
15K_0402_1%
1
1
24.9K_0402_1%
45.3K_0402_1%
X76@ R453
10K_0402_1%
34.8K_0402_1%
R460
DIS@ R461
X76@ R459
X76@ R126
NC
AD6
X76@ R127
NC_23 @
33 VGA_HDMI_TXD2+ AM7 AF6
1
IFPC_L0 NC_24 STRAP3
33 VGA_HDMI_TXD2- AM6 IFPC_L0_N NC_25 AG6
33 VGA_HDMI_TXD1+ AL5 IFPC_L1 NC_26 AG20 R04 modify
@
33 VGA_HDMI_TXD1- AM5 AJ5
2
IFPC_L1_N NC_27 R777
33 VGA_HDMI_TXD0+ AM3 IFPC_L2 NC_28 AK15
33 VGA_HDMI_TXD0- AM4 IFPC_L2_N NC_29 AL7 15K_0402_5%
AP1 X76@
33 VGA_HDMI_TXC+ IFPC_L3
33 VGA_HDMI_TXC- AR2
1
IFPC_L3_N
AR8 IFPD_L0
AR7 IFPD_L0_N
AP7 IFPD_L1
C C
AN7 IFPD_L1_N
AN5 IFPD_L2
AP5 For N12P-GS strap table
LVDS/TMDS
IFPD_L2_N
AR5 IFPD_L3
AR4 IFPD_L3_N GPU Frenq. Memory Size Memory Config strap0 strap1 strap2 strap3 strap4 ROM_SI ROM_SO ROM_SCLK
AH6 64M* 16* 8 Hynix R481 R461 R459 R453 R127 R125
IFPE_L0 N12P-GS 800 MHz 1GB SA000032420 PU 45K PD 35K PD 25K NC NC PD 5K PD 10K PU 15K
AH5 IFPE_L0_N
AH4 IFPE_L1
AG4 64M* 16* 8 Hynix R481 R461 R459 R453 R127 R125
IFPE_L1_N N12P-GS 900 MHz 1GB SA000041S40 PU 45K PD 35K PD 25K NC NC PD 15K PD 10K PU 15K
AF4 IFPE_L2
AF5 IFPE_L2_N
AE6 64M* 16* 8 Samsung R481 R461 R459 R453 R127 R125
IFPE_L3 N12P-GS 900 MHz 1GB SA00004GS10 PU 45K PD 35K PD 25K NC NC PD 20K PD 10K PU 15K
AE5 IFPE_L3_N
D35 R484 1 DIS@ 2 0_0402_5% 128M* 16* 8 Samsung R481 R461 R459 R453 R127 R125
VDD_SENSE_0 R485 1 DIS@ N12P-GS NC NC
AL2 IFPF_L0 VDD_SENSE_1 P7 2 0_0402_5% 800 MHz 2GB SA00003MQ60 PU 45K PD 35K PD 25K PD 45K PD 10K PU 15K
+3VSDGPU AL3 AD20 R483 1 DIS@ 2 0_0402_5%
IFPF_L0_N VDD_SENSE_2 GCORE_SEN 54 128M* 16* 8 Hynix R481 R461 R459 R453 R127 R125
AJ3 IFPF_L1
AJ2 N12P-GS 800 MHz 2GB SA00003VS10 PU 45K PD 35K PD 25K NC NC PD 35K PD 10K PU 15K
IFPF_L1_N
AJ1 IFPF_L2
1
AH1 AD19 R488 1 DIS@ 2 0_0402_5%

IFPF_L2_N GND_SENSE_0 FB_GND 54
R94 R89 AH2 E35 R487 1 DIS@ 2 0_0402_5%
4.7K_0402_5% 4.7K_0402_5% AH3 IFPF_L3 GND_SENSE_1 R486 1 DIS@
IFPF_L3_N GND_SENSE_2 R7 2 0_0402_5%
DIS@ DIS@
For N12P-GV (ES) strap table
2
33 VGA_HDMI_SCLK AP2 GPU Frenq. Memory Size Memory Config strap0 strap1 strap2 strap3 strap4 ROM_SI ROM_SO ROM_SCLK
IFPC_AUX_I2CW_SCL
AN3
33 VGA_HDMI_SDATA IFPC_AUX_I2CW_SDA_N TEST 64M* 16* 4 Hynix R481 R461 R480 R777 R775 R453 R128 R125
N12P-GV(ES) 800 MHz 512MB SA000032420 PU 45K PD 35K PU 45K PD 15K PD 20K PD 5K PU 10K PU 15K
B DIS@ B
AP4 AP35 R403 1 2 10K_0402_5%
IFPD_AUX_I2CX_SCL TESTMODE JTAG_TCK @ 64M* 16* 4 Hynix R481 R461 R480 R777 R775 R453 R128 R125
AN4 IFPD_AUX_I2CX_SDA_N JTAG_TCK AP14 PAD T27
AN14 JTAG_TDI @ N12P-GV(ES) 900 MHz 512MB SA000041S40 PU 45K PD 35K PU 45K PD 15K PD 20K PD 15K PU 10K PU 15K
JTAG_TDI PAD T1
AN16 JTAG_TDO PAD @
JTAG_TDO T24
AE4 AR14 JTAG_TMS PAD @ 64M* 16* 4 Samsung R481 R461 R480 R777 R775 R453 R128 R125
IFPE_AUX_I2CY_SCL JTAG_TMS T26 N12P-GV(ES)
AD4 AP16 JTAG_TRST PAD @ 900 MHz 512MB SA00004GS10 PU 45K PD 35K PU 45K PD 15K PD 20K PD 20K PU 10K PU 15K
IFPE_AUX_I2CY_SDA_N JTAG_TRST_N T25
R417 2 DIS@ 110K_0402_5% 128M* 16* 4 Samsung R481 R461 R480 R777 R775 R453 R128 R125
AF3 N12P-GV(ES) 800 MHz 1GB SA00003MQ60 PU 45K PD 35K PU 45K PD 15K PD 20K PD 45K PU 10K PU 15K
IFPF_AUX_I2CZ_SCL
AF2 IFPF_AUX_I2CZ_SDA_N SERIAL R04 modify
128M* 16* 4 Hynix R481 R461 R480 R777 R775 R453 R128 R125
C3 ROM_CS# R129 1 DIS@ 2 10K_0402_5% +3VSDGPU
N12P-GV(ES) 800 MHz 1GB SA00003VS10 PU 45K PD 35K PU 45K PD 15K PD 20K PD 35K PU 10K PU 15K
ROM_CS_N ROM_SI
ROM_SI D3
C4 ROM_SO
ROM_SO ROM_SCLK
ROM_SCLK D4
if unuse this pin , pull down 36k
+3VSDGPU GENERAL A5 R130 2 DIS@ 1 36K_0402_1%

For N12P-GV-OP-B-A1 strap table
NC/SPDIF_NC GPU Frenq. Memory Size Memory Config strap0 strap1 strap2 strap3 strap4 ROM_SI ROM_SO ROM_SCLK
A4 BUFRST_N
N9 R457 2 DIS@ 1 40.2K_0402_1%
@ MULTI_STRAP_REF0_GND N12P-GV 64M* 16* 4 Hynix R481 R461 R459 R777 R775 R453 R128 R125
1 2 AB5 CEC
R463 10K_0402_5% M9 R456 2 DIS@ 1 40.2K_0402_1% OP-B-A1 800 MHz 512MB SA000032420 PU 45K PD 35K PD 5K PD 15K PD 10K PD 5K PU 10K PU 5K
STRAP0 W5 MULTI_STRAP_REF1_GND
STRAP1 W7 STRAP0 N12P-GV 64M* 16* 4 Hynix R481 R461 R459 R777 R775 R453 R128 R125
STRAP1 THERMDP B5
STRAP2 V7 B4 OP-B-A1 900 MHz 512MB SA000041S40 PU 45K PD 35K PD 5K PD 15K PD 10K PD 15K PU 10K PU 5K
STRAP2 THERMDN
N12P-GV 64M* 16* 4 Samsung R481 R461 R459 R777 R775 R453 R128 R125
OP-B-A1 900 MHz 512MB SA00004GS10 PU 45K PD 35K PD 5K PD 15K PD 10K PD 20K PU 10K PU 5K
N12P-GV1-A1_BGA973 N12P-GV 128M* 16* 4 Samsung R481 R461 R459 R777 R775 R453 R128 R125
OP-B-A1 800 MHz 1GB SA00003MQ60 PU 45K PD 35K PD 5K PD 15K PD 10K PD 45K PU 10K PU 5K
A A
DIS@
N12P-GV 128M* 16* 4 Hynix R481 R461 R459 R777 R775 R453 R128 R125
OP-B-A1 800 MHz 1GB SA00003VS10 PU 45K PD 35K PD 5K PD 15K PD 10K PD 35K PU 10K PU 5K

N12P LVDS 3/9
Custom
5 4 3 2 1
5 4 3 2 1
D D
U27E
+1.5VSDGPU
7200mA Part 5 of 7 +1.05VSDGPU
J23 AG11 2500mA
FBVDDQ_0 PEX_IOVDDQ_0
22U_0805_6.3V6M
10U_0603_6.3V6M
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
4.7U_0603_6.3V6K
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
4.7U_0603_6.3V6K
0.1U_0402_16V4Z
0.1U_0402_16V4Z
J24 FBVDDQ_1 PEX_IOVDDQ_1 AG12
C69
C80
DIS@ C109
C58
C67
C70
DIS@ C183
DIS@ C103
DIS@ C108
C91
DIS@ C126
C90
C85
1 1 1 1 1 1 J29 FBVDDQ_2 PEX_IOVDDQ_2 AG13 1 1 1 1 1 1 1
AA27 FBVDDQ_3 PEX_IOVDDQ_3 AG15
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
2 2 2 2 2 2 2 2 2 2 2 2 2
AB27 FBVDDQ_6 PEX_IOVDDQ_6 AG18
AB29
AC27
FBVDDQ_7 PEX_IOVDDQ_7 AG22
AG23
Under GPU
C FBVDDQ_8 PEX_IOVDDQ_8 C
AD27 FBVDDQ_9 PEX_IOVDDQ_9 AG24
+1.05VSDGPU
under GPU AE27
AJ28
FBVDDQ_10 PEX_IOVDDQ_10 AG25
AG26
22U_0805_6.3V6M
10U_0603_6.3V6M
1U_0402_6.3V6K
1U_0402_6.3V6K
4.7U_0603_6.3V6K
0.1U_0402_16V4Z
0.1U_0402_16V4Z
B18 FBVDDQ_12 PEX_IOVDDQ_12 AJ14
DIS@ C62
C63
DIS@ C116
C84
C79
C73
C98
1U_0402_6.3V6K
4.7U_0603_6.3V6K
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
E21 FBVDDQ_13 PEX_IOVDDQ_13 AJ15 1 1 1 1 1 1 1
C61
C65
C76
C64
DIS@ C104
C87
1 1 1 1 1 1 G17 FBVDDQ_14 PEX_IOVDDQ_14 AJ19
G18 FBVDDQ_15 PEX_IOVDDQ_15 AJ21
DIS@
DIS@
DIS@
DIS@
DIS@
G22 FBVDDQ_16 PEX_IOVDDQ_16 AJ22
2 2 2 2 2 2 2
DIS@
DIS@
DIS@
DIS@
DIS@
2 2 2 2 2 2
G8
G9
FBVDDQ_17 PEX_IOVDDQ_17 AJ24
AJ25
Under GPU
H29 FBVDDQ_19 PEX_IOVDDQ_19 AJ27
POWER
J14 FBVDDQ_20 PEX_IOVDDQ_20 AK18
BLM18PG181SN1D_0603 220mA
under GPU J15
J16
FBVDDQ_21 PEX_IOVDDQ_21 AK20
AK23 2 1
1U_0402_6.3V6K
0.1U_0402_16V4Z
4.7U_0603_6.3V6K
2 1 +IFPAB_PLLVDD J17 AK26 L6
DIS@ C120
DIS@ C179
DIS@ C115
DISO@L4
DISO@L4 J20 AL16 1 1 1 MBC1608121YZF_0603
C149 C173 C174 FBVDDQ_24 PEX_IOVDDQ_24
J21 FBVDDQ_25 DIS@
1U_0402_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
0.1U_0402_16V4Z
1 1 1 1 J22 FBVDDQ_26
1
N27 FBVDDQ_27
C175 R103 P27 AK16 2500 mA 2 2 2
FBVDDQ_28 PEX_IOVDD_0
DISO@
DISO@
DISO@
DISO@ 10K_0402_5% R27 AK17

2 2 2 2 OPT@ FBVDDQ_29 PEX_IOVDD_1
T27 FBVDDQ_30 PEX_IOVDD_2 AK21
U27 AK24 NV recommand 0720
2
FBVDDQ_31 PEX_IOVDD_3 Under GPU

U29 FBVDDQ_32 PEX_IOVDD_4 AK27 R04 modify +3VSDGPU
V27 FBVDDQ_33
V29 FBVDDQ_34
V34 FBVDDQ_35 2 DIS@ 1
120mA
1U_0402_6.3V6K
0.1U_0402_16V4Z
4.7U_0603_6.3V6K
W27 AG14 +PEX_PLLVDD R82
FBVDDQ_36 PEX_PLLVDD
DIS@ C147
DIS@ C148
C99
Y27 1 1 1 0_0603_5%
+1.8VSDGPU FBVDDQ_37 +1.05VSDGPU
DISO@ 300 mA
120mA
DIS@
2 1 +IFPAB_IOVDD +IFPAB_PLLVDD AK9 AG19 +PEX_SVDD_3V3 2 @ 1
B L7 1K_0402_5% 2 DIS@ IFPAB_PLLVDD PEX_SVDD_3V3 2 2 2 B
1 R71 AJ11 IFPAB_RSET PEX_SVDD_3V3_NC F7 R98
1U_0402_6.3V6K
4.7U_0603_6.3V6K
0.1U_0402_16V4Z
0.1U_0402_16V4Z
BLM18PG181SN1D_0603 1 1 C150 1 C177 1 C178 0_0603_5%

1
C182 +IFPAB_IOVDD AG9 IFPA_IOVDD 120mA

DISO@
DISO@
DISO@
DISO@ R114 AG10 J10 +VDD33

2 2 2 2 10K_0402_5% IFPB_IOVDD VDD33_0
J11 Under GPU
OPT@ VDD33_1 +3VSDGPU
VDD33_2 J12
+IFPC_PLLVDD AJ9 J13 2 DIS@ 1
2
IFPC_PLLVDD VDD33_3
1U_0402_6.3V6K
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
4.7U_0603_6.3V6K
1K_0402_5% 2 DIS@ 1 R76 AK7 J9
IFPC_RSET VDD33_4 R63
DIS@ C118
DIS@ C122
DIS@ C134
DIS@ C141
DIS@ C137
1 1 1 1 1 0_0603_5%
+IFPC_IOVDD AJ8 IFPC_IOVDD
MIOA_VDDQ_NC_0 P9
+IFPC_PLLVDD 2 2 2 2 2
AC6 IFPD_PLLVDD MIOA_VDDQ_NC_1 R9 R04 modify
1K_0402_5% 2 DIS@ 1 R464
440 mA Under GPU AB6 IFPD_RSET MIOA_VDDQ_NC_2 T9
1
+3VSDGPU U9
DISO@ +IFPC_IOVDD MIOA_VDDQ_NC_3 R800
AK8 IFPD_IOVDD
+IFPC_PLLVDD
2
L8
1
AA9
10K_0402_5%
DIS@
Under GPU
MIOB_VDDQ_NC_0
C153
C188
C185
C181
C158
1U_0402_6.3V6K
4.7U_0603_6.3V6K
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
BLM18PG181SN1D_0603 10K_0402_5%2 DIS@ 1 R468 AJ6 AB9
2
1K_0402_5% 2 DIS@ IFPEF_PLLVDD MIOB_VDDQ_NC_1
1 1 1 1 1 1 R469 AL1 IFPEF_RSET MIOB_VDDQ_NC_2 W9
MIOB_VDDQ_NC_3 Y9
1
1
10K_0402_5%1 DIS@ 2 R68 AE7 IFPE_IOVDD
DISO@
DISO@
DISO@
DISO@
DISO@
R131 AD7 R801

2 2 2 2 2 10K_0402_5% IFPF_IOVDD
10K_0402_5%
OPT@ DIS@
2
N12P-GV1-A1_BGA973 2
Under GPU
DIS@
A A
+1.05VSDGPU
DISO@ 570 mA
2 1 +IFPC_IOVDD
1U_0402_6.3V6K
4.7U_0603_6.3V6K
0.1U_0402_16V4Z
0.1U_0402_16V4Z
L3
DISO@ C157
DISO@ C156
DISO@ C155
BLM18PG181SN1D_0603 1 1 1 1
DISO@ C159
2 2 2 2
R77
10K_0402_5%
OPT@
N12P POWER & GND 4/9
2
Under GPU DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom JE50-HR/SJV50-HR M/B Schematics E
5 4 3 2 1
5 4 3 2 1
D U27F D
B3 Part 6 of 7
GND_0
B6 GND_1 GND_97 V18
B9 GND_2 GND_98 V20
B12 GND_3 GND_99 V22
B15 GND_4 GND_100 V24
B21 V31 +VGA_CORE
GND_5 GND_101 +VGA_CORE
B24
B27
GND_6 GND_102 Y11
Y13
Under GPU U27G
GND_7 GND_103
B30 GND_8 GND_104 Y15 41020mA
B33 GND_9 GND_105 Y17 AB11 VDD_0 VDD_56 P21
0.01U_0402_16V7K
0.01U_0402_16V7K
0.01U_0402_16V7K
0.01U_0402_16V7K
0.01U_0402_16V7K
0.01U_0402_16V7K
0.01U_0402_16V7K
0.01U_0402_16V7K
C2 Y19 AB13 Part 7 of 7 P23
GND_10 GND_106 VDD_1 VDD_57
C83
C88
C94
DIS@ C107
DIS@ C110
DIS@ C114
DIS@ C121
C72
C34 GND_11 GND_107 Y21 1 1 1 1 1 1 1 1 AB15 VDD_2 VDD_58 P25
E6 GND_12 GND_108 Y23 AB17 VDD_3 VDD_59 R11
E9 GND_13 GND_109 Y25 AB19 VDD_4 VDD_60 R12
DIS@
DIS@
DIS@
DIS@
E12 GND_14 GND_110 AA2 AB21 VDD_5 VDD_61 R13
2 2 2 2 2 2 2 2
E24 GND_17 GND_113 AA12 AC11 VDD_8 VDD_64 R16
F2 GND_20 GND_116 AA15 AC14 VDD_11 VDD_67 R19
0.022U_0402_16V7K
0.022U_0402_16V7K
0.022U_0402_16V7K
0.047U_0402_16V7K
0.047U_0402_16V7K
0.047U_0402_16V7K
0.1U_0402_16V4Z
0.1U_0402_16V4Z
DIS@C112
DIS@ C130
DIS@ C95
C97
C74
C96
C77
C78
F34 GND_22 GND_118 AA17 1 1 1 1 1 1 1 1 AC16 VDD_13 VDD_69 R21
J2 GND_24 GND_120 AA19 AC18 VDD_15 VDD_71 R23
DIS@
DIS@
DIS@
DIS@
DIS@
2 2 2 2 2 2 2 2
J34 GND_27 GND_123 AA22 AC21 VDD_18 VDD_74 T12
K9 GND_28 GND_124 AA23 AC22 VDD_19 VDD_75 T14
L9 GND_29 GND_125 AA24 AC23 VDD_20 VDD_76 T16
POWER
C C
M2 GND_30 GND_126 AA25 AC24 VDD_21 VDD_77 T18
M5 GND_31 GND_127 AA34 AC25 VDD_22 VDD_78 T20
M11 GND_32 GND_128 AB12 AD12 VDD_23 VDD_79 T22
M13 GND_33 GND_129 AB14 AD14 VDD_24 VDD_80 T24
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
M15 GND_34 GND_130 AB16 AD16 VDD_25 VDD_81 V11
C123
C131
C133
C139
M17 GND_35 GND_131 AB18 1 1 1 1 AD18 VDD_26 VDD_82 V13
M23 GND_38 GND_134 AB24 L11 VDD_29 VDD_85 V19
2 2 2 2
M25 GND_39 GND_135 AC9 L12 VDD_30 VDD_86 V21
M31 GND_40 GND_136 AD2 L13 VDD_31 VDD_87 V23
M34 GND_41 GND_137 AD5 L14 VDD_32 VDD_88 V25
GND
N11 GND_42 GND_138 AD11 L15 VDD_33 VDD_89 W11

N12 GND_43 GND_139 AD13 Put Under GPU L16 VDD_34 VDD_90 W12
N14 AD17 DIS@ DIS@ DIS@ DIS@ L18 W14
N17 AD25 +VGA_CORE L21 W17
N18 GND_49 GND_145 AD31 R03 modify L22 VDD_40 VDD_96 W18
N20 GND_51 GND_147 AE11 L24 VDD_42 VDD_98 W20
10U_0603_6.3V6M
10U_0603_6.3V6M
22U_0805_6.3V6M
4.7U_0603_6.3V6K
N21 GND_52 GND_148 AE12 1 1 L25 VDD_43 VDD_99 W21
47U_0805_4V6
DIS@ C594
DIS@ C595
DIS@ C592
DIS@ C591
DIS@ C593
N22 GND_53 GND_149 AE13 1 1 1 1 1 M12 VDD_44 VDD_100 W22
N23 AE14 GS@ C1 + GS@ C604 + M14 W23
GND_54 GND_150 470U_V_2.5VM 470U_V_2.5VM VDD_45 VDD_101
N24 GND_55 GND_151 AE15 M16 VDD_46 VDD_102 W24
N25 GND_56 GND_152 AE16 M18 VDD_47 VDD_103 W25
2 2 2 2 2 2 2
P12 GND_57 GND_153 AE17 M20 VDD_48 VDD_104 Y12
P18 GND_60 GND_156 AE20 P11 VDD_51 VDD_107 Y18
B B
R2 GND_64 GND_160 AE24 P19 VDD_55
R5 GND_65 GND_161 AE25
R31 AG2 GV@ GV@
GND_66 GND_162
R34 GND_67 GND_163 AG5
T11 GND_68 GND_164 AG31
T13 GND_69 GND_165 AG34
T15 AK2 N12P-GV1-A1_BGA973
GND_70 GND_166
T17 GND_71 GND_167 AK5
T19 GND_72 GND_168 AK14 DIS@
T21 AK31 C1 C604
GND_73 GND_169 330U_V_2.5VM 330U_V_2.5VM
T23 GND_74 GND_170 AK34
T25 GND_75 GND_171 AL6
U11 GND_76 GND_172 AL9
U12
U13
GND_77 GND_173 AL12
AL15
For Cost Down 2/21
GND_78 GND_174
U14 GND_79 GND_175 AL18
U15 GND_80 GND_176 AL21
U16 GND_81 GND_177 AL24
U17 GND_82 GND_178 AL27
U18 GND_83 GND_179 AL30
U19 GND_84 GND_180 AN2
U20 GND_85 GND_181 AN34
U21 GND_86 GND_182 AP3
U24 GND_89 GND_185 AP12
U25 GND_90 GND_186 AP15
V2 GND_91 GND_187 AP18
A A
V12 GND_94 GND_190 AP27
V14 GND_95 GND_191 AP30
V16 GND_96 GND_192 AP33
N12P-GV1-A1_BGA973
DIS@ Issued Date 2011/02/08 Deciphered Date 2012/02/08 Title
N12P POWER & GND 5/9
5 4 3 2 1
5 4 3 2 1
VRAM DDR3 chips (1GB) Mode D

Address 0..31 32..63
CMD0 CS0_L#
D 64Mx16 DDR3 *8==>1GB CMD1 D
CMD2 ODT_L
CMD3 CKE
CMD4 A14 A14
DQSA[7..0] CMD5 RST RST
23,28 DQSA[7..0]
U23 X76@ U4 X76@
DQSA#[7..0] CMD6 A9 A9
23,28 DQSA#[7..0]
+MEM_VREF0 M8 E3 MDA18 +MEM_VREF1 M8 E3 MDA3
DQMA[7..0] VREFCA DQL0 MDA19 VREFCA DQL0 MDA4
23,28 DQMA[7..0] H1 VREFDQ DQL1 F7 H1 VREFDQ DQL1 F7 CMD7 A7 A7
F2 MDA23 F2 MDA2
MDA[63..0] CMDA9 DQL2 MDA17 CMDA9 DQL2 MDA7
23,28 MDA[63..0] N3 A0 DQL3 F8 N3 A0 DQL3 F8 CMD8 A2 A2
CMDA11 P7 H3 MDA21 Group2 CMDA11 P7 H3 MDA0 Group0
CMDA[30..0] CMDA8 A1 DQL4 MDA16 CMDA8 A1 DQL4 MDA5
23,28 CMDA[30..0] P3 A2 DQL5 H8 P3 A2 DQL5 H8 CMD9 A0 A0
CMDA25 N2 G2 MDA20 CMDA25 N2 G2 MDA1
CMDA10 A3 DQL6 MDA22 CMDA10 A3 DQL6 MDA6
P8 A4 DQL7 H7 P8 A4 DQL7 H7 CMD10 A4 A4
CMDA24 P2 CMDA24 P2
CMDA22 A5 CMDA22 A5
R8 A6 R8 A6 CMD11 A1 A1
+1.5VSDGPU CMDA7 R2 D7 MDA12 CMDA7 R2 D7 MDA29
CMDA21 A7 DQU0 MDA11 CMDA21 A7 DQU0 MDA26
T8 A8 DQU1 C3 T8 A8 DQU1 C3 CMD12 BA0 BA0
CMDA6 R3 C8 MDA14 CMDA6 R3 C8 MDA31
L7 A10/AP DQU3 C2 L7 A10/AP DQU3 C2 CMD13 WE* WE*
DIS@ CMDA23 R7 A7 MDA13 Group1 CMDA23 R7 A7 MDA27 Group3
R391 CMDA28 A11 DQU4 MDA10 CMDA28 A11 DQU4 MDA25
N7 A12 DQU5 A2 N7 A12 DQU5 A2 CMD14 A15 A15
240_0402_1% CMDA20 T3 B8 MDA15 CMDA20 T3 B8 MDA30
T7 A14 DQU7 A3 T7 A14 DQU7 A3 CMD15 CAS* CAS*
CMDA14 M7 CMDA14 M7
+MEM_VREF0 A15/BA3 +1.5VSDGPU A15/BA3 +1.5VSDGPU
CMD16 CS0_H#
DIS@
C C
0.1U_0402_16V4Z
1 CMDA12 M2 B2 CMDA12 M2 B2 CMD17

DIS@ CMDA27 BA0 VDD CMDA27 BA0 VDD
N8 BA1 VDD D9 N8 BA1 VDD D9
R392 CMDA26 M3 G7 CMDA26 M3 G7 CMD18 ODT_H
240_0402_1% BA2 VDD BA2 VDD
VDD K2 VDD K2
2
C495
VDD K8 VDD K8 CMD19 CKE_H

VDD N1 VDD N1
CLKA0 J7 N9 CLKA0 J7 N9 CMD20 A13 A13
CLKA0# CK VDD CLKA0# CK VDD
K7 CK VDD R1 K7 CK VDD R1
CMDA3 K9 R9 CMDA3 K9 R9 CMD21 A8 A8
CKE/CKE0 VDD +1.5VSDGPU CKE/CKE0 VDD +1.5VSDGPU
CMD22 A6 A6
+1.5VSDGPU CMDA2 K1 A1 CMDA2 K1 A1
CMDA0 ODT/ODT0 VDDQ CMDA0 ODT/ODT0 VDDQ
L2 CS/CS0 VDDQ A8 L2 CS/CS0 VDDQ A8 CMD23 A11 A11
CMDA30 J3 C1 CMDA30 J3 C1
CMDA15 RAS VDDQ CMDA15 RAS VDDQ
K3 CAS VDDQ C9 K3 CAS VDDQ C9 CMD24 A5 A5
DIS@ CMDA13 L3 D2 CMDA13 L3 D2
R23 WE VDDQ WE VDDQ
310mAVDDQ E9 VDDQ E9 CMD25 A3 A3
240_0402_1% F1 310mAVDDQ F1
DQSA2 VDDQ DQSA0
F3 DQSL VDDQ H2 F3 DQSL VDDQ H2 CMD26 BA2 BA2
DQSA1 C7 H9 DQSA3 C7 H9
+MEM_VREF1 DQSU VDDQ DQSU VDDQ
CMD27 BA1 BA1
DIS@
0.1U_0402_16V4Z
1 DQMA2 E7 A9 DQMA0 E7 A9 CMD28 A12 A12

DIS@ DQMA1 DML VSS DQMA3 DML VSS
D3 DMU VSS B3 D3 DMU VSS B3
R25 E1 E1 CMD29 A10 A10
240_0402_1% VSS VSS
VSS G8 VSS G8
2
C25
DQSA#2 G3 J2 DQSA#0 G3 J2 CMD30 RAS* RAS*

DQSA#1 DQSL VSS DQSA#3 DQSL VSS
B7 DQSU VSS J8 B7 DQSU VSS J8
VSS M1 VSS M1 Not Available
VSS M9 VSS M9
CMDA5 VSS P1
CMDA5 VSS P1 LOW HIGH
T2 RESET VSS P9 T2 RESET VSS P9
B B
VSS T1 VSS T1
ZQ0 L8 T9 ZQ1 L8 T9
ZQ/ZQ0 VSS ZQ/ZQ0 VSS
1
1
CLKA0 1 2
23 CLKA0
R12 DIS@ J1 B1 DIS@ J1 B1 CMDA2 R397 1 DIS@ 2 10K_0402_5% Command Bit Default Pull-down
NC/ODT1 VSSQ NC/ODT1 VSSQ
1
@ R395 L1 B9 R390 L1 B9 CMDA3 R398 1 DIS@ 2 10K_0402_5%

DIS@ 80.6_0402_1% 243_0402_1% NC/CS1 VSSQ 243_0402_1% NC/CS1 VSSQ CMDA5 R399 DIS@ 10K_0402_5%
J9 NC/CE1 VSSQ D1 J9 NC/CE1 VSSQ D1 1 2 ODTx 10k
R15 L9 D8 L9 D8 CMDA18 R401 1 DIS@ 2 10K_0402_5%
2
2
160_0402_1% NCZQ1 VSSQ NCZQ1 VSSQ CMDA19 R400 DIS@ 10K_0402_5% DDR3 CKEx 10k
VSSQ E2 VSSQ E2 1 2
E8 E8 RST 10k
2
CLKA0# 1 VSSQ VSSQ

23 CLKA0# 2 VSSQ F9 VSSQ F9
R11 CS* No Termination
VSSQ G1 VSSQ G1
@ 1 G9 G9
80.6_0402_1% @ VSSQ VSSQ
C4 96-BALL 96-BALL
0.01U_0402_16V7K SDRAM DDR3 SDRAM DDR3
2 K4B1G1646E-HC12_FBGA96 K4B1G1646E-HC12_FBGA96
NV recommand 0720
Samsung : SA000035700 (S IC D3 64MX16 K4W1G1646E-HC12 FBGA 96P)
Hynix : SA000032400 (S IC D3 64MX16 H5TQ1G63BFR-12C FBGA 1.5V )
1U_0603_10V6K
1U_0603_10V6K
1U_0603_10V6K
1U_0603_10V6K
1U_0603_10V6K
1U_0603_10V6K
1U_0603_10V6K
1U_0603_10V6K
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
DIS@ C486
DIS@ C488
DIS@ C493
DIS@ C487
DIS@ C512
DIS@ C511
DIS@ C508
DIS@ C506
DIS@ C502
DIS@ C497
C19
C21
C22
C18
C27
C31
C33
C34
C35
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 AMD :SA00003PF10
(S IC D3 64M16/800 23EY2387MB-12 PG-TFBGA 96P 1.5V)
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
A A

N12P DDR3 6/9
Custom
5 4 3 2 1
5 4 3 2 1
VRAM DDR3 chips (1GB) Mode D

Address 0..31 32..63
64Mx16 DDR3 *8==>1GB CMD0 CS0_L#
CMD1
D D
CMD2 ODT_L
U3 X76@ U24 X76@
CMD3 CKE
+MEM_VREF2 M8 E3 MDA39 +MEM_VREF3 M8 E3 MDA58
VREFCA DQL0 MDA35 VREFCA DQL0 MDA59
H1 VREFDQ DQL1 F7 H1 VREFDQ DQL1 F7 CMD4 A14 A14
DQMA[7..0] F2 MDA37 F2 MDA56
23,27 DQMA[7..0] DQL2 DQL2
CMDA9 N3 F8 MDA33 CMDA9 N3 F8 MDA63 CMD5 RST RST
CMDA[30..0] CMDA11 A0 DQL3 MDA38 Group4 CMDA11 A0 DQL3 MDA57 Group7
23,27 CMDA[30..0] P7 A1 DQL4 H3 P7 A1 DQL4 H3
CMDA8 P3 H8 MDA32 CMDA8 P3 H8 MDA61 CMD6 A9 A9
DQSA#[7..0] CMDA25 A2 DQL5 MDA36 CMDA25 A2 DQL5 MDA60
23,27 DQSA#[7..0] N2 A3 DQL6 G2 N2 A3 DQL6 G2
CMDA10 P8 H7 MDA34 CMDA10 P8 H7 MDA62 CMD7 A7 A7
DQSA[7..0] CMDA24 A4 DQL7 CMDA24 A4 DQL7
23,27 DQSA[7..0] P2 A5 P2 A5
CMDA22 R8 CMDA22 R8 CMD8 A2 A2
MDA[63..0] CMDA7 A6 MDA42 CMDA7 A6 MDA49
23,27 MDA[63..0] R2 A7 DQU0 D7 R2 A7 DQU0 D7
CMDA21 T8 C3 MDA45 CMDA21 T8 C3 MDA53 CMD9 A0 A0
R3 A9 DQU2 C8 R3 A9 DQU2 C8
CMDA29 L7 C2 MDA44 CMDA29 L7 C2 MDA55 CMD10 A4 A4
CMDA23 A10/AP DQU3 MDA41 Group5 CMDA23 A10/AP DQU3 MDA48 Group6
R7 A11 DQU4 A7 R7 A11 DQU4 A7
CMDA28 N7 A2 MDA47 CMDA28 N7 A2 MDA54 CMD11 A1 A1
+1.5VSDGPU CMDA20 A12 DQU5 MDA43 CMDA20 A12 DQU5 MDA50
T3 A13 DQU6 B8 T3 A13 DQU6 B8
CMDA4 T7 A3 MDA46 CMDA4 T7 A3 MDA52 CMD12 BA0 BA0
CMDA14 A14 DQU7 CMDA14 A14 DQU7
M7 A15/BA3 M7 A15/BA3
DIS@ +1.5VSDGPU +1.5VSDGPU CMD13 WE* WE*
R21
240_0402_1% CMDA12 M2 B2 CMDA12 M2 B2 CMD14 A15 A15
CMDA27 BA0 VDD CMDA27 BA0 VDD
CMDA26 M3 G7 CMDA26 M3 G7 CMD15 CAS* CAS*
BA2 VDD BA2 VDD
VDD K2 VDD K2
+MEM_VREF2 K8 K8 CMD16 CS0_H#
VDD VDD
VDD N1 VDD N1
DIS@
0.1U_0402_16V4Z
DIS@ 1 CLKA1 J7 N9 CLKA1 J7 N9 CMD17

R22 CLKA1# CK VDD CLKA1# CK VDD
C 240_0402_1% CMDA19 CMDA19 C
K9 CKE/CKE0 VDD R9
+1.5VSDGPU
K9 CKE/CKE0 VDD R9
+1.5VSDGPU
CMD18 ODT_H
2
C23
CMD19 CKE_H
CMDA18 K1 A1 CMDA18 K1 A1
CMDA16 ODT/ODT0 VDDQ CMDA16 ODT/ODT0 VDDQ
CMDA30 J3 C1 CMDA30 J3 C1
CMDA15 RAS VDDQ CMDA15 RAS VDDQ
CMDA13 L3 D2 CMDA13 L3 D2
WE VDDQ WE VDDQ
310mAVDDQ E9 310mAVDDQ E9 CMD22 A6 A6
+1.5VSDGPU F1 F1
DQSA4 VDDQ DQSA7 VDDQ
F3 DQSL VDDQ H2 F3 DQSL VDDQ H2 CMD23 A11 A11
DQSA5 C7 H9 DQSA6 C7 H9
DIS@ DQSU VDDQ DQSU VDDQ
CMD24 A5 A5
R393
240_0402_1% DQMA4 E7 A9 DQMA7 E7 A9 CMD25 A3 A3
DQMA5 DML VSS DQMA6 DML VSS
VSS E1 VSS E1 CMD26 BA2 BA2
VSS G8 VSS G8
+MEM_VREF3 DQSA#4 G3 J2 DQSA#7 G3 J2 CMD27 BA1 BA1
DQSA#5 DQSL VSS DQSA#6 DQSL VSS
DIS@
0.1U_0402_16V4Z
DIS@ 1 M1 M1 CMD28 A12 A12

R396 VSS VSS
VSS M9 VSS M9
240_0402_1% P1 P1 CMD29 A10 A10
CMDA5 VSS CMDA5 VSS
T2 RESET VSS P9 T2 RESET VSS P9
2
C503
VSS T1 VSS T1 CMD30 RAS* RAS*

ZQ2 L8 T9 ZQ3 L8 T9
ZQ/ZQ0 VSS ZQ/ZQ0 VSS
Not Available
1
1
DIS@
DIS@ J1 B1 R389 J1 B1 LOW HIGH
R24 NC/ODT1 VSSQ 243_0402_1% NC/ODT1 VSSQ
L1 NC/CS1 VSSQ B9 L1 NC/CS1 VSSQ B9
243_0402_1% J9 D1 J9 D1
CLKA1 1 NC/CE1 VSSQ NC/CE1 VSSQ
23 CLKA1 2 L9 D8 L9 D8
2
2
B R10 NCZQ1 VSSQ NCZQ1 VSSQ B
VSSQ E2 VSSQ E2
1
@ E8 E8
DIS@ 80.6_0402_1% VSSQ VSSQ
VSSQ F9 VSSQ F9
R14 G1 G1
160_0402_1% VSSQ VSSQ
VSSQ G9 VSSQ G9
2
CLKA1# 1 2 96-BALL 96-BALL

23 CLKA1#
R9 SDRAM DDR3 SDRAM DDR3
@ 1 K4B1G1646E-HC12_FBGA96 K4B1G1646E-HC12_FBGA96
80.6_0402_1% @
C3
0.01U_0402_16V7K
2
NV recommand 0720
0.1U_0402_16V4Z
1U_0603_10V6K
1U_0603_10V6K
1U_0603_10V6K
1U_0603_10V6K
1U_0603_10V6K
1U_0603_10V6K
1U_0603_10V6K
1U_0603_10V6K
C16
C15
C14
C17
C24
C26
C28
C30
C32
C20
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
DIS@ C490
DIS@ C491
DIS@ C492
DIS@ C489
DIS@ C509
DIS@ C507
DIS@ C510
DIS@ C496
DIS@ C494
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 2
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1
A A

N12P DDR3 7/9
Custom
5 4 3 2 1
5 4 3 2 1
Mode D
Address 0..31 32..63
VRAM DDR3 chips (1GB) CMD0 CS0_L#
CMD1
64Mx16 DDR3 *8==>1GB CMD2 ODT_L
D D
CMD3 CKE
CMD4 A14 A14
CMD5 RST RST
DQSC[7..0]
23,30 DQSC[7..0]
CMD6 A9 A9
DQSC#[7..0] U28 X76@ U6 X76@
23,30 DQSC#[7..0]
CMD7 A7 A7
DQMC[7..0] +MEM_VREF4 M8 E3 MDC22 +MEM_VREF5 M8 E3 MDC3
23,30 DQMC[7..0] VREFCA DQL0 VREFCA DQL0
H1 F7 MDC16 H1 F7 MDC7 CMD8 A2 A2
MDC[63..0] VREFDQ DQL1 MDC18 VREFDQ DQL1 MDC1
23,30 MDC[63..0] DQL2 F2 DQL2 F2
CMDC9 N3 F8 MDC19 CMDC9 N3 F8 MDC4 CMD9 A0 A0
CMDC[30..0] CMDC11 A0 DQL3 MDC23 Group2 CMDC11 A0 DQL3 MDC2 Group0
23,30 CMDC[30..0] P7 A1 DQL4 H3 P7 A1 DQL4 H3
CMDC8 P3 H8 MDC17 CMDC8 P3 H8 MDC6 CMD10 A4 A4
CMDC25 A2 DQL5 MDC20 CMDC25 A2 DQL5 MDC0
N2 A3 DQL6 G2 N2 A3 DQL6 G2
CMDC24 A4 DQL7 CMDC24 A4 DQL7
P2 A5 P2 A5
CMDC22 R8 CMDC22 R8 CMD12 BA0 BA0
+1.5VSDGPU CMDC7 A6 MDC13 CMDC7 A6 MDC28
R2 A7 DQU0 D7 R2 A7 DQU0 D7
CMDC21 T8 C3 MDC10 CMDC21 T8 C3 MDC24 CMD13 WE* WE*
CMDC6 A8 DQU1 MDC14 CMDC6 A8 DQU1 MDC31
CMDC29 L7 C2 MDC9 CMDC29 L7 C2 MDC25 CMD14 A15 A15
GS@ CMDC23 A10/AP DQU3 MDC12 Group1 CMDC23 A10/AP DQU3 MDC29 Group3
R435 CMDC28 N7 A2 MDC8 CMDC28 N7 A2 MDC27 CMD15 CAS* CAS*
240_0402_1% CMDC20 A12 DQU5 MDC15 CMDC20 A12 DQU5 MDC30
CMDC4 T7 A3 MDC11 CMDC4 T7 A3 MDC26 CMD16 CS0_H#
CMDC14 A14 DQU7 CMDC14 A14 DQU7
M7 A15/BA3 M7 A15/BA3
+MEM_VREF4 +1.5VSDGPU +1.5VSDGPU CMD17
GS@
0.1U_0402_16V4Z
1 CMDC12 M2 B2 CMDC12 M2 B2 CMD18 ODT_H

GS@ CMDC27 BA0 VDD CMDC27 BA0 VDD
C R436 CMDC26 CMDC26 C
M3 BA2 VDD G7 M3 BA2 VDD G7 CMD19 CKE_H
240_0402_1% K2 K2
2 VDD VDD
C570
VDD K8 VDD K8 CMD20 A13 A13

VDD N1 VDD N1
CLKC0 J7 N9 CLKC0 J7 N9 CMD21 A8 A8
CLKC0# CK VDD CLKC0# CK VDD
CMDC3 K9 R9 CMDC3 K9 R9 CMD22 A6 A6
CMD23 A11 A11
CMDC2 K1 A1 CMDC2 K1 A1
CMDC0 ODT/ODT0 VDDQ CMDC0 ODT/ODT0 VDDQ
CMDC30 J3 C1 CMDC30 J3 C1
CMDC15 RAS VDDQ CMDC15 RAS VDDQ
+1.5VSDGPU CMDC13 L3 D2 CMDC13 L3 D2
WE VDDQ WE VDDQ
310mAVDDQ E9 VDDQ E9 CMD26 BA2 BA2
DQSC2 VDDQ F1
DQSC0
310mAVDDQ F1
F3 DQSL VDDQ H2 F3 DQSL VDDQ H2 CMD27 BA1 BA1
GS@ DQSC1 C7 H9 DQSC3 C7 H9
R86 DQSU VDDQ DQSU VDDQ
CMD28 A12 A12
240_0402_1%
DQMC2 E7 A9 DQMC0 E7 A9 CMD29 A10 A10
DQMC1 DML VSS DQMC3 DML VSS
+MEM_VREF5 E1 E1 CMD30 RAS* RAS*
VSS VSS
VSS G8 VSS G8
GS@
0.1U_0402_16V4Z
1 DQSC#2 G3 J2 DQSC#0 G3 J2 Not Available

GS@ DQSC#1 DQSL VSS DQSC#3 DQSL VSS
R85 M1 M1 LOW HIGH
240_0402_1% VSS VSS
VSS M9 VSS M9
2
C165
VSS P1 VSS P1
CMDC5 T2 P9 CMDC5 T2 P9
RESET VSS RESET VSS
VSS T1 VSS T1
ZQ4 L8 T9 ZQ5 L8 T9
B ZQ/ZQ0 VSS ZQ/ZQ0 VSS B
1
1
GS@ J1 B1 GS@ J1 B1 Command Bit Default Pull-down
R437 NC/ODT1 VSSQ R50 NC/ODT1 VSSQ CMDC2 R415 GS@ 10K_0402_5%
L1 NC/CS1 VSSQ B9 L1 NC/CS1 VSSQ B9 1 2
243_0402_1% J9 D1 243_0402_1% J9 D1 CMDC3 R416 1 GS@ 2 10K_0402_5% ODTx 10k
NC/CE1 VSSQ NC/CE1 VSSQ CMDC5 R414 GS@ 10K_0402_5%
L9 D8 L9 D8 1 2
2
2
NCZQ1 VSSQ NCZQ1 VSSQ CMDC18 R413 GS@ 10K_0402_5% DDR3 CKEx 10k
VSSQ E2 VSSQ E2 1 2
E8 E8 CMDC19 R412 1 GS@ 2 10K_0402_5% RST 10k
VSSQ VSSQ
VSSQ F9 VSSQ F9
CS* No Termination
VSSQ G1 VSSQ G1
CLKC0 1 2 G9 G9
23 CLKC0 VSSQ VSSQ
R61
1
@ 96-BALL 96-BALL
GS@ 80.6_0402_1% SDRAM DDR3 SDRAM DDR3
R69 K4B1G1646E-HC12_FBGA96 K4B1G1646E-HC12_FBGA96
160_0402_1%
2
CLKC0# 1 2
23 CLKC0# +1.5VSDGPU
R60
@ +1.5VSDGPU
1
80.6_0402_1% @
C145
1U_0603_10V6K
1U_0603_10V6K
1U_0603_10V6K
1U_0603_10V6K
1U_0603_10V6K
1U_0603_10V6K
1U_0603_10V6K
1U_0603_10V6K
0.01U_0402_16V7K
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
GS@ C127
GS@ C161
GS@ C170
GS@ C169
GS@ C168
GS@ C167
GS@ C166
GS@ C164
GS@ C163
GS@ C571
GS@ C564
GS@ C565
GS@ C573
GS@ C563
GS@ C572
GS@ C569
GS@ C568
GS@ C567
GS@ C566
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
NV recommand 0720
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
A A

N12P DDR3 8/9
Custom
5 4 3 2 1
5 4 3 2 1
VRAM DDR3 chips (1GB)

64Mx16 DDR3 *8==>1GB
D D
DQMC[7..0]
23,29 DQMC[7..0]
CMDC[30..0] Mode D
23,29 CMDC[30..0]
Address 0..31 32..63
DQSC#[7..0] U5 X76@ U26 X76@
23,29 DQSC#[7..0]
CMD0 CS0_L#
DQSC[7..0] +MEM_VREF6 M8 E3 MDC39 +MEM_VREF7 M8 E3 MDC56
23,29 DQSC[7..0] VREFCA DQL0 VREFCA DQL0
H1 F7 MDC33 H1 F7 MDC63 CMD1
MDC[63..0] VREFDQ DQL1 MDC38 VREFDQ DQL1 MDC57
23,29 MDC[63..0] DQL2 F2 DQL2 F2
CMDC9 N3 F8 MDC32 CMDC9 N3 F8 MDC60 CMD2 ODT_L
CMDC11 A0 DQL3 MDC36 Group4 CMDC11 A0 DQL3 MDC59 Group7
P7 A1 DQL4 H3 P7 A1 DQL4 H3
CMDC8 P3 H8 MDC34 CMDC8 P3 H8 MDC61 CMD3 CKE
CMDC25 A2 DQL5 MDC37 CMDC25 A2 DQL5 MDC58
N2 A3 DQL6 G2 N2 A3 DQL6 G2
CMDC24 A4 DQL7 CMDC24 A4 DQL7
P2 A5 P2 A5
CMDC22 R8 CMDC22 R8 CMD5 RST RST
+1.5VSDGPU CMDC7 A6 MDC42 CMDC7 A6 MDC48
R2 A7 DQU0 D7 R2 A7 DQU0 D7
CMDC21 T8 C3 MDC43 CMDC21 T8 C3 MDC55 CMD6 A9 A9
GS@ CMDC29 L7 C2 MDC46 CMDC29 L7 C2 MDC52 CMD7 A7 A7
R32 CMDC23 A10/AP DQU3 MDC40 Group5 CMDC23 A10/AP DQU3 MDC51 Group6
240_0402_1% CMDC28 N7 A2 MDC45 CMDC28 N7 A2 MDC54 CMD8 A2 A2
CMDC4 T7 A3 MDC47 CMDC4 T7 A3 MDC53 CMD9 A0 A0
CMDC14 A14 DQU7 CMDC14 A14 DQU7
M7 A15/BA3 M7 A15/BA3
+MEM_VREF6 +1.5VSDGPU +1.5VSDGPU CMD10 A4 A4
GS@
0.1U_0402_16V4Z
GS@ 1 CMDC12 M2 B2 CMDC12 M2 B2 CMD11 A1 A1

R31 CMDC27 BA0 VDD CMDC27 BA0 VDD
C 240_0402_1% CMDC26 CMDC26 C
M3 BA2 VDD G7 M3 BA2 VDD G7 CMD12 BA0 BA0
VDD K2 VDD K2
2
C44
VDD K8 VDD K8 CMD13 WE* WE*

VDD N1 VDD N1
CLKC1 J7 N9 CLKC1 J7 N9 CMD14 A15 A15
CLKC1# CK VDD CLKC1# CK VDD
CMDC19 K9 R9 CMDC19 K9 R9 CMD15 CAS* CAS*
CMD16 CS0_H#
CMDC18 K1 A1 CMDC18 K1 A1
+1.5VSDGPU CMDC16 ODT/ODT0 VDDQ CMDC16 ODT/ODT0 VDDQ
L2 CS/CS0 VDDQ A8 L2 CS/CS0 VDDQ A8 CMD17
CMDC30 J3 C1 CMDC30 J3 C1
CMDC15 RAS VDDQ CMDC15 RAS VDDQ
K3 CAS VDDQ C9 K3 CAS VDDQ C9 CMD18 ODT_H
GS@ CMDC13 L3 D2 CMDC13 L3 D2
R407 WE VDDQ WE VDDQ
310mAVDDQ E9 310mAVDDQ E9 CMD19 CKE_H
240_0402_1% F1 F1
DQSC4 VDDQ DQSC7 VDDQ
F3 DQSL VDDQ H2 F3 DQSL VDDQ H2 CMD20 A13 A13
DQSC5 C7 H9 DQSC6 C7 H9
DQSU VDDQ DQSU VDDQ
CMD21 A8 A8
+MEM_VREF7
DQMC4 E7 A9 DQMC7 E7 A9 CMD22 A6 A6
DML VSS DML VSS
GS@
0.1U_0402_16V4Z
GS@ 1 DQMC5 D3 B3 DQMC6 D3 B3

R408 DMU VSS DMU VSS
VSS E1 VSS E1 CMD23 A11 A11
240_0402_1% G8 G8
DQSC#4 VSS DQSC#7 VSS
2
G3 DQSL VSS J2 G3 DQSL VSS J2 CMD24 A5 A5
C524
DQSC#5 B7 J8 DQSC#6 B7 J8
DQSU VSS DQSU VSS
VSS M1 VSS M1 CMD25 A3 A3
VSS M9 VSS M9
VSS P1 VSS P1 CMD26 BA2 BA2
CMDC5 T2 P9 CMDC5 T2 P9
RESET VSS RESET VSS
VSS T1 VSS T1 CMD27 BA1 BA1
ZQ6 L8 T9 ZQ7 L8 T9
B ZQ/ZQ0 VSS ZQ/ZQ0 VSS B
CMD28 A12 A12
1
1
J1 B1 GS@ J1 B1 CMD29 A10 A10

GS@ NC/ODT1 VSSQ R411 NC/ODT1 VSSQ
L1 NC/CS1 VSSQ B9 L1 NC/CS1 VSSQ B9
R30 J9 D1 243_0402_1% J9 D1 CMD30 RAS* RAS*
CLKC1 1 243_0402_1% NC/CE1 VSSQ NC/CE1 VSSQ
23 CLKC1 2 L9 D8 L9 D8
2
R33 NCZQ1 VSSQ NCZQ1 VSSQ
E2 E2 Not Available
2
VSSQ VSSQ
1
@ E8 E8
GS@ 80.6_0402_1% VSSQ VSSQ
R35 VSSQ F9 VSSQ F9 LOW HIGH
VSSQ G1 VSSQ G1
160_0402_1% G9 G9
VSSQ VSSQ
2
CLKC1# 1 2 96-BALL 96-BALL

23 CLKC1#
R37 SDRAM DDR3 SDRAM DDR3
@ 1 K4B1G1646E-HC12_FBGA96 K4B1G1646E-HC12_FBGA96
80.6_0402_1% @
C57
0.01U_0402_16V7K +1.5VSDGPU
NV recommand 0720 2 +1.5VSDGPU
1U_0603_10V6K
1U_0603_10V6K
1U_0603_10V6K
1U_0603_10V6K
1U_0603_10V6K
1U_0603_10V6K
1U_0603_10V6K
1U_0603_10V6K
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C48
C38
C37
C36
C45
C43
C42
C41
C40
C39
GS@ C518
GS@ C517
GS@ C532
GS@ C519
GS@ C526
GS@ C525
GS@ C523
GS@ C522
GS@ C521
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
GS@
GS@
GS@
GS@
GS@
GS@
GS@
GS@
GS@
GS@
A A

N12P DDR3 9/9
Custom
5 4 3 2 1
5 4 3 2 1
D D
+LCDVDD
LCD POWER CIRCUIT
+3VALW +3VS
W=60mils
1
R5 R6 +INVPWR_B+ L2 B+
1 Place closed to JLVDS1
2
300_0603_5% 10K_0402_5% C479 +LCDVDD FBMA-L11-201209-221LMA30T_0805
4.7U_0603_6.3V6K +3VS W=60mils
2 2 1
L1
2 FBMA-L11-201209-221LMA30T_0805
R2 1 1 1 2 1
1
1
3
D 1K_0402_5% C484 C485 C11
Q2 2 2 1 2 AP2301GN-HF_SOT23-3
1 1
SSM3K7002F_SC59-3 G 0.1U_0402_16V4Z 10U_0805_10V4Z 0.1U_0402_16V4Z C9 C6 SM010014520 3000ma
S Q28 2 2 2 680P_0402_50V7K 68P_0402_50V8J
1 220ohm@100mhz
3
C2 +LCDVDD
0.047U_0402_16V7K 2 2 DCR 0.04
W=60mils
1
1
D
2
16 PCH_ENVDD 1 UMA@ 2 LCDVDD_ON 2 Q1
R1 0_0402_5% G SSM3K7002F_SC59-3 1 1
S C10
3
C483 0.1U_0402_16V4Z
4.7U_0805_10V4Z
LCD/LED PANEL Conn.
1
2 2
22 ENVDD 1 DISO@ 2
R3 0_0402_5% R4
C 100K_0402_5% C
W=60mils
2
+INVPWR_B+ JLVDS1
1
2
3
4
BKOFF# 5
DAC_BRIG 220P_0402_50V7K 1 INVTPWM 6
2 C482 7
INVTPWM 220P_0402_50V7K 1 C5 TXCLK+ 8
2 9
TXCLK-
BKOFF# 220P_0402_50V7K 1 C8 10
40 BKOFF# 2 11
TXOUT2+
TXOUT2- 12
R18 13
R05 modify 1 2 10K_0402_5% 14
TXOUT1+
TXOUT1- 15
16
TXOUT0+ 17
TXOUT0- 18
19
I2CC_SDA 20
I2CC_SCL 21
22
+3VS 23
+LCDVDD
UMA Only / Optimus 40 DAC_BRIG
DAC_BRIG
1 R388 20_0402_5% +3VS_CAMERA
24
25
26
+3VS 27
TXOUT0+ 0_0402_5% 2 UMA@ 1 R471 PCH_TXOUT0+ R387 1 2 0_0402_5% USB20_CMOS_P10
B PCH_TXOUT0+ 16 17 USB20_P10 28 B
TXOUT0- 0_0402_5% 2 UMA@ 1 R473 PCH_TXOUT0- R386 1 2 0_0402_5% USB20_CMOS_N10
PCH_TXOUT0- 16 17 USB20_N10 29
1 1 30
TXOUT1+ 0_0402_5% 2 UMA@ 1 R441 PCH_TXOUT1+
PCH_TXOUT1+ 16
TXOUT1- 0_0402_5% 2 UMA@ 1 R452 PCH_TXOUT1- C480 C481 ACES_88341-3000B001
PCH_TXOUT1- 16
22P_0402_50V8J 22P_0402_50V8J CONN@
TXOUT2+ 0_0402_5% 2 UMA@ 1 R434 PCH_TXOUT2+ 2 2 @
PCH_TXOUT2+ 16 R02 modify @
TXOUT2- 0_0402_5% 2 UMA@ 1 R439 PCH_TXOUT2-
PCH_TXOUT2- 16
TXCLK+ 0_0402_5% 2 UMA@ 1 R432 PCH_TXCLK+
PCH_TXCLK+ 16
TXCLK- 0_0402_5% 2 UMA@ 1 R430 PCH_TXCLK-
PCH_TXCLK- 16 +3VS
U1
1 R783 2 1 OE#
I2CC_SCL 0_0402_5% 2 UMA@ 1 R504 PCH_LCD_CLK PCH_LCD_CLK 16 100K_0402_5% 5
I2CC_SDA 0_0402_5% 2 UMA@ 1 R499 PCH_LCD_DATA VCC
PCH_LCD_DATA 16
16 DPST_PWM 2 IN Reserved for UMA Only and OPTIMA
4 DPST_PWM_1 1 UMA@ 2 INVTPWM
OUT R20 0_0402_5%
3 GND
TXOUT0+
Discrete ONLY
0_0402_5% 2 DISO@ 1 R470 VGA_TXOUT0+
74AHC1G125GW_SOT353-5
UMA@
1
D15
6
VGA_TXOUT0+ 24 I/O1 I/O4
TXOUT0- 0_0402_5% 2 DISO@ 1 R472 VGA_TXOUT0-
VGA_TXOUT0- 24
2 REF1 REF2 5 +3VS
TXOUT1+ 0_0402_5% 2 DISO@ 1 R440 VGA_TXOUT1+ INVT_PWM 1 DISO@ 2
VGA_TXOUT1+ 24 40 INVT_PWM
TXOUT1- 0_0402_5% 2 DISO@ 1 R451 VGA_TXOUT1- R19 0_0402_5% USB20_CMOS_P10 3 4 USB20_CMOS_N10
VGA_TXOUT1- 24 I/O2 I/O3
TXOUT2+ 0_0402_5% 2 DISO@ 1 R433 VGA_TXOUT2+ PJUSB208H_SOT23-6
VGA_TXOUT2+ 24
TXOUT2- 0_0402_5% 2 DISO@ 1 R438 VGA_TXOUT2- VGA_PNL_PWM 1 @ 2
VGA_TXOUT2- 24 22 VGA_PNL_PWM
R17 0_0402_5%
TXCLK+ 0_0402_5% 2 DISO@ 1 R431 VGA_TXCLK+
VGA_TXCLK+ 24 1
TXCLK- 0_0402_5% 2 DISO@ 1 R429 VGA_TXCLK-
A VGA_TXCLK- 24 A
R16
10K_0402_5%
I2CC_SCL 0_0402_5% 2 DISO@ 1 R503 VGA_LCD_CLK VGA_LCD_CLK 22
I2CC_SDA 0_0402_5% 2 DISO@ 1 R498 VGA_LCD_DATA
VGA_LCD_DATA 22
2

LVDS Connector
Custom
5 4 3 2 1
A B C D E
DISO@ DISO@ DISO@
EMI Cost request
L32 L29 L27

0_0805_5% 0_0805_5% 0_0805_5%
1 1
W=40mils
+5VS
2
+R_CRT_VCC +CRT_VCC
F1
For DISO only D5 1.1A_6V_SMD1812P110TFW=40mils
L22,L24,L26 2 1 1 2
use 0 Ohm D17 D18 CH491DPT_SOT23-3 1

PJDLC05C_SOT23-3 PJDLC05C_SOT23-3 C215
0.1U_0402_16V4Z
CRB1.0 use 47ohm@100Mhz Bead @ @
1
2
CRT Connector
L32 L33
BLM18BA470SN1D_2P BLM18BA470SN1D_2P
CRT_R 1 2 CRT_R_1 1 2 CRT_R_2 JCRT1
L29 L30 6
BLM18BA470SN1D_2P BLM18BA470SN1D_2P PAD JCRT1.11 11
CRT_G 1 2 CRT_G_1 1 2 CRT_G_2 @ T71 1
L27 L28 7
BLM18BA470SN1D_2P BLM18BA470SN1D_2P 12
CRT_B 1 2 CRT_B_1 1 2 CRT_B_2 2
8
10P_0402_50V8J
10P_0402_50V8J
10P_0402_50V8J
22P_0402_50V8J
22P_0402_50V8J
22P_0402_50V8J
10P_0402_50V8J
10P_0402_50V8J
10P_0402_50V8J
13
1
1
1 1 1 1 1 1 1 1 1 3
R524 R520 R510 9
C636
C613
C596
C621
C601
C588
C637
C614
C597
150_0402_1% 150_0402_1% 150_0402_1% 14 G 16
4 G 17
2 2 2 UMA@ 2 UMA@ 2 UMA@ 2 2 2 2
10
2
2
2 2
15
1 JCRT1.5 5
C589 @ T72
PAD C-H_13-12201513CP
100P_0402_50V8J CONN@
2
SM010012010 300ma 120ohm@100mhz DCR 0.4
1 2 CRT_HSYNC_2
+CRT_VCC L13 MBC1608121YZF_0603 DSUB_12
C243 1 2 0.1U_0402_16V4Z R147 2 1 10K_0402_5% 1 2 CRT_VSYNC_2 1

L10 MBC1608121YZF_0603 1 1
5
U10 C230 C220 DSUB_15

10P_0402_50V8J 10P_0402_50V8J C623 2
P
OE#
CRT_HSYNC CRT_HSYNC_1 2 2 68P_0402_50V8J 1

2 A Y 4
G
C586
74AHCT1G125GW_SOT353-5 68P_0402_50V8J
3
2
+CRT_VCC
C228 1 2 0.1U_0402_16V4Z 5
1 U9
P
OE#
CRT_VSYNC 2 4 CRT_VSYNC_1
A Y
G
74AHCT1G125GW_SOT353-5
3
+CRT_VCC
3 3
+3VS
1
UMA Only / OPTIMUS R146 R142
4.7K_0402_5% 4.7K_0402_5%
PCH_CRT_R R420 2 UMA@ 1 0_0402_5% CRT_R
16 PCH_CRT_R
2
2
PCH_CRT_G R424 2 UMA@ 1 0_0402_5% CRT_G
16 PCH_CRT_G
PCH_CRT_B R422 2 UMA@ 1 0_0402_5% CRT_B CRT_DDC_DATA 1 6 DSUB_12
16 PCH_CRT_B
PCH_CRT_HSYNC R428 2 UMA@ 1 33_0402_5% CRT_HSYNC
16 PCH_CRT_HSYNC Q11A
5
PCH_CRT_VSYNC R426 2 UMA@ 1 33_0402_5% CRT_VSYNC DMN66D0LDW-7_SOT363-6
16 PCH_CRT_VSYNC
CRT_DDC_CLK 4 3 DSUB_15
16 PCH_CRT_CLK PCH_CRT_CLK R506 2 UMA@ 1 0_0402_5% CRT_DDC_CLK
PCH_CRT_DATA R501 2 UMA@ 1 0_0402_5% CRT_DDC_DATA Q11B

16 PCH_CRT_DATA DMN66D0LDW-7_SOT363-6
Discrete only
VGA_CRT_R R419 2 DISO@ 1 0_0402_5% CRT_R
22 VGA_CRT_R
VGA_CRT_G R423 2 DISO@ 1 0_0402_5% CRT_G
4 22 VGA_CRT_G 4
VGA_CRT_B R421 2 DISO@ 1 0_0402_5% CRT_B
22 VGA_CRT_B
VGA_CRT_HSYNC R427 2 DISO@ 1 0_0402_5% CRT_HSYNC
22 VGA_CRT_HSYNC
VGA_CRT_VSYNC R425 2 DISO@ 1 0_0402_5% CRT_VSYNC
22 VGA_CRT_VSYNC
VGA_DDC_CLK R505 2 DISO@ 1 0_0402_5% CRT_DDC_CLK
22 VGA_DDC_CLK Security Classification Compal Secret Data Compal Electronics, Inc.
VGA_DDC_DATA R500 2 DISO@ 1 0_0402_5% CRT_DDC_DATA 2011/02/08 2012/02/08 Title
22 VGA_DDC_DATA Issued Date Deciphered Date
CRT Connector
Custom
A B C D E
5 4 3 2 1
@R242
@ R242 SM070001310 400ma 90ohm@100mhz DCR 0.3
0_0603_5%
D
1 2 W=40mils HDMI_CLK- R574 1 0_0402_5% HDMI_R_CK- D
2
+HDMI_5V_OUT
D10 F2 1 2
1 2
+5VS 2 1 +HDMI_5V 1 2 L38
1 WCM-2012-900T_0805
CH491DPT_SOT23-3 1.1A_6V_SMD1812P110TF @ 4 3
C345 4 3
0.1U_0402_16V4Z HDMI_CLK+ R579 1 2 0_0402_5% HDMI_R_CK+
2
+3VS
HDMI_TX0- R565 1 2 0_0402_5% HDMI_R_D0-
1 1 2 2
1
L36
R198 WCM-2012-900T_0805
1M_0402_5% @ 4 3
UMA@ 4 3
2
C280 UMA@ 2 1 0.1U_0402_10V7K HDMI_TX2- HDMI_TX0+ R569 1 0_0402_5% HDMI_R_D0+
G
UMA 16 PCH_DPB_N0 2
2
16 PCH_DPB_P0 C281 UMA@ 2 1 0.1U_0402_10V7K HDMI_TX2+
HDMI_HPD 1 3 PCH_DPB_HPD 16
C283 UMA@ 2 1 0.1U_0402_10V7K HDMI_TX1- Q14 HDMI_TX1- R584 1 2 0_0402_5% HDMI_R_D1-
S
16 PCH_DPB_N1
220P_0402_50V7K
C324
16 PCH_DPB_P1 C282 UMA@ 2 1 0.1U_0402_10V7K HDMI_TX1+ 1 SSM3K7002F_SC59-3
1
UMA@ UMA@ 1 2
C287 UMA@ 2 1 2
16 PCH_DPB_N2 1 0.1U_0402_10V7K HDMI_TX0- R219 L39
16 PCH_DPB_P2 C286 UMA@ 2 1 0.1U_0402_10V7K HDMI_TX0+ 100K_0402_5% WCM-2012-900T_0805
2 @ 4 4 3 3
16 PCH_DPB_N3 C285 UMA@ 2 1 0.1U_0402_10V7K HDMI_CLK-
2
16 PCH_DPB_P3 C284 UMA@ 2 1 0.1U_0402_10V7K HDMI_CLK+ HDMI_TX1+ R586 1 2 0_0402_5% HDMI_R_D1+
HDMI_TX2- R591 1 2 0_0402_5% HDMI_R_D2-

C C
1 1 2 2
NVIDA Recommand 05/10 L40
R547 L19 WCM-2012-900T_0805
DISO@ DISO@ @ 4 3
4 3
DIS 24 VGA_HDMI_TXD2-
C234 DISO@2 1 0.1U_0402_10V7K HDMI_TX2- 10K_0402_5% BLM18PG181SN1D_0603
C235 DISO@2 1 0.1U_0402_10V7K HDMI_TX2+ 22 VGA_HDMI_DET 1 2 2 1 HDMI_HPD HDMI_TX2+ R593 1 2 0_0402_5% HDMI_R_D2+
24 VGA_HDMI_TXD2+
1
24 VGA_HDMI_TXD1-
C237 DISO@2 1 0.1U_0402_10V7K HDMI_TX1- R03 modify
1
C236 DISO@2 1 0.1U_0402_10V7K HDMI_TX1+ DISO@
24 VGA_HDMI_TXD1+
2
G
100K_0402_5% D20 HDMI_TX2- R589 1 UMA@ 2 680_0402_5% HDMI_GND
C241 DISO@2 1 0.1U_0402_10V7K HDMI_TX0- R552 BAV99_SOT23-3 HDMI_TX2+ R594 1 UMA@ 2 680_0402_5%
24 VGA_HDMI_TXD0-
C240 DISO@2 1 0.1U_0402_10V7K HDMI_TX0+ DISO@ 3 1 DGPU_HPD_INT# 18
24 VGA_HDMI_TXD0+
HDMI_TX1- R583 1 UMA@ 2 680_0402_5%
D
2
3
C239 DISO@2 1 0.1U_0402_10V7K HDMI_CLK- SSM3K7002F_SC59-3 HDMI_TX1+ R587 1 UMA@ 2 680_0402_5%
24 VGA_HDMI_TXC-
24 VGA_HDMI_TXC+
C238 DISO@2 1 0.1U_0402_10V7K HDMI_CLK+ +3VSDGPU Q13 DISO@
HDMI_TX0- R564 1 UMA@ 2 680_0402_5%
HDMI_TX0+ R570 1 UMA@ 2 680_0402_5%
HDMI_CLK- R573 1 UMA@ 2 680_0402_5%

HDMI_CLK+ R580 1 UMA@ 2 680_0402_5%
+3VS +HDMI_5V_OUT INTEL use 680 Ohm for terminationn
1
D
in DG 1.5 2 Q37
+3VS
G
R250 1 UMA@ 2 2.2K_0402_5% SDVO_SCLK +3VSDGPU +3VS SSM3K7002F_SC59-3 S
HDMI connector
3
2
R03 modify
2
R253 1 UMA@ 2 2.2K_0402_5% SDVO_SDATA D12 D11 JHDMI1

B RB751V40_SC76-2 HDMI_HPD B
RB751V40_SC76-2 19 HP_DET
R784 R785 18
0_0402_5% 0_0402_5%
+HDMI_5V_OUT
17
+5V NV use 499 Ohm for terminationn
2 1
2 1
UMA@ HDMI_SDATA DDC/CEC_GND

DISO@ 16
1
SDA
2.2K_0402_5%
2.2K_0402_5%
HDMI_SCLK 15 SCL
14 Reserved
R256
R255
Pull high at VGA side HDMI_R_CK-

13 CEC
12 CK- GND 20
2
G
11 21 DISO@ DISO@ DISO@ DISO@

1
R249 CK_shield GND

16 SDVO_SCLK 1 UMA@ 2 0_0402_5% 1109 RF request HDMI_R_CK+ 10 CK+ GND 22
24 VGA_HDMI_SCLK R244 1 DISO@ 2 0_0402_5% HDMI_SCLK_R 3 1 HDMI_SCLK HDMI_R_D0- 9 23
D0- GND
S
1 8 D0_shield
2
G
HDMI_R_D0+ 7
R252 HDMI_R_D1- D0+
16 SDVO_SDATA 1 UMA@ 2 0_0402_5% Q16 SSM3K7002F_SC59-3 C357 6 D1-
R254 1 DISO@ 2 0_0402_5% HDMI_SDATA_R 3 1 HDMI_SDATA 47P_0402_50V8J 5
24 VGA_HDMI_SDATA 2 D1_shield
@ HDMI_R_D1+ R589 R594 R583 R587
S
1 4 D1+
HDMI_R_D2- 3 499_0402_5% 499_0402_5% 499_0402_5% 499_0402_5%
Q17 SSM3K7002F_SC59-3 C358 D2-
2 D2_shield
Place closed to JHDMI1 47P_0402_50V8J HDMI_R_D2+ 1
2 @ D2+ DISO@ DISO@ DISO@ DISO@
ACON_HMR2E-AK120D
CONN@
R564 R570 R573 R580

499_0402_5% 499_0402_5% 499_0402_5% 499_0402_5%
A A

HDMI Conn
Custom E
5 4 3 2 1
5 4 3 2 1
D D
SATA HDD1 Conn.

CL 4.0 mm
JHDD1
1 GND
13 SATA_PTX_DRX_P0 SATA_PTX_DRX_P0 C708 1 2 0.01U_0402_16V7K SATA_PTX_C_DRX_P0 2
SATA_PTX_DRX_N0 C711 1 RX+
13 SATA_PTX_DRX_N0 2 0.01U_0402_16V7K SATA_PTX_C_DRX_N0 3 RX-
4 GND
SATA_PRX_DTX_N0 C712 1 2 0.01U_0402_16V7K SATA_PRX_C_DTX_N0 5
13 SATA_PRX_DTX_N0 SATA_PRX_DTX_P0 C713 1 SATA_PRX_C_DTX_P0 TX-
13 SATA_PRX_DTX_P0 2 0.01U_0402_16V7K 6 TX+
7 GND +3VS
+3VS 8 3.3V 1
9 C453
3.3V
10 3.3V
11 0.1U_0402_16V4Z
+5VS GND 2
12 GND
13 GND
14 5V
15 5V
16 5V +5VS R05 modify
R05 modify 17 GND
18 Rsv
C C
19 GND 100mils
20 12V
21 12V
10U_0805_10V4Z
C744
1U_0402_6.3V6K
C740
0.1U_0402_16V4Z
C743
1000P_0402_50V7K
C742
22 12V 1 1 1 1
23 GND
24 GND
OCTEK_SAT-22DD1G 2 2 2 2
CONN@
change to port1 cause by intel

SATA II issue (20110201) SATA ODD Conn.
JODD1
1 GND
13 SATA_PTX_DRX_P1 C643 1 2 0.01U_0402_16V7K SATA_PTX_C_DRX_P2 2
C639 1 SATA_PTX_C_DRX_N2 A+
R20 modify 13 SATA_PTX_DRX_N1 2 0.01U_0402_16V7K 3 A-
4 GND
C628 1 2 0.01U_0402_16V7K SATA_PRX_C_DTX_N2 5
13 SATA_PRX_DTX_N1 B-
C624 1 2 0.01U_0402_16V7K SATA_PRX_C_DTX_P2 6
13 SATA_PRX_DTX_P1 B+ +5VS_ODD
7 GND
80mils
18 ODD_DETECT# 1 @ R139 2 0_0402_5% 8 DP
10U_0805_10V4Z
C199
1U_0402_6.3V6K
C201
0.1U_0402_16V4Z
C200
1000P_0402_50V7K
C192
+5VS_ODD +5VS_ODD 9 1 1 1 1
B +5V B
10 +5V GND 17
R763 1 @ 2 0_0402_5% ODD_DA#_R 11 16
17 ODD_DA# MD GND
12 GND GND 15
2 2 2 2
13 GND GND 14
+5VS +5VS_ODD
R765
0_0805_5% OCTEK_SLS-13SB1G_RV
+VSB 1 2 CONN@
D
6
S
2
1 5 4
1U_0402_6.3V6K
C812
R760 2
470K_0402_5% @ 1 Q55
@ SI3456BDV-T1-E3 1N TSOP6
G
2 @
1
ODD_EN
1
D
1.5M_0402_5%
R764
2
2 Q56
18 ODD_EN#
G @ C811
SSM3K7002F_SC59-3 S 0.1U_0402_16V4Z
3
@ 1
@
1
A A

HDD & ODD Connector
Custom
5 4 3 2 1
5 4 3 2 1
+1.2V_LAN
0.1U_0402_16V4Z
0.1U_0402_16V4Z 0.1U_0402_16V4Z U32
+3VALW 37 +LAN_BIASVDDH
1 1 1 1 1 1 1 BIASVDDH
C678 C302 C674 C301 C671 C298 C668 20 +3VALW
VDDO_CR
+1.2V_LAN +LAN_XTALVDDH
60mil
35 VDDC XTALVDDH 17
4.7U_0603_6.3V6K 2 2 2 2 2 2 2
61
0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z VDDC
48 +LAN_AVDDH 1 1
AVDDH C662 C666
AVDDH 42
+3VALW
7 4.7U_0603_6.3V6K
VDDO 2 2
56 VDDO
D +3VALW 62 0.1U_0402_16V4Z D
VDDO LAN_MIDI3-
TRD3_N 49 LAN_MIDI3- 36
50 LAN_MIDI3+
TRD3_P LAN_MIDI3+ 36
0.1U_0402_16V4Z
1 1 1 1 47 LAN_MIDI2-
TRD2_N LAN_MIDI2- 36
C683 C690 C680 C667 46 LAN_MIDI2+
TRD2_P LAN_MIDI2+ 36
+LAN_AVDDL 39 43 LAN_MIDI1- 20mil
AVDDL TRD1_N LAN_MIDI1- 36
4.7U_0603_6.3V6K 2 2 2 2
45 44 LAN_MIDI1+ L20
AVDDL TRD1_P LAN_MIDI1+ 36
0.1U_0402_16V4Z 0.1U_0402_16V4Z 51 +LAN_XTALVDDH 1 1 2 +3VALW
AVDDL LAN_MIDI0- C323 BLM18AG601SN1D_2P
TRD0_N 41 LAN_MIDI0- 36
+LAN_GPHYPLLVDDL 36 40 LAN_MIDI0+ 0.1U_0402_16V4Z
GPHY_PLLVDDL TRD0_P LAN_MIDI0+ 36
+LAN_PCIEPLLVDD
20mil 2 L34
32 PCIE_PLLVDDL +LAN_BIASVDDH 1 1 2
29 C657 BLM18AG601SN1D_2P
PCIE_PLLVDDL 0.1U_0402_16V4Z
SO_LINKLED# 65 LAN_LINK# 36
2
SCLK_SPD1000LED# 66 20mil L15
2 +LAN_AVDDH 1 2
SPD100LED#_SERIALDO BLM18AG601SN1D_2P
1 1
C299 C294
14 PCIE_PRX_DTX_P1 0.1U_0402_10V7K 1 2 C670 PCIE_PRX_C_DTX_P1 28 67 R200 2 1 0_0402_5%
0.1U_0402_10V7K 1 PCIE_TXD_P TRAFFICLED#_SERIALDI LAN_ACTIVITY# 36
14 PCIE_PRX_DTX_N1 2 C673 PCIE_PRX_C_DTX_N1 27 PCIE_TXD_N
0.1U_0402_16V4Z 0.1U_0402_16V4Z
R214 0_0603_5% R03 2 2
14 PCIE_PTX_C_DRX_P1 33 PCIE_RXD_P modify
34 8 +VDDO_CR_R 1 2 +VDDO_CR
14 PCIE_PTX_C_DRX_N1 PCIE_RXD_N GPIO1_LR_OUT
5 CR_5IN1_LED#_R R229 2 B0@ 1 0_0402_5% CR_5IN1_LED#
R201 1 GPIO_0 CR_5IN1_LED# 41
40 EC_PME# 2 0_0402_5%
+XDPWR_SDPWR_MSPWR
+3VALW R209 1 2 4.7K_0402_5% 64 SPROM_DOUT
C SI_EEDATA SPROM_CLK C
CS#_EECLK 63
+VDDO_CR
R826 (+VDDO_CR)
R213 1 @ 2 0_0402_5% LAN_PME# 3
15,38,39,46 PCH_PCIE_WAKE# WAKE# For B0 version
R225 1 2 0_0402_5% 11 R232
17,38,39,40,46 PLT_RST_BUF# PREST#
14 CLK_PCIE_LAN 31 PCIE_REFCLK_P 1 2
30 1 1 1 B0@
14 CLK_PCIE_LAN# PCIE_REFCLK_N
1 CR_XD_WE#_SD_DETECT_R R576 2 1 0_0402_5% CR_XD_WE#_SD_DETECT C337 C676 C328 0_0805_5%
SD_DETECT/XD_WE# CR_XD_WE#_SD_DETECT 36
68 CR_XD_DETECT#_R R572 2 1 0_0402_5% CR_XD_DETECT#
CR_DATA0 R199 47_0402_5% CR_DATA0_R SR_DISABLE/XD_DETECT# CR_XD_DETECT# 36 4.7U_0603_6.3V6K 2 2 2
0.1U_0402_16V4Z
1 2 25 CR_DATA0
36 CR_DATA0 CR_DATA1 R207 1 2 47_0402_5% CR_DATA1_R 24 59 CR_XD_CE#_MS_INS#_R R192 1 2 0_0402_5% CR_XD_CE#_MS_INS# 0.1U_0402_16V4Z
36 CR_DATA1 CR_DATA2 R211 47_0402_5% CR_DATA2_R CR_DATA1 MS_INS#/XD_CE# CR_XD_CE#_MS_INS# 36
1 2 23 CR_DATA2
36 CR_DATA2 CR_DATA3 R215 1 2 47_0402_5% CR_DATA3_R 22 9 CR_XD_RE#_R R227 2 1 0_0402_5% CR_XD_RE#
36 CR_DATA3 CR_DATA4 R168 47_0402_5% CR_DATA4_R CR_DATA3 GPIO2_MEDIA_SENSE/XD_RE# CR_XD_RE# 36
1 2 52 CR_DATA4
36 CR_DATA4 CR_DATA5 R171 1 2 47_0402_5% CR_DATA5_R 53 57 CR_WP#_XD_WP#_R R185 2 1 0_0402_5% CR_WP#_XD_WP#
36 CR_DATA5 CR_DATA6 R179 47_0402_5% CR_DATA6_R CR_DATA5 CR_WP#/XD_WP# CR_WP#_XD_WP# 36
1 2 54 CR_DATA6
36 CR_DATA6 CR_DATA7 R182 1 2 47_0402_5% CR_DATA7_R 55 60 CR_PWR_XD_ALE_R R196 2 A0@ 1 0_0402_5% CR_PWR_XD_ALE
36 CR_DATA7 CR_DATA7 CR_LED_CR_BUS_PWR/XD_ALE CR_PWR_XD_ALE 36
R222 C329
R05 modify 21 CR_CLK_XD_RY_BY#_R R216 1 2 0_0402_5% CR_CLK_XD_RY_BY#
CR_CLK/XD_RY_BY# CR_CLK_XD_RY_BY# 36
1 2 1 2
+3VS 26 CR_CMD_XD_CLE_R R195 1 2 47_0402_5% CR_CMD_XD_CLE @
R190 1 CR_CMD_XD_CLE CR_CMD_XD_CLE 36
2 1K_0402_5% 58 VMAIN_PRSNT
22_0402_5% @
R04 modify 0.01U_0402_16V7K
+3VALW R228 4.7K_0402_5%
1 2 6 TEST1
L37 For EMI request
R226
1 2
4.7K_0402_5%
10 TEST2 40mil +1.2V_LAN_OUT 1
40mil
R824 (CP_PWR_XD_ALE) SR_LX 16 2 +1.2V_LAN
CR_PWR_XD_ALE R208 2 B0@ 1 0_0402_5% 4.7UH_PG031B-4R7MS_1.1A_20%
for B0 version R212 1 2 10K_0402_5% 4 13 1 1
A0@ LOW_PWR SR_VFB C689 EMI Request...2010/07/27
C691
B LAN_XTALI LAN_XTALO_R 0.1U_0402_16V4Z 10U_0805_10V4Z B
19 XTALO
LAN_XTALO_R LAN_XTALI 2 2
18 XTALI SM010005500 500ma 600ohm@100mhz DCR 0.38
1
R562
20mil L18
40mil +LAN_PCIEPLLVDD
GND PLANE
200_0402_1% SR_VDDP 15 +3VALW 1 2 +1.2V_LAN

15mil 14 BLM18AG601SN1D_2P
SR_VDD
1 2 LAN_RDAC 38 1 0.1U_0402_16V4Z 1 4.7U_0603_6.3V6K 1 1
2
R541 1.24K_0402_1% RDAC C684 C692 C306 C303

Y4
1 2LAN_XTALO 14 LAN_CLKREQ# 12 CLK_REQ# 0.1U_0402_16V4Z 4.7U_0603_6.3V6K
25MHZ_20PF_7A250000121 BCM57785XA0KMLG_QFN68_8X8 2 2 2 2
1
69
C681 C679 PLACE NEXT P14

27P_0402_50V8J 27P_0402_50V8J 20mil
2 2 L35
+LAN_GPHYPLLVDDL 1 2 +1.2V_LAN
BLM18AG601SN1D_2P
1 1
C658 C659
0.1U_0402_16V4Z 4.7U_0603_6.3V6K
2 2
+3VALW
SPROM_CLK SPROM_DOUT
(EECLK) (EEDATA) C634 1 2 0.1U_0402_16V4Z 20mil L17
2
On chip 1 0 @ +LAN_AVDDL 1 2 +1.2V_LAN

2
R536 BLM18AG601SN1D_2P
R537 4.7K_0402_5% 1 1
AT24C02 1 1 @ 4.7K_0402_5% C656 C297
U31 @
1
8 1 0.1U_0402_16V4Z 4.7U_0603_6.3V6K
1
A VCC A0 2 2 A
7 WP A1 2
SPROM_CLK 6 3
SPROM_DOUT SCL A2
5 SDA GND 4
2
AT24C04BN-SH-T_SO8
2
R538
4.7K_0402_5% R525
@ 4.7K_0402_5%
1

1
Broadcom BCM57785
5 4 3 2 1
5 4 3 2 1
T28
LAN_ACTIVITY#
1 24 LAN_LINK#
LAN_MIDI3+ TCT1 MCT1 RJ45_MIDI3+
35 LAN_MIDI3+ 2 TD1+ MX1+ 23
D 35 LAN_MIDI3- LAN_MIDI3- 3 22 RJ45_MIDI3- D
TD1- MX1-
2
4 TCT2 MCT2 21
35 LAN_MIDI2- LAN_MIDI2- 5 20 RJ45_MIDI2- D14
LAN_MIDI2+ TD2+ MX2+ RJ45_MIDI2+
35 LAN_MIDI2+ 6 TD2- MX2- 19 PJDLC05C_SOT23-3
@
7 TCT3 MCT3 18
35 LAN_MIDI1+ LAN_MIDI1+ 8 17 RJ45_MIDI1+
LAN_MIDI1- TD3+ MX3+ RJ45_MIDI1-
35 LAN_MIDI1- 9 TD3- MX3- 16
10 15
1
LAN_MIDI0- TCT4 MCT4 RJ45_MIDI0-
35 LAN_MIDI0- 11 TD4+ MX4+ 14
35 LAN_MIDI0+ LAN_MIDI0+ 12 13 RJ45_MIDI0+
TD4- MX4-
R03 modify
LAN Connector
1
R02 modify IH-160 R03 modify
SP050006F00
1 1 1 1 R493 R492
C474,C475 and D14
C617 C618 C619 C620 75_0603_1% 75_0603_1% ME interefer,do not pop!!
+3VALW 2 1
1
0.1U_0402_16V4Z 0.1U_0402_16V4Z R384 1K_0402_5% 1
2 2 2 2 R491 R490
75_0603_1% 75_0603_1% 220P_0402_50V7K
0.1U_0402_16V4Z 0.1U_0402_16V4Z C473
2 C474 68P_0402_50V8J
JRJ1
2
@
RJ45_GND 2 1 9 Green LED+
C
Place close to TCT pin LAN_LINK# C
35 LAN_LINK# 10 Green LED-
BOTHHAND: S X'FORM_ GST5009-D LF LAN, SP050006B00 RJ45_MIDI0+ 1 14
PR1+ SHLD1
13
TIMAG:S X'FORM_ IH-160 LAN , SP050006F00 RJ45_MIDI0- 2
SHLD2
PR1-
RJ45_MIDI1+ 3 PR2+
RJ45_MIDI2+ 4 PR3+
RJ45_MIDI2- 5 PR3-
RJ45_MIDI1- 6 PR2-
RJ45_MIDI3+ 7 PR4+
RJ45_MIDI3- 8 PR4-
+3VALW 2 1 11 Yellow LED+

R385 1K_0402_5% 1
LAN_ACTIVITY# 12
220P_0402_50V7K 35 LAN_ACTIVITY# Yellow LED-
R05 modify C476 68P_0402_50V8J
2 SANTA_130451-K
2 1
@ CONN@
Card Reader Connector @

JP1
B88069X9231T203_4P5X3P2-2
C475
JREAD1 2 1 40mil
B B
CR_DATA0
EMI Request
+XDPWR_SDPWR_MSPWR 11 SD_VCC XD_D0 31
18 32 CR_DATA1 CR_DATA0 35 R03 modify
MS_VCC XD_D1 CR_DATA2 CR_DATA1 35
39 XD_VCC XD_D2 33
34 CR_DATA3 CR_DATA2 35 C478
XD_D3 CR_DATA4 CR_DATA3 35 RJ45_GND LANGND
XD_D4 35 1 2
CR_CLK_XD_RY_BY# 8 36 CR_DATA5 CR_DATA4 35
CR_CMD_XD_CLE SD_CLK XD_D5 CR_DATA6 CR_DATA5 35 1000P_1206_2KV7K
16 SD_CMD XD_D6 37
CR_XD_WE#_SD_DETECT 1 38 CR_DATA7 CR_DATA6 35
CR_WP#_XD_WP# SD_CD XD_D7 CR_DATA7 35
2 SD_WP R04 modify
1
CR_DATA0 4 22 CR_XD_DETECT# 40mil 1
SD/MMC_DAT0 XD_CD
2
CR_DATA1 3 23 CR_XD_DETECT# 35 2 1 JP3 @
CR_DATA2 SD/MMC_DAT1 XD_R/B CR_XD_RE# CR_CLK_XD_RY_BY# 35 J10 C832
21 24 B88069X9231T203_4P5X3P2-2
1
CR_DATA3 SD/MMC_DAT2 XD_RE CR_XD_RE# 35 B88069X9231T203_4P5X3P2-2 @
19 SD/MMC_DAT3 XD_CE 25 JUMP_43X118 R04 modify
3
CR_XD_CE#_MS_INS# 35 JP2 2
XD_CLE 26 @
CR_CMD_XD_CLE 35
2
27 CR_PWR_XD_ALE @ 100P_0402_50V8J D36
2
XD_ALE CR_PWR_XD_ALE 35
28 PJDLC05C_SOT23-3
1
XD_WE CR_XD_WE#_SD_DETECT 35
XD_WP-IN 29 R04 modify @
CR_WP#_XD_WP# 35 L53
6 100UH_SSC0301101MCF_0.18A_20%
CR_DATA0 SD_GND R06 Modify
10 MS_DATA0 SD_GND 13
CR_DATA1 9 5
CR_DATA2 MS_DATA1 MS_GND
12 20
1
CR_DATA3 MS_DATA2 MS_GND
15 MS_DATA3 XD_GND 30
CR_CLK_XD_RY_BY# 17 40
CR_XD_CE#_MS_INS# MS_SCLK XD_GND
14 MS_INS GND 41
CR_CMD_XD_CLE 7 42
MS_BS GND
TAITW_R013-P17-HM_NR
A A
CONN@

LAN Magnetic & RJ45
Custom
5 4 3 2 1
A B C D E
1 1
2 2
3 3
4 4

RTS5138 Card Reader
A B C D E
A B C D E
For Wireless LAN

+3VS_WLAN +1.5VS +3VS_WLAN
1 1 1 1 1 1
C403 C735 C392 C734 C423 C387
+3VS +3VS_WLAN 4.7U_0805_10V4Z 0.1U_0402_16V4Z 4.7U_0805_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
J6 60mil 2 2 2 2 2 2
1 2
PAD-OPEN 4x4m WLAN&BT Combo module circuits

@ Mini Card Power Rating
1 BT BT 1
R05 modify on module on module
+1.5VS +3VS_WLAN
Enable Disable
@ R702
0_0402_5% JMINI1
15,35,39,46 PCH_PCIE_WAKE# 1 2 1 1 2 2 BT_CTRL H L
3 3 4 4
5 5 6 6 BT_ON#
14 MINI1_CLKREQ# 7 7 8 8 L H
9 9 10 10
14 CLK_PCIE_MINI1# 11 11 12 12
14 CLK_PCIE_MINI1 13 13 14 14
15 15 16 16
17 17 18 18
19 20 WL_OFF#
19 20 WL_OFF# 18 D32
21 22 PLT_RST_BUF#
21 22 PLT_RST_BUF# 17,35,39,40,46
14 PCIE_PRX_DTX_N2 23 24 +3VS 40,44,52,53 SUSP# SUSP# 1 2 BT_CTRL
23 24
14 PCIE_PRX_DTX_P2 25 25 26 26 R05 modify
27 28 CH751H-40PT_SOD323-2
27 28 MINI1_SMBCLK R337 1 @
29 29 30 30 2 0_0402_5% PCH_SMBCLK 14 @
1
MINI1_SMBDATA R335 1 @ D
14 PCIE_PTX_C_DRX_N2 31 31 32 32 2 0_0402_5% PCH_SMBDATA 14
33 34 2 Q57
14 PCIE_PTX_C_DRX_P2 33 34 18,39 BT_ON#
35 36 G
35 36 USB20_N8 17
37 38 SSM3K7002F_SC59-3 S
USB20_P8 17
3
37 38
39 39 40 40 R05 modify
+3VS_WLAN 41 41 42 42
43 43 44 44 MINI1_LED# 40
45 45 46 46
47 47 48 48 (9~16mA)
1
R299 1 2 0_0402_5% E51TXD_P80DATA_R 49 50
40 E51TXD_P80DATA 49 50
R287 1 2 0_0402_5% E51RXD_P80CLK_R 51 52 R305
2 40 E51RXD_P80CLK 51 52 2
100K_0402_5%
53 GNDGND 54
1
2
1
ACES_51711-0520W-001
R300 R288
100K_0402_5% 1K_0402_5% +3VS_WLAN
CONN@
2
BT_CTRL
For 3G / GPS
Reserve
To 3G Module Connect
+3VS_FULL +1.5VS +3VS_FULL
R03 modify
60mil J3G1
+3VS 2 1 +3VS_FULL 1 1 1 1 1 1
R352 0_1206_5% C455 C467 C443 C442 C441 C466 22 20 +3VALW +3VS
@ 4.7U_0805_10V4Z 0.1U_0402_16V4Z 4.7U_0805_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z GND 20
19 19
@ @ @ @ @ @ R03 modify 18
2 2 2 2 2 2 18
17 17
2
16 16
15 R405
15
14 14 100K_0402_5%
3 +1.5VS +3VS_FULL +3VALW 13 3
@ R371 13
12
1
0_0402_5% JMINI2 12 WWAN_OFF#
11 11 WWAN_OFF# 18
PCH_PCIE_WAKE# 1 2 1 2 1 10 MINI2_LED# MINI2_LED# 40
(WLAN_BT_DATA) 1 2 C531 10 R404 0_0402_5%
(WLAN_BT_CLK)
3
5
3 4 4
6
The same circuit with JMINI1, 3G@ 9 9
8 USB20_N9_R1 1 3G@ 2
5 6 8 USB20_N9 17
14 MINI2_CLKREQ# 7 7 8 8 but different PCIE & USB.... 2
0.1U_0402_16V4Z
7 7 USB20_P9_R1 1 3G@ 2
USB20_P9 17
9 10 6 R402 0_0402_5%
9 10 6
14 CLK_PCIE_MINI2# 11 11 12 12 5 5 USB20_N12 17
14 CLK_PCIE_MINI2 13 13 14 14 4 4 USB20_P12 17
15 15 16 16 3 3
17 17 18 18 R03 modify 2 2
19 20 WL_OFF# 21 1 3G_GATE
19 20 PLT_RST_BUF# GND 1
21 21 22 22
14 PCIE_PRX_DTX_N3 23 24 +3VS_MINI1 R343 1 2 0_0603_5% +3VS +3VALW Peak: 2.75A ACES_87213-2000G
23 24 @ CONN@
14 PCIE_PRX_DTX_P3 25 25 26 26
27 28 Normal: 1.1A
27 28 MINI2_SMBCLK R334 1 @
29 29 30 30 2 0_0402_5% PCH_SMBCLK R03 modify
31 32 MINI2_SMBDATA R333 1 @ 2 0_0402_5% PCH_SMBDATA
14 PCIE_PTX_C_DRX_N3 31 32
14 PCIE_PTX_C_DRX_P3 33 33 34 34
35 36 USB20_N11_R R332 1 @ 2 0_0402_5% USB20_N11 1 1
35 36 USB20_N11 17
1
37 38 USB20_P11_R R331 1 @ 2 0_0402_5% USB20_P11 3G@ R790
37 38 USB20_P11 17 +
39 40 C535 C527 C537 20mil 47K_0402_5%
39 40 R329 1 @ 220U_6.3V_M_R17
+3VS_FULL 41 41 42 42 2 0_0402_5% 3G@ 3G@ +VSB 2 1
MINI2_LED# 2 2 10U_0603_6.3V6M 3G@
43 44
2
43 44
45 45 46 46 1 3G@
47P_0402_50V8J C820
47 47 48 48 (9~16mA)
1
E51TXD_P80DATA_R D 0.1U_0603_25V7K
49 49 50 50
E51RXD_P80CLK_R 51 52 SUSP 2 Q58
51 52 44,52,53 SUSP 2
G 3G@
53 54 S
3
GND1 GND2 SSM3K7002F_SC59-3
4
Close to 3G CONN 4
BELLW_80003-1021
CONN@

MINI CARD (WLAN & TV-Tuner)
Custom
A B C D E
A B C D E
USB3.0 Conn.
1
USB/B Conn. 1
36
35
34
33
32
31
ACES_50050-03071-001_30P
W=100mils
GND
GND
GND
GND
GND
GND
30 29 +5VALW
30 29 PCIE_PTX_C_DRX_P4 14
28 28 27 27 PCIE_PTX_C_DRX_N4 14 JUSB1
26
24
26 25 25
23
PCIE_PRX_DTX_P4 14 (Port 0,1) 1
24 23 PCIE_PRX_DTX_N4 14 1
22 22 21 21 CLK_PCIE_USB30 14 2 2
20 20 19 19 CLK_PCIE_USB30# 14 3 3
18 18 17 17 USB20_N3 17 4 4
16 15 SYSON# 5
18,46 SMIB 16 15 USB20_P3 17 44,46 SYSON# 5
15,35,38,46 PCH_PCIE_WAKE# 14 14 13 13 PLT_RST_BUF# 17,35,38,40,46 6 6
12 11 USB20_N2 7
40,44,46,51 SYSON 12 11 17 USB20_N2 7
+1.5V 10 9 OD output R03 modify USB20_P2 8
10 9 USB30_CLKREQ# 14 17 USB20_P2 8
8 8 7 7 +3VALW 9 9
6 5 USB20_N0 10
6 5 17 USB20_N0 10
+5VALW 4 3 +5VALW USB20_P0 11 13
4 3 17 USB20_P0 11 GND
2 2 1 1 12 12 GND 14
CONN@ JUSB3
ACES_85201-1205N
CONN@
2 2
BT Conn. +BT_VCC
(Port 11) JBT1

10 GND 8 8
7 7
6 6 USB20_P13 17
5 5 USB20_N13 17
4 (WLAN_BT_DATA)
4 (WLAN_BT_CLK)
3 3 R05 modify
2 2 WL_EN# 18
9 GND 1 1
ACES_87213-0800G
3 CONN@ 3
BT Wire Cable Note:

+3VALW Pin 3, Pin 4 NC
+3VS
2
C736
BT@ 1
0.1U_0402_16V4Z C731
3
1 BT@
BT_ON# 1 BT@ 2 2 Q41 1U_0603_10V6K
18,38 BT_ON# 2
R710
10K_0402_5%
2
C738 AP2301GN-HF_SOT23-3
1
BT@
0.1U_0402_16V4Z W=40mils
1
+BT_VCC
1
1
C730 C729 R709
BT@ BT@ 300_0603_5%
4.7U_0603_6.3V6K BT@
2
2
0.1U_0402_16V4Z
1
D
2 Q42
G
4 SSM3K7002F_SC59-3 S 4
3
BT@

USB / BT / USBB
Custom
A B C D E
5 4 3 2 1
+3VALW
65W/90W# R701 2 1 100K_0402_5%
3S/4S# R700 2 1 100K_0402_5%
+5VS
R311 L21
+3VALW 0_0805_5% FBMA-L11-160808-800LMT_0603 TP_CLK R363 1 2 4.7K_0402_5%
1 2 +3VALW_EC 1 2 +EC_VCCA
1 1 1 1 2 2 1 TP_DATA R364 1 2 4.7K_0402_5%
0.1U_0402_16V4Z
C418
0.1U_0402_16V4Z
C456
0.1U_0402_16V4Z
C728
0.1U_0402_16V4Z
C720
1000P_0402_50V7K
C400
1000P_0402_50V7K
C399
C457
D 0.1U_0402_16V4Z +3VS D
2 2 2 2 1 1 2
ECAGND
C714 R675
22P_0402_50V8J 33_0402_5% @
2 1 2 1 CLK_PCI_LPC BKOFF# R735 2 1 100K_0402_5%
111
125
EC_MUTE# R362 @ 1 10K_0402_5%
22
33
96
67
U20 2
9
R02 modify
VCC
VCC
VCC
VCC
VCC
VCC
AVCC
+3VALW
+3VALW R328 2 1 47K_0402_5% EC_RST# R676 2 1 200K_0402_5%

GATEA20 1 21 MINI2_LED#
18 GATEA20 GA20/GPIO00 INVT_PWM/PWM1/GPIO0F MINI2_LED# 38
C431 2 1 0.1U_0402_16V4Z EC_KBRST# 2 23 BEEP#
18 EC_KBRST# KBRST#/GPIO01 BEEP#/PWM2/GPIO10 BEEP# 42
SERIRQ 3 26 2 1 ACIN 15,22,44,45,48
13 SERIRQ LPC_FRAME# SERIRQ# FANPWM1/GPIO12 ACOFF D23 CH751H-40PT_SOD323-2
13 LPC_FRAME# 4 LFRAME# ACOFF/FANPWM2/GPIO13 27 ACOFF 47,48
LPC_AD3 5
13 LPC_AD3 LAD3
LPC_AD2 7 PWM Output C452 2 1 100P_0402_50V8J ECAGND EC_ACIN C719 2 1 100P_0402_50V8J
+3VALW 13 LPC_AD2 LAD2
LPC_AD1 8 63 BATT_TEMP
13 LPC_AD1 LAD1 BATT_TEMP/AD0/GPIO38 BATT_TEMP 50
10/1 ENE Recommand LPC_AD0
13 LPC_AD0 10 LAD0 LPC & MISC BATT_OVP/AD1/GPIO39 64
ADP_I
ADP_I/AD2/GPIO3A 65 ADP_I 48,50
R336 1 2 47K_0402_5% KSO1 CLK_PCI_LPC 12 AD Input 66 AD_BID0
17 CLK_PCI_LPC PCICLK AD3/GPIO3B
PLT_RST_BUF# 13 75
17,35,38,39,46 PLT_RST_BUF# PCIRST#/GPIO05 AD4/GPIO42
R339 1 2 47K_0402_5% KSO2 EC_RST# 37 76 IMON_R R356 2 1 0_0402_5%
ECRST# SELIO2#/AD5/GPIO43 IMVP_IMON 55
EC_SCI# 20 R367
18 EC_SCI# SCI#/GPIO0E
38 0_0402_5%
R682 EC_SMI# CLKRUN#/GPIO1D DAC_BRIG VR_HOT#
1 2 1K_0402_5% DAC_BRIG/DA0/GPIO3C 68 DAC_BRIG 31 55 VR_HOT# 2 1 H_PROCHOT# 5,50
70 EN_DFAN1
EN_DFAN1/DA1/GPIO3D EN_DFAN1 43
R359 1 2 2.2K_0402_5% EC_SMB_DA1 DA Output 71 IREF
IREF/DA2/GPIO3E IREF 48
1
KSI0 CALIBRATE# D
55 KSI0/GPIO30 DA3/GPIO3F 72 CALIBRATE# 48
KSI1 56 H_PROCHOT#_EC 2 Q26
R358 EC_SMB_CK1 KSI2 KSI1/GPIO31
1 2 2.2K_0402_5% 57 KSI2/GPIO32
G SSM3K7002F_SC59-3
KSI3 58 83 EC_MUTE# S
3
C KSI4 KSI3/GPIO33 PSCLK1/GPIO4A GFX_CORE_PWRGD EC_MUTE# 42 C
59 KSI4/GPIO34 PSDAT1/GPIO4B 84 GFX_CORE_PWRGD 55
@ C462 @R357
@ R357 KSI5 60 85 WWAN_LED#
KSI5/GPIO35 PSCLK2/GPIO4C WWAN_LED# 41
22P_0402_50V8J 33_0402_5% KSI6 61 PS2 Interface 86 H_PROCHOT#_EC
KSI7 KSI6/GPIO36 PSDAT2/GPIO4D TP_CLK
2 1 1 2
KSI[0..7] KSO0
62 KSI7/GPIO37 TP_CLK/PSCLK3/GPIO4E 87
TP_DATA
TP_CLK 41 Latest design guide suggest change QE1 to
41 KSI[0..7] 39 KSO0/GPIO20 TP_DATA/PSDAT3/GPIO4F 88 TP_DATA 41
KSO1 40 74LVC1G06.
KSO[0..17] KSO2 KSO1/GPIO21
Reserve for EMI please close to U44 41 KSO[0..17] 41 KSO2/GPIO22
KSO3 42 97
KSO4 KSO3/GPIO23 SDICS#/GPXOA00 65W/90W#
43 KSO4/GPIO24 SDICLK/GPXOA01 98 65W/90W# 48,50
+3VS KSO5 HDA_SDO
KSO6
44 KSO5/GPIO25 Int. K/B SDIDO/GPXOA02 99
LID_SW#
HDA_SDO 13 +3VALW
45 KSO6/GPIO26 Matrix SDIDI/GPXID0 109 LID_SW# 41
R360 1 2 2.2K_0402_5% EC_SMB_CK2 KSO7 46 SPI Device Interface
KSO8 KSO7/GPIO27
47 KSO8/GPIO28
R361 1 2 2.2K_0402_5% EC_SMB_DA2 KSO9 48 KSO9/GPIO29 SPIDI/RD# 119 EC_SI_SPI_SO
EC_SI_SPI_SO 41
KSO10 49 120 EC_SO_SPI_SI LID_SW# R696 2 1 100K_0402_5%
KSO10/GPIO2A SPIDO/WR# EC_SO_SPI_SI 41
KSO11 50 SPI Flash ROM 126 EC_SPICLK
KSO11/GPIO2B SPICLK/GPIO58 EC_SPICLK 41
R685 1 2 10K_0402_5% EC_SCI# KSO12 51 128 EC_SPICS#/FSEL#
KSO12/GPIO2C SPICS# EC_SPICS#/FSEL# 41
KSO13 52
KSO14 KSO13/GPIO2D
53 KSO14/GPIO2E
KSO15 54 73
KSO16 KSO15/GPIO2F CIR_RX/GPIO40 EC_PECI R355 1
81 KSO16/GPIO48 CIR_RLC_TX/GPIO41 74 2 43_0402_1% H_PECI 5,18
R679 1 2 100K_0402_5% PLT_RST_BUF# KSO17 82 89 FSTCHG
KSO17/GPIO49 FSTCHG/SELIO#/GPIO50 FSTCHG 48
90 BATT_GRN_LED#
BATT_CHGI_LED#/GPIO52 BATT_GRN_LED# 41
CAPS_LED#/GPIO53 91 R780 C815
EC_SMB_CK1 77 GPIO 92 BATT_AMB_LED#
50 EC_SMB_CK1 SCL1/GPIO44 BATT_LOW_LED#/GPIO54 BATT_AMB_LED# 41
EC_SMB_DA1 78 93 PWR_LED EC_SPICLK 1 2 1 2
50 EC_SMB_DA1 SDA1/GPIO45 SUSP_LED#/GPIO55 PWR_LED 41
EC_SMB_CK2 79 SM Bus 95 SYSON @ @
14,22 EC_SMB_CK2 SCL2/GPIO46 SYSON/GPIO56 SYSON 39,44,46,51
EC_SMB_DA2 80 121 VR_ON 22_0402_5%
14,22 EC_SMB_DA2 SDA2/GPIO47 VR_ON/XCLK32K/GPIO57 VR_ON 55 0.01U_0402_16V7K
127 EC_ACIN
AC_IN/GPIO59
For EMI request
PM_SLP_S3# 6 100 PCH_RSMRST#
B 15 PM_SLP_S3# PM_SLP_S3#/GPIO04 EC_RSMRST#/GPXO03 PCH_RSMRST# 15 B
PM_SLP_S5# 14 101 EC_LID_OUT#
15 PM_SLP_S5# PM_SLP_S5#/GPIO07 EC_LID_OUT#/GPXO04 EC_LID_OUT# 14
EC_SMI# 15 102 EC_ON
18 EC_SMI# EC_SMI#/GPIO08 EC_ON/GPXO05 EC_ON 41,49
EC_XCLK1 EC_XCLK0 EC_PME# 16 103 3S/4S#
35 EC_PME# LID_SW#/GPIO0A EC_SWI#/GPXO06 3S/4S# 48
MINI1_LED# 17 104 PCH_PWROK
38 MINI1_LED# SUSP#/GPIO0B ICH_PWROK/GPXO06 PCH_PWROK 15
@1 1 @ 18 GPO 105 BKOFF#
PBTN_OUT#/GPIO0C BKOFF#/GPXO08 BKOFF# 31
C723 C721 SUS_PWR_DN_ACK 19 GPIO 106
15 SUS_PWR_DN_ACK EC_PME#/GPIO0D WL_OFF#/GPXO09
1
INVT_PWM 25 107
31 INVT_PWM EC_THERM#/GPIO11 GPXO10
15P_0402_50V8J 15P_0402_50V8J FAN_SPEED1 28 108 SA_PGOOD
OSC
OSC
2 2 43 FAN_SPEED1 FAN_SPEED1/FANFB1/GPIO14 GPXO11 SA_PGOOD 52

29 FANFB2/GPIO15
E51TXD_P80DATA 30
38 E51TXD_P80DATA EC_TX/GPIO16
E51RXD_P80CLK 31 110 PM_SLP_S4#
38 E51RXD_P80CLK EC_RX/GPIO17 PM_SLP_S4#/GPXID1 PM_SLP_S4# 15
@ ON/OFF ENBKL
NC
NC
41 ON/OFF 32 ON_OFF/GPIO18 ENBKL/GPXID2 112 ENBKL 16,22

PWR_SUSP_LED# 34 114 EAPD
41 PWR_SUSP_LED# PWR_LED#/GPIO19 GPXID3 EAPD 42
WLAN_LED# 36 GPI 115 VGATE VGATE 15,55
41 WLAN_LED#
2
NUMLED#/GPIO1A GPXID4
2
116 SUSP#
GPXID5 SUSP# 38,44,52,53
X1 117 PBTN_OUT# R691
GPXID6 PBTN_OUT# 15
32.768KHZ_12.5PF_Q13MC14610002 118 100K_0402_5%
EC_XCLK1 GPXID7
122 XCLK1
1 2 EC_XCLK0 123 124 +V18R 15mil
15 SUSCLK
1
R697 0_0402_5% XCLK0 V18R
1
AGND
C398 R06 modify

GND
GND
GND
GND
GND
4.7U_0603_6.3V6K
R769 2 2
1 100K_0402_5% KB930QF A1 LQFP 128P
11
24
35
94
113
69
20mil L23 For EC Tools

ECAGND 2 1
Board ID FBMA-L11-160808-800LMT_0603
+3VALW +3VALW
Analog Board ID definition, JEC1 Place on RAM door
Please see page 3. 1
1
2
2 E51RXD_P80CLK
A R354 2 E51TXD_P80DATA A
3 3
Ra 100K_0402_5% 4
4
ACES_85205-0400
1
AD_BID0 @
1
1
R353 C454
Rb 100K_0402_5% 0.1U_0402_16V4Z Security Classification Compal Secret Data Compal Electronics, Inc.
2 Issued Date 2011/02/08 Deciphered Date 2012/02/08 Title
EC ENE-KB930
2
R20 Modify DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom JE50-HR/SJV50-HR M/B Schematics E
5 4 3 2 1
1 2 3 4 5 6 7 8
R05 modify
+3VALW +3VALW
U38
C722 1 2 0.1U_0402_16V4Z ON/OFF BTN
2
EC_SPICS#/FSEL# 1 8
40 EC_SPICS#/FSEL# CE# VDD
R694 1 2 4.7K_0402_5% SPI_WP# 3 6 EC_SPICLK_R R698 1 2 0_0402_5% ON/OFFBTN# R144
WP# SCK EC_SPICLK 40
+3VALW R690 1 2 4.7K_0402_5% SPI_HOLD# 7 HOLD# SI 5 EC_SO_SPI_SI_R R699 1 2 0_0402_5% EC_SO_SPI_SI 40
100K_0402_5%
4 2 EC_SI_SPI_SO_R R692 1 2 0_0402_5%
VSS SO EC_SI_SPI_SO 40
1
MX25L1005AMC-12G_SOP8
EC_SPICLK_R SW1 2
A ON/OFF 40 A
JKB1 SMT1-05-A_4P
1 3 1
2
KSO0 1
KSO1 1 51ON#
2 2 2 4 3 51ON# 47
KSO2 3 @
KSO3 3 0_0402_5% R695
4 D6
6
5
KSO4 4 CHN202UPT_SC70-3
5
1
KSO5 5 KSI[0..7]
6 6 KSI[0..7] 40
1
KSO6 @ D
7 7 @
KSO7 8 KSO[0..17] C727 EC_ON 2 Q7
8 KSO[0..17] 40 40,49 EC_ON
KSO8 9 33P_0402_50V8K G SSM3K7002F_SC59-3
9
2
KSO9 10 S
3
KSO10 10 R104
11 11
KSO11 12
KSO12 12 10K_0402_5%
13 13
KSO13 14
1
KSO14 14
15
KSO15
KSO16
KSO17
16
17
18
15
16
17
KB Conn.
KSI0 18
19 19
KSI1 20
KSI2 20
21 21
KSI3 22
KSI4
KSI5
KSI6
23
24
25
22
23
24
27
PWR/B
KSI7 25 G1 JPWR1
26 26 G2 28
1 1 +3VALW
+3VS 2 LID_SW#
2 LID_SW# 40
ACES_85201-26051 EMI request 3
CONN@ 3
R05 modify 4 4
B B
R03 modify 5 5 +3VS
+3VS 6 PWR_LED#
6
2
KSO16 C261 1 2 100P_0402_50V8J 7 ON/OFFBTN#
R496 7
8 8
KSO17 C262 1 2 100P_0402_50V8J 10K_0402_5% 9
GND
GND 10
KSO15 C260 1 2 100P_0402_50V8J KSO7 C252 1 2 100P_0402_50V8J
1
5
U8 ACES_85201-0805N
KSO14 C259 1 2 100P_0402_50V8J KSO6 C251 1 2 100P_0402_50V8J 2 CONN@
P
B CR_5IN1_LED# 35
MEDIA_LED# 4
KSO13 C258 1 100P_0402_50V8J KSO5 C250 1 100P_0402_50V8J Y
2 2 A 1 PCH_SATALED# 13
G
KSO12 C257 1 2 100P_0402_50V8J KSO4 C249 1 2 100P_0402_50V8J MC74VHC1G08DFT2G_SC70-5
3
KSI0 C263 1 2 100P_0402_50V8J KSO3 C248 1 2 100P_0402_50V8J
R05 modify LED7
KSO11 C256 1 2 100P_0402_50V8J KSI4 C267 1 2 100P_0402_50V8J HT-191NB5_BLUE
KSO10
KSI1
C255 1
C264 1
2
2
100P_0402_50V8J
100P_0402_50V8J
KSO2
KSO1
C247 1
C246 1
2
2
100P_0402_50V8J
100P_0402_50V8J
+3VS 1
R380
2
330_0402_5%
2
B
1 MEDIA_LED# R05 modify
+5VS TP Conn.
LED3
KSI2 C265 1 2 100P_0402_50V8J KSO0 C245 1 2 100P_0402_50V8J HT-191NB5_BLUE
1 1
KSO9 C254 1 100P_0402_50V8J KSI5 C268 1 100P_0402_50V8J 2 2 TP_CLK 40
2 2 2 1 3 3 TP_DATA 40
B 4 4
LEFT_BTN#
KSI3 C266 1 2 100P_0402_50V8J KSI6 C269 1 2 100P_0402_50V8J RIGHT_BTN#
5 5
KSO8 C253 1 100P_0402_50V8J KSI7 C270 1 100P_0402_50V8J LED8 3G@ 6 6
2 2 R05 modify 7 GND 1 1
HT-191NB5_BLUE 8 GND
C C217 C216 C
1 2 2 1 WWAN_LED# JTP1
+3VS WWAN_LED# 40 2 2
R381 150_0402_5% B CONN@
3G@ ACES_85201-0605N 100P_0402_50V8J 100P_0402_50V8J
R05 modify LED4 TP_CLK LEFT_BTN#

EC Request LED5
+3VS 1 2 2 1 WLAN_LED# TP_DATA RIGHT_BTN#
WLAN_LED# 40
+3VALW 1 2 2 1 PWR_LED# R377 560_0402_5% A
3
R374 200_0402_5% B
+5VS D4 D3
HT-191UD5_AMBER
HT-191NB5_BLUE PJDLC05C_SOT23-3 PJDLC05C_SOT23-3
LED1 1
C196
+3VALW 1 2 2 1 PWR_SUSP_LED# PWR_SUSP_LED# 40 R05 modify 0.1U_0402_16V4Z
R378 560_0402_5% A LED6
2
HT-191UD5_AMBER +3VALW 1 2 2 1 BATT_GRN_LED# BATT_GRN_LED# 40
1
R379 200_0402_5% B
HT-191NB5_BLUE
SW2 SW3
LED2 SMT1-05-A_4P SMT1-05-A_4P
PWR_LED# LEFT_BTN# 3 1 RIGHT_BTN# 3 1
1 2 2 1 BATT_AMB_LED# BATT_AMB_LED# 40
R376 560_0402_5% A 4 2 4 2
1
D HT-191UD5_AMBER
5
6
5
6
40 PWR_LED 2 Q32
G
2
S SSM3K7002F_SC59-3
3
D R512 D
100K_0402_5%
1

BIOS, I/O Port & K/B Connector
Custom
1 2 3 4 5 6 7 8
5 4 3 2 1
1 2
R711 0_0805_5% +VDDA
+5VS
60mil 1
U40
40mil Int. Speaker Conn.
IN
1 OUT 5 +VDDA
1
C737 2 GND R712
4.75V 20mil JSPK1
0.1U_0402_16V4Z 3 +3VS 10K_0402_5% SPKR+ R46 2 0_0603_5% SPK_R+
2 SHDN BYP 4 C741
1 2
SPKR- R47
1 1 1
1 2 0_0603_5% SPK_R- 2 2
G9191-475T1U_SOT23-5 0.01U_0402_16V7K
3
@ @ 1 2
1
C739 1U_0402_6.3V6K D2 3 G1
1
D30 R725
(output = 300 mA) CH751H-40PT_SOD323-2 R728
PJDLC05C_SOT23-3 4 G2
D 10K_0402_5% 10K_0402_5% ACES_88266-02001 D
CONN@
2
SM010014520 3000ma 220ohm@100mhz DCR 0.04 C766
2
+PVDD_HDA MONO_IN
1 2
1U_0402_6.3V6K
1
1
L46 2 1 0.1U_0402_16V4Z +PVDD_HDA C
+VDDA R723
FBMA-L11-201209-221LMA30T_0805 C759 1
@
1
C748
1 20mil 40 BEEP# 2 1 2 2
B Q44
1
R729
2
C745 1U_0402_6.3V6K 560_0402_5% E 2.4K_0402_1% JSPK2

20mil
3
10U_0805_10V4Z 2SC2411K_SOT23-3 SPKL+ R8 1 2 0_0603_5% SPK_L+ 1
R724 1
2
@ 2 2 C771 1 2 1 2 SPKL- R7 1 2 0_0603_5% SPK_L-
13 PCH_SPKR 2 2
R713
1
0_0603_5% 1U_0402_6.3V6K 560_0402_5%
3
Place near Pin46 D29 3
D1 G1
CH751H-40PT_SOD323-2 4
1
G2
SM010014520 3000ma 220ohm@100mhz DCR 0.04 PJDLC05C_SOT23-3
ACES_88266-02001
2
CONN@
L50 2 1 0.1U_0402_16V4Z +PVDD1_HDA
+VDDA
FBMA-L11-201209-221LMA30T_0805 1
C749
1 20mil HD Audio Codec
C750
1
10U_0805_10V4Z
2 2
SM010030010 200ma 120ohm@100mhz DCR 0.2

Singatron 2SJ2326
Place near Pin39 DC021007151
SM010030010 200ma 120ohm@100mhz DCR 0.2
10mil +3VS_DVDD 10U_0603_6.3V6M L48 2 1
+AVDD_HDA +3VS
BLM18AG121SN1D_0603
L51 2 1 0.1U_0402_16V4Z 10mil 1

C754
1
C761
1
C753 C751
2 2
C747 Headphone Out
+VDDA
BLM18AG121SN1D_0603 1 1 1 JHP1
0.1U_0402_16V4Z 330P_0402_50V7K 330P_0402_50V7K COM_MIC 3
C756 C772 C752 2 2 2 FBMA-L11-160808-800LMT_0603 1 1
C
6 C
10U_0805_10V4Z 0.1U_0402_16V4Z L49
2 2 2 HP_LEFT R716 1
Place near Pin1, 9 2 75_0603_5% HPOUT_L_1 1 2 HPOUT_L_2 1
0.1U_0402_16V4Z L47
HP_RIGHT R714 1 2 75_0603_5% HPOUT_R_1 1 HPOUT_R_2
25
38
39
46
2 2
9
Place near Pin25, 38 U41 FBMA-L11-160808-800LMT_0603 4
AVDD1
AVDD2
PVDD1
PVDD2
DVDD_IO
DVDD
C770 1 2 LINE2_C_L 14 HP_PLUG# 5
LINE2_L
Internal MIC INT_MIC_R 2 1 INT_MIC 4.7U_0603_6.3V6K
R726 1K_0402_5% C769 1 LINE2_C_R
2
4.7U_0603_6.3V6K
15 LINE2_R 35mA SPKL+
C765 1 2 MIC2_C_L 16
68mA 600mA SPK_OUT_L+ 40 SINGA_2SJ2326-001111
COM_MIC MIC2_L
Combo MIC 2 1 COM_MIC_R 4.7U_0603_6.3V6K CONN@
R719 1K_0402_5% C764 1 2 MIC2_C_R 17 41 SPKL- +MIC2_VREFO
4.7U_0603_6.3V6K MIC2_R SPK_OUT_L-
23 45 SPKR+
LINE1_L SPK_OUT_R+
1
24 MIC2JD R722
LINE1_R SPKR- MIC_PLUG#
SPK_OUT_R- 44 2.2K_0402_5%
MIC1_L C763 1 2 MIC1_C_L 21 MIC1_L
1
4.7U_0603_6.3V6K HP_LEFT D HP_PLUG#
External MIC 32
2
MIC1_R C762 1 MIC1_C_R HPOUT_L COM_MIC
2 22 MIC1_R 2 1 2
2
4.7U_0603_6.3V6K 33 HP_RIGHT Q43 G R720
HPOUT_R BSS138_NL_SOT23-3 S +MIC1_VREFO
1 35 1 22K_0402_5% R03 modify D28
3
CBN
2
8 HDA_SDIN0_AUDIO 1 R721 2 HDA_SDIN0 13 C746 PJDLC05C_SOT23-3
C755 SDATA_IN 33_0402_5% R791
2.2U_0402_6.3V6M 36 5 HDA_SDOUT_AUDIO 13 10U_0805_10V4Z 22K_0402_5%
2 CBP SDATA_OUT 2
2
Combo MIC +MIC2_VREFO 29 10 HDA_SYNC_AUDIO 13
1
MIC2_VREFO SYNC D26 D27
10mil CH751H-40PT_SOD323-2
11 HDA_RST_AUDIO# 13 CH751H-40PT_SOD323-2
1
RESET#
Internal MIC 30 MIC1_VREFO_R
10mil 6 HDA_BITCLK_AUDIO 13
1
BCLK
External MIC +MIC1_VREFO 31 MIC1_VREFO_L
10mil @
1
+INTMIC_VREFO @ 2 C757
B 1 2
R717 0_0402_5%
1
22P_0402_50V8J
For EMI B
C760 1 2
10U_0805_10V4Z
28 LDD_CAP
R705
4.7K_0402_5%
R708
4.7K_0402_5%
MIC JACK
GPIO0/DMIC_DATA 2
FBMA-L11-160808-800LMT_0603 JMIC1
2
R730 3 L45 1
GPIO1/DMIC_CLK MIC1_L
2 1 19 JDREF 1 2 MIC1_L_1 1 2 MIC1_L_R 2
20K_0402_1% 4 R707 1K_0603_5% L44
PD# EC_MUTE# 40 MIC1_R 1 2 MIC1_R_1 1 2 MIC1_R_R 3
R706 1K_0603_5% FBMA-L11-160808-800LMT_0603
C758
3
4
HP_PLUG# 2 1 1 2 2.2U_0402_6.3V6M 34 12 MONO_IN
R731 39.2K_0402_1% CPVEE PCBEEP MIC_PLUG#
MIC_PLUG# SENSE_A
10mil C732
1 1
C733
5
2 1 13 SENSE A MONO_OUT 20
R727 20K_0402_1% MIC2JD 1 2 SENSE_B 18 37
R7181 SENSE B AVSS2
40 EAPD 2 20K_0402_1% 47 EAPD
220P_0402_50V7K 220P_0402_50V7K
R715 0_0402_5% 27 CODEC_VREF C767 1 2 0.1U_0402_16V4Z 2 2 6
VREF C768 1
48 SPDIFO 10mil 2 10U_0805_10V4Z D25
@ PJDLC05C_SOT23-3 SINGA_2SJ-A960-C01
1
7 26 Place next pin27 CONN@
DVSS AVSS1
PVSS2 43 R03 modify
49 GND PVSS1 42
ALC271X-GR_QFN48_7X7 +INTMIC_VREFO
DGND AGND
SM010004010 300ma 70ohm@100mhz DCR 0.3
1
INT_MIC_L R394 For EMI
10K_0402_5%
15mil 15mil
Int. MIC
3
L24 JMIC2
2
D16 INT_MIC_R 1 2 INT_MIC_L 1
FBMA-L11-160808-800LMT_0603 1
2 2
@ 1
C500
A A
3 G1
PJDLC05C_SOT23-3 220P_0402_50V7K 4
PJ1 PJ2 2 G2
@ JUMP_43X39 @ JUMP_43X39 ACES_88266-02001
1
1 1 CONN@
2 2 1 1 2 2
PJ3 PJ4
@ JUMP_43X39 @ JUMP_43X39
1 1 2 2 1 1 2 2 Security Classification Compal Secret Data Compal Electronics, Inc.
PJ5 PJ6 2011/02/08 2012/02/08 Title
@ JUMP_43X39 @ JUMP_43X39
Issued Date Deciphered Date
1 1
HD Audio Codec ALC271X
2 2 1 1 2 2 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Custom
GND GNDA GND GNDA
5 4 3 2 1
FAN Stand-Off JUSB3 Stand-Off
H1 H2 H3 H4 H5 H6 H7
H_3P4 H_3P4 H_3P4 H_3P4 H_3P4 H_3P4 H_3P4
@ @ @ @ @ @ @
1
H8 H9 H10 H11 H12 H13 H14 H15 H16 H17 H18
H_3P0 H_3P0 H_3P0 H_3P0 H_3P0 H_3P0 H_3P0 H_3P0 H_3P0 H_3P0 H_3P0
@ @ @ @ @ @ @ @ @ @ @
1
H19 H20
H_4P0 H_4P0
FAN1 Conn @ @
1
+5VS
C580 10U_0805_10V4Z
1 2
U30 H21 H22 H23 H24

1 8 H_4P2 H_4P2 H_4P2 H_4P2
EN GND
2 VIN GND 7
+VCC_FAN1 3 6
VOUT GND @ @ @ @
40 EN_DFAN1 2 1 4 5
1
R509 300_0402_5% VSET GND
1 APL5607KI-TRG_SO8
C598 C585
0.1U_0402_16V4Z 10U_0805_10V4Z
2 H25 H26 H27
1 2
H_7P0N H_3P0N H_3P5X3P0N
+3VS C587
1000P_0402_50V7K
1 2 @ @ @
1
1
R489
10K_0402_5%
40mil JFAN1
2
+VCC_FAN1
1
40 FAN_SPEED1 2
3
1
C579 ACES_85205-03001
1000P_0402_50V7K CONN@
2
FD1 FD3 FD2 FD4
@ @ @ @
1
FIDUCIAL_C40M80 FIDUCIAL_C40M80 FIDUCIAL_C40M80 FIDUCIAL_C40M80

FAN & Screw Hole
Custom
A B C D E
+5VALW
+1.5V to +1.5VS
+5VALW TO +5VS
2
+1.5V +1.5VS
U12 R246
+5VALW For Cost Down 2/21 AO4430L_SO8 100K_0402_5%
U22 +5VS
For Cost Down 2/21 DMN3030LSS-13_SOP8L-8
8
7
1
2 1 1
1
2
10U_0805_10V4Z
C375
4.7U_0805_10V4Z
C374
0.1U_0402_16V4Z
C377
0.1U_0402_16V4Z
C376
4.7U_0805_10V4Z
C339
1U_0603_10V6K
C338
1 SUSP 1
8 1 6 3 38,52,53 SUSP
7 2 @ 1 1 1 1 5 R245
2
6 3 1 1 470_0603_5%
6
2 2
4.7U_0805_10V4Z
C468
1U_0603_10V6K
C469
1 1 5 R382
4
4.7U_0805_10V4Z
C465
10U_0805_10V4Z
C464
470_0603_5%
1
2 2 2 2 Q27A
4
2 2 DMN66D0LDW-7_SOT363-6
38,40,52,53 SUSP# 2
6
2 2 @
1
6
20mil 10mil Q15A R251
+VSB 2 1 1.5VS_GATE DMN66D0LDW-7_SOT363-6 2 SUSP 10K_0402_5%
20mil 10mil R269
+VSB 2 1 5VS_GATE 2 SUSP 200K_0402_5% 1
2
1
R372 @ C380
510K_0402_5%
R268
20K_0402_1% 1 Q19A 0.1U_0603_25V7K
1
3
C470 DMN66D0LDW-7_SOT363-6
0.1U_0603_25V7K 2
SUSP 5
2
SUSP 2
5
Q15B
4
Q19B DMN66D0LDW-7_SOT363-6
4
DMN66D0LDW-7_SOT363-6
1
D
15,22,40,45,48 ACIN ACIN 2 Q21

G @
S SSM3K7002F_SC59-3
3
+5VALW
2 2
2
R383
100K_0402_5%
1
+3VALW TO +3VS 39,46 SYSON#
+3VALW +3VS
3
U21
For Cost Down 2/21 DMN3030LSS-13_SOP8L-8 +3VALW TO +3VALW_PCH(PCH AUX Power)
8 1 Q27B
7 2 SYSON 5
39,40,46,51 SYSON
2
4.7U_0805_10V4Z
C460
10U_0805_10V4Z
C459
1 1 6 3 1 1 DMN66D0LDW-7_SOT363-6
1
4.7U_0805_10V4Z
C461
1U_0603_10V6K
C458
5 R369
4
470_0603_5% +3VALW +3VALW_PCH R373
R614
@ 40mil 100K_0402_5%
4
2 2 2 2
2 1
6 1
2
10U_0805_10V4Z
C701
R368 0_0805_5%
47K_0402_5%
10mil
20mil 3VS_GATE SUSP 2
+VSB 2 1 2
1 Q25A
1
3
C463 DMN66D0LDW-7_SOT363-6
0.1U_0603_25V7K
SUSP 2
5
3 Q25B 3
4
+5VALW TO +5VALW_PCH(PCH AUX Power)
+5VALW +5VALW_PCH
R197
1 2
0_0603_5%
+0.75VS +1.05VS_VTT +1.8VS +1.5V

1
R366 R29 R508 @ R365

22_0603_5% 470_0603_5% 470_0603_5% 470_0603_5%
1 2
1 1
1 1
1 1
4 Q24 4
D Q23 D Q5 D Q34 D @
2 SUSP 2 SUSP 2 SUSP 2 SYSON#
G G G G
S SSM3K7002F_SC59-3 S SSM3K7002F_SC59-3 S SSM3K7002F_SC59-3 S SSM3K7002F_SC59-3
3

DC Interface
Custom
A B C D E
A B C D E
+1.8VS to +1.8VSDGPU for GPU

+1.05VS_VTT to +1.05VSDGPU for GPU +1.8VS
+1.05VS_VTT +1.05VSDGPU
U25
AO4430L_SO8
8 1 R03 modify 4A
1 1
1 7 2
6 3 1
2
C513 5 1 1
1
2
5
6
4.7U_0805_10V4Z
C498
4.7U_0805_10V4Z DIS@ R406
2
1U_0603_10V6K
C499
+ C825 470_0603_5% D Q10
R136
4
DIS@ DIS@ 2 DIS@ G
DIS@ 220U_B2_2.5VM_R35 2 +1.8VS_GATE
+VSB 2 1 3
6 1
2 510K_0402_5% S S TR DMN3033LDM-7 1N TSOP6
For Cost Down 2/21 DISO@ DISO@ +1.8VSDGPU
1
4
20mil DIS@ R409 10mil C198 300mA
510K_0402_5%
+VSB 2 1 1.05VSDGPU_GATE 2 VGA_ON# 0.1U_0603_25V7K
6
2
DIS@
1 DIS@ Q29A DISO@ 1
1
3
2
510K_0402_5%
@ C530 DMN66D0LDW-7_SOT363-6 Q9A C194
R410
DIS@ VGA_ON# 2 DISO@ R132
0.1U_0603_25V7K DISO@
VGA_ON# 2 DISO@ 2
10U_0805_10V4Z
5
1
470_0603_5%
2
3 1
DIS@ Q29B
4
DMN66D0LDW-7_SOT363-6 DMN66D0LDW-7_SOT363-6
1
D
15,22,40,44,48 ACIN ACIN 2 Q30 Q9B
G VGA_ON# 5 DISO@
S SSM3K7002F_SC59-3 14,17 DGPU_PWR_EN R140 2 1 VGA_ON
3
@ DMN66D0LDW-7_SOT363-6 0_0402_5% DIS@
4
2 2
+5VALW
2
DIS@
R134
100K_0402_5%
2009/08/17 add VGA_ON#
1
54 VGA_ON# VGA_ON#
1
D
+1.5VSDGPUH to +1.5VSDGPU for GPU 51,54 VGA_ON 2
G
Q8
SSM3K7002F_SC59-3
1
+1.5VSDGPUH +1.5VSDGPU S DIS@
+3VS to +3VSDGPU for GPU
3
U2 R135
R03 modify 20mil AO4430L_SO8 R03 modify DIS@
8 1 +3VS 22K_0402_5%
7 2 1 1 For Cost Down 2/21
2
2
1 1 6 3 DIS@ DIS@ R05 modify
10U_0805_10V4Z
C13
C824 C823 1 1 1 5 R26 +3VSDGPU

1U_0603_10V6K
C12
1U_0402_6.3V6K 0.1U_0402_10V7K GV@ GV@ GV@ 1 470_0603_5%
1
2 2 GV@ 1
4
2 2 C818 C819 C7 GV@ + DIS@ + GV@
1
2 2 2 330U_2.5V_M_R15 C602
4.7U_0805_10V4Z 4.7U_0805_10V4Z 4.7U_0805_10V4Z C514 4.7U_0805_10V4Z
2
6
2 2
220U_B2_2.5VM_R35
C826
3 1
+3VALW DIS@ Q33
10mil 1.5VSDGPU_GATE
100mil(1.5A)
+VSB 2 1 2VGA_ON# DIS@
1
3 R27 Q3A 3
2
510K_0402_5% 1 GV@ DIS@ AP2301GN-HF_SOT23-3 1 DIS@
2
3
1
510K_0402_5%
GV@ C29 DMN66D0LDW-7_SOT363-6 R515 R511

R28
GV@ 100K_0402_5% C590 470_0603_5%

@ 0.1U_0603_25V7K 3VSdelay_gate 4.7U_0805_10V4Z
For Cost Down 2/21
2
VGA_ON# 2 DIS@ 2
5
6 1
1 2 DIS@
2
GV@ Q3B R519 DIS@ Q35A

4
DMN66D0LDW-7_SOT363-6 1K_0402_5% DMN66D0LDW-7_SOT363-6

1
3
D DIS@
ACIN 2 Q4 R514 DIS@ 23VSdelay_gate
G SSM3K7002F_SC59-3 1K_0402_5% 1 DIS@
@ VGA_ON DMN66D0LDW-7_SOT363-6 C612
R03 modify S 1 2 5
3
1
Q35B 0.1U_0603_25V7K
1
4
+1.5VSDGPUH DIS@ 2
C603
0.1U_0603_25V7K 2
1
ME interefer,not pop!! GV@ PJ28
+ 2 2
C817 1 1
220U_B2_2.5VM_R35 JUMP_43X118 R03 modify
2 @
GV@ PJ27
+1.5V 2 2 +1.5VSDGPUH
1 1
JUMP_43X118 1 1
C821 C822
1U_0402_6.3V6K 0.1U_0402_10V7K
2 2
4 4

DC Interface
Custom
A B C D E
5 4 3 2 1
+3V_USB3.0 +1.05VR R02 modify R660 1 @ 2 0_0402_5%

+1.5V to +1.05V Transfer Close to U3.D7 Close to U3.P13 USB30@ USB30@ USB30@ USB30@ USB30@ USB30@ USB30@ L42 USB30@
For EMI request
+5VALW +1.5V +5VALW +1.05V_USB3.0
C697
C401
C370
C369
C716
C715
C396
C696
C368
C717
C718
C695
C389
C366
C367
U3TXDN2_L 2 U3TXDN2
U18
+3VA_USB3.0 +3VA_USB3.0 2 1 1
1U_0603_10V6K
10U_0603_6.3V6M
+1.5V
C420
C402
1 1 6 VCNTL
5 3 USB30@ USB30@ 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 U3TXDP2_L 3 4U3TXDP2 R680 1 @ 2 0_0402_5%
VIN VOUT 3 4
9 VIN VOUT 4
+5VALW
0.1U_0402_10V7K
C397
0.01U_0402_16V7K
C382
8P_0402_50V8D
0.1U_0402_10V7K
C406
0.01U_0402_16V7K
C379
8P_0402_50V8D
USB30@ 1 1 1 @ USB30@ 1 1 1 @ OCE2012120YZF_0805 L43 USB30@
2 2
C386
C405
SYSON 8 U2DP2_L 2 U2DP2
EN 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1 1
10U_0603_6.3V6M
2 1 7 2 1 R325 2 R659 1 @ 2 0_0402_5%
GND
POK FB
C419
0.01U_0402_16V7K
0.01U_0402_16V7K
0.01U_0402_16V7K
0.01U_0402_16V7K
0.1U_0402_10V7K
0.01U_0402_16V7K
0.1U_0402_10V7K
0.01U_0402_16V7K
0.01U_0402_16V7K
0.01U_0402_16V7K
0.01U_0402_16V7K
0.01U_0402_16V7K
0.1U_0402_10V7K
0.01U_0402_16V7K
0.1U_0402_10V7K
USB30@ USB30@ R327 5.1K_0402_1% 10K_0402_5% 1
1
USB30@ USB30@ 2 2 2 2 2 2 U2DN2_L 3 3 4 4U2DN2
APL5930KAI-TRG_SO8 R326 R658 1 @ 2 0_0402_5%
1
D USB30@ 32.4K_0402_1% WCM-2012-900T_0805 D
USB30@ 2 L41 USB30@
Vout=0.8(1+10K/32.4K)
U3RXDN2_L 2 U3RXDN2 R683 1 @ 2 0_0402_5%
1.042 ~ 1.0469 ~ 1.0519V 1 1
2
2
Spec: 0.9975 ~ 1.05 ~ 1.1025
USB30@ USB30@ USB30@ USB30@ USB30@ USB30@ USB30@ USB30@ U3RXDP2_L 3 4U3RXDP2
3 4
7K for customer request, can use other kind
R310 OCE2012120YZF_0805 For USB2.0 ESD request
0_0805_5% of capacitor, like Y5V.
+3VALW to +3V Transfer +3V_USB3.0
+1.05V_USB3.0 1 2 +1.05VR +3VA_USB3.0
+3V_USB3.0L22 +3VA_USB3.0
R657 1 @ 2 0_0402_5%
EMI Request
+3VALW U19 +3V_USB3.0 BLM18AG601SN1D_2P
U34 D24
1 2
3 1 USB30@ 1 1 6
D10
H11
E11
E12
K11
K12
P13
F13
F14
VIN VOUT I/O1 I/O4
L10
L13
L14
G3
G4
N4
N5
N6
C4
C5
C6
C7
D5
C8
C9
D8
D9
H3
H4
D7
SYSON C422
P3
E3
E4
F3
L9
L5
L8
39,40,44,51 SYSON 4 VIN/CE VOUT 5
10U_0805_10V4Z 2 5 +USB3_VCCA
USB30@ REF1 REF2
2
U3AVDO33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD10
VDD10
VDD10
VDD10
VDD10
VDD10
VDD10
VDD10
VDD10
VDD10
VDD10
VDD10
VDD10
VDD10
VDD10
VDD10
VDD10
VDD10
VDD10
VDD10
U2AVDD10
GND 2 U2DN2 U2DP2
3 I/O2 I/O3 4
RT9701-PB_SOT23-5 For ESD request
USB30@ R03 modify PJUSB208H_SOT23-6
B2 C7050.1U_0402_10V7K @
14 CLK_PCIE_USB30_L PECLKP D34
B1 SPEC Max:+3V---200mA;+1.05V---800mA USB30@
14 CLK_PCIE_USB30_L# PECLKN
USB30@ B6 U3TX_C_DP21 2 U3TXDP2_L U3TXDP2 1 10 U3TXDP2
U3TXDP2 +USB3_VCCA
14 PCIE_PRX_DTX_P5
C699 1 2 0.1U_0402_10V7KPCIE_PRX_C_DTX_P5 D2 PETXP Idle mode:0.489W:
C698 1 2 0.1U_0402_10V7KPCIE_PRX_C_DTX_N5 D1 A6 U3TX_C_DN21 2 U3TXDN2_L U3TXDN2 2 9 U3TXDN2
14 PCIE_PRX_DTX_N5 USB30@ PETXN +3V---43mA;+1.05V---328mA U3TXDN2
N8 U2DN2_L USB30@
U2DM2 C7060.1U_0402_10V7K U3RXDP2 U3RXDP2
14 PCIE_PTX_C_DRX_P5 F2 PERXP D3 mode:0.066W: U2DP2_L
4 7
14 PCIE_PTX_C_DRX_N5 F1 PERXN U2DP2 P8 1
+3V---5.4mA;+1.05V---45mA B8 U3RXDP2_L U3RXDN2 5 6 U3RXDN2 2
U3RXDP2
220U_6.3V_M
C390
470P_0402_50V7K
C391
+
A8 U3RXDN2_L +3V_USB3.0 3
R606 1 USB30@2 0_0402_5% U3RXDN2
C 17,35,38,39,40 PLT_RST_BUF# 8 2 1 C
R601 1 USB30@2 0_0402_5% H2
15,35,38,39 PCH_PCIE_WAKE# PERSTB
K1 PEWAKEB OCI2B G14 OCI2B R307 1 USB30@2 10K_0402_5%
OD output USB30_CLKREQ#_L K2 Can be attach to EC, either. H13 OCI1B R308 1 2 10K_0402_5% USB30@
14 USB30_CLKREQ#_L PECREQB OCI1B +5VALW +USB3_VCCA
+3V_USB3.0 R603 1 USB30@2 10K_0402_5% USB30@ RCLAMP0524P.TCT~D
@ R604 1 2 100_0402_1% J2 R05 modify
R602 1 USB30@2 10K_0402_5% AUXDET
+3V_USB3.0 J1 PSEL PPON2 H14
SMI R605 1 USB30@2 0_0402_5% SMI_R H1 PCI Express/ExpressCard select signal J14 C432 U17 W=60mils
SMI# R600 1 @ SMI PPON1
2 0_0402_5% SMIB_R P4 SMIB 1:others 0.1U_0402_10V7K 1 GND VOUT 8
1 2 2 VIN VOUT 7
+3V_USB3.0 R611 1 USB30@2 10K_0402_5% P5 PONRSTB
0:Express Card or Mini card 3 VIN VOUT 6
EPAD
U3TXDP1 B10 R03 modify 39,44 SYSON# 4 EN FLG 5 1 @ 2 OCI2B
1 2 0_0402_5% R313
D21 1 2
1U_0603_10V6K
SPI_CLK_USB_R M2 A10 R786

SPISCK U3TXDN1
C702
1SS355TE-17_SOD323-2 1 SPI_CS_USB# N2 N10 1 USB30@2 0_0402_5% AP2301MPG-13_MSOP8
9
USB_SO_SPI_SI SPISCB U2DM1 R787
USB30@ N1 SPISI
USB_SI_SPI_SO M1 P10 1 USB30@2 0_0402_5%
USB30@ SPISO U2DP1 R788
U3RXDP1 B12
2
1 USB30@2 0_0402_5% USB20@
K13 A12 R789 1 R314 2
GND U3RXDN1 USB_OC1# 17
K14 GND 1 USB30@2 0_0402_5% 0_0402_5%
EMI Request J13 GND 1
R298 C417
1.6K_0402_1% 1 @ 2 U2DN2 @
17 USB20_N1
R803 As short as possible P12 1 2 R687 0_0402_5% 0.1U_0402_16V4Z
33_0402_5% RREF USB30@ L52 USB20@ 2
U2AVSS N12
SPI_CLK_USB 1 2 SPI_CLK_USB_R C14 2 2
USB30@ GND 1 1
U2PVSS N11
+3V_USB3.0 R03 modify
U3AVSS D6 3 3 4 4
+3V_USB3.0 USB3_XT1 N14
USB3_XT2 XT1 WCM-2012-900T_0805
M14 XT2
2
17 USB20_P1 1 @ 2 U2DP2
B R686 0_0402_5% B
1
C725 R704 @ R703 Resister overlap with L52
0.1U_0402_10V7K 10K_0402_5% 47K_0402_5% P6 0_0402_5%
USB30@ USB30@ CSEL R806 USB30@
1
2
2 1 SMIB 18,39
U39 P14 R06 modify
GND
3
8 1 SPI_CS_USB# USB30@ A1 P11
VCC CS# GND GND
2
7 2 USB_SI_SPI_SO A2 P9 Q59B
NC SO GND GND
0_0402_5%
R628
0_0402_5%
R634
SPI_CLK_USB 6 3 A3 P7 DMN66D0LDW-7_SOT363-6
USB_SO_SPI_SI SCLK WP# GND GND SMI
5 SI GND 4 A4 GND GND P2 5 USB30@
@ A5 P1
GND GND
2
R802 MX25L5121EMC-20G_SO8 A7 N13 +3V_USB3.0

1
4
0_0402_5% USB30@ GND GND
A9 GND GND N9 R03 modify
@ A11 GND GND N7
2
EMI Request A13 GND GND N3
USB3_XT1 A14 M13 +USB3_VCCA @R807
@ R807
1
GND GND
33P_0402_50V8K
USB3_XT2 B3 M12 JUSB5 10K_0402_5%

GND GND
2
@ +3V_USB3.0 B4 M11 1
C827 GND GND U2DN2 VCC
B5 M10 2
1
GND GND D-
1
B7 M9 U2DP2 3 SMI# 1 6
R665 GND GND D+
B9 GND GND M8 4 GND
100_0402_1% B11 M7
USB30@ GND GND Q59A
B13 GND GND M6 5 GND1
B14 M5 6 DMN66D0LDW-7_SOT363-6
2
Y5 GND GND GND2 USB30@

Place as close as C1 GND GND M4 7 GND3
1 2 C2 M3 8
possibile to C3
GND GND
L12
GND4
24MHZ_12PF_X5H024000DC1H GND GND SUYIN_020173GB004M25MZL
U3.N14 and U3.M14 C10 GND GND L11
1 USB30@ 1 C11 L7 CONN@
C707 C709 GND GND
GND L6
12P_0402_50V8J 12P_0402_50V8J
USB30@ USB30@ USB2.0 Conn
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
A 2 2 A
PN: SP060004B00
C12
C13
D3
D4
D11
D12
D13
D14
E1
E2
E13
E14
F4
F6
F7
F8
F9
F11
F12
G1
G2
G6
G7
G8
G9
G11
G12
G13
H6
H7
H8
H9
H12
J3
J4
J6
J7
J8
J9
J11
J12
K3
K4
L1
L2
L3
L4
Pin compare table for support USB remote wakeup or not
AUXDET(Pin J2) CSEL(Pin P6) CLK

UPD720200AF1-DAP-A_FBGA176~D
USB30@ Security Classification Compal Secret Data
Support USB pull high Tied to GND Must use 24MHz crystal: mount Issued Date 2011/02/08 Deciphered Date 2012/02/08 Title
remote wakeup 10k to VDD33 Y1,R19,C40,C41
USB3.0 PD720200
Not support USB Tied to GND pull high Can use either 48MHz or 24MHz When DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom E
remote wakeup to VDD33 use 48MHz clock: mount R22,R25 MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5 4 3 2 1
5 4 3 2 1
@ PJP1
ACES_50305-00441-001
PL1
SMB3025500YA_2P
VIN @ PJ7
1 1 2 +3VALWP 2 2 1 1 +3VALW
2 JUMP_43X118
3
4
GND
1
GND PC1 PC2 PC3 PC4
1000P_0402_50V7K 100P_0402_50V8J 100P_0402_50V8J 1000P_0402_50V7K
2
@ PJ9 @ PJ10
+5VALWP 2 1 +5VALW +VCCSAP 2 1 +VCCSA
D 2 1 2 1 D
JUMP_43X118 JUMP_43X118
@ PJ30
1 1 2 2
JUMP_43X39
2
@
PD9
PJSOT24CH_SOT23-3
VIN @ PJ12
+1.8VSP 2 1 +1.8VS
1
2 1
2
PD1 JUMP_43X118
LL4148_LL34-2
1
PD2 @ PJ14
LL4148_LL34-2 2 1
2 1
BATT+ 2 1
1
JUMP_43X118
PR1 PR2
68_1206_5% 68_1206_5% @ PJ15 @ PJ16
PQ1 VS +1.5VP 2 1 +1.5V 1 2
2 1 +VSBP 1 2 +VSB
TP0610K-T1-E3_SOT23-3
2
N1 3 1
0.22U_0603_25V7K
1
@ PJ17 @ PJ18
1
1
PR3 PC6 2 1 2 1
2 1 2 1
PC5
C 100K_0402_5% 0.1U_0603_25V7K C
2
2
2
@ PJ19 @ PJ20
1 2 +1.05VS_VCCPP 2 1 +1.05VS_VTT +VGFX_COREP 2 1 +VGFX_CORE
41 51ON# 2 1 2 1
PR4 JUMP_43X118 JUMP_43X118
22K_0402_5%
@ PJ26
2 2 1 1
JUMP_43X118
@ PJ25
+1.5VSDGPUP 2 1 +1.5VSDGPU
2 1
PreCHG JUMP_43X118
@ PQ2
VIN @ PR7 @ PD3 TP0610K-T1-E3_SOT23-3
1K_1206_5% LL4148_LL34-2 B+
+CHGRTC 1 PR5 2 1 2 2 1 3 1
0_0603_5% +3VLP
100K_0402_5%
100K_0402_5%
@ PR8
PR9
@ PR10
1K_1206_5%
1
1
1 2
@
@ PR11
1K_1206_5%
2
1 2
2
B @ PR12 B
1
1K_1206_5%
1 2 @ PR13
@PR13
100K_0402_5%
12
1
@ PD4
40,48 ACOFF 2
1 2 2
3
49 +5VALWP @PQ4
@ PQ4
BAS40CW_SOT323-3 @ PQ3 PDTC115EU_SOT323-3
PDTC115EU_SOT323-3
3
A A

PWR DCIN / Pre-charge
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom JE50-HR/SJV50-HR M/B SchematicsE
5 4 3 2 1
A B C D
PC181 and PC182 reserve for EMI Isen solution PQ5

Iada=0~4.74A(90W/19V=4.736A) ADP_I = 19.9*Iadapter*Rsense AO4407A_SO8
CP = 85%*Iada ; CP = 4.07A 1 8
PL25 HCB4532KF-800T90_1812 2 7
1 2 @ 3 6
P2 P3 B+ CHG_B+ 5
PQ6 PQ7 PR14 0.02_2512_1% PL22
AO4407A_SO8 SI4459ADY-T1-GE3_SO8 1.2UH_1231AS-H-1R2N=P3_2.9A_30%
4
VIN 8 1 1 8 1 4 1 2 B+
7 2 2 7 PR16
6 3 3 6 2 3 CSIN 47K_0402_1%
5 5 1 2 VIN
2200P_0402_25V7K
10U_1206_25V6M
10U_1206_25V6M
10U_0805_25V6K
10U_0805_25V6K
0.1U_0603_25V7K
CSIP
VIN
5600P_0402_25V7K
VIN PreCHG
2
1 1
PC8
PC9
PC181
PC182
ACOFF
2
PC10
PC11
PR15 V1
PR262
PC7
10K_0402_1%
2
1
1 2
1
1
PR18 @
1
1
200K_0402_1%
0.1U_0603_25V7K
191K_0402_1% 191K_0402_1%
2
PR19 PR17 PR21 @
PD5
1
PC12
PR263
200K_0402_1% 200K_0402_1% 6251VDD 100K_0402_5%
2
2 1 PD10
1000P_0402_25V8J
2.2U_0603_6.3V6K
ACSETIN
2
1
1
PC13
RB751V-40_SOD323-2 3
1
3
1
2 1
1
10_1206_5%
PC14
47K 2
PR22
PR23
2 47K 14.3K_0402_1% BAS40CW_SOT323-3
2
PR24
3
0_0402_5% PQ9
2
2 1 PU1 PDTC115EU_SOT323-3
40 FSTCHG
1
2200P_0402_50V7K
0.1U_0603_25V7K
PC15
V1
1
PQ8 DCIN 2 D
1 24 1
1
VDD DCIN
1
1
D
100K_0402_1%
PDTA144EU_SOT323-3 PR25 47K_0402_5% PACIN 2
1
@ PC17
PC16
6251VDD 1 2 0.1U_0603_25V7K ACPRN 2 G
PR26
2 PR27 ACSETIN 2 23 ACPRN 49 G S
2
ACSET ACPRN
1
150K_0402_1% PR28 S
2
PQ13 20_0402_5% @ PQ12
2
2
6
D PQ10 PDTC115EU_SOT323-3 6251_EN 3 CSON 2N7002W-T/R7_SOT323-3

EN CSON 22 1 2
2
2 PDTC115EU_SOT323-3 PC18
3
5
6
7
8
G 2 0.047U_0402_16V7K PQ70
40 3S/4S#
4 21 1 2 CSOP PQ15 2N7002W-T/R7_SOT323-3
1
CELLS CSOP PR29 AO4466L_SO8
S
1
PQ14A PQ14B PC19 6800P_0402_25V7K 20_0402_5%

2
DMN66D0LDW-7_SOT363-6 DMN66D0LDW-7_SOT363-6 1 2 5 20 2 1 2
3
ICOMP CSIN
3
2
D PR30 4
5 PC20 PR31 PC21 20_0402_5%
G 1 2 1 2 6 19 0.1U_0603_25V7K
1 2 TCR=50ppm / C
1
VCOMP CSIP PR32 PL2
S 0.01U_0402_25V7K 10K_0402_1% 2_0402_5% 10UH_PCMB104T-100MS_6A_20%
4
3
2
1
40,50 ADP_I 1 2 7 18 LX_CHG 1 2 CHG 1 4 PR34
PR33 100_0402_1% ICM PHASE 0.02_1206_1%
5
6
7
8
1
BATT+
4.7_1206_5%
1 2 2 3
PR35
PR38 6251VREF 8 17 DH_CHG
47K_0402_5% PR36 PC22 .1U_0402_16V7K VREF UGATE PR37 PC23
<40,41>
10U_1206_25V6M
10U_1206_25V6M
PACIN 1 2 80.6K_0402_1% 2.2_0603_5% 0.1U_0603_25V7K
2 1 9 16 BST_CHG 1 2 BST_CHGA 2 1
2
40 IREF CHLIM BOOT
1
0.01U_0402_25V7K
4
1
1
PC25
PC26
PR40 PD8
680P_0402_50V7K
PC24
PR39 6251VREF 1 2 6251aclim 10 15 6251VDDP RB751V-40_SOD323-2

ACLIM VDDP
PC27
100K_0402_1%
2
2
1
20K_0402_1%
2.55K_0402_1%
12.1K_0402_1% 1 26251VDD
3
2
1
2
1
ACOFF 2 11 14 DL_CHG
40,47 ACOFF
2
VADJ LGATE
2
PR42
PR43
PR41
4.7_0603_5% PQ16
12 13 PC28 AO4466L_SO8
1 2
1
PQ17 GND PGND 4.7U_0603_6.3V6M
3
PDTC115EU_SOT323-3 D
2 ISL6251AHAZ-T_QSOP24
40,50 65W/90W# G
PQ18 S
3
2N7002W-T/R7_SOT323-3
CP mode 1 2
3
40 CALIBRATE# PR44
3
Iinput=(1/0.02)(0.05*Vaclm/2.39+0.05) 15.4K_0402_1%
2
where Vaclm=1.502V, Iinput=4.07A PR45

31.6K_0402_1%
6251VDD
Charging Voltage
1
BATT Type CV mode CC=0.6~4.48A PR48

(0x15) 10K_0402_1%
1
1 2
IREF=0.7224*Icharge PR46 PR47
ACIN 15,22,40,44,45
Normal 3S LI-ON Cells 47K_0402_5% 10K_0402_1%

12600mV 12.60V IREF=0.43V~3.24V
2
2
PACIN
1
Ki
1
Vchlim=Iref*(PR374/(PR372+PR374)) PR49
14.3K_0402_1%
=Iref*(100K/(80.6K+100K))
=Iref*0.5537
2
Ichanrge=(165mV/PR369)*(Vchlim/3.3V) ACPRN 2
=(165m/20m)*(1/3.3V)*Iref*0.5537
=1.3842*Iref PQ19
Iref=0.7224*Ichanrge =>Ki=0.7224 PDTC115EU_SOT323-3
3
Kv
4 4
Rinternal ic=514K Rec=3K R1=PR379=15.4K R2=PR381=31.6K
R=514K//31.6K//(15.4K+3k)=11.372K
r=514K//514K//31.6K=28.14K
Vcell=0.175*Vadj+3.99v
4.2V=0.175*Vadj+3.99V =>Vadj=1.2V
Vadj=Vref*(R/(R+514K))+CALIBRATE*(r/(r=514K))
1.1483=CALIBRATE*0.6046 =>CALIBRATE=1.899 Security Classification Compal Secret Data Compal Electronics, Inc.
1.899=(4.2-(Vcell+A*0.175))*Kv=(4.2-(4.2+A*0.175))*Kv Issued Date 2011/02/08 Deciphered Date 2012/02/08 Title
A=Vref*(R/(R+514K))=0.052
Kv=9.451 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR-CHARGER
A B C D
5 4 3 2 1
2VREF_8205
1U_0603_10V6K
D D
1
PC29
2
PR50 PR51
13K_0402_1% 30K_0402_1%
1 2 1 2
PR52 PR53
RT8205_B+ 20K_0402_1% 20K_0402_1% RT8205_B+
1 2 1 2
PL3
B+ HCB4532KF-800T90_1812
1 2 Typ: 175mA +3VLP
ENTRIP2
ENTRIP1
2200P_0402_50V7K
2200P_0402_50V7K
0.1U_0603_25V7K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
0.1U_0603_25V7K
PR54 PR55
10P_0402_50V8J
10P_0402_50V8J
110K_0402_1% 154K_0402_1%
PC31
PC38
4.7U_0805_10V6K
1 2 1 2
1
1
PC32
PC33
PC34
PC35
PC36
PC37
PC188
PC189
8
7
6
5
5
6
7
8
PU2
2
2
PC39
PQ20 PQ21
ENTRIP2
REF
FB2
FB1
ENTRIP1
TONSEL
1
C AO4466L_SO8 AO4466L_SO8 C
25 P PAD
2
4 4
7 VO2 VO1 24
SPOK 50
8 23 PR57 PC41
PR56 VREG3 PGOOD 2.2_0603_5% 0.1U_0603_25V7K
1
2
3
3
2
1
1 2 1 2 BST_3V 9 BOOT2 BOOT1 22 BST_5V 1 2 1 2
2.2_0603_5%
4.7UH_PCMC063T-4R7MN_5.5A_20% PC40 UG_3V 10
VFB=2.0V 21 UG_5V PL5
R06 Modify PL4 0.1U_0603_25V7K UGATE2 UGATE1 4.7UH_PCMC063T-4R7MN_5.5A_20%
1 2 LX_3V 11 20 LX_5V 1 2 +5VALWP
+3VALWP PHASE2 PHASE1
10P_0402_50V8J
10P_0402_50V8J
.1U_0402_16V7K
.1U_0402_16V7K
8
7
6
5
1
4.7_1206_5%
4.7_1206_5%
1 1 LG_3V 12 19 LG_5V
LGATE2 LGATE1
1
5
6
7
8
PR58
PR60
PC191
PC190
PC192
PC193
PQ22
SKIPSEL
AO4712_SO8 PR59 @
VREG5
0_0402_5%
GND
2
2 2
VIN
MAINPWON RT8205EGQW_WQFN24_4X4
NC
EN
1 2 1 1
2
2
4
PC42 + 4 PC43 +
13
14
15
16
17
18
1
1
680P_0402_50V7K
680P_0402_50V7K
220U_6.3V_M PR61
PC44
PC45
499K_0402_1% AO4712_SO8 220U_6.3VM_R15
2 PQ23 2
1 2
2
1
2
3
2
B+
3
2
1
1
100K_0402_1%
1U_0603_10V6K
VL
1
PC46
1
PR62
PC47
4.7U_0805_10V6K
B Typ: 175mA B
2
2
2
ENTRIP1 ENTRIP2 RT8205_B+
1
6
D D
0.1U_0603_25V7K
PQ24A 2 5
DMN66D0LDW-7_SOT363-6 G G PQ24B 2VREF_8205
2
PC48
S S TONSEL=VREF (1)SMPS1=300KHZ (+5VALWP)
50 MAINPWON
1
PR63
0_0402_5% (2)SMPS2=375KHZ(+3VALWP)
2 1
PR64
100K_0402_1%
VL 2 1
+3.3VALWP +5VALWP
Ipeak=5.78A ; 1.2Ipeak=6.94A; Imax=4.05A Ipeak=7A ; 1.2Ipeak=8.4A; Imax=4.9A
f=375KHz, L=4.7UH f=300KHz, L=4.7UH,Rentrip=154k ohm
1
2N7002W-T/R7_SOT323-3
PQ26 PQ25 Rdson=15~18m ohm Rdson=15~18m ohm
PR65 PDTC115EU_SOT323-3 1/2Delta I = 1/2 *(19-3)*(3/19)/(375KHz*4.7UH)=0.716A 1/2Delta I = 1/2 *(19-5)*(5/19)/(300KHz*4.7UH)=1.306A
1
200K_0402_5% D
48 ACPRN 2 1 2 1 2 2
Vlimit=10*10^-6*110Kohm/10=0.11V Vlimit=10*10^-6*154Kohm/10=0.15V
G VS Ilimit=0.11/(18m*1.2)~0.11/(15m)=6.34A~9.13A Ilimit=0.15/(18m*1.2)~0.15/(15m)=7.13~10.26A
40.2K_0402_1%
PR66
2.2U_0603_6.3V6K
S
Iocp=7.06A~9.85AA (7.06A>6.94A -> ok) -DVT- Iocp=8.44~11.57A (8.44>8.4 -> OK)
3
A A
1
100K_0402_1%
1
1
PR67
PC49
3
2
2
40,41 EC_ON 2 PQ27

PDTC115EU_SOT323-3 Security Classification Compal Secret Data Compal Electronics, Inc.
3VALWP/5VALWP
3
Custom E
5 4 3 2 1
5 4 3 2 1
PJP2
SUYIN_200275GR008G13GZR
D D
GND 10
GND 9
8 8
7 7
6 EC_SMDA
6
2
5 EC_SMCA
5 TH PR68
4 4
3 PI 100_0402_1%
3
2 2
1 PH1 under CPU botten side :
1
1
2
PR69
CPU thermal protection at 92 degree C
100_0402_1%
<40,41> EC_SMB_DA1 40
VL
Recovery at 72 degree C
VMB
1
1
PL6
SMB3025500YA_2P
<40,41> EC_SMB_CK1 40
1 2 BATT+ PR70
1
1K_0402_5%
2
PR73 PC50 PR71 PR72
1
6.49K_0402_1% 0.1U_0603_25V7K VL 10K_0402_1% 21K_0402_1%
2
PC51 PC52 2 1
0.01U_0402_25V7K +3VALWP
1000P_0402_50V7K
2
2
2
PU3
@ PR74 1 8
VCC TMSNS1
1
100K_0402_1%
PR75 2 7 2 1
1K_0402_1% GND RHYST1
1
3 6 PR76
OT1 TMSNS2
C
49 MAINPWON 9.53K_0402_1% C
2
4 OT2 RHYST2 5 2 1
BATT_TEMP 40 @ PR77
G718TM1U_SOT23-8
47K_0402_1%
1
PH2 @ PH1
100K_0402_1%_NCP15WF104F03RC 100K_0402_1%_NCP15WF104F03RC
2
PQ28
TP0610K-T1-E3_SOT23-3
B+ 3 1 +VSBP
100K_0402_1%
0.22U_0603_25V7K
1
1
PR78
PC53
PC54
0.1U_0603_25V7K
2
2
2
PR79 65W@ PR240 120W@ PR240

VL 22K_0402_1% 3.92K_0402_1% 15.4K_0402_1%
1 2
Change 5VALW to 3VALW on DVT
2
PR80
B
100K_0402_1% +3VALWP B
PR245
PR81 0_0402_5% ADP_I 40,48
1
1K_0402_5% D
1
1 2 2 PQ29 1 2 @
49 SPOK
G 2N7002W-T/R7_SOT323-3 PR243
7.15K_0402_1%
1U_0402_6.3V6K
S
3
1
1
PC55
+3VS @ PC170
2
1
1
0.1U_0603_25V7K 90W@
2
2
PR244 PR240
1
10K_0402_1% 9.09K_0402_1% D
2 65W/90W# 40,48
1
@ PR250 G
2
0_0402_5% PR239 S
3
1 2 100K_0402_1% PU13 @
5,40 H_PROCHOT# 1 VCC TMSNS1 8 PQ66
2N7002W-T/R7_SOT323-3
2
2 GND RHYST1 7 1 2
1
D
PQ65 2 3 6 PR241 90W@
2N7002W-T/R7_SOT323-3 G OT1 TMSNS2 16.2K_0402_1%
S 4 5
3
OT2 RHYST2
1
G718TM1U_SOT23-8 PR242
65W@ PR241 10K_0402_1%
10.5K_0402_1%
2
For 65W adapter==>action 70W , Recovery 54W
A 120W@ PR241 A
17.4K_0402_1%

PWR-BATTERY CONN/OTP
5 4 3 2 1
A B C D
PL7
HCB4532KF-800T90_1812
1.5_8209_B+ 1 2
B+
5
6
7
8
2200P_0402_50V7K
0.1U_0603_25V7K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
PQ30
1
PC173
PC172
PC56
PC57
PR83
267K_0402_1% 4
2
PR84 1 2
0_0402_5%
1 2
39,40,44,46 SYSON AO4406AL_SO8
3
2
1
1 1
2
47K_0402_5%
PR85 PC59 PL8
@ PR86
2.2_0603_5% 0.1U_0603_25V7K 1UH_FDUE1040D-1R0M-P3_21.3A_20%
15
14
+1.5VP
1
@ PU4 BST_1.5V 1 2BST_1.5V-1 1 2 1 2
PC60
BOOT
NC
EN/DEM
.1U_0402_16V7K
2
2 13 DH_1.5V
TON UGATE
1
3 12 LX_1.5V 1
VOUT PHASE
5
6
7
8
PR87
VFB=0.75V PQ31 4.7_1206_5% + PC61
4 VDD CS 11 +5VALW 330U_6.3V_M
5 10
2
FB VDDP 2
6 9 DL_1.5V 4
PGOOD LGATE
PGND
PR88
GND
1
15K_0402_1%
100_0603_5% PC63
1
PR89
1 2 680P_0402_50V7K
+5VALW RT8209MGQW_WQFN14_3P5X3P5 PC62
3
2
1
2
4.7U_0805_10V6K AO4456_SO8
2
1
2
PC64
4.7U_0603_6.3V6K
2
<Vo=1.5V> VFB=0.75V PR90
V=0.75*(1+10K/10K)=1.5V 1 2
Fsw=298KHz
10K_0402_1%
1
Cout ESR=15m ohm Rdson(max)=5.6 mohm Rdson(typ)=4.5 mohm.
2 Ipeak=19.53A, Imax=23.44A, Iocp=13.67A PR91 2
Delta I=((19-1.5)*(1.5/19))/(L*Fsw)=4.63A 10K_0402_1%

=>1/2Delta I=2.315A
2
choose Rcs=15K
Iocpmax=((15K*11uA)/0.0045)+2.315A=35.65A
Iocpmin=((15K*9uA)/(0.0056*1.3))+2.315A=23.06A
Iocp=23.06A~35.65A
VGA@ PL9
HCB4532KF-800T90_1812
1.5VDGPU_8209_B+ 1 2 B+
5
6
7
8
2200P_0402_50V7K
0.1U_0603_25V7K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
0.1U_0603_25V7K
1
1
VGA@ PC174
VGA@ PC175
VGA@ PC65
VGA@ PC66
VGA@ PC185
VGA@
PR92
2
VGA@ 267K_0402_1% 4
PR94 1 2
100K_0402_1% VGA@
1 2 BST_1.5VDGPU PQ32
45,54 VGA_ON AO4466L_SO8
3
2
1
VGA@ VGA@
2
47K_0402_5%
PR96 PC68 VGA@ PL10

@ PR95
2.2_0603_5% 0.1U_0603_25V7K 1UH_FDUE1040D-1R0M-P3_21.3A_20%
15
14
+1.5VSDGPUP
1
VGA@ PU5 1 1 2BST_1.5VDGPU-1 1 2 1 2

PC69
BOOT
NC
EN/DEM
1U_0402_6.3V6K
1
2 13 DH_1.5VDGPU
TON UGATE
1
3 3
3 12 LX_1.5VDGPU VGA@ 1
VOUT PHASE
5
6
7
8
PR97 VGA@
VFB=0.75V 4.7_1206_5% + PC70
4 VDD CS 11 +5VALW 330U_6.3V_M
5 10
2
FB VDDP 2
VGA@ 6 9 DL_1.5VDGPU 4
PGOOD LGATE
PGND
PR98 VGA@
GND
1
10K_0402_1%
100_0603_5% VGA@ PC72
PR99
1 2 PC71 VGA@ 680P_0402_50V7K
+5VALW RT8209MGQW_WQFN14_3P5X3P5 4.7U_0805_10V6K PQ33
7
3
2
1
2
VGA@ AO4456_SO8
1
VGA@
2
PC73
4.7U_0603_6.3V6K VGA@
2
VGA@
PR100
10K_0402_1%
1 2
1
VGA@
PR101
<Vo=1.5V> VFB=0.75V 10K_0402_1%
2
V=0.75*(1+10K/10K)=1.5V
Fsw=298KHz
4 Ipeak=10.4A, Imax=12.48A, Iocp=7.28A 4
Delta I=((19-1.5)*(1.5/19))/(L*Fsw)=4.63A
=>1/2Delta I=2.315A
choose Rcs=10K
Iocpmax=((10K*11uA)/0.0045)+2.315A=24.59A
Iocpmin=((10K*9uA)/(0.0056*1.3))+2.315A=15.95A
Iocp=15.95A~24.59A
PWR-+1.5VP/+1.5VSDGPU
A B C D
5 4 3 2 1
1.8VSP
Ipeak=3.35A ; 1.2Ipeak=4.02 ;Imax=2.345A
Vout=0.6*(1+(20K/10K))=1.8V
PU6 PL11
4
PJ22 2.2UH_FDVE0630-H-2R2M=P3_8.3A_20%
2 1 10 2 LX_1.8V 1 2
+5VALW
PG
2 1 PVIN LX +1.8VSP
68P_0402_50V8J
@ JUMP_43X118 9 3
PVIN LX
1
4.7_1206_5%
1
1
PC75
PC74 8 SVIN
PR102
22U_0805_6.3VAM PR103
6 FB_1.8V 20K_0402_1%
2
D
EN_1.8V FB D
22U_0805_6.3VAM
22U_0805_6.3VAM
5
2
EN
1
NC
NC
TP
PC76
PC77
FB=0.6Volt
11
2
1 2
38,40,44,53 SUSP#
1
1
680P_0402_50V7K
PR104 100K_0402_5%
0.1U_0402_10V7K
2
PC79
PC78
SY8033BDBC_DFN10_3X3 PR105
1
D PR106 10K_0402_1%
2
2 1M_0402_5%
2
38,44,53 SUSP G
2
PQ67 S
1
2N7002W-T/R7_SOT323-3
PL23
HCB3225KF-151T50_1210
5603_VCCSAP_B+ 1 2 B+
2200P_0402_50V7K
0.1U_0603_25V7K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
0.1U_0603_25V7K
1
1
PC80
PC81
PC177
PC176
PC187
5
6
7
8
2
C PR107 4 C
267K_0402_1%
1 2
PQ34
AO4466L_SO8
3
2
1
EN_VCCSAP BST_VCCSAP
PR108 15 PR109 PC82 PL12
14
1
0_0402_5% PU7 2.2_0603_5% 0.1U_0603_25V7K 2.2UH_FDVE0630-H-2R2M=P3_8.3A_20%

1 2 1 2 BST_VCCSAP-1
1 2 1 2
EN/DEM
BOOT
NC
+VCCSAP
1
53 VCCPPWRGOOD
1
@ PR110 2 13 UG_VCCSAP
TON UGATE
1
47K_0402_5% @ PC83 1
0.1U_0402_16V7K 3 12 LX_VCCSAP
2
VOUT PHASE
5
6
7
8
PR111 + PC84
2
4 11 +5VALW 4.7_1206_5% 330U_6.3V_M

VDD CS PQ35
2
AO4712_SO8 2
5 FB VDDP 10
2
PR112
1
100_0603_1% +3VS 6 9 LG_VCCSAP 4 PR113
PGOOD LGATE
PGND
1 2 PC85 0_0402_5% PR114

GND
+5VALW
470P_0603_50V8J 1 2 VSSSA_SENSE 9
2
2
1
10K_0402_5%
15K_0402_1%
PR116
0_0402_5%
1
1
RT8209MGQW_WQFN14_3P5X3P5 PC86
7
3
2
1
1
PR115
4.7U_0805_10V6K
2
PC87 0_0402_5%
2
4.7U_0603_6.3V6K PR117 2
2 1 SA_PGOOD 40
PR118
PR119
2K_0402_1%
1 2 1 2 VCCSA_SENSE 9
VFB=0.75V
10_0402_5%
B B
+3VS
1
PR120
15K_0402_1% PR121
10K_0402_5%
2
PR123
2
1
D 10K_0402_5%
2 2 1
PR122 G
1
30K_0402_1% S PQ37 <Vo=0.9V> VFB=0.75V

3
PQ36 PMBT2222A_SOT23-3
2
V=0.75*(1+2K/10K)=0.9V
1
2N7002W-T/R7_SOT323-3 @ PC88 PR124 @

4700P_0402_25V7K 100K_0402_5% 2 2 1 Fsw=298KHz
2
VCCSA_VID1 9
2
PR125 0_0402_5% @ PR126 Cout ESR=15m ohm Rdson(max)=18 mohm Rdson(typ)=15 mohm.
3
10K_0402_5%
Ipeak=6A, Imax=4.2A, Iocp=7.2A
Delta I=((19-0.9)*(0.9/19))/(L*Fsw)=1.31A
2
=>1/2Delta I=0.655A
choose Rcs=15K
Iocpmax=((15K*11uA)/0.015)+0.655A=11.48A
Iocpmin=((15K*9uA)/(0.018*1.2))+0.655A=7.27A
VID[0] VID[1] VCCSA Vout Require on 2011/ 2012 Required Iocp=7.27A~11.48A
0 0 0.9 V Yes/Yes
0 1 0.8 V Yes/Yes
1 1 0.75V No/Yes
1 1 0.65V No/Yes
A A
Note:Use VCCSA_SEL to switch High & Low Level for VID[1]

(ie. VCCSA_SEL) due to the VID[0] is don't care for this setting.

PWR +VCCSAP
C E
5 4 3 2 1
5 4 3 2 1
PU8
+1.5V 1 VIN VCNTL 6 +3VALW

2 GND NC 5
1
PC90
1
PC89 3 7 1U_0603_10V6K
4.7U_0805_6.3V6K PR127 VREF NC
2
1K_0402_1% 4 8
VOUT NC
D 9 D
2
TP
G2992F1U_SO8
.1U_0402_16V7K
PR128
+0.75VS
1
24.9K_0402_1% D PQ39
PC91
38,44,52 SUSP 1 2 2 2N7002W-T/R7_SOT323-3
1
G D PR129 PC93
2
1
S 2 SUSP 1K_0402_1% 10U_0603_6.3V6M
3
PC92 G
2
1U_0402_6.3V6K PQ38 S
3
2N7002W-T/R7_SOT323-3
PL13
HCB4532KF-800T90_1812
1.05VS_51117_B+ 1 2 B+
2200P_0402_50V7K
0.1U_0603_25V7K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
5
6
7
8
C C
1
PC94
PC95
PC179
PC178
PR130 PQ40
267K_0402_1% AO4406AL_SO8
1 2
2
PR131
100K_0402_1% 4
1 2
38,40,44,52 SUSP#
1
PR132 PC98
15
14
1
1
@ PR249 PU9 2.2_0603_5% 0.1U_0603_25V7K PL14
3
2
1
1
D 47K_0402_5% BST_1.05VS_VCCP 1 1UH_FDUE1040D-1R0M-P3_21.3A_20%

2 1 2
EN/DEM
BOOT
NC
SUSP 2 2 1 +1.05VS_VCCPP
2
G PC97 2 13 DH_1.05VS_VCCP
2
4.7U_0603_6.3V6K TON UGATE

S
3
1
PQ68 3 12 LX_1.05VS_VCCP
VOUT PHASE
5
6
7
8
2N7002W-T/R7_SOT323-3 PR133
4 11 4.7_1206_5% 1
VDD CS
VFB=0.75V + PC99
5 10 +5VALW
1 2
FB VDDP
2
330U_6.3V_M
PR135 6 9 DL_1.05VS_VCCP 4
PGOOD LGATE
PGND
100_0603_5%
GND
PC100 PR134 2
1 2 680P_0402_50V7K 0_0603_5%
+5VALW
2
PQ41
1
1
1
15K_0402_1%
RT8209MGQW_WQFN14_3P5X3P5 AO4456_SO8
7
3
2
1
1
PR136
PC102
PC101 4.7U_0805_10V6K
2
4.7U_0603_6.3V6K
2
2
B B
PR137
4.02K_0402_1%
1 2
PR140
1
10_0402_5%
52 VCCPPWRGOOD PR139 2 1 VCCIO_SENSE 8
PR138 1 2 +3VALW
10K_0402_1%
10K_0402_1%
2
PR141 @
10K_0402_1%
<Vo=1.05V> VFB=0.75V
1
V=0.75*(1+4.02K/10K)=1.052V
Fsw=298KHz
Ipeak=12.866A, Imax=9A, Iocp=15.439A
Delta I=((19-1.05)*(1.05/19))/(L*Fsw)=3.33A
A =>1/2Delta I=1.665A A
choose Rcs=15K
Iocpmax=((15K*11uA)/0.0045)+1.665A=37.62A
Iocpmin=((15K*9uA)/(0.0056*1.3))+1.665A=23.02A
Iocp=23.02A~37.62A Security Classification Compal Secret Data Compal Electronics, Inc.
PWR +1.05VS_VCCPP/+0.75VSP
Custom E
5 4 3 2 1
5 4 3 2 1
VGA@ PL15
HCB3225KF-151T50_1210
B+ 1 2 B+_CORE
+3VS
0.1U_0603_25V7K
VGA@ PC186
VGA@ PC103
VGA@ PC104
VGA@ PC107
10U_1206_25V6M
10U_1206_25V6M
10U_1206_25V6M
1
1
@ PR142
2
2
10K_0402_5%
5
TPCA8030-H_SOP-ADV8-5
D D
PQ42
PQ43
18 VGA_PWROK 4 4
VGA@
VGA@
VGA@ PR143 VGA@ PC105
PU10 VGA@ 2.2_0603_5% 0.1U_0603_25V7K
VGA@ PR145 1 10 BST_VCORE 1 2 1 2 VGA@ PR144
3
2
1
3
2
1
75K_0402_1% PGOOD VBST 2.2_0603_5%
1 2 2 9 DH_VCORE 1 2 VGA@ PL16
TRIP DRVH 0.36UH_MMD-12CE-R36M-M1L_34A_20%
+3VS 3 8 SW_VCORE 1 2
EN SW +VGA_CORE
4 VFB V5IN 7 +5VALW
1 2 5 6 DL_VCORE
RF DRVL
2
ESR=10mohm
2
@ PR146 VGA@ PR148 11
TP
1
10K_0402_5% 200K_0402_1% VGA@
TPCA8028-H_SOP-ADVANCE8-5
PQ44
PQ45
TPS51218DSCR_SON10_3X3 PC106 VGA@ PR147
1
VGA@ PR149 VFB=0.6V 1U_0603_6.3V6M 4.7_1206_5% 1 1
1
100K_0402_1% VGA@ PR150 VGA@ PC108

VGA_ON 1 2 10_0402_5% VGA@ PC171 + + 470U_V_2.5VM
1 2
45,51 VGA_ON Switch freq. (RF pin setting) 4 4 470U_V_2.5VM
VGA@
VGA@
VGA@ PR151
2
1
47K ==>450KHz VGA@ PC109 VGA@ PR152 2 2 0_0402_5%

VGA@ PC110 680P_0402_50V7K 0_0402_5% 1 2
100K ==>390KHz
2
C .1U_0402_16V7K 2 1 C
24 FB_GND
2
3
2
1
3
2
1
200K ==>350KHz (Currently setting)
GS@ PR153
470K ==>300KHz
2
2.37K_0402_1%
GCORE_SEN
GV@ PR153 GCORE_SEN 24
2.15K_0402_1%
TPCA8057-H Rds=2.6m/3.2m ohm
1
D VGA@
1
45 VGA_ON# 2 PQ46 GS@ PR157
G 2N7002W-T/R7_SOT323-3 12K_0402_1%
S +3VSDGPU
3
2
1
GV@ PR157
2
+3VSDGPU 8.66K_0402_1%
2
VGA@ PC113 VGA@ PR156 VGA@ PR158
@ PR256 GS@ PR160 2200P_0402_25V7K 10K_0402_1% 10K_0402_5%
1
2
12.4K_0402_1% 15K_0402_1%
2
@ PR260 VGA@ PR159
1
6
10K_0402_5% D 10K_0402_5%
1
2 1 2
@ PR257 G
1
3
2
D 10K_0402_5% DMN66D0LDW-7_SOT363-6
1
5 1 2 VGA@ PQ47A S
1
Vtrip range ==> 0.2V ~ 3V G GV@ PR160 VGA@ PC114 @ PR161
2
DMN66D0LDW-7_SOT363-6 10K_0402_5% +3VSDGPU 4700P_0402_25V7K 10K_0402_5%
2
1
VFB=0.7V @ PQ69B S
4
1
@ PC183 @ PR259
2
V=0.7*(1+Rtop/Rbottom)
2
4700P_0402_25V7K 10K_0402_5%
2
Fsw=350KHz VGA@ PR162
1
B 10K_0402_5% B
Cout ESR=12m ohm Rdson(max)=3.2 mohm Rdson(typ)=2.6 mohm. VGA@ PR163
3
D 10K_0402_5%
1
Ipeak=41.02A, Imax=28.714A, Iocp=43A 5 1 2 +3VSDGPU
Delta I=((19-0.9)*(0.9/19))/(L*Fsw)=6.8A G
1
=>1/2Delta I=3.4A
2
VGA@ PQ47B S VGA@ PC115
4
choose Rcs=75K DMN66D0LDW-7_SOT363-6 4700P_0402_25V7K VGA@ PR165
2
10K_0402_5%
Iocpmax=((75K*11uA)/0.0013)+3.4A=75.52A @ PR164
2
Iocpmin=((75K*9uA)/(0.0016*1.35))+3.4A=48.42A 10K_0402_5%
1
VGA@ PR166
Iocp=48.42A~75.52A
6
D 10K_0402_5%
2 2 1
GPU_VID1 22
1
VGA@ PQ48A G
+3VSDGPU
S @ PR167
1
10K_0402_5%
2
+3VSDGPU
2
@ PR261
10K_0402_5%
2
GPU_VID2 GPU_VID1 GPU_VID0 NVIDIA/N12P-GS NVIDIA/N12P-GV1 @ PR168
1
@ PR255 VGA@ PR169 10K_0402_5%
6
3
D 10K_0402_5% D 10K_0402_5%
2 2 1 5 2 1
1
GPU_VID2 22 GPU_VID0 22
1
@ PQ69A G VGA@ PQ48B G
P8/P12 X 1 1 0.860V(0.866V) 0.85V(0.851V) VGA@ PR170
DMN66D0LDW-7_SOT363-6 DMN66D0LDW-7_SOT363-6
S @ PR258 S 10K_0402_5%
1
4
A A
10K_0402_5%
P0(Hot) X 1 0 0.975V(0.977V) 1.0V(1.001V)
2
2
P0(Cold) X 0 1 1.0V(1.004V) 1.025V(1.024V)
AP
X 0 0 ---- ----
+VGA_COREP
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom P5WE0 E
5 4 3 2 1
5 4 3 2 1
Alert# PU resister need close CPU, @ PC116 GFX_B+ 2 1 B+

so the PU resister in HW schematic. 470P_0402_50V7K PL24
220U_25V_M
10U_1206_25V6M
10U_1206_25V6M
NTCG GFX@ @ HCB4532KF-800T90_1812
0.1U_0603_25V7K
2 1 1
but DAT and CLK need close PWM-IC,
GFX@ PC118
GFX@ PC119
GFX@ PC184
PQ49 PQ50 GFX@
so the PU resister in POWER schematic. +
PC117
GFX@ PH3 2.2_0603_5%
1
470K_0402_5%_TSM0B474J4702RE PR226
2 1 2 1 UGATEG 2 1
2
PR172 GFX@
1000P_0402_50V7K
8.06K_0402_1%
2
PC120 GFX@
GFX@ PR171 4 4
1
3.83K_0402_1%
1
1 2
GFX@ PL18
GFX@ PR173 0.36UH_PCMC104T-R36MN1R17_30A_20% +VGFX_COREP
3
2
1
3
2
1
27.4K_0402_1% GFX@ PR174 +VGFX_COREP
2
10_0402_1% PHASEG 4 1
PR175 PC122
2 1 1
5
330P_0402_50V7K
PC121 GFX@ BOOTG 2
D 1 2 1 3 2 D
1
PC125 GFX@
+5VS
330U_X_2VM_R6M
PQ51
+
GFX@ PR178
4.7_1206_5%
1 2 @
GFX@ PC123
PC126 GFX@ PC124 GFX@ 2.2_0603_5% 0.22U_0603_10V7K PQ52 GFX@ PR179 GFX@ PR180
VCC_AXG_SENSE 9
1
PR176 @ 39P_0402_50V7K GFX@ PR177 680P_0402_50V7K 330P_0402_50V7K GFX@ GFX@ 10K_0402_1% 1_0402_5%
499K_0402_1% PC127 2
2 1 2 1 2 1 VSS_AXG_SENSE 9
GFX@
422_0402_1% 2 1 LGATEG 4 4
1 2
QC@ PC129
1U_0603_10V6K
PC128 GFX@ GFX@ GFX@ PR184 PH4 GFX@
2
150P_0402_50V8J 1000P_0402_50V7K GFX@ PR183 7.5K_0402_1% 10K_0402_5%_TSM0A103J4302RE
GFX@ PC130
680P_0402_50V7K
2 1 2 1 2 1 2 1 1 21 2
1
QC@ PR185
PR181 GFX@ GFX@ PR182 10_0402_1%
3
2
1
3
2
1
2
1
0_0402_5%
475K_0402_1% 2.55K_0402_1% QC@
0.22U_0603_10V7K
GFX@ 11K_0402_1%
PC131
GFXVR_IMON PR186 1 PR187 2 .1U_0402_16V7K
2
18.2K_0402_1%
PR189 @ 2.2_0603_5% GFX@ PC133
ISNG
ISPG
2
PC135 @ +1.05VS_VTT 16.5K_0402_1%
0.047U_0603_16V7K
1 2 1 2
2
1
GFX@
PR188
GFX@ PC134
54.9_0402_1%
.1U_0402_16V7K
2
UGATEG
PHASEG
PU11 QC@ GFX@ PC132 100_0402_1%
LGATEG
BOOTG
QC@
.1U_0402_16V7K @ PR192
NTCG
5 1
2
1
VCC BOOT
1
130_0402_1%
470P_0402_50V7K
1 2 1 2
PR191
PC137
VSS_AXG_SENSE 6 8 CPU_B+
FCCM UGATE
604_0402_1%
GFX@ PR193
10U_1206_25V6M
10U_1206_25V6M
@ PC136
ISPG
1
1
PQ53
PR190
@ PQ54 0.01U_0402_16V7K
2 PWM PHASE 7
Parallel and tune length For shortage changed +3VS
1
+5VS
PC138
PC139
49
48
47
46
45
44
43
42
41
40
39
38
37
3 4
2
GND LGATE
1
PR196 GFX@
@
1.91K_0402_1%
2
QC@
QC@ PR194 9 2 1ISNG
COMPG
FBG
VSENG
RTNG
ISPG
ISNG
NTCG
PROG2
BOOTG
UGG
PHG
LGG
GND
2
8 VR_SVID_DAT PGND
1
0_0402_5% 4 4
1 36 BOOT2 ISL6208ACRZ-T_QFN8_3X3 DIS@ PR195
8 VR_SVID_ALRT# VWG BOOT2 0_0402_5%
2
2 35 UGATE2
8 VR_SVID_CLK IMONG UG2 QC@ PL19
3
2
1
3
2
1
PR197 40 GFX_CORE_PWRGD 3 34 PHASE2 +5VS 0.36UH_PCMC104T-R36MN1R17_30A_20%
PGOODG PH2
+3VS 1 2 1 2 4 1 +CPU_CORE
SVID_SDA
4 SDA VSSP2 33
QC@ PR202
4.7_1206_5%
1.91K_0402_1% DC@ PR198 3 2
1
PQ56
@ PQ55
SVID_ALERT# LGATE2 0_0402_5%
C
5 ALERT# LG2 32 C
SVID_SCLK 6 31 1 2
VGATE 15,40 SCLK VDDP
QC@
QC@ PR199
10K_0402_1%
QC@ PR204
QC@ PR207
QC@ PR201
10K_0402_1%
QC@ PR205
10K_0402_1%
3.65K_0402_1%
VSSSENSE 1 PR203 2 7 30 PR200 4 4
1 2
40 VR_ON VR_ON PWM3
2
1_0402_5%
0_0402_5%
680P_0402_50V7K
0_0402_5% LGATE1
0.047U_0603_16V7K
8 PGOOD LG1 29
40 IMVP_IMON
PC141
QC@ PC140
19.1K_0402_1%
ISL95831CRZ-T_TQFN48_6X6
1
PC142
2.2U_0603_10V6K
9 28
3
2
1
3
2
1
2
IMON VSSP1
1
VSUM+ 2
VSUM- 2
1
1
PR206
10 27 PHASE1
VR_HOT# PH1
ISEN1
ISEN2
ISEN3
2
11 26 UGATE1
2
2
NTC UG1
ISEN3/ FB2
For shortage changed
12 25 BOOT1
PROG1
ISUMN
ISUMP
VW BOOT1
COMP
ISEN2
ISEN1
VSEN
VDD
RTN
40 VR_HOT#
VIN
PC144 FB QC@ PR212 CPU_B+
47P_0402_50V8J
2 1 @ 590_0402_1%
10U_1206_25V6M
10U_1206_25V6M
+1.05VS_VTT 1 2 PU12
13
14
15
16
17
18
19
20
21
22
23
24
1
PQ57
@ PQ58
PC143
PR209 470P_0402_50V7K
1
PC145
PC146
@ PR208 1 2 1 2
499_0402_1% 2.2_0603_5%
2
3.83K_0402_1% PH5 PR230
2
470K_0402_5%_TSM0B474J4702RE UGATE2 2 1 4 4
2 PR2101
1
27.4K_0402_1% DC@
PR211
PR212
1000P_0402_50V7K
8.06K_0402_1%
change from 43P to 47P 1 2 CPU_B+ 1.69K_0402_1% PL20
3
2
1
3
2
1
1
0.36UH_PCMC104T-R36MN1R17_30A_20%
for shortage problem
PR213
PC147
(Ipeak=56A) PHASE2 4 1 +CPU_CORE
2
2010-03-15 0_0603_5%
(Vboot=0)
2
4.7_1206_5%
DC@ PC148 22P_0402_50V8J PR215 2.2_0603_5%
3 2
PR216
2 1 +5VS PR214
2
PQ60
@ PQ59
PC152
2 1 1U_0603_10V6K BOOT2 2 1 2 1
1_0603_5%
1
1
PC149
ISEN3
ISEN2
ISEN1
B B
1
1_0402_5%
10K_0402_1%
10K_0402_1%
10K_0402_1%
PC151
PR217
PR218
PR219
PR220
QC@ PR246
3.65K_0402_1%
QC@ PC150 0.22U_0402_6.3V6K 0.22U_0603_10V7K
1 2
2 1 0.22U_0603_25V7K LGATE2 4 4
2
680P_0402_50V7K
PC155
PC154
33P_0402_50V8J PC153
@ PR221 PR222 PC156 VSUM- 2 1 VSUM+
VSUM+ 2
2
2.61K_0402_1%
1 2 2 1 2 1 2 1 0.22U_0402_6.3V6K
3
2
1
3
2
1
1
499_0402_1% PC157
VSUM-
ISEN1
ISEN2
ISEN3
PR223
499K_0402_1% PR224 470P_0402_50V7K
0.068U_0402_16V7K
2 1
PC158 412K_0402_1% DC@ PR225 0.22U_0402_6.3V6K QC@ PR229
0.33U_0603_10V7K
150P_0402_50V8J 2 1 2 1 2 1 1.37K_0402_1%
1
11K_0402_1%
PC159
PC160
3.32K_0402_1%
1 2
1
PR227
CPU_B+ 1 2 B+
PR228 PL17
10U_1206_25V6M
10U_1206_25V6M
PH6 HCB4532KF-800T90_1812
4.7U_0805_25V6-K
4.7U_0805_25V6-K
+CPU_CORE 2 1
2
PQ61
@ PQ62
QC@ PR225 10_0402_1% 10KB_0603_5%_ERTJ1VR103J
2
1
PC96
PC163
PC164
PC111
330P_0402_50V7K
3.83K_0402_1% PC161 330P_0402_50V7K

1
2 1 DC@ PR229 2.2_0603_5%

2
PC162
PR248 2 1 VSUM- PR251
2
2K_0402_1% 8 VCCSENSE 1.47K_0402_1% UGATE1 2 1 4 4
2
.1U_0402_16V7K
8 VSSSENSE 2 1
PC167
2 1 2 1
2
PR232 PC165 1000P_0402_50V7K

2
2 1 @ PC166 @ PR231 PL21
3
2
1
3
2
1
1
PC180 10_0402_1% 330P_0402_50V7K 100_0402_1% 0.36UH_PCMC104T-R36MN1R17_30A_20%

680P_0402_50V7K PHASE1 4 1 +CPU_CORE
2
4.7_1206_5%
2.2_0603_5% 3 2
PR234
PR233
PQ63
@ PQ64
BOOT1 2 1 2 1
*Iccmax in Turbo Mode for SV (35W) is 53A
PC168
1
1_0402_5%
10K_0402_1%
10K_0402_1%
10K_0402_1%
PR235
PR236
PR237
PR238
QC@ PR247
3.65K_0402_1%
0.22U_0603_10V7K
1 2
+CPU_CORE +VGFX_COREP LGATE1 4 4
680P_0402_50V7K
A A
PC169
Icc-max=53A Ipeak=26A , Imax=18.2A , 1.2Ipeak=31.2A
VSUM+ 2
2
Rdson=3.6~4.5m ohm Rdson=3.6~4.5m ohm
3
2
1
3
2
1
ISEN2
VSUM-
DCR=1.1m ohm DCR=1.1m ohm
ISEN1
ISEN3
HW output cap: HW output cap:
(1)10U_0805_4V *10 (1)22U_0805_6.3V *12
(2)22U_0805_6.3V *15 (2)470U_D2_2V *2(ESR=4.5m ohm)
(3)470U_D2_2V *4(ESR=4.5m ohm) Security Classification Compal Secret Data Compal Electronics, Inc.
PWR +CPU_CORE/+VGFX_CORE
*OCP setting value=71.5A *OCP setting value=37A Size Document Number Rev
Custom E
5 4 3 2 1
5 4 3 2 1
Version change list (P.I.R. List) Page 1 of 1

for PWR
Item Fixed Issue Reason for change Rev. PG# Modify List Date Phase
Add SD001470B80 for PR35,PR58,PR60,PR87,PR111,

D EMI solution PR133,PR202,PR216,PR234 D
1 Add snubber R=4.7 ohm and C 680 pF

0.2 --- Add SE074681K80 for PC27,PC44,PC45,PC63,PC85,
2010/10/20 DVT_P5WE0
PC100,PC140,PC154,PC169
2 Change boost R from 0 to 2.2 ohm EMI solution 0.2 ---

Change R to SD013220B80 forPR37,PR56,PR57,PR85,
PR109,PR132,PR186,PR214,PR233 2010/10/20 DVT_P5WE0
Change PL11 and PL12 from Change PL11 and PL12 from
3 SH00000F800 to SH00000M700 Cost saving 0.2 52 SH00000F800 to SH00000M700 2010/10/20 DVT_P5WE0
Change PL18,PL19,PL20,PL21 Change PL18,PL19,PL20,PL21

4 from SH000005680 to SH00000HK00 Change DCR tolerance to 5% 0.2 55 from SH000005680 to SH00000HK00 2010/10/20 DVT_P5WE0
5 CPU CORE transient compensation CPU CORE transient compensation 0.2 55 Add PR248, PC160, PC180 2010/10/20 DVT_P5WE0
C C
Fixed adapter plug in will cause

6 could not transitiion to AC mode disable pre-charge circuit and don't use 0.5 --- Del PR7, PR8, PR9, PR10, PR11, PR12, PR13, PD3,
PD4, PQ2, PQ3, PQ4, PR18, PR21, PQ12, PC17 2010/11/20
PVT_P5WE0
when system was on battery mode
Fixed adapter plug in will cause

7 could not transitiion to AC mode disable pre-charge circuit and don't use 0.5 --- Add PR262, PD10, PQ70, PR263, PC16
Change PQ7 to AO4459 2010/11/20 PVT_P5WE0
when system was on battery mode
8 Add 0.1UF on B+ input power EMI solution 0.5 --- Add PC184, PC185, PC186, PC187 2010/11/20 PVT_P5WE0
9 Adjust VGA CORE power sequesce for NV request 0.5 --- Change PR149 to 100K 2010/11/20 PVT_P5WE0
B 10 Adjust 1.5VSDGPU power sequesce for NV request 0.5 --- Change PR94 to 510K and add PC69 2010/11/20 PVT_P5WE0 B
11 Adjust VID table for NV request 0.5 --- Change PR153, PR157, PR160 2010/11/20 PVT_P5WE0
12
13
14
A A
15

PIR (PWR)
Size Document Number
Rev
Custom
JE50-HR/SJV50-HR M/B SchematicsE
5 4 3 2 1
5 4 3 2 1
(PU1000)
VR_ON +CPU_CORE
ISL6266ACRZ-T +1.5VS_DMC
D D
TQFN48 Page 55
VGA_ON (U13) VGA_ON# (U40)

(PU998) SUSP
+VGA_CORE SI4800BDY-T1-GE3 +1.5VS AO4430L +1.5VSDGPU
APW7138NITRL Page 44
SO8 Page 44
SSOP16 Page 54
ADAPTER
SYSON (PU5) SUSP (PU8)
+1.5V
RT8209BGQW APL5331KAC-TRL +0.75VS
SO8 Page 53
B+ WQFN14 Page 51
(PU6) PJP25 L76

BATTERY VS_ON +1.05V_VCCP +1.05VS_PCH +CLK_1.05VS
RT8209BGQW
(SUSP#)
WQFN14 Page 53
U38
+1.05VSDGPU
(PU3)
VCCPWRGOOD +VCCSA
RT8205EGQW
C C
CHARGER WQFN24 Page 49
(PU3)
RT8205EGQW
WQFN24 Page 49
+5VALW +3VALW
SUSP SYSON# SUSP PCH_PWR_EN# SUSP SUSP
(U49) (U46) (PU6) (U14) (U68) (UB1)

SI4800BDY TPS2062ADR SY8033BDBC SI4800BDY R599 (RE1) SI4800BDY RT9701-PB
SO8 Page 44 DFN10 Page 51 SO8 Page 44 SO8 Page 44 SOT23-5 Page 45
B B
+5VS +USB_VCCB +1.8VS +3VALW_PCH +3V_LAN +3VALW_EC +3VS +3V
(U39) ENVDD ENVDD VGA_ON

+CRT_VCC
BCM57780 (Q51) (Q30) (Q34)
+3VS_CK505
AO3413L AO3413L AO3413L
SO23-3 Page 37 SO23-3 Page 30 SO23-3 Page 24
+HDMI_5V_OUT
+1.2V_LAN +DVDD_AUDIO
+BT_VCC +LCDVDD +3VSDGPU
+5VS_HDD1
+3V_WLAN
+5VS_ODD
+3V_DMC
A A
+5VAMP +VDDA

Power Rail
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom E
5 4 3 2 1
5 4 3 2 1
D D
PCH_PWR_EN# 2
U14,+3VALW_PCH
V
AC A1
MODE VIN QH4,+5VALW_PCH
V V
A2 A3 B5
VV
A5 2
V
PU2
V
B+ PU3 +3VALW_PCH
+3VALW B7 2 3
BATT V +5VALW_PCH
BATT
MODE
B1
B2
B+ B4 V
V
V 4 SYS_PWROK
EC
13
PQ2 PCH_RSMRST# PM_DRAM_PWRGD
V
V V PCH
B3 A5 B7 5 14
PBTN_OUT# H_CPUPWRGD
CPU
V V
V
51ON# EC_ON
PM_SLP_S3#
PM_SLP_S4# PLT_RST# 15
C C
PM_SLP_S5#
A4 B6 PM_SLP_A# 6
PM_SLP_SUS#
V
V
ON/OFF V
SYSON 7 SYSON# +1.5V
V
PU5
DGPU_PWR_EN 8a (DIS) VGA_ON
+3VSDGPU
V
Q6 11
SUSP#,SUSP 8
U49
V
VGATE
+5VS
V
+1.5VSDGPU
U40
V
U68
V
+3VS +1.8VSDGPU VGA
U37
B B
V
U13
V
+1.5VS +1.05VSDGPU
U38
V
PU8
V
+0.75V +VGA_CORE
VCCPPWRGOOD
PU998
V
V
PU9 PU7
+1.05VS_VCCP +VCCSA 8b (DIS)
VGA_PWROK
U47
CK505
VR_ON 9 PU1000
V
10
V
+CPU_CORE
A A

Power sequence
5 4 3 2 1
5 4 3 2 1
Version Change List ( P. I. R. List ) Page 1

Request
Item Page# Title Date Owner Issue Description Solution Description Rev.
1 P.18 PCH_GPIO71 09/01 SW For identofy VRAM 900 or 800 MHz 0.2
D D
2 P.31 DPST buffer 09/03 HW Change U1 from NOT gate to Buffer 0.2
3 P.39 EC_MUTE# pull high 09/03 HW Change EC_MUTE# Pull high from +3VALW to +3VS 0.2
4 P.40 TP Conn. Reverse 09/03 HW TP Mudule change,so reverse TP pin 0.2
5 P.13 R624 pop @ 09/03 HW Already pull high R655~ 0.2

C696,C368,C717,C718,C695,C366,C697,
6 P.45 Change Cap from 09/03 HW
C401,C370,C369,C715 change to 0.01U 0.2
0.1u to 0.01u
Follow Vendor Suggest ..
R199,R207,R211,R215,R168,R171,R179,
Change 0 Ohm
7 P.35 09/04 Broadcom R182,R195,R216,R192 change to 47 Ohm 0.2
to 47 Ohm
Follow Vendor Suggest ..
CPU XDP socket take off
8 P.5 09/17 HW 0.2
C C
TP pin reverse
9 P.40 09/17 HW 0.2
10 P.13 09/17 HW R624 change to 4.7K 0.2
11 P.45 09/17 HW OCI2B(R313) place @ for BOM 0.2
12 P.33 09/17 HW HDMI output from PCH (by UMA) 0.2
P.35 switch the LAN MIDI0 and MIDI2 pin
13 09/17 HW 0.2
P.17,35 Change IO port PLT_RST# to PLT_RST_BUF# 0.2
14 09/17 HW
,37,38,
39,45
15 P.18 09/17 HW OPTIMUS_EN# pull high, pull low resistor
0.2
value both change to 10K
modify the VRAM strap pin ROM_SI

16 P.24 09/20 HW 0.3
pull low resistor for implement VRAM 900MHz
B B
17 P.33 09/23 HW Add R784 and R785 for DDC pull high... 0.3
18 P.44 09/23 HW Add C818 and C819 for coupling noise

0.3
from other spare trace...
Add R786,R787,R788 and R789 pull down

19 P.45 09/23 HW 0.3
from vendor's suggestion..
20 P.37 Add C820,R790 and Q58 for 3G/B 0.3

09/23 HW
and change source voltage from +3VS to +3VALW..
Add C821,C822,C823,C824 for +1.5V...

21 09/23 HW 0.3
P.45 and move the PJ26 & PJ27 between
1.5V to 1.5VSDGPUH
Change JUSB5 to USB2.0 Conn.

22 P.46 09/24 HW
Add D34 as ESD Diode for USB3.0
A 0.3 A

EE P.I.R (1)
5 4 3 2 1
5 4 3 2 1

Request
Add R791 pull down 22k Ohm to ground
23 P.41 09/24 HW 0.3
D
Vendor's request... D
Add D31 to connect to ACIN

24 P.22 09/24 HW 0.3
Vendor's request...
Add JP1,JP2 and JP3 for
25 P.36 09/29 HW 0.3
ESD protection
26 P.36 09/29 ME Update the JREAD1 symbol 0.3
27 P.13 09/29 HW Add R792 follow DG1.5 0.3
28 P.33 09/29 HW Change HDMI termination R to 680 Ohm 0.3
HW 0.3
29 P.44 09/29 Add C825 fro +1.05VSDGPU
30 P.17,38 Change the M/B to USB port to port 1

09/30 HW 0.3
,45 Sub/B to port 0 and port 2
C Add test point for TCK,TMS, C
31 P.5 10/04 HW 0.3
TRST#,TDO,TDI
WWAN_OFF# from GPIO51 to GPIO37
32 P.17,18 10/04 HW 0.3
WL_OFF# from GPIO55 to GPIO49
33 P.17,45 10/04 HW M/B USB port from port 2 change to port1 0.3
34 P.26 10/04 HW C1 and C604 chaneg to 470uF 0.3

0.3
35 P.36 10/04 HW Add C827 as DGND and RJ45_GND bridge
0.3
36 P.36 10/04 HW Change R490,R491,R492 and R493 to 0603 package
37 P.35 10/04 HW Chaneg R214 to 0603 package 0.3
38 P.35 10/04 HW Chaneg R192,R195,R199,R207,R211 0.3

,R215,R168,R171,R179,R182 to 0 Ohm
39 P.40 10/04 HW follow broadcom suggestion,add R496 0.3

B B
40 P.40 10/04 HW Add keyboard cap for EMI 0.3
41 P.44 10/04 HW Add C826 for +1.5VSDGPU 0.3

42 P.37 10/05 HW Add RTS5138 circuit 0.4
Add D35 ,R799 and C838 for
43 P.13
10/12 HW changing the RTC to samll size... 0.4
and can be charged!!
44 P.14 10/12 HW Add CLK_SD_48M for Card Reader 5138 0.4

45 P.24 10/12 HW Pop R129 follow NV suggestion 0.4
46 P.25 10/12 HW Pop R82 and De-pop R92 follow NV suggestion 0.4
47 P.25 10/12 HW Add R800 and R801 10K Ohm pull down
0.4
follow NV suggestion
A A
48 P.24 10/12 HW Change R775,R777,R778 and R779 to GV@ 0.4

EE P.I.R (2)
5 4 3 2 1
5 4 3 2 1

Request
+1,8VS add C830,C831 10U_0603
49 9 11/12 HW
D
+VCCSA add C828,C829 10U_0603 D
50 20 11/12 HW +1.05VS_PCH add R808 0_0603
51 36 11/15 HW LANGND add C808 0.1n_0402
52 19 11/15 HW +VCCADAC add C832 10p_0402

EC Board ID change to 56K
53 40 11/15 HW
add EC debug port
EMI cost down request D17,D18 @
54 32 11/25 HW
EMI cost down request D36 @

55 36 11/25 HW
0208 HW Change Odd sata port from port 2 to port 1

56 13 & 34 Rev 2.0
cause by intel sata II port issue
C C
B B
A A

EE P.I.R (3)
5 4 3 2 1
www.s-manuals.com

Compal La-6901p r2.0 Schematics

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A B C D E

File Name : LA-6901P

JE50-HR/SJV50-HR(P5WE0/P5WS0) M/B Schematics Document

Security Classification Compal Secret Data Compal Electronics, Inc.

100MHz PCI-E 2.0x16 5GT/s PER LANE

TMDS(UMA/OPTIMUS) Cougar Point-M

Sub-board ENE KB930

Power Circuit DC/DC

USB Port Table Connector CONN@

PCI EXPRESS* - GRAPHICS

15 FDI_LSYNC0 J19 G27 PEG_HTX_GRX_N5 C550 1 2 DIS@ 0.22U_0402_10V6K PEG_HTX_C_GRX_N5

PEG_TX#[14] PEG_HTX_GRX_N0 C560 DIS@ 0.22U_0402_10V6K PEG_HTX_C_GRX_N0

Security Classification Compal Secret Data

Buffered reset to CPU

PRDY# AP29 R03 modify

JTAG & BPM

Security Classification Compal Secret Data Compal Electronics, Inc.

11 DDR_A_D[0..63] SA_CLK[0] AB6 SA_CLK_DDR0 11 12 DDR_B_D[0..63] SB_CLK[0] AE2 SB_CLK_DDR0 12

DDR SYSTEM MEMORY B

DDR SYSTEM MEMORY A

Sandy Bridge_rPGA_Rev0p61 CONN@ Sandy Bridge_rPGA_Rev0p61

Follow CRB1.0 +1.5V

5 SM_DRAMRST# SM_DRAMRST# 3 1 DIMM_DRAMRST#_R 1 2 DIMM_DRAMRST# 11,12

4.99K_0402_1% RST_GATE hgih ,MOS ON

Dimm not reset

CFG Straps for Processor

JCPU1E PEG Static Lane Reversal - CFG2 is for the 16x

RSVD28 L7 1: Normal Operation; Lane # definition matches

C29 RSVD23 BCLK_ITP and BCLK_ITP#

VCCIO_SEL RSVD25 RSVD56

1/NC : (Default) +1.05VS_VTT B1

PEG DEFER TRAINING

1: (Default) PEG Train immediately following xxRESETB

Security Classification Compal Secret Data Compal Electronics, Inc.

SV type CPU JCPU1F POWER

PEG AND DDR

UMA@ UMA@ UMA@ UMA@ UMA@ UMA@ AT23 AK34

DDR3 -1.5V RAILS

Can connect to GND if motherboard only AK17

2 R1411 2 0_0402_5% VSSSA_SENSE 52

Sandy Bridge_rPGA_Rev0p61 Sandy Bridge_rPGA_Rev0p61

Security Classification Compal Secret Data Compal Electronics, Inc.

6 DDRA_CKE0_DIMMA DDRA_CKE0_DIMMA 73 74 DDRA_CKE1_DIMMA DDRA_CKE1_DIMMA 6

1 117 118 1K_0402_5%

1 1 1 DDR_A_MA13 119 120 SA_ODT1 SA_ODT1 6

+ DDRA_CS1_DIMMA# 121 122

155 VSS37 VSS38 156

DIMM_1 Reserve H:8mm

Security Classification Compal Secret Data Compal Electronics, Inc.

1 127 VSS27 VSS28 128

DDR_B_D49 165 166 DDR_B_D53

Layout Note: 189 VSS49 VSS50 190

DDR_B_D58 191 192 DDR_B_D62

DDR_B0_DM0 VDDSPD SDA D_CK_SCLK

DDR_B0_DM3 205 206

R05 modify <Address(SA1,SA0): 10>

DIMM_2 Reserve H:4mm

Security Classification Compal Secret Data Compal Electronics, Inc.

R567 1 2 1M_0402_5% SM_INTRUDER#

PCH_JTAG_TDI K5 Y10 SATA_COMP 1 2

R666 R637 R646

PCH_JTAG_TDO PCH_JTAG_TMS PCH_JTAG_TDI R651 0_0402_5% SPI_CS0#

R652 0_0402_5% SPI_MISO SATA1GP / GPIO19

+RTCBATT +RTCBATT +3VS Boot BIOS Strap