2490
9, SEPTEMBER 2011
A Noninverting BuckBoost DCDC Switching
Converter With High Efficiency and Wide Bandwidth
Carlos Restrepo, Student Member, IEEE, Javier Calvente, Member, IEEE, Angel Cid-Pastor, Member, IEEE,
Abdelali El Aroudi, Member, IEEE, and Roberto Giral, Senior Member, IEEE
AbstractA novel dcdc switching converter consisting of a
boost stage cascaded with a buck converter with their coils magnet-
ically coupled is presented. The disclosed converter has the same
step-up or step-down voltage conversion properties than the sin-
gle inductor noninverting buckboost converter but exhibits non-
pulsating I/O currents. The converter control-to-output transfer
function is continuous between operation modes if a particular
magnetic coupling is selected. The addition of a damping network
improves the dynamics and results in a control-to-output trans-
fer function that has, even in boost mode, two dominant complex
poles without right-half-plane zeros. An example shows that an out-
put voltage controller can be designed with the same well-known
techniques usually applied to the second-order buck regulator. De-
tails of a prototype and experimental results including efficiency,
frequency, and time domain responses are presented. The experi-
mental results validate the theoretical expected advantages of the
converter, namely, good efficiency, wide bandwidth, and simplicity
of control design.
Index TermsCoupled inductors, high efficiency, high-side
driver, noninverting buckboost converter, right-half-plane (RHP)
zero, wide bandwidth.
I. INTRODUCTION
N many converter applications such as battery charging and
I discharging, power factor correction, fuel cell regulation,
and maximum power point tracking of solar panels, a dcdc
converter is used to obtain a regulated voltage from an unregu-
lated source. When the regulated voltage is within the voltage
range of the unregulated voltage source, a step-up/step-down
dcdc converter is required [1][13].
Step-up/step-down dcdc converters with a single active
switch, such as buckboost, flyback, Sepic, and Cuk topolo-
gies, have high component stresses and low efficiencies in the
same operating point than the boost or the buck converter if
the output voltage is greater or smaller than the input voltage,
respectively [14].
It is possible to combine a buck with a boost to obtain a two
independently controllable switch buckboost converter with
Manuscript received August 6, 2010; revised November 9, 2010 and
January 14, 2011; accepted January 15, 2011. Date of current version
September 16, 2011. This work was supported in part by the Spanish
Ministerio de Ciencia e Inovacion under Projects ESP2006-12855-C03-02,
CSD2009-00046, TEC2009-13172, DPI2010-16481 and the FPU scholar-
ship AP2008-03305. Recommended for publication by Associate Editor
M. Vitelli.
The authors are with the Departament dEnginyeria Electronica, Electrica i
Automatica, Escola Tecnica Superior dEnginyeria, Universitat Rovira i Virgili,
Tarragona 43007, Spain (e-mail: carlos.restrepo@urv.cat; javier.calvente@
urv.cat; angel.cid@urv.cat; abdelali.elaroudi@urv.cat; roberto.giral@urv.cat).
Digital Object Identifier 10.1109/TPEL.2011.2108668
0885-8993/$26.00 2011 IEEE
IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 26, NO.
size and performance comparable to those of the simple buck
or boost stages [15]. For example, combining a buck in cascade
with a boost results in a single inductor noninverting buckboost
converter that exhibits high performance and it is widely used in
low voltage applications [4][8]. These converters do not oper-
ate in buckboost mode, because it is more efficient to operate
them either in buck mode if the output voltage is lower than
the input one or in boost mode in the opposite case [2]. There
are also high-efficiency noninverting buckboost converters at
higher operational voltages [12], [13] with the drawback of a
complex control. In [12], the authors state that the detailed mod-
eling of the plant and the controller is an ongoing work. In [13],
two different output voltage regulators are required depending
on either boost or buck mode of operation.
The single inductor noninverting buckboost converter is used
in applications where it is important to have low size and cost of
the magnetic elements. However, when the voltages are high, the
size of the capacitors of this converter is also important. In that
case, it can be interesting to use the cascade buckboost power
converter that has two inductors, one at the input and another
at the output [1], [3]. With these inductors, the I/O currents are
nonpulsating, the noise level is lower, and the control and the
limiting of the currents can be easier than in the pulsating case.
Most of the converters mentioned earlier, when operating
in continuous conduction boost mode, have a right-half-plane
(RHP) zero that makes the controller design a difficult task, lim-
its the bandwidth of the loop, and penalizes the size of the output
capacitor [6]. One possible solution to these problems is a topol-
ogy named KY buckboost converter [16]. This converter has a
very fast transient response, which is achieved by using switched
capacitors for energy transfer, and is advisable for low-power
applications. The tristate boost converter reported in [17] elimi-
nates the RHP zero but exhibits a poor efficiency, this technique
having never been applied to the buckboost topology. In [11], a
two-inductor boost superimposed with a buck converter solves
satisfactorily the RHP zero problem but both active switches
of the structure are floating, what requires complex drivers.
Another solution to the problem of the RHP zeros adopted in
the study reported here is using magnetic coupling between in-
ductors [18] combined with damping networks [19], [20]. This
solution has allowed the design of high-power boost converters
with high efficiency and wide bandwidth [21][23].
The purpose of this paper is to analyze the cascaded con-
nection of a boost and buck converter, with magnetic coupling
between inductors, shown in Fig. 1. This converter can operate
in boost mode, as in Fig. 2(a), and buck mode, as in Fig. 2(b).
Both topologies have nonminimum phase transfer functions
RESTREPO et al.: NONINVERTING BUCKBOOST DCDC SWITCHING CONVERTER
Fig. 1. Schematic circuit diagram of the buckboost converter with magnetic
coupling between inductors.
Fig. 2. Operating modes of the buckboost converter: (a) boost mode;
(b) buck mode.
under certain parametric conditions and have been previously
proposed for battery charge/discharge regulators for satellites
[24]. As will be seen, the proposed converter exhibits high effi-
ciency in the desired range of operation in spite of using diodes
instead of synchronous rectification. It also presents a wide
bandwidth and low current ripples that reduce the size of the
input capacitor and especially that of the output one. Finally,
the converter control is simple in comparison with the state-of-
the-art, what could reduce design costs.
The remainder part of this paper is organized as follows.
Section II presents the key waveforms of the converter and dis-
cusses the small-signal converter model. In the same section, the
turns ratio n of the transformer that avoids the need of using two
transfer functions, namely, one for the buck mode and another
one for the boost mode, is also determined. This allows us to
use the same transfer function to describe the converter in both
modes and simplifies the controller design. A damping network
is added in Section III where analytical expressions are obtained
to design a minimum phase transfer function. Section IV focuses
on a complete circuit design for the buckboost converter and its
control. Finally, the last two sections present, respectively, sim-
ulated and experimental results, and the conclusion of this study.
II. ANALYSIS OF THE BUCKBOOST CONVERTER WITH
MAGNETIC COUPLING BETWEEN INDUCTORS
Let us consider the unidirectional buckboost converter with
magnetic coupling between the I/O inductors shown in Fig. 1.
2491
The current and voltage typical waveforms of this converter in
steady state are depicted in Fig. 3. In boost mode, the currents are
shown in Fig. 3(a) and the corresponding voltages in Fig. 3(b).
Fig. 3(c) and (d) represents current and voltage waveforms in
buck mode. The bottom traces of each plot correspond to u1
and u2 , which are, respectively, the logic activation signals of
switches Q1 and Q2 . In boost mode, u2 = 1 while u1 is switch-
ing whereas in buck mode u1 = 0 while u2 is switching. The
duty cycles of u1 and u2 have been adjusted to obtain a mean
output voltage of 48 V. In a typical design, the ripple in the in-
termediate capacitor voltage vC is bigger than that of the output
voltage, which permits to use a small intermediate capacitor. As
it can be observed from Fig. 3, a common characteristic of the
two operation modes is that currents ig and iL are nonpulsating
with triangular-shaped ripple.
Assuming a continuous conduction mode (CCM) of opera-
tion, no parasitic effects and a switching frequency much higher
than the converter natural frequencies, the use of the state-space
averaging (SSA) method [25] to model the converter leads to
the following set of differential equations:
diL m (t) vg (t) v C (t)(1 d1 (t))
=
dt Lm
diL (t) v C (t)d2 (t) + n(vg (t) v C (t)(1 d1 (t))) v o (t)
=
dt L L
dv C (t) iL (t)d2 (t) + (iL m (t) + niL (t))(1 d1 (t))
=
dt C
dv o (t) iL (t) v o (t)
= (1)
dt Co Ro Co
where d1 and d2 are the duty cycles of the switches Q1 and Q2 ,
respectively, and the overline stands for averaging during one
switching period. A circuital procedure to obtain (1) is by means
of the replacement of the switches in the converter by their time-
averaged models [26], which leads to the large signal-averaged
circuit of Fig. 4(a). Assuming that the converter is in steady state
with constant duty cycles, d1 (t) = D1 and d2 (t) = D2 , and
input voltage vg (t) = Vg , and using the principles of inductor
volt-second and capacitor charge balance [14], the steady-state
expressions of the inductor currents and capacitor voltages are
Vg D2 (D2 n + nD1 )
IL m =
Ro (1 D1 )2
Vg D2
IL =
Ro (1 D1 )
Vg
VC =
1 D1
Vg D2
Vo = . (2)
1 D1
These equations could be also derived from (1) by noting that,
in steady state, the derivatives are zero or, equivalently, from the
dc circuit of Fig. 4(b). It is worth noting that the dc values of the
state variables v o , v C , and iL do not depend on the transformer
turns ratio n. From the output capacitor voltage Vo in (2), the
2492 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 26, NO. 9, SEPTEMBER 2011

Fig. 3. Typical waveforms of Fig. 1 converter for V o = 48 V: (a), (b) currents and voltages in boost mode with V g = 39 V; (c), (d) currents and voltages in buck
mode with V g = 55 V. Logic signals u 1 (in black) and u 2 (in white) indicate switch Q 1 and Q 2 states, respectively.

voltage conversion ratio M (D1 , D2 ) is given by

Vo D2
M (D1 , D2 ) = . (3)
Vg 1 D1
Our goal is that the converter could operate in both boost
(0 < D1 < 1 and D2 = 1) or buck (0 < D2 < 1 and D1 = 0)
modes, and that it could switch from one mode to another in a
smooth form. Let us define a single control variable u that can
take the values between 0 and 2 (0 < u < 2). The duty cycles
D1 and D2 are related to the new variable u as
D1 = max(0, u 1)
D2 = min(1, u). (4)
The new voltage conversion ratio can be expressed as follows:
min(1, u)
M (u) = . (5)
1 max(0, u 1)
Fig. 4. Schematic circuit diagrams of the buckboost converter with magnetic With this control input, the dc voltage conversion ratio M (u)
coupling between inductors: (a) large-signal-averaged model and (b) dc model. is continuous between the boost and buck modes of operation,
RESTREPO et al.: NONINVERTING BUCKBOOST DCDC SWITCHING CONVERTER 2493


differential equations (1). The small signal state-space vector x
is defined as
 = [ iL m iL T
x vC vo ] . (8)
Linearizing (1) around the equilibrium point (2) and separat-
ing the dynamic ac small-signal terms from the dc steady-state
component, the following dynamic model is obtained:
d
x
x + B1 d1 + B2 d2
= A (9)
dt
where A is the state matrix and B1 and B2 are, respectively, the
input vectors corresponding to d1 and d2
D 1 1
0 0 Lm 0

0 0 D 2 +n (1+D 1 )
1
L L
A=
1D 1 n (1D 1 )D 2
C C 0 0
0 1
Co 0 R o1C o

T
Vg nV V D 2
B1 = L m (D 1 1)
L (D 1 g1) C R o g(D 12 1) 2 0
 V Vg D2 T
B2 = 0 L (D 1g 1) C R o (D 1 1) 0 .
Hence, in the boundary between the two modes of operation,
the small-signal control-to-output transfer function with respect
to the duty cycle d1 is
Fig. 5. (a) DC conversion ratio M (u) of the buckboost converter; (b) acti-
vo (s) N1 (s)
vation signal generation: comparison of control signals with a triangular signal Gvo d 1 (s) = (10)
to obtain the MOSFETs binary activation signals u 1 (t) and u 2 (t).
u =1

d1 (s) u =1 D(s)
where
as depicted in Fig. 5(a). In the border between the two modes
of operation u = 1, so D1 = 0 and D2 = 1. Fig. 5(b) shows N1 (s) = Vg (Ro nCLm s2 + (Lm n Lm )s + Ro )
how to generate the switch activation signals u1 (t) and u2 (t)
D(s) = Lm CLRo Co s4 + Lm CLs3 + (Lm Ro Co
from the control signal u, and a symmetric triangular wave of
amplitude Vram p = 1 V. 2Lm nRo Co + Lm CRo + LRo Co
To obtain a small-signal model around a steady-state operat-
+ Lm n2 Ro Co )s2 + (Lm 2Lm n
ing point, we assume that the input voltage is constant and the
duty cycles d1 (t) and d2 (t) are equal to D1 and D2 plus some + Lm n2 + L)s + Ro .
superimposed small ac variations d1 (t) and d2 (t), respectively,
In the same way, the small-signal control-to-output transfer
vg (t) = Vg function with respect to the duty cycle d2 is

d1 (t) = D1 + d1 (t)
vo (s) N2 (s)
Gvo d 2 (s) = (11)
 D(s)
d2 (t) = D2 + d2 (t). (6) u =1 d2 (s) u =1

After these inputs are considered, the averaged inductor cur- where
rents and capacitor voltages can also be expressed in terms of N2 (s) = Vg (Ro CLm s2 + (Lm n Lm )s + Ro ).
their corresponding steady-state values plus some superimposed
small ac variations If the turns ratio n is equal to 1, the transfer functions Gvo d 1 (s)
and Gvo d 2 (s) are coincident, and
iL m (t) = IL m + iL m (t)

iL (t) = IL + iL (t) Gvo d 1 (s) = Gvo d 2 (s)
u =1; n =1 u =1; n =1
v C (t) = VC + vC (t)
Vg Ro
= . (12)
v o (t) = Vo + vo (t). (7) LRo Co s2 + Ls + Ro
With the assumption that the ac variations are much smaller A similar procedure can be used to determine the small-signal
than the steady-state values, it is possible to linearize the set of control-to-output transfer functions Gi L d 1 (s) and Gi L d 2 (s).
2494 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 26, NO. 9, SEPTEMBER 2011

These transfer functions are also identical between the two

modes of operation if n = 1



Gi L d 1 (s) = Gi L d 2 (s)
u =1;n =1 u =1;n =1

Vg (Ro Co s + 1)
= (13)
LRo Co s2 + Ls + Ro
Fig. 6. Coupled inductor buckboost converter with RC -type damping net-
Selecting n = 1, the dynamic characteristics of the output work and turns ratio 1:1 (n = 1).
voltage and output current are continuous between the boost
and buck modes, as shown in [12] and [13], but there is a dou- the SSA model in CCM is
ble zero-pole cancellation indicating an uncontrollable internal
dynamics. On the other hand, the small-signal control-to-output diL m (t) vg (t) v C (t)(1 d1 (t))
=
transfer function Gvo d 1 (s) in boost mode (u > 1) with D2 = 1 dt Lm
and n = 1 is diL (t) v C (t)d2 (t) + vg (t) v C (t)(1 d1 (t)) v o (t)
=
N3 (s) dt L
Gvo d 1 (s) = (14)
D 2 =1;n =1 D3 (s) dv C (t) iL (t)d2 (t) + (iL m (t) + iL (t))(1 d1 (t))
=
where dt C
v C (t) v C d (t)
N3 (s) = Vg ((Lm CRo Lm CRo D1 )s2 Lm D1 s
CRd
+ (Ro + RoD12 2Ro D1 )) (15)
dv C o (t) iL (t) v o (t)
D3 (s) = (D1 1)2 (Lm CLRo Co s4 + Lm CLs3 =
dt Co CRo
+ (Lm D12 Ro Co + Lm CRo + LRo Co dv C d (t) v C (t) v C d (t)
= . (17)
2D1 LRo Co + D12 LRo Co )s2 ) + (Lm D12 + L dt Cd Rd
As can be expected from (2), with n = 1 and the steady-state
2D1 L + D12 L)s + (Ro 2Ro D1 + Ro D12 )).
behavior of VC d , the converter operating point for constant duty
(16) cycles d1 (t) = D1 , d2 (t) = D2 and input voltage vg (t) = Vg is
According to (15), Gvo d 1 has two RHP zeros. The presence Vg D2 (D2 + D1 1)
IL m =
of these RHP zeros tends to destabilize feedback loops with Ro (1 D1 )2
wide bandwidth making the converter prone to oscillation [15]. Vg D2
The dynamics of the zeros is the inner behavior of the system IL =
Ro (1 D1 )
when the control is regulating the output without error, e.g., in
a high gain closed-loop linear system, the poles are attracted Vg
VC =
by the zeros. In a converter with an ideal regulation of the 1 D1
output voltage, the inner dynamics is usually associated with Vg
the input filter. Thanks to the magnetic coupling, the dynamics VC d =
1 D1
of the zeros of our converter in boost mode is of second order,
associated with the variables iL m and vc . Note that the zeros in Vg D2
Vo = . (18)
(15) depend on the parameters Lm and C. Therefore, damping 1 D1
the dynamics of iL m and/or vc by adding a passive network could Linearizing the set of equations (17) around the operating point
transfer the RHP zeros to the left-half-plane (LHP). Following a (18), we obtain the small-signal SSA model
similar procedure to the one reported in [18] and [19], a passive
dx
network has been connected to the intermediate capacitor. This = A x + B1 d1 + B2 d2 (19)
damping network can be seen as a low-frequency snubber. The dt
modified procedure to calculate the parameter values of the , the state matrix A, and the
where the small signal state vector x
passive damping network will be given in the next section. input vectors B1 and B2 of the system are now given by
 = [ iL m iL
T
x vC vC d vo ]
III. ANALYSIS OF THE COUPLED INDUCTORS BUCKBOOST
D 1 1
CONVERTER WITH DAMPING NETWORK 0 0 Lm 0 0
D 2 +D 1 1
In this section, the buckboost converter with the damping 0 0 0 L1
L
network included, which is depicted in Fig. 6, will be analyzed. 1D 2 D 1
A = 1D 1
R d1 C 1
0
The damping network consists of a series connection of a resistor C C Rd C
0 1
R d1C d
Rd and a capacitor Cd connected in parallel with the converter 0 Rd Cd 0
intermediate capacitor C. With this damping network included, 0 1
Co 0 0 R o1C o
RESTREPO et al.: NONINVERTING BUCKBOOST DCDC SWITCHING CONVERTER 2495

2

T
Vg V V D
B1 = L m (D 1 1)
L (D 1g 1) C R o g(D 12 1) 2 0 0
 V Vg D2 T
B2 = 0 L (D 1g 1) C R o (D 1 1) 0 0 .
The transfer functions Gvo d 1 (s) and Gvo d 2 (s) have now a
third-order numerator and a fifth-order denominator with two
dominant complex poles. In the border between buck and boost
operation modes, where u = 1, there is a triple zero-pole cancel-
lation and the two transfer functions correspond to expression
(12). Since this control-to-output transfer function is identical
to that of a second-order buck converter, it is possible to design
its control loop compensator in the same well-known way if the
internal dynamics corresponding to the canceled poles is suffi-
ciently damped. The poles of the internal dynamics are the roots
of the canceled polynomials in





p(s)(vg Ro )


Gvo d 1 (s)
= Gvo d 2 (s)

=
u =1 u =1 p(s)(LRo Co s2 + Ls + Ro )
(20)
Fig. 7. Circuit diagram corresponding to the PSIM simulation used to calculate
where the frequency response of the control-to-output transfer function.
p(s) = Lm Rd CCd s3 + (Lm Cd + Lm C)s2 + Rd Cd s + 1.
(21)
Equating the coefficients of (21) to a third degree polynomial in (border, u = 1), and Vg = 55 V (step-down, u < 1) have been
the following factorized form considered. The duty cycles have been chosen to have a steady-
state output voltage Vo = 48 V. The waveforms depicted in
p(s) = ( s + 1)( 2 s2 + 2 s + 1) (22)
Fig. 3 were obtained for the previous list of component values.
yields the expression of the damping network capacitor (see the The Bode plots of both frequency responses obtained from
Appendix) PSIM (switched) and MATLAB (small signal) are superim-
posed for the three different values of the input voltage and
2C(1 + 2 + 2 )
Cd = . (23) are depicted in Fig. 8. In this figure, the maximum frequency

plotted corresponds to 50 kHz, which is half of the switching
Since it is desired to minimize the size of the capacitor Cd , a frequency. The frequency responses are very similar in shape
value of = 1 is selected. With this choice, the expression of to a second-order system with two complex poles and no ze-
the damping resistance Rd is given by ros. We conclude that our buckboost converter can be modeled
 and controlled as a buck converter for the input voltage range
(1 + 2) 1 + 2 Lm
Rd = . (24) considered in the example.
4( + 1) C
Finally, = 1 is selected as a tradeoff between the size of the
IV. CIRCUIT DESIGN
capacitor and a sufficient and robust damping of the internal
dynamics. The resulting expressions of the damping network A. BuckBoost Converter Power Stage
parameters are The buckboost converter is designed as a battery discharge

Lm regulator of 13 in-series lithium-ion battery cells, so that an in-
Cd = 8C, Rd 0.65 . (25) put voltage Vg range of 39 to 55 V is considered. The output
C
voltage Vo regulates a dc bus of 48 V. The maximum power
In the previous section, it was concluded that the small-signal
output is 480 W corresponding to a load resistance Ro = 9.6
control-to-output transfer functions Gvo d 1 (s) and Gvo d 2 (s)
and the switching frequency is 100 kHz. The parameter values
have the same expression at u = 1. Moreover, this expression
of the buckboost converter of Fig. 6 have been selected ac-
corresponds to the small-signal control-to-output transfer func-
cording to specifications of I/O peak-to-peak current ripples of
tion of a buck converter. To test the validity range of the small-
ig pp = 12 A and iL pp = 4 A; maximum output impedance
signal model, a PSIM frequency response simulation has been
of Zo m ax = 150 m; maximum power dissipation in the damp-
carried out using the switched model schematic circuit diagram
ing resistor PR d = 4 W, and also expression (25). The expres-
shown in Fig. 7 and compared with the MATLAB calculated
sions used to calculate the ripples of iL , ig , and vc are listed in
frequency response corresponding to the SSA model (12). In
Table I. If a triangular-shaped vc ripple is assumed, the power
both cases, the parameters, whose selection will be explained
loss in Rd is
in the next section, are Lm = 14 H, C = 2.6 F, Rd = 1.5 ,
Cd = 22 F, L = 30 H, Co = 110 F, and Ro = 9.6 . Three vC pp
different input voltages Vg = 39 V (step-up, u > 1), Vg = 48 V PR d = . (26)
12Rd
2496
Fig. 8. Frequency response of the small-signal control-to-output transfer func-
tion. The black lines correspond to the simulation of the switched model using
PSIM (see Fig. 7) while the white lines correspond to MATLAB simulation of
the linear small signal model (12).
TABLE I
PEAK TO PEAK RIPPLE OF THE CONVERTER VARIABLES iL , ig , AND v C
IN CCM
The maximum output impedance in closed loop can be calcu-
lated approximately as
1 and u2 when compared with the triangular signals.
Zo m ax = (27)
2fc Co
where fc is the crossover frequency (CF) of the voltage loop.
After performing a worst case analysis in both buck and boost
modes to get the specifications at the nominal power, the finally
selected components of the buckboost converter power stage
are the ones listed in Table II. To achieve a good efficiency,
N-channel MOSFETs with low on-resistance and fast Schottky
diodes have been selected. Kool M core inductors have been
chosen by their low cost and availability. Capacitors that must
absorb high-pulsed current are ceramic. The equivalent series
resistance of Cd is much smaller than Rd . All components are
rated up to 100 V.
IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 26, NO. 9, SEPTEMBER 2011
TABLE II
COMPONENTS OF BUCKBOOST CONVERTER
B. BuckBoost Control Circuit
Once the model (12) has been verified in the previous sec-
tion, the next step is to design the control loop compensator.
A compensation network for the buck converter-like transfer
function plotted in Fig. 8 has been designed following classical
rules [27]. The third-order compensator transfer function is

u (3 s + 1)(4 s + 1)
Gc = =K (28)
vo s(1 s + 1)(2 s + 1)
where the compensator parameters has been selected as follow:
1 = 1 s, 2 = 2 s, 3 = 4 = 1/(2) ms, and K = 210 s/V.
The circuit diagram of the compensator and the pulse width
modulation (PWM) implemented in PSIM is presented in
Fig. 9(a), where an estimation of the switching delays has been
included. The existence of delays impedes having extreme duty
cycles and causes a nonlinearity in the transitions between boost
and buck modes [28]. To mitigate these problems, a third mode
of operation is permitted in an adjustable small vicinity zone be-
tween buck and boost modes [7], [28]. The new operation mode
is called buckboost mode because the previous two modes
overlap in interleaving-like manner, i.e., both MOSFETs can
switch in the same period but their switching instants are almost
rad out of phase. The overlapping adjustment is achieved by
reducing the displacement between the signals that generate u1
The circuit schematic diagram of the buckboost control ex-
perimental stage is shown in Fig. 9(b). The main component of
the control system is the dual-PWM controller-integrated cir-
cuit TL1451A that generates the switch activation signals u1 (t)
and u2 (t). This single monolithic chip has two error amplifiers,
an adjustable oscillator, a reference voltage of 2.5 V, and dual-
common-emitter output transistor circuits. The triangular signal
oscillator has been adjusted to have a frequency of 100 kHz,
an amplitude of 0.7 V, and a dc offset of 1.4 V. One of the
error amplifiers is used to implement the compensator (28) to
obtain the signal u, and the other one is used to get the signal
(u 0.7 + overlapping adjustment) in the manner presented in
RESTREPO et al.: NONINVERTING BUCKBOOST DCDC SWITCHING CONVERTER
Fig. 9. Schematic of: (a) the compensator G c and the dual PWM simulated
in PSIM; (b) buckboost control circuit diagram and; (c) an example of driving
signals generation.
Fig. 9(c). This figure shows an example of the driving signals
u1 and u2 generation.
C. BuckBoost Driver With Modified Bootstrap
An IR2110 integrated driver has to switch the low side N-
Channel MOSFET in the boost stage Q1 , and the high side
N-Channel MOSFET of the buck stage Q2 . A bootstrap circuit
is needed to supply the floating voltage to drive Q2 . In buck
operation, Q1 should be always OFF while Q2 switches. In
buckboost mode both Q1 and Q2 are switched in the same
period. In these two previous modes a classical bootstrap cir-
cuit would operate correctly. The most critical operation of the
driver occurs in pure boost mode because the bootstrap capaci-
tor CB must be sufficiently charged to keep Q2 ON for as long
as needed. In these circumstances, the capacitor of conventional
bootstrap circuits could be insufficiently charged. To avoid the
malfunction of the converter in boost mode, it is then necessary
to refresh the capacitor charge. A solution of this problem is pre-
sented in [29], where a charge pump topology with an external
clock signal is used. A similar charge pump driver that refreshes
the bootstrap capacitor with the use of the boost control pulses
is shown in Fig. 10. Since the source of Q2 is always at a level
higher than 15 V, the usual bootstrap path through diode DA
will be cut OFF, and an additional bootstrap circuit made of
CB a u x , DB , DC , TC , TD , and a couple of resistors, has been
added to recharge CB . The boost pulses turn on the auxiliary
Darlington transistor TD , permitting that CB a u x charges to 15 V
through DA , DC , and TD . The direct polarization of DC keeps
2497
Fig. 10. Scheme of the buckboost driver with a modified bootstrap circuit
and auxiliary supplies.
Fig. 11. Regulator prototype: (a) buckboost power stage; (b) dual PWM
control stage.
TC OFF. When TD turns OFF, TC starts conducting providing
through DB a current path to recharge CB from CB a u x . Fig. 9(b)
shows a variable resistor that permits the empirical overlapping
adjustment that guarantees a proper charging of the bootstrap
capacitor by switching the high-side MOSFET when the boost
driving pulses are narrower than 2%. A couple of cascaded lin-
ear regulators provide the supply voltages (15 V and 5 V) of the
driver and control circuit from the input voltage.
V. EXPERIMENTAL RESULTS
Fig. 11 shows pictures of the power stage and the control
circuit of the buckboost regulator prototype. The experimental
response of the buckboost regulator to a low-frequency tri-
angular input voltage going from 36.8 to 55.8 V is depicted
in Fig. 12 where the waveform of the output voltage could be
compared with its corresponding simulation. In addition to the
I/O voltages, the simulated logic signals u1 and u2 , ranging
from 0 to 1 V, are also depicted on the left. The oscillogram
on the right shows the equivalent signals that correspond to the
outputs of the dual-PWM controller that are in the 0 to 5 V
range. The input voltage range ensures that in both simulation
and experimental measurements the converter works in its three
operation modes. The output voltage is well regulated and ex-
hibits a smooth behavior in all the transitions between modes.
These good results are due to the use of the same controller in
all the operation modes. The sampling capabilities of the digital
oscilloscope have permitted to capture the switching noise in the
2498 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 26, NO. 9, SEPTEMBER 2011

Fig. 12. Waveforms of input voltage V g , output voltage V o , boost pulses u 1 and buck pulses u 2 for changes in the input voltage. (a) PSIM simulation.
(b) Waveforms measured. CH1: V g (10 V/div), CH2: V o (1 V/div, ac coupling), CH3: u 1 (5 V/div), CH4: u 2 (5 V/div), timebase: 20 ms/div.

Fig. 13. Experimental configuration of the measurement of efficiency:

(a) buckboost converter; (b) buckboost control; (c) dc power supply;
(d) power analyzer; (e) oscilloscope; (f) dc electronic load.

output voltage waveform. There is less switching noise in boost

mode because it is attenuated at the output by a third-order filter
while the buck stage has only a second-order filter between its
switches and the output.
Fig. 13 shows the experimental setup for measuring the ef-
ficiency of the hard-switching buckboost converter. The effi-
ciency measurements take into account the consumption of the Fig. 14. Energy conversion efficiency for V o = 48 V as: (a) function of the
drivers and control stages. A Voltech PM6000 Power Analyzer output current iR o for different input voltage v g levels; (b) function of the input
with calibrated precision shunt resistors is used to measure the voltage v g for different output current iR o levels.
I/O currents. The energy conversion efficiencies as a function
of the output current iR o for different input voltage vg levels are
shown in Fig. 14(a), whereas in Fig. 14(b), the horizontal axis is to the desired output level. The maximum efficiency obtained of
the input voltage and the output current is the parameter of the set about 97% would be improved if the diodes could be substituted
of curves. Since some switching losses penalty is paid in buck by synchronous rectifier MOSFETs [12], [13]. Other techniques
boost mode, for a given current the maximum efficiencies are like multiphase and zero voltage switching [12] or dynamic ad-
attained in boost and buck modes when the input voltage is close justment of the switching frequency [13] are also possible.
RESTREPO et al.: NONINVERTING BUCKBOOST DCDC SWITCHING CONVERTER
Fig. 15. Loop gain Bode plots of the buckboost converter: boost mode for v g = 39 V, buckboost mode for v g = 48 V and buck mode for v g = 55 V.
(a) Simulated magnitude. (b) Experimental magnitude. (c) Simulated phase. (d) Experimental phase.
TABLE III
CF AND PM FOR DIFFERENT INPUT VOLTAGES
PSIM-simulated and experimental Bode plots of the regula-
tor loop gain are illustrated in Fig. 15. In the simulations, an
estimation of delays and loses has been taken into account. The
frequency measurements have been obtained using a frequency
response analyzer Venable 3120. This frequency response has
the three aforementioned different modes of operation that are
achieved by varying the value of the input voltage vg . Some
of the differences that can be observed between simulated and
experimental results for vg = 48 V are attributed to the nonlin-
earities in the transitions between modes mentioned previously.
Other differences are mainly due to nonlinearities in some pas-
sive components of the experimental prototype. For instance,
the capacitance of the intermediate capacitor exhibits a strong
dependence on the applied voltage as has already been noted in
Table II. Also, the parameters of the magnetic components vary
with the mean average current flowing through them. The CF
and phase margin (PM) are calculated and listed in Table III for
each input voltage value. In spite of the differences observed
2499
between the simulated and the experimental frequency re-
sponses, the table shows remarkably similar results in all cases.
Like in a buck regulator, a wide bandwidth is achieved since
the crossover frequency is between one-tenth and one-fifth of
the switching frequency. Furthermore, the PMS indicate that the
feedback system is stable for the desired input voltage range.
Figs. 16, 17, and 18 show simulated and experimental tran-
sient responses to load changes for different constant input volt-
ages corresponding to boost, near buckboost and buck modes,
respectively. For each input voltage, the load current has been
changed from 10 to 5 A in the top subplots (a) and (b) and back
form 5 to 10 A in the bottom subplots (c) and (d). In all cases, the
output voltage is well regulated and the transient deviations are
within the desired boundaries. In addition to output voltage and
current, the input current and the intermediate capacitor voltage
are also depicted. The transient dynamics of these variables is
damped as expected, with a reasonable agreement between sim-
ulated and measured variables. The main discrepancy appears
near the buckboost mode as it is illustrated in Fig. 17(a) and
(b). Extreme duty cycles, close to zero or to one, are required to
obtain a smooth transition between operation modes, but they
are not possible to achieve in practice due to the unavoidable
switching delays. For this reason, when the I/O voltages are
close, switching pulses can be skipped and the resulting ripple
contains components at frequencies below the converter switch-
ing frequency [28].The skipped pulses also appear in transients
like the one depicted in Fig. 18(d) where a couple of buck pulses
are missed and an intermediate unexpected boost pulse appears.
2500 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 26, NO. 9, SEPTEMBER 2011

Fig. 16. (a), (c) PSIM simulations and (b), (d) experimental measurements of the converter main variables when the load current changes from 10A to 5 A and
back to 10 A while the input voltage is V g = 39 V. Black traces shows the simulated output current iR o and output voltage v o while the input current ig and the
intermediate capacitor voltage v c are in white. CH1: v c (5 V/div), CH2: v o (500 mV/div, ac coupling), CH3: ig (5 A/div) and CH4: iR o (5 A/div).

Fig. 17. (a), (c) Simulated and (b), (d) measured converter main variables for the same load changes of Fig. 16 and V g = 46 V.
RESTREPO et al.: NONINVERTING BUCKBOOST DCDC SWITCHING CONVERTER
Fig. 18. (a), (c) Simulated and (b), (d) measured converter main variables for the same load changes of Fig. 16 and V g = 55 V.
In our prototype, this noise is attenuated by the output LC filter
or rejected by the control loop and has little effect on the output
voltage.
VI. CONCLUSION
A new noninverting buckboost dcdc switching converter
has been obtained by magnetically coupling the I/O inductors
of a cascade connection of a boost and a buck stage. The combi-
nation of a coupling and a damping network at the intermediate
capacitor provides a minimum-phase control-to-output trans-
fer function with two dominant complex poles. Simulation and
experimental results of a prototype verify the predicted wide
control bandwidth due to the absence of RHP zeros. A high
efficiency is obtained by operating the converter switches in
three regions depending on the I/O voltage ratio: boost, buck,
and buckboost. In the buckboost region both MOSFETs are
allowed to switch in the same period but this overlapping is per-
mitted only for a narrow range of nearly equal input and output
voltages to improve the efficiency. The converter operates usu-
ally in the other more efficient modes in which there is only one
periodically switching MOSFET. In buck mode, the MOSFET
of the boost stage is always OFF, whereas in boost mode, the
buck stage MOSFET is continuously ON, which has required a
specially built bootstrap driver for the buck stage high-side N
channel MOSFET.
For a given specification of output impedance and voltage
ripple, we believe that the proposed converter could offer a so-
2501
lution with larger magnetic components but smaller capacitors
than other state-of-the-art topologies. Since both I/O currents
are of nonpulsating nature there are two or more possible cur-
rent control strategies. For that reason, controlling the converter
in current mode is a work in progress. The capability of cycle-
by-cycle limiting the I/O converter currents offers interesting
possibilities to many applications like battery, supercapacitor,
PV panel, or fuel cell energy management. Future works con-
template also a bidirectional implementation of the switches
that could provide even higher conversion efficiencies. Another
open problem is the converter operation at light loads where
several discontinuous conduction modes can appear.
APPENDIX
DAMPING NETWORK PARAMETER CALCULATION
Equating (21) and (22) gives the following set of equations:
3 = Rd Cd Lm C (A1)
2 (2 + 1) = Lm (Cd + C) (A2)
( + 2) = Rd Cd . (A3)
Dividing (A1) by (A3) and isolating 2 yields
Lm C( + 2)
2 = . (A4)
2502
Substituting (A4) in (A2) and isolating Cd gives (23). From
(A3) and (A4), it is straightforward that
( + 2)
Rd = . (A5)
Cd
Since the derivative of (23) with respect to is
dCd 2C(2 1)
= (A6)
d 2
Cd has a minimum for = 1.
Expression (A5), particularized for = 1, yields (24).
ACKNOWLEDGMENT
The authors would like to thank J. M. Bosque for his aid in
the construction of the prototype, and L. Martnez-Salamero and
the anonymous reviewers for their valuable comments.
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Carlos Restrepo (S10) received the the Ingeniero
Electricista and Master en Ingeniera Electrica de-
grees, with honors, from the Universidad Tecnologica
de Pereira, Pereira, Colombia, in 2006 and in 2007,
respectively, and the Master en Ingeniera Electronica
degree from the Universitat Rovira i Virgili de
Tarragona, Tarragona, Spain, in 2008. He is currently
working toward the Ph.D. degree in the Departament
dEnginyeria Electronica, Electrica i Automatica,
Escola Tecnica Superior dEnginyeria, Universitat
Rovira i Virgili de Tarragona, Tarragona, Spain.
His main research interests include fuel cell modeling and power converters
design.
Javier Calvente (S94M03) received the Inge-
niero de Telecomunicacion and Ph.D. degrees from
the Universitat Politecnica de Catalunya (UPC),
Barcelona, Spain, in 1994 and 2001, respectively.
He was a Visiting Scholar with Alcatel Space
Industries, Toulouse, France, in 1998. He is cur-
rently an Associate Professor in the Departament
dEnginyeria Electronica, Electrica i Automatica,
Universitat Rovira i Virgili (URV), Tarragona, Spain.
His research interests include power electronics and
control systems.
RESTREPO et al.: NONINVERTING BUCKBOOST DCDC SWITCHING CONVERTER 2503

Angel Cid-Pastor (S99M07) received the Inge-
niero en Electronica Industrial and Ingeniero en
Automatica y Electronica Industrial degrees from the
Universitat Rovira i Virgili, Tarragona, Spain, in 1999
and 2002, respectively. He received the M.S. degree
in design of microelectronics and microsystems cir-
cuits, in 2003 from Institut National des Sciences
Appliquees, Toulouse, France. He received the Ph.D.
degree from the Universitat Politecnica de Catalunya,
Barcelona, Spain, and from Institut National des Sci-
ences Appliquees, LAAS-CNRS Toulouse, France,
in 2005 and 2006, respectively.
He is currently an Associated Professor in the Departament dEnginyeria
Electronica, Electrica i Automatica, Escola Tecnica Superior dEnginyeria, at
the Universitat Rovira i Virgili, Tarragona, Spain. His research interests power
electronics and renewable energy systems.
Roberto Giral (S94M02SM10) received the
B.S. degree in Ingeniera Tecnica de Telecomuni-
cacion, the M.S. degree in Ingeniera de Telecomuni-
cacion, and the Ph.D. (Hons.) degree from the Uni-
versitat Politecnica de Catalunya, Barcelona, Spain,
in 1991, 1994, and 1999, respectively.
He is currently an Associate Professor at the
Departament dEnginyeria Electronica, Electrica i
Automatica, Escola Tecnica Superior dEnginyeria,
Universitat Rovira i Virgili, Tarragona, Spain, where
he is working in the field of power electronics.

Abdelali El Aroudi (M00) was born in Tangier,

Morocco, in 1973. He received the Graduate degree
in physical science from Faculte des sciences, Univer-
site Abdelmalek Essadi, Tetouan, Morocco, in 1995,
and the Ph.D degree (with honors) from the Univer-
sitat Politecnica de Catalunya, Barcelona, Spain, in
2000.
From 1999 to 2001, he was a Visiting Professor at
the Department of Electronics, Electrical Engineering
and Automatic Control, Technical School of Univer-
sitat Rovira i Virgili (URV), Tarragona, Spain, where
he became an Associate Professor in 2001, and a full-time tenure Associate
Professor in 2005. From September 2007 to January 2008, he was holding a
visiting scholarship at the Department of Mathematics and Statistics, Univer-
sidad Nacional de Colombia, Manizales, conducting research on modeling of
power electronics circuits for energy management. From February 2008 to July
2008, he was a Visiting Scholar at the Centre de Recherche en Sciences et Tech-
nologies de Communications et de lInformations (CReSTIC), Reims, France.
He has participated in different Spanish domestic and cooperative international
research projects. He has published more than 150 papers in scientific journals
and conference proceedings. His research interests include structure and control
of power conditioning systems for autonomous systems, power factor correc-
tion, stability problems, nonlinear phenomena, chaotic dynamics, bifurcations,
and control.
He is a reviewer for IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS
PART. I: REGULAR PAPERS AND II EXPRESS BRIEFS, IEEE TRANSACTIONS ON
POWER ELECTRONICS, IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, In-
ternational Journal of Control, International Journal of Power Electronics, IET
Electric Power Applications, International Journal of Systems Science, Circuits,
Systems and Signal Processing, International Journal of Sound and Vibration
and Nonlinear Dynamics. He is a Member of the GAEI Research Group (Uni-
versitat Rovira i Virgili) on Industrial Electronics and Automatic Control whose
main research fields are power conditioning for vehicles, satellites, and renew-
able energy. He has given invited talks in several universities in Europe, South
America, and Africa.