Philips 42PFL7007

O O R D M A
F U M O G R
GR R D A O
O FO M M R
R R U D O A G O
G O O M M R
MA R F
R U D O A G
O
A G O F O M M R
M R U O A G O
O G O O R D M R
D M A F U M O G O
M O G R R D A
D A O F O M M R
M M R R U D O A G O
U O G
A TelevisionO O M M R
OR D M R F U O G O
U M O
Color
G O O R D A
Chassis
M
R D A F U M O G R
F O M M R R L12M1.1LD A O
R U D O A G O F O M M R
O O M M R U LAO G
F U O G O O R D A
O O R D M A F U M M O
F U M O G R R D O
GR R D A O F O M G R
O F O M M R R U A
R U O A G O M
A G O O R
M
D M R FO D O O
M R F U O A G O M R
O G O O R D M R U A G
M A F U M O O R M
O G R R D A G F O O
D A O FO M M D R
M M R R U O O U M G
DO A G O O M D R R A
M M R F U A G F O M
U O G O R M D O O
OR D M A F O O O M R
U M O R
G O Page M D R U A G
R D A U G O R M
FO M R A
Contents
U M 1.
O
Revision List
O R M
2
F D O O
R
2.
D G F O
Technical Specifications and Connections
A
2
O M R
O O D G
3. Precautions, Notes, and Abbreviation List 5
F M
U O
4.
M
Mechanical Instructions
O M R
9
R U A
R U G O M
5. Service Modes, Error Codes, and Fault Finding 20
O O MD R R A F
6. Alignments 27
F
7.
G
Circuit Descriptions
O M
29
D O O
R U A F O O
8. IC Data Sheets 37
G O OR
9.
M
Block Diagrams
D U M G R
F O O R R
Wiring Diagram 32" (5000 series) 43
R D U M
Wiring Diagram 42" (5000 series)
G
44
O M A
A G O M G R R
M A 45
F O O
U O
M R R A F
M O
47
O D R
O G O D M G
F DO R U
MA O M A
Block Diagram Video 49

Block Diagram Audio
R R U A G
50
O R M
O M F
Block Diagram Control & Clock Signals 51
R U G
Block Diagram I2C
A F O M 52
D O O
G O R Supply Lines Overview
M D O
53
O M R
G
MA F
10. Circuit Diagrams and PWB Layouts
O O M
A 272217190587 - 272217190588 PSL
R 54
R U A
56-57
O O D U
B 313912365391 SSB MT5396 R2 LATAM
R G
58
O M
72-73
M G R A F O O
E 272217190554 - 272217190562 Keyboard Control
R U
Module
A F O M
74
D
75
G O R M
J 272217190629 Sensor board
O
76
O M G R
77
A F D U
11. Styling Sheets
M D O
5000 series 32"
O M R
78
R M A
O U G O
5000/6000 series 42"/47" 79
O U M R
7000 series 42"
G R A 80
F D O O
R R A
7000 series 47"
F O M 81
R
A G F O M D O O U M G
M D O O M G R O R M A
O O M R R U A F O O
R U A G F O M D R
A G O R M D O O M G
M F O O M R R U A
O D U
Published by ER/JY 1264 BG TV Quality
A G F O M
Printed in the Netherlands Subject to modification EN 3122 785 19300
O M G R O R M D O O 2012-Apr-20
R R U
A F O O M R
G M D
2012 TP Vision Netherlands B.V.
O U G
MA
All rights reserved. Specifications are subject to change without notice. Trademarks are the
F DO O M R R A
property of Koninklijke Philips Electronics N.V. or their respective owners.
U O M
TP Vision Netherlands B.V. reserves the right to change products at any time without being obliged to adjust
G
earlier supplies accordingly.
O R R A F O O
PHILIPS and the PHILIPS Shield Emblem are used under license from Koninklijke Philips Electronics N.V.
U M G O M D
R R M A F O O M G R
G O D U A
MA F DO R O
U M
A G R
F O R
O
M O
O U M G O R M D R
R R M A F O O M G
A G F O O D R U A
M D O U M G R O M
O M R R A F D O O
R R U A G F O M O M R
G O M D O U A G
M A F O O M G R O R M
O D R U A F D O O
M G R M R
O O R D M A
F U M O G R
GR R D A O
O F O M M R
R R U D O A G O
G O O M M R
MA R F
R U D O A G
O
A G O FO M M R
M R U O A G O
O G O O R D M R
D M A F U M O G O
M O G R R D A
D A O F O M M R
M M R R U D O A G O
U O G M
OR D EN 2 1.MA L12M1.1L LARORevision List FO U M O G R
O
U M O G O O R D M A
R D A F U M O G R
F O M
1. Revision M
List R R D A O
U O
Manual xxxx xxx xxxx.0
O F O M M
First release.
R R D A G
R U D O A G O F O M M
O O MSpecificationsM R U O O
F U O G O R
O M D R
GR R D A
2. Technical and Connections
O O M M R F U A G
R F U O A G O R M
R D FO
Index of this chapter: Specifications are indicative (subject to change).
A G O O
2.1 Technical Specifications
M 2.1 M R D O O
F U O G O R
2.2 Directions for Use
M
Technical Specifications
R R D A M G
2.3 Connections For on-line product support please use the links in Table 2-1.
O A G O FO M M R R U A
Here is product information available, as well as getting started,
M R Notes:
U O G O M
user manuals, frequently asked questions and software &
R D A F O
Figures can deviate due to the different set executions. drivers.
D O A G O O M M D O
M M R F U O
Table 2-1 Described Model Numbers and Diversity
O M R
G R D U G
DO A O FO M G R R M A
2 4 7 9 10 11
M M R U A
Mechanics
F O O O
Descr. Block Diagrams Schematics Styling
U O G R M
E (Keyboard/Leading Edge)
D A O O D
OR M F O O M R
Connection Overview
M R D G
Assembly Removal
U O G O R U A
J (Sensor Board)
R
Control & Clock
M
Wiring Diagram
R D A G M
Wire Dressing
Power Supply
Power Supply
M R U A O Supply lines
FO M R F O
Dressing
U O O M D O
Audio
Sheet
Video
G
SSB
R D F O
I2C
A O M R
CTN
O O M M D U G
32PFL5007G/78 2.3 4-1 4.3 7.2 9-1 9-7 9-8 9-9 9-10 9-11 10.1 10.2 10.4 10.3 11.1
F U O
42PFL7007G/78
O
2.3
M R
4-5
R
4.3
A
- 9-4 9-7 9-8 9-9 9-10 9-11 - 10.2 10.4 10.3 11.3
R
O MD U G O M
42PFL5007G/78 2.3 4-2 4.3 - 9-2 9-7 9-8 9-9 9-10 9-11 - 10.2 10.4 10.3 11.2
O R R A F O
42PFL6007G/78 2.3 4-4 4.3 - 9-3 9-7 9-8 9-9 9-10 9-11 - 10.2 10.4 10.3 11.2
R F U
47PFL5007G/78
A G
2.3
F O M
4-3
D
4.3
O
- 9-5 9-7 9-8 9-9 9-10 9-11 - 10.2 10.4 10.3 11.2
O O M
47PFL7007G/78 2.3 4-6 4.3 - 9-6 9-7 9-8 9-9 9-10 9-11 - 10.2 10.4 10.3 11.4
G
O O2.2R Directions forOUseM O D R U G R
R F D U M G
You can download this information from the following websites:
O R M A
A G O M R R
http://www.philips.com/support
G M A F O O
M R U A O
http://www.p4c.philips.com
R M F O O D R
O G FO D M G
MA DO R O U M
A G R
O R U
M A
O U M G O R M F O O
R R A F O D R
G O M D O M G
MA F
D O
R O
U M G R
O R U
M A
O O M G O R A F O O
R R U A F M D R
M D O O M R R M A
O O M R U A G F O O
R U A G O R M D O
G O R M F O O M R
A F O D R R U A G
M D O U M G O M
O O M R R M A F O O
R R U A G F O O O D R
A G O M D U M G
M F O O M G R R M A
O O D R R U A F O O O
U M G O M D
G R R M A F D O O M G R
O U
MA F DO R O
R U M G R
F O R M A
O M
2012-Apr-20
U G O M A D O O
R R M A F O O M G R
G O D U A
MA F DO R O
U M
A G R
F O R
O
M O
O U M G O R M D R
R R M A F O O M G
A G F O O D R U A
M D O U M G R O M
O M R R A F D O O
R R U AG F O M O M R
G O M D O U A G
O D R U A F D O O
M G R M R
O O R D M A
F U M O G R
GR R D A O
O FO M M R
R R U D O A G O
G O O M M R
MA R F
R U D O A G
O
A G O F O M M R
M R U O A G O
O G O O R D M R
D M A F U M O G O
M O G R R D A
D A O F O M M R
M M R R U D O A G O
U O A G OTechnical Specifications M
O and ConnectionsM L12M1.1L LAO 2. EN 3 GR
OR D M R F U O
U M O G O O R D M A
R D A F U M O G R
F O M M
2.3 Connections
R R D A O
R U O
DREAR CONNECTORS A G O F O M M R
O O M M R U O G
F U O G O O RSIDE D A
CONNECTORS
F U M O G R R D O
O O M R
USB 3
GR R D A F G
SERV.U
O O M M R U A
1
R F U NETWORK
O A G
AV IN
O
AUDIO IN
R M
R D FO
DVI/VGA
A G O O M M R D O O
M R F U O A G O M R
R D G
5 6 7 8
O A G O F O M M R R U A USB 2
M R U O G O M
R D A F O O
1
D O A G O FO M M D
M M R U O O M R
G R D U G
DO M A
R O F O M
U G R O R M A
M A F
2
U O G O R M D O O
OR D M A
BOTTOM REAR F
CONNECTORSO O O M R
U M O R
G O D R U A G
A M R
HDMI
R D G M
SIDE
M R U A O
FO U M O G
9
O R 10
M F 11
D O 12
O 13 14 14 3
O O R D A F D O O M R
F U OM M O M R R U A G DIGITAL
R U G O M
AUDIO
O MD
OUT
O F G R O R M A F O O
D
4
R U A F O O M
G O OR M D R
VGA CVI USB 1 (1) ARC (2) (3)
F O O M R R U
TV ANTENNA
AG
R G
HDMI
G D R U A F O M
A O U M G O R M O O
M R
19300_046_120417.eps
R A F O D
120417
O G O M D O M G R
Figure 2-1 Connection overview
F DO R U
MA O M O U M G
Note: The following connector color abbreviations are used
R R A O R M A 1 - D2+ Data channel j
F O O
H
M
(according to DIN/IEC 757): Bk= Black, Bu= Blue, Gn= Green, 2 - Shield Gnd
R R U A G F O
Gy= Grey, Rd= Red, Wh= White, Ye= Yellow.
D
3 - D2- Data channel j
G O M D O O M G R
4 - D1+ Data channel j
MA F
H
U
5 - Shield Gnd
O O A
2.3.1 Side Connections
M R R
j
D
6 - D1- Data channel
O O M R
1 - USB2, -3
R U A G F O M 7 - D0+ Data channel j
G O O
8 - Shield Gnd H
R R U A F O M D R 9 - D0- Data channel j
G M O O M
1 2 3 4
j
O
10 - CLK+ Data channel
A F D U G
10000_022_090121.eps
O
H
A
11 - Shield Gnd
O R
090121
M D M R
j
M
12 - CLK- Data channel
O O M R U
Figure 2-2 USB (type A)
A G F O O
13 - Easylink Control channel/CEC jk
U G R D O
14 - n.c.
R R
1
A
- +5V
F O M k
R 15 - DDC_SCL DDC clock j
A G F O M
2 - Data (-)
D O O U M jk
G
16 - DDC_SDA DDC data jk
H
A
jk
R
17 - Ground Gnd
R
3 - Data (+)
M D O 4
O
- Ground
M
Gnd
G O M
H 18 - +5V j
O O M R R U A F O O
19 - HPD Hot Plug Detect j
M
H
D
20 - Ground Gnd
U G O
2 - Head phone (Output)
G R R A
Bk - Head phone
F O
32 - 600 ohm / 10 mW
O M
ot
R
A O M D U G
4 - Cinch: S/PDIF - Out
M F O O M
3 - HDMI: Digital Video, Digital Audio - In
G R R M A Bk - Coaxial 0.4 - 0.6VPP / 75 ohm kq
O O D R R U
19
A
1
F O O O
M G O M D
18 2
R R U A F O
10000_017_090121.eps
M R
G M D O
090428
O U G
MA F DO O M R R A
Figure 2-3 HDMI (type A) connector
R R U A G F O M
O U M G O M D O O 2012-Apr-20
R R M A F O O M G R
G O D U A
MA F DO R O
U M
A G R
F O R
O
M O
O U M G O R M D R
R R M A F O O M G
A G F O O D R U A
M D O U M G R O M
O M R R A F D O O
G O M D O U A G
O D R U A F D O O
M G R M R
O O R D M A
F U M O G R
GR R D A O
O FO M M R
R R U D O A G O
G O O M M R
MA R F
R U D O A G
O
A G O F O M M R
M R U O A G O
O G O O R D M R
D M A F U M O G O
M O G R R D A
D A O F O M M R
M M R R U D O A G O
U O G M
OR D EN 4 2.MA L12M1.1L LAROTechnical Specifications
F O and ConnectionsM
U O G R
O
U M O G O O R D M A
R D A F U M O G R
F O M
2.3.2
M
Rear Connections
R R D
12 - USB1
A O
O O M M
5 - RJ45: Ethernet
R U O G
1 2 3 4
F U O G R D A
10000_022_090121.eps
O O
090121
M R O
Figure 2-6 USB (type A)
F U O G O R
O M D R
GR R D A F
k
G
10000_025_090121.eps 1 - +5V
O O M R U A
120320
M
2 - Data (-) jk
R F U O G
Figure 2-4 Ethernet connector
A O R
3
M
- Data (+) jk
R D FO
H
O O
4 - Ground Gnd
A G O FO M M R D

1 - TD+ Transmit signal k
M R
2 - TD-
R U D OTransmit signal
A G O k
M G R
13 - HDMI1: Digital Video, Digital Audio - In - Audio Return
O G U
Channel
M R
j
O O A
3 - RD+ Receive signal
M A
4
F
- CT
U M Centre Tap: DC level fixation
O O R M
19 1
R D G
5 - CT Centre Tap: DC level fixation
R F O
18 2
D O A G
6
O
- RD-
O A
Receive signal
M M
j
D O
10000_017_090121.eps
F
7 - GND Gnd H 090428
M M R
8 - GND
R U O
Gnd
O H
U M G R
G D
DO M A O F O M
6 - Service Connector (UART)
R U G R O R M A j
A F
1 - D2+ Data channel
M
H
O O
1 - Ground Gnd
G R
H
U O M
2 - Shield Gnd
O D
2 - UART_TX Transmit k
OR D A O
j
F
O O R
3 - UART_RX Receive j
M M
j
R G
U M O G O D R U
5
A
- Shield Gnd H
A M R
7 - AV IN (break-out cable):
R D G M
M R U A O
Cinch: Video CVBS - In, Audio - In
FO
j
F
M R O O
jq
M
Ye - Video CVBS 1 VPP / 75 ohm H
U O D
8 - Shield Gnd
G O
Wh - Audio L 0.5 VRMS / 10 kohm jq
R D F
j
O
A O M R
Rd - Audio R 0.5 VRMS / 10 kohm jq
O O D
j
G
10 - CLK+ Data channel
F M
U O M O M R R U 11
A
- Shield Gnd H
R G M
8 - Mini Jack: Audio - In DVI/VGA j
U O
12 - CLK- Data channel
O MD A F
jo
O R R
Bk - Audio 0.5 VRMS / 10 k 13 - Easylink Control channel/CEC jk
F G O M
14
D O- ARC
O
Audio Return Channel j
R U A F
j
O O
2.3.3 Bottom Connections 15 - DDC_SCL DDC clock
G O OR M D U M16
R
- DDC_SDA
G
DDC data jk
O O R
H
F R
17 - Ground Gnd
M A
9 - VGA: Video RGB - In
R D G
j
U O
18 - +5V
G R A M
1 5
R F
j
M
19 - HPD Hot Plug Detect
A
10
O G M O O
6
U O
20 - Ground Gnd H
M R A
11 15
R M F O
10000_002_090121.eps
O D R
O G O D M
090127
G
14 - HDMI2, -3: Digital Video, Digital Audio - In
F DO R U
MA O M R A
Figure 2-5 VGA Connector
U G M
19 1
O M R R A O
18 2
U
1
G
- Video Red
O M
0.7 VPP / 75
F j
O O
10000_017_090121.eps
R R A F D
090428
0.7 VPP / 75 j
O
2 - Video Green
G O
3
M
- Video Blue
D
0.7 VPP / 75
O
j
M G R
MA F
O O U A
4 - n.c.
D
5

- Ground
U M
Gnd
G R O RH
M j
O R
O
H
M R A F
6 - Ground Red Gnd
G O O
2 - Shield Gnd H
U O
H
M D
7 - Ground Green Gnd
R A
j
F
R R
8 - Ground Blue Gnd H
G M O O M
4 - D1+ Data channel j
O G
j
A
9 - +5VDC +5 V
F D U
H
O A
5 - Shield Gnd
O
H
M R R
10 - Ground Sync Gnd
D
j
M M
G O
11 - n.c.
O U
j
R
O M A F O
12 - DDC_SDA DDC data j
G R O
H
U
8 - Shield Gnd
M D
j

13 - H-sync 0-5V
R R A O
R
j
F O O M
14 - V-sync 0-5V
G O M
10 - CLK+ Data channel j
D U G
j
A
15 - DDC_SCL DDC clock
F
H
A
11 - Shield Gnd
M D O O M G R O R 12
M
- CLK- Data channel j
U
10 - CVI (break-out cable):
O O A F
13 - Easylink Control channel/CEC jk
M R R O O
Cinch: Video YPbPr - In, Audio - In
M
14 - n.c.
R U G O D
Wh - Audio - L 0.5 VRMS / 10 k jq j
A F R
15 - DDC_SCL DDC clock
G R O O M
Rd - Audio - R 0.5 VRMS / 10 k jq
G
jk
M D
16 - DDC_SDA DDC data
A O U
0.7 VPP / 75 jq
A
Rd - Video Pr
F R
17 - Ground Gnd H
M O O M R
0.7 VPP / 75 jq
M
Bu - Video Pb
G
j

18 - +5V
O D U O
1 VPP / 75
A
Gn - Video Y jq
F
j
R R O
19 - HPD Hot Plug Detect
O M G O M D
20 - Ground
O Gnd H
R U A F O
11 - Aerial - In
G O R M
- - F-type
D
Coax, 75
O
D
U M G R

MA F DO R O
R U M G R
F O R M A
O M
2012-Apr-20
U G O M A D O O
R R M A F O O M G R
G O D U A
MA F DO R O
U M
A G R
F O R
O
M O
O U M G O R M D R
R R M A F O O M G
A G F O O D R U A
M D O U M G R O M
O M R R A F D O O
G O M D O U A G
O D R U A F D O O
M G R M R
O O R D M A
F U M O G R
GR R D A O
O FO M M R
R R U D O A G O
G O O M M R
MA R F
R U D O A G
O
A G O F O M M R
M R U O A G O
O G O O R D M R
D M A F U M O G O
M O G R R D A
D A O F O M M R
M M R R U D O A G O
U O A G OPrecautions, Notes, O M
M L12M1.1L LAO 3. EN 5 GR
OR D M R F U O
U M O G
and
O Abbreviation R
Abbreviation
O List M
List
D M A
R D A F U O G R
F O M 3. M
Precautions, R
Notes, and
R D A O
U O
Index of this chapter: 3.3.2 Schematic Notes
O F O M M
3.1 Safety Instructions
R R D A G
R U D O
3.2 Warnings
A G O F O M

M
All resistor values are in ohms, and the value multiplier is
U
3.3 Notes
O M O
often used to indicate the decimal point location (e.g. 2K2
F O MInstructions O
3.4 Abbreviation List
G R R D O
indicates 2.2 k).
U O O M R
GR A
Resistor values with no multiplier may be indicated with
O
3.1
O RSafety
D M R F U G
either an E or an R (e.g. 220E or 220R indicates 220 ).
F U M
Safety regulations require the following during a repair:
O G R

M A
All capacitor values are given in micro-farads ( 10-6),
R O
nano-farads (n 10-9), or pico-farads (p 10-12).
A
Connect the set to the Mains/AC Power via an isolation
A G O O R
M
D
transformer (> 800 VA).
M R FO D

O O
Capacitor values may also use the value multiplier as the

F
Replace safety components, indicated by the symbol h, decimal point indication (e.g. 2p2 indicates 2.2 pF).
M R R U D O A G O
only by components identical to the original ones. Any
M

R
An asterisk (*) indicates component usage varies. Refer
G
O G M R U A
other component substitution (other than original type) may to the diversity tables for the correct values.
A O F O M
increase risk of fire or electrical shock hazard.
O R

M
The correct component values are listed on the Philips
M R R U D A G F O O
Spare Parts Web Portal.
O G O
Safety regulations require that after a repair, the set must be
D A O F O M M
returned in its original condition. Pay in particular attention to 3.3.3
D R
Spare Parts

M M R
the following points:
R U O O UM G
DO G D A
Route the wire trees correctly and fix them with the
O O M R R
For the latest spare part overview, consult your Philips Spare
A F G M
mounted cable clamps.
O
Part web portal.
M M R U A F
Check the insulation of the Mains/AC Power lead for
U O G
external damage.
O R M D O O
D A O
3.3.4 BGA (Ball Grid Array) ICs
OR F R
Check the strain relief of the Mains/AC Power cord for
M M R
proper function.
D O O M G
U O G O R U A
Check the electrical DC resistance between the Mains/AC Introduction
R D A M G
Power plug and the secondary side (only for sets that have
U O R M
For more information on how to handle BGA devices, visit this
FO M R A F
URL: http://www.atyourservice-magazine.com. Select
M R O
a Mains/AC Power isolated power supply):
U O M D O
Magazine, then go to Repair downloads. Here you will find
O
1. Unplug the Mains/AC Power cord and connect a wire
R D A G F O
between the two pins of the Mains/AC Power plug.
O M
Information on how to deal with BGA-ICs.
R
O O M M D U G
2. Set the Mains/AC Power switch to the on position
F U O O M
(keep the Mains/AC Power cord unplugged!).
R R A
BGA Temperature Profiles
R U G O M
3. Measure the resistance value between the pins of the For BGA-ICs, you must use the correct temperature-profile.
O O MD R R A F O
Mains/AC Power plug and the metal shielding of the Where applicable and available, this profile is added to the IC
R F U A G O M
tuner or the aerial connection on the set. The reading
F D O
Data Sheet information section in this manual.

O O
should be between 4.5 M and 12 M.
G O OR M D
4. Switch off the set, and remove the wire between the
U M
3.3.5
G R
Lead-free Soldering
F O O M R R A
two pins of the Mains/AC Power plug.
G R D U G
Check the cabinet for defects, to prevent touching of any
R A O M
Due to lead-free technology some rules have to be respected
A M R F
inner parts by the customer.
O G M O O
by the workshop during a repair:
M R R U A F O O O D
Use only lead-free soldering tin. If lead-free solder paste is
M R
3.2 Warnings
O G D
required, please contact the manufacturer of your soldering
FO

All ICs and many other semiconductors are susceptible to
M G
DO U
equipment. In general, use of solder paste within
MA O M
electrostatic discharges (ESD w). Careless handling
U G R R A
workshops should be avoided because paste is not easy to
A O M
during repair can reduce life drastically. Make sure that,
R R
store and to handle.
O U M G M
during repair, you are connected with the same potential as
O F O O
Use only adequate solder tools applicable for lead-free
R R A F D
the mass of the set by a wristband with resistance. Keep soldering tin. The solder tool must be able:
G O M O
components and tools also at this same potential.
D O M R
To reach a solder-tip temperature of at least 400C.
G
MA F U
Be careful during measurements in the high voltage
O O A
To stabilize the adjusted temperature at the solder-tip.
D M R R
section.
M
To exchange solder-tips for different applications.
O O M

R U G
Never replace modules or other components while the unit
R A F O
Adjust your solder tool so that a temperature of around
O O
G
is switched on.
U O
360C - 380C is reached and stabilized at the solder joint.
R R

A F M
When you align the set, use plastic rather than metal tools.
D R
Heating time of the solder-joint should not exceed ~ 4 sec.
G O M O O M G
This will prevent any short circuits and the danger of a Avoid temperatures above 400C, otherwise wear-out of
M A F O
circuit becoming unstable.
O D R R U A
tips will increase drastically and flux-fluid will be destroyed.
D M G M
To avoid wear-out of tips, switch off unused equipment or
O O M
3.3 Notes
R U A F O O
reduce heat.
O
R RU A G O R M D
Mix of lead-free soldering tin/parts with leaded soldering
F R
tin/parts is possible but PHILIPS recommends strongly to
O O M
3.3.1 General
A G F O M D U G
avoid mixed regimes. If this cannot be avoided, carefully
O R R A
clear the solder-joint from old tin and re-solder with new tin.
M O M
Measure the voltages and waveforms with regard to the
O O D U G
chassis (= tuner) ground (H), or hot ground (I), depending
A F O M
M R R O O
3.3.6 Alternative BOM identification

on the tested area of circuitry. The voltages and waveforms
R U A G O M
shown in the diagrams are indicative. Measure them in the
F D R
A G O R M D O O
Service Default Mode with a colour bar signal and stereo
M
It should be noted that on the European Service website,
G
R U A
sound (L: 3 kHz, R: 1 kHz unless stated otherwise) and Alternative BOM is referred to as Design variant.
M F O O M G
picture carrier at 475.25 MHz for PAL, or 61.25 MHz for
R M
O O D R
NTSC (channel 3).
R U A F O O
The third digit in the serial number (example:
O
M M
Where necessary, measure the waveforms and voltages
G O D
AG2B0335000001) indicates the number of the alternative
R R U A F O
with (D) and without (E) aerial signal. Measure the
M R
B.O.M. (Bill Of Materials) that has been used for producing the
G M D O
voltages in the power supply section both in normal
G
specific TV set. In general, it is possible that the same TV
O U
MA A
operation (G) and in stand-by (F). These values are
F DO O M R
model on the market is produced with e.g. two different types

indicated by means of the appropriate symbols.
U G R O M
of displays, coming from two different suppliers. This will then
O M G R O R A F O O
M D
2012-Apr-20
R R U A F O O M R
G O M D U A G
MA F DO R O
U M
A G R
F O R
O
M O
O U M G O R M D R
R R M A F O O M G
A G F O O D R U A
M D O U M G R O M
O M R R A F D O O
G O M D O U A G
O D R U A F D O O
M G R M R
O O R D M A
F U M O G R
GR R D A O
O F O M M R
R R U D O A G O
G O O M M R
MA R F
R U D O A G
O
A G O FO M M R
M R U O A G O
O G O O R D M R
D M A F U M O G O
M O G R R D A
D A O F O M M R
M M R R U D O A G O
U O G M
OR D EN 6 3.MA L12M1.1L LAROPrecautions, Notes,Fand
O Abbreviation List M
U O G R
O
U M O G O O R D M A
R D A F U M O G R
F O M M R R
result in sets which have the same CTN (Commercial Type
D A O
6 = play 16 : 9 format, 12 = play 4 : 3
R U D O A G O O
Number; e.g. 28PW9515/12) but which have a different B.O.M.
F M M
format
R
M U O
number. AARA Automatic Aspect Ratio Adaptation:
O F O M R
By looking at the third digit of the serial number, one can
O G R D A G algorithm that adapts aspect ratio to
R U A O O
identify which B.O.M. is used for the TV set he is working with.
D F M M
remove horizontal black bars; keeps
M U O
If the third digit of the serial number contains the number 1 the original aspect ratio
O F O M R
(example: AG1B033500001), then the TV set has been
O G R D O
ACI

Automatic Channel Installation:
U O O M R
GR A
manufactured according to B.O.M. number 1. If the third digit is algorithm that installs TV channels
O O R D M
a 2 (example: AG2B0335000001), then the set has been
R F U G
directly from a cable network by
F U M
produced according to B.O.M. no. 2. This is important for
O G R M A means of a predefined TXT page
R O
ordering the correct spare parts! ADC Analogue to Digital Converter
G O R D A FO
For the third digit, the numbers 1...9 and the characters A...Z
O M O
AFC
O
Automatic Frequency Control: control
A F M R
can be used, so in total: 9 plus 26= 35 different B.O.M.s can be
U O G O D
signal used to tune to the correct
R
M R M
indicated by the third digit of the serial number. frequency
O G O O R D M RA U
AGC
A GAutomatic Gain Control: algorithm that
A F M R
controls the video input of the feature
M
Identification: The bottom line of a type plate gives a 14-digit
M R R U D O G O
serial number. Digits 1 and 2 refer to the production centre (e.g.
F O
box
O G A O
AM Amplitude Modulation
O O D
SN is Lysomice, RJ is Kobierzyce), digit 3 refers to the B.O.M.
D A F M M
code, digit 4 refers to the Service version change code, digits 5 AP Asia Pacific
M M R U O O
and 6 refer to the production year, and digits 7 and 8 refer to
R U M
AR
G R
Aspect Ratio: 4 by 3 or 16 by 9
DO G D
ASF Auto Screen Fit: algorithm that adapts
O O M R A
production week (in example below it is 2010 week 10 / 2010
A F G
week 17). The 6 last digits contain the serial number.
O R M
aspect ratio to remove horizontal black
M M R U A F
bars without discarding video
U O G O R M D O O
information

OR D A F O R
ATSC Advanced Television Systems
M M R D O O M G
Committee, the digital TV standard in
U O A G O M R R U A
the USA
R D G M
ATV See Auto TV
M R U A O
FO F O
Auto TV A hardware and software control
U M O O R M D O
system that measures picture content,

R D A G F O O M R
and adapts image parameters in a
O O D G
dynamic way
F U OM M O M R R U AV
A
External Audio Video
R U G O M
AVC Audio Video Controller
O O MD R R A F O
AVIP Audio Video Input Processor
F G O M D O
B/G Monochrome TV system. Sound
R U A F O O M
carrier distance is 5.5 MHz
G O OR M D R
BDS Business Display Solutions (iTV)
F O O M R R U BLR
A G Board-Level Repair
G R D R U A G O
BTSC
M
Broadcast Television Standard
M R F
Committee. Multiplex FM stereo sound
A
M R O U A G O M DO O
system, originating from the USA and

R F O O R
used e.g. in LATAM and AP-NTSC
O G FO M D M G
countries
DO
10000_053_110228.eps
R U
MA O M A
110228 B-TXT Blue TeleteXT
R R U A G O R C
M
Centre channel (audio)
O M F
Figure 3-1 Serial number (example)
O
CEC Consumer Electronics Control bus:
R U A G F O M D O
remote control bus on HDMI
G O R
3.3.7
M O
Board Level Repair (BLR) or Component Level Repair
D O M R
connections
G
MA F
CL Constant Level: audio output to
U
(CLR)
D O O M R R M A
connect with an external amplifier
U G O
CLR Component Level Repair
O O R
If a board is defective, consult your repair procedure to decide
M G R A F O O
ComPair Computer aided rePair

if the board has to be exchanged or if it should be repaired on
R U A O M D
CP Connected Planet / Copy Protection
R F
component level.
G O M O O
If your repair procedure says the board should be exchanged
M
CSM
G R
Customer Service Mode
A F D U
CTI Color Transient Improvement:
O A
completely, do not solder on the defective board. Otherwise, it
M D O R R
manipulates steepness of chroma
M M
cannot be returned to the O.E.M. supplier for back charging!
O U G O
transients
O U M G R R A F D O
CVBS
O
Composite Video Blanking and
M
3.3.8 Practical Service Precautions
R R A O
Synchronization
G O M F O O M R
DAC Digital to Analogue Converter
A F D U G
It makes sense to avoid exposure to electrical shock. DBE Dynamic Bass Enhancement: extra
M O O R R A
While some sources are expected to have a possible
M
low frequency amplification
D U G O M
dangerous impact, others of quite high potential are of
O O A F
DCM Data Communication Module. Also
M R R O O
limited current and are sometimes held in less regard.
M
referred to as System Card or
R U G O D
Always respect voltages. While some may not be Smartcard (for iTV).
G O R A F O
dangerous in themselves, they can cause unexpected
M D O M
DDC
G R
See E-DDC
A U
reactions that are best avoided. Before reaching into a
F R A
D/K Monochrome TV system. Sound
M O O M R
powered TV set, it is best to test the high voltage insulation.
G M
O D List R U A O
It is easy to do, and is a good service precaution.
F
DFI Dynamic Frame Insertion
O M G O R M D O
DFU
O
Directions For Use: owner's manual

R U A F O
3.4 Abbreviation DMR Digital Media Reader: card reader
G O R
0/6/12
M D O
SCART switch control signal on A/V
U M DMSD
G RDigital Multi Standard Decoding

MA A
board. 0 = loop through (AUX to TV),
F R
DNM Digital Natural Motion
DO R O
R U M
A G R
F O O
M
O
O M G O D
2012-Apr-20
R R U A F M R
G O M D O O U M G
MA F DO O M R R M A
O M R U A G F O O O
U A G O R M D R
G R O R M F D O O U M G
A F O R R M A
M D O U M G O O O
O U M R R A F D
R R AG F O M O M G R
A G F O M D O R U A
M O O M G R O M O
O D R U A F D O
M G R M R
O O R D M A
F U M O G R
GR R D A O
O FO M M R
R R U D O A G O
G O O M M R
MA R F
R U D O A G
O
A G O F O M M R
M R U O A G O
O G O O R D M R
D M A F U M O G O
M O G R R D A
D A O F O M M R
M M R R U D O A G O
U O AG OPrecautions, Notes, O M
M L12M1.1L LAO 3. EN 7 GR
OR D M R F U O
U M O G O
and
R
Abbreviation
O
List
D M A
R D A F U M O G R
F O M M
DNR
RDigital Noise Reduction: noise
R D A O
The SDI signal is self-synchronizing,
R U D O A G O
reduction feature of the set
F O M M
uses 8 bit or 10 bit data words, and has
R
M U O
DRAM Dynamic RAM a maximum data rate of 270 Mbit/s,
O F O M
DRM
O R
Digital Rights Management
G R D A G
with a minimum bandwidth of 135
R U DSP
D A
Digital Signal Processing
O F O
MHz.
M M
M U O
DST Dealer Service Tool: special remote iTV Institutional TeleVision; TV sets for
O F O M O R
control designed for service
G R O
hotels, hospitals etc.
D
U O O M R
GR A
technicians LS Last Status; The settings last chosen
O O R DTCP
D M
Digital Transmission Content
R F G
by the customer and read and stored
U
F U M
Protection; A protocol for protecting
O G R A
in RAM or in the NVM. They are called
M
R O
digital audio/video content that is at start-up of the set to configure it
G O O R D A
traversing a high speed serial bus,
M FO O O
according to the customer's
A F U M
such as IEEE-1394
O R
G O D
preferences
R
M R M
DVB-C Digital Video Broadcast - Cable LATAM Latin America
O G O
DVB-T
O R D M RA
Digital Video Broadcast - Terrestrial LCD
U G
Liquid Crystal Display
A
A F M R
DVD Digital Versatile Disc LED Light Emitting Diode
M R
DVI(-d)
U O G
Digital Visual Interface (d= digital only)
R D
L/L'
F O M
Monochrome TV system. Sound
O G O
E-DDC
O
Enhanced Display Data Channel
A O O
carrier distance is 6.5 MHz. L' is Band
D
D A F M M
(VESA standard for communication I, L is all bands except for Band I
M M R U O
channel and display). Using E-DDC,
R O
LPL
M R
LG.Philips LCD (supplier)
U G
DO G D
the video source can read the EDID LS Loudspeaker
A O F O M
information form the display.
G R LVDS
O R A
Low Voltage Differential Signalling
M
M M R U A F
EDID Extended Display Identification Data Mbps Mega bits per second
U O G O R
(VESA standard)
M
M/N
O O
D
OR D A F O R
EEPROM Electrically Erasable and carrier distance is 4.5 MHz
M M R D O
Programmable Read Only Memory
O
MHEG
M G
Part of a set of international standards
U O
EMI
A G O
Electro Magnetic Interference
M R U A
related to the presentation of
R
R D G M
EPG Electronic Program Guide multimedia information, standardised
M R U A O
FO F O
EPLD Erasable Programmable Logic Device by the Multimedia and Hypermedia
U M O
EU Europe
O R M D O
Experts Group. It is commonly used as

R D
EXT
A G F O
EXTernal (source), entering the set by
O R
a language to describe interactive
M
O O D G
SCART or by cinches (jacks) television services
F M
U O MFDS
O
Full Dual Screen (same as FDW)
M R
MIPS
R U A
Microprocessor without Interlocked
R U G O M
FDW Full Dual Window (same as FDS) Pipeline-Stages; A RISC-based
O O MD R R A F O
FLASH FLASH memory microprocessor
F G O M D O
FM Field Memory or Frequency MOP Matrix Output Processor
R U A F
Modulation
O O
MOSFET

Metal Oxide Silicon Field Effect
M
G O OR M D R
FPGA Field-Programmable Gate Array Transistor, switching device
F O
FTV
O
Flat TeleVision
M R
MPEG
R U G
Motion Pictures Experts Group
A
G R D
Gb/s
R U
Giga bits per second
A G
MPIF
O
Multi Platform InterFace
M
M R F
G-TXT Green TeleteXT MUTE MUTE Line
A
M R O U
H
A G O
H_sync to the module
M MTV
O O
Mainstream TV: TV-mode with
D
R F O O R
HD High Definition Consumer TV features enabled (iTV)
O G FO M
HDD Hard Disk Drive
D
NC
M
Not Connected
G
MA DO O M R U A
HDCP High-bandwidth Digital Content NICAM Near Instantaneous Compounded
R U
Protection: A key encoded into the
R A G O R M
Audio Multiplexing. This is a digital
O M F O
HDMI/DVI signal that prevents video sound system, mainly used in Europe.
R U A G O M
data piracy. If a source is HDCP coded
F
NTC
D O
Negative Temperature Coefficient,
G O R M D O
and connected via HDMI/DVI without
O M R
non-linear resistor
G
MA F
the proper HDCP decoding, the NTSC National Television Standard
D O O M R
picture is put into a snow vision mode
R U A
Committee. Color system mainly used
U G O M
or changed to a low resolution. For in North America and Japan. Color
O O M G R R A
normal content distribution the source
F O O
carrier NTSC M/N= 3.579545 MHz,
R U A O M D
and the display device must be NTSC 4.43= 4.433619 MHz (this is a
G O R M F O
enabled for HDCP software key
O M R
VCR norm, it is not transmitted off-air)
G
A F D U
decoding. NVM Non-Volatile Memory: IC containing
M D O HDMI
O
High Definition Multimedia Interface
M R R A
TV related data such as alignments
M
O U G O
HP HeadPhone O/C Open Circuit
O U M I
G R R
A OSD
F O
On Screen Display
D O
R R A O
F M OAD

Over the Air Download. Method of
R
M O O M
I 2C
G O
Inter IC bus software upgrade via RF transmission.
A F O
I2D Inter IC Data bus
D R R U G
Upgrade software is broadcasted in
A
M O M
I2S Inter IC Sound bus TS with TV channels.
O O D IF
U
Intermediate Frequency
A G OTC
F O M
On screen display Teletext and
M R R M O O
IR Infra Red Control; also called Artistic (SAA5800)
R R U
IRQ
A G F O
Interrupt Request
O O
P50
D
Project 50: communication protocol
R
G M G
ITU-656 The ITU Radio communication Sector between TV and peripherals
A F O M D
(ITU-R) is a standards body
R PAL
U A
Phase Alternating Line. Color system
M DO O M
subcommittee of the International
U G O R M
mainly used in West Europe (colour
O A F
Telecommunication Union relating to carrier = 4.433619 MHz) and South
O M G R R M
radio communication. ITU-656 (a.k.a.
O D O O
America (colour carrier

R U A F O
SDI), is a digitized video format used PAL M = 3.575612 MHz and
G O R M D
for broadcast grade video.
O M G R
PAL N = 3.582056 MHz)
U

MA F R A
Uncompressed digital component or PCB Printed Circuit Board (same as PWB)
DO O U M R O M
digital composite signals can be used. PCM Pulse Code Modulation
O M R R A G F O O
G O M D
2012-Apr-20
R R U A F O O M R
G O M D U A G
MA F DO R O
U M
A G R
F O R
O
M O
O U M G O R M D R
R R M A F O O M G
A G F O O D R U A
M D O U M G R O M
O M R R A F D O O
G O M D O U A G
O D R U A F D O O
M G R M R
O O R D M A
F U M O G R
GR R D A O
O FO M M R
R R U D O A G O
G O O M M R
MA R F
R U D O A G
O
A G O F O M M R
M R U O A G O
O G O O R D M R
D M A F U M O G O
M O G R R D A
D A O F O M M R
M M R R U D O A G O
U O G M
OR D EN 8 3.MA L12M1.1L LAROPrecautions, Notes,Fand
O Abbreviation List M
U O G R
O
U M O G O O R D M A
R D A F U M O G R
F O M
PDP
M R
Plasma Display Panel
R
SWAN
D A O
Spatial temporal Weighted Averaging
R U D O
PFC
A G O
Power Factor Corrector (or Pre-
F O M M
Noise reduction
R
M U O
conditioner) SXGA 1280 1024
O F O M
PIP
O R
Picture In Picture
G
TFT
R D A G
Thin Film Transistor
R U PLL
D A O
Phase Locked Loop. Used for e.g.

THD
F O M M
Total Harmonic Distortion
M U O
FST tuning systems. The customer TMDS Transmission Minimized Differential
O F O M R
can give directly the desired frequency
O G R O
Signalling
D
U O O M R
GR A
POD Point Of Deployment: a removable TS Transport Stream
O O R D M
CAM module, implementing the CA
R
TXT
F TeleteXT
U G
F U M
system for a host (e.g. a TV-set)
O G
TXT-DW
A
Dual Window with TeleteXT
R M
R O
POR Power On Reset, signal to reset the uP UI User Interface
G O R
PSDL
O D A
Power Supply for Direct view LED
M FO
uP
O
Microprocessor
O
A F M
backlight with 2D-dimming
U O R
G O
UXGA
D
1600 1200 (4:3)
R
M R M
PSL Power Supply with integrated LED V V-sync to the module
O G O O R drivers
D M RA VESA
U G
Video Electronics Standards
A
A F M R
PSLS Power Supply with integrated LED Association
M R U O
drivers with added Scanning
R D G
VGA
F O M
640 480 (4:3)
O G O
functionality
O A
VL
O O
Variable Level out: processed audio
D
D A F M M
PTC Positive Temperature Coefficient, output toward external amplifier
M M R U O
non-linear resistor
R
VSB
O M R
Vestigial Side Band; modulation
U G
DO G D
PWB Printed Wiring Board (same as PCB) method
A
PWM
O F O M
Pulse Width Modulation
G R WYSIWYR
R A
What You See Is What You Record:
O M
M M R U A F
QRC Quasi Resonant Converter record selection that follows main
U O G
QTNR
O R M
Quality Temporal Noise Reduction
O
picture and sound
D O
OR D A F O R
QVCP Quality Video Composition Processor WXGA 1280 768 (15:9)
M M
RAM
R
Random Access Memory
D O O
XTAL
M
Quartz crystal
G
U O
RGB
A G O
Red, Green, and Blue. The primary
M R
XGA
U A
1024 768 (4:3)
R
R D G M
color signals for TV. By mixing levels Y Luminance signal
M R U A O
FO F O
of R, G, and B, all colors (Y/C) are Y/C Luminance (Y) and Chrominance (C)
U M O O
reproduced.
R M
signal
D O
R D
RC
A G F
Remote Control
O
YPbPr
O R
Component video. Luminance and
M
O O D G
RC5 / RC6 Signal protocol from the remote scaled color difference signals (B-Y
F M
U O M O
control receiver
M R R U
and R-Y)
A
R U G O M
RESET RESET signal YUV Component video
O O MD R R A F O
ROM Read Only Memory
F G O M D O
RSDS Reduced Swing Differential Signalling
R U A F
data interface
O O M
G O OR M D R
R-TXT Red TeleteXT
F O
SAM
O
Service Alignment Mode
M R R U A G
G R D
S/C
R
Short Circuit
U A G O M
M R F
SCART Syndicat des Constructeurs
A
M R O U A G O
d'Appareils Radiorcepteurs et
M DO O
R F O O R
Tlviseurs
O G FO
SCL
M Serial Clock I2C
D M G
MA DO O M R U A
SCL-F CLock Signal on Fast I2C bus
SD
R U
Standard Definition
R A G O R M
O M
Serial Data I2C
F
SDA
R U
SDA-F
A G O
DAta Signal on Fast I2C bus
F M D O O
G O R SDI
M D O
Serial Digital Interface, see ITU-656
O M R
G
MA F
SDRAM Synchronous DRAM
D O
SECAM
O M
SEequence Couleur Avec Mmoire.
R R U A
U G O M
Colour system mainly used in France
O O M G R R
and East Europe. Colour
A F O O
R U A O M D
carriers = 4.406250 MHz and
G O R M F
4.250000 MHz
O O M G R
A F D U
SIF Sound Intermediate Frequency
M D O
SMPS
O
Switched Mode Power Supply
M R R M A
O U G O
SoC System on Chip
O U M SOG
G R R
Sync On Green
A F D O O
R R
SOPS
A O M
Self Oscillating Power Supply
F R
G O M O O M
SPI Serial Peripheral Interface bus; a 4-
A F O D
wire synchronous serial data link
R R U A G
M O M
standard
O O D S/PDIF
U
Sony Philips Digital InterFace
A G F O M
M R R M O O
SRAM Static RAM
R R U
SRP
A G O
Service Reference Protocol
F O O D R
G M G
SSB Small Signal Board
A F O M
SSC
D
Spread Spectrum Clocking, used to
R U A
M DO O M
reduce the effects of EMI
U G O R M
O A F
STB Set Top Box
O M
STBY
G R STand-BY
O R M D O O
R U A F O
SVGA 800 600 (4:3)
G O R M
SVHS Super Video Home System
D O U M G R

MA F R A
SW Software
DO R O
R U M
A G R
F O O
M
O
O M G O D
2012-Apr-20
R R U A F M R
G O M D O O U M G
MA F DO O M R R M A
O M R U A G F O O O
U A G O R M D R
A F O R R M A
M D O U M G O O O
O U M R R A F D
R R A G F O M O M G R
A G F O M D O R U A
M O O M G R O M O
O D R U A F D O
M G R M R
O O R D M A
F U M O G R
GR R D A O
O FO M M R
R R U D O A G O
G O O M M R
MA R F
R U D O A G
O
A G O F O M M R
M R U O A G O
O G O O R D M R
D M A F U M O G O
M O G R R D A
D A O F O M M R
M M R R U D O A G O
U O A G O M
O InstructionsM L12M1.1L LAO 4. EN 9 GR
OR D M R F U O
U M O G O
Mechanical
O R D M A
R D A F U M O G R
F O M 4. M
Mechanical R
Instructions
R D A O
U O
Index of this chapter:
O F O M M
4.1 Cable Dressing
R R
Notes:
D A G
R U D O
4.2 Service Positions
A G O F O
Figures below can deviate slightly from the actual situation,
M M
U
4.3 Assy/Panel Removal due to the different set executions.
O F O MDressing O
4.4 Set Re-Assembly
M R R D O O
U G O O M R
GR R D M A F G
4.1 Cable
O F O M O G R R U A
R R U D A O
FO M
A G O O M M R D O O
M R F U O A G O M R
M A F U M O O R M
O G R R D A G F O O
D A O FO M M D R
M M R R U O O UM G
M M R F U A G F O M
U O G O R M D O O
U M O R
G O D R U A G
R D A U M G O R M
FO M M R R M A F O O
R U D O G F O O D R
O O M M A D O U M G
F U O O M R R A
O R
O MD R R U A G F O M
F G O M D O O
R U A F O O M
G
O OR O
M
O D R U G R
R F D U M G O R M A
A G O M G R R M A F O O
M R U A O
19300_047_120417.eps
R F O O D
120417
O G O M D M G R
F DO U
Figure 4-1 Cable dressing 32" 5000 series
MA O U M G R R A
O M R R A F O M
R U A G F O M DO O
G O R M D O O M R
G
MA F
D O
R O
U M G R
O R U
M A
O O M G O R A F O O
R R U A F M D R
M D O O M R R M A
O O M R U A G F O O
R U A G O R M D O
G O R M F O O M R
A F O D R R U A G
M D O U M G O M
O O M R R M A F O O
A G O M D U M G
M F O O M G R R M A
U M G O M D
O U
MA F DO R O
R U M G R
F O R M A
O U M G O M A D O O 2012-Apr-20
R R M A F O O M G R
G O D U A
MA F DO R O
U M
A G R
F O R
O
M O
O U M G O R M D R
R R M A F O O M G
A G F O O D R U A
M D O U M G R O M
O M R R A F D O O
G O M D O U A G
O D R U A F D O O
M G R M R
O O R D M A
F U M O G R
GR R D A O
O FO M M R
R R U D O A G O
G O O M M R
MA R F
R U D O A G
O
A G O F O M M R
M R U O A G O
O G O O R D M R
D M A F U M O G O
M O G R R D A
D A O F O M M R
M M R R U D O A G O
U O G M
OR D EN 10 4.MA L12M1.1L LAROMechanical Instructions
F O
U M O G R
O
U M O G O O R D M A
R D A F U M O G R
F O M M R R D A O
O O M M R U O G
F U O G O O R D A
F U M O G R R D O
O FO M M R R U A
R U O A G O M
A G O O R
M
D M R FO D O O
M R F U O A G O M R
M A F U M O O R M
O G R R D A G F O O
D A O FO M M D R
M M R R U O O U M G
M M R F U A G F O M
U O G O R M D O O
U M O R
G O D R U A G
R D A U M G O R M
R U D O G F O O D R
O O M M A D O U M G
F U O O M R R A
O R
19300_048_120417.eps
O
120417
R F U A G F O M
D O
G O OR M D O O M R
F O O M R R U A G
G R D R U A G O M
A O U M G O R M F O O
M R R M A F O O D R
O G FO D M G
MA DO R O U M
A G R
O R U
M A
O U M G O R M F O O
R R A F O D R
G O M D O M G
MA F
D O
R O
U M G R
O R U
M A
O O M G O R A F O O
R R U A F M D R
M D O O M R R M A
O O M R U A G F O O
R U A G O R M D O
G O R M F O O M R
A F O D R R U A G
M D O U M G O M
O O M R R M A F O O
A G O M D U M G
M F O O M G R R M A
O O D R R U A F O 19300_049_120417.eps
O O
M M
120417
R U A G F O O D R
M
G O R M D O U G
MA F DO R O
R U M G R
F O R M A
O M
2012-Apr-20
U G O M A D O O
R R M A F O O M G R
G O D U A
MA F DO R O
U M
A G R
F O R
O
M O
O U M G O R M D R
R R M A F O O M G
A G F O O D R U A
M D O U M G R O M
O M R R A F D O O
G O M D O U A G
O D R U A F D O O
M G R M R
O O R D M A
F U M O G R
GR R D A O
O FO M M R
R R U D O A G O
G O O M M R
MA R F
R U D O A G
O
A G O F O M M R
M R U O A G O
O G O O R D M R
D M A F U M O G O
M O G R R D A
D A O F O M M R
M M R R U D O A G O
U O AG O M
OR D M R F U O
U M O G O
Mechanical
O R D M A
R D A F U M O G R
F O M M R R D A O
O O M M R U O G
F U O G O O R D A
F U M O G R R D O
O FO M M R R U A
R U O A G O M
A G O O R
M
D M R FO D O O
M R F U O A G O M R
M A F U M O O R M
O G R R D A G F O O
D A O FO M M D R
M M R R U O O UM G
M M R F U A G F O M
U O G O R M D O O
U M O R
G O D R U A G
R D A U M G O R M
R U D O G F O O D R
19300_050_120417.eps
O O A D O M
120417
F M
U O M O M R R U
A G
O R
F G O M D O O
R U A F O O M
G
O OR O
M
O D R U G R
R F D U M G O R M A
M R R U A FO O O D
O G O M D M G R
F DO R U
MA O M R O
R U M
A G O R M A
U A G F O M F DO O
G R O R M D O O M R
G
MA F
D O
R O
U M G R
O R U
M A
O O M G O R A F O O
R R U A F M D R
M D O O M R R M A
O O M R U A G F O O
R U A G O R M D O
G O R M F O O M R
A F O D R R U A G
M D O U M G O M
O O M R R M A F O O
A G O M D U M G
F R A
19300_051_120418.eps
M O O M R
120418
O D U A G F O M
O R R O
U M G O M D O
O U
MA F DO R O
R U M G R
F O R M A
O U M G O M A D O O
2012-Apr-20
R R M A F O O M G R
G O D U A
MA F DO R O
U M
A G R
F O R
O
M O
O U M G O R M D R
R R M A F O O M G
A G F O O D R U A
M D O U M G R O M
O M R R A F D O O
G O M D O U A G
O D R U A F D O O
M G R M R
O O R D M A
F U M O G R
GR R D A O
O FO M M R
R R U D O A G O
G O O M M R
MA R F
R U D O A G
O
A G O F O M M R
M R U O A G O
O G O O R D M R
D M A F U M O G O
M O G R R D A
D A O F O M M R
M M R R U D O A G O
U O G M
F O
U M O G R
O
U M O G O O R D M A
R D A F U M O G R
F O M M R R D A O
O O M M R U O G
F U O G O O R D A
F U M O G R R D O
O FO M M R R U A
R U O A G O M
A G O O R
M
D M R FO D O O
M R F U O A G O M R
M A F U M O O R M
O G R R D A G F O O
D A O FO M M D R
M M R R U O O U M G
M M R F U A G F O M
U O G O R M D O O
U M O R
G O D R U A G
R D A U M G O R M
R U D O G F O O D R
O O M M A D O U M G
F U O O M R R A
R U G O M
19300_052_120418.eps
O O MD R R A F
120418
F G O M
D O O
R U A F O O M
G
O OR O
M
O D R U G R
R F D U M G O R M A
M R R U A FO O O D
O G O M D M G R
F DO R U
MA O M R O
R U M
A G O R M A
U A G F O M F D O O
G R O R M D O O M R
G
MA F
D O
R O
U M G R
O R U
M A
O O M G O R A F O O
R R U A F M D R
M D O O M R R M A
O O M R U A G F O O
R U A G O R M D O
G O R M F O O M R
A F O D R R U A G
M D O U M G O M
O O M R R M A F O O
A G O M D U M G
M F O O M G R R M A
U M G O M D
O U
MA F DO R O
R U M G R
F O R M A
O M
2012-Apr-20
U G O M A D O O
R R M A F O O M G R
G O D U A
MA F DO R O
U M
A G R
F O R
O
M O
O U M G O R M D R
R R M A F O O M G
A G F O O D R U A
M D O U M G R O M
O M R R A F D O O
G O M D O U A G
O D R U A F D O O
M G R M R
O O R D M A
F U M O G R
GR R D A O
O FO M M R
R R U D O A G O
G O O M M R
MA R F
R U D O A G
O
A G O F O M M R
M R U O A G O
O G O O R D M R
D M A F U M O G O
M O G R R D A
D A O F O M M R
M M R R U D O A G O
U O A G O M
OR D M R F U O
U M O G O
Mechanical
O R D M A
R D A F U M O G R
F O M M
4.2 Service Positions
R R D A O
R U D O A G O F O M
For easy servicing of a TV set, the set should be put face down
M R
M U O
on a soft flat surface, foam buffers or other specific workshop
O F O M R R
tools. Ensure that a stable situation is created to perform
O G D A G
R U A O O
measurements and alignments. When using foam bars take
D F M M
M U O
care that these always support the cabinet and never only the
O F O M R
display. Caution: Failure to follow these guidelines can
O G R D O
U O O M R
GR A
seriously damage the display!
O O R D M
Ensure that ESD safe measures are taken.
R F U G
F U M O G R M A
G R R
4.3 Assy/Panel Removal
D A O
FO O O
A O F O M M R D
U O G O R
4.3.1 Rear Cover
M R R D A U M G
O A G O O M M R
Warning: Disconnect the mains power cord before removing
F R A
M R the rear cover.
U O G O M
R D A F O
Attention: All sets are equipped with a hatch to disconnect the
D O A G O O M M
keyboard control panel. Ambilight sets are in addition equipped
D O
M M R F U O
with a hatch to disconnect the Ambilight units.
O M R
R U G
These hatches are indicated on the rear cover with
DO A G O
SERVICE h.
O M D R R A
M M F G
It is mandatory to open the hatches and disconnect the
R U A F O M
4
O O
cables prior to removal of the rear cover! 3
U D O A G O R M
See Figure 4-7 to Figure 4-11 for details.
O D
OR F O O R
4
M M
1. For sets equipped with Ambilight: open the hatch that
U M O R D
covers the Ambilight connector and unplug the connector
G O R U A G
A M R
[1].
R D M R U A G O
2. Remove the hatch that covers the keyboard control panel
M 4
FO M R M F O O
connector [3].
R U D O G F O
3. For sets equipped with Ambilight: remove the stand and
O D 3
R 3
A O M
swivel block [4].
O F O M M D
4. Unplug the keyboard control panel connector [5].
R U A G
R U O O U M G O R
5. Remove remaining fixation screws [metric, 6, and plastite,
M
19300_054_120418.eps
O MD A F
7] that secure the rear cover.
O R R
120418
F M O
6. Lift the rear cover from the TV. Make sure that wires and
R U A G F O
flat foils are not damaged while lifting the rear cover from
D O
Figure 4-8 Rear cover removal -all models -2-
G O OR M
the set.
D O O M R
F O O M R R U A G
G R D R U A G O M
M R R M A F O O D R
O G FO D
1
M G
MA DO R O U M
A G R
O R U
M A
O U M G O R M F O O
R R A F O D R
G O M D O M G
MA F
D O
R O
U M G R
O R U
M A
O O M G O R A F O O
R R U A F M D R
M D O O M R R
19300_053_120418.eps
M A
O U G O
120418
O U M G R R A F D O O
M
G R O R M A F O O O M R
A F O D R R U A G
M D O U M G O M
O O M R R M A F O O
A G O M D U M G
M F O O M G R R M A
U M G O M D
O U
MA F DO R O
R U M G R
F O R M A
R R M A F O O M G R
G O D U A
MA F DO R O
U M
A G R
F O R
O
M O
O U M G O R M D R
R R M A F O O M G
A G F O O D R U A
M D O U M G R O M
O M R R A F D O O
G O M D O U A G
O D R U A F D O O
M G R M R
O O R D M A
F U M O G R
GR R D A O
O FO M M R
R R U D O A G O
G O O M M R
MA R F
R U D O A G
O
A G O F O M M R
M R U O A G O
O G O O R D M R
D M A F U M O G O
M O G R R D A
D A O F O M M R
M M R R U D O A G O
U O G M
F O
U M O G R
O
U M O G O O R D M A
R D A F U M O G R
F O M M R R D A O
O O M M R U O G
F U O G O O R D A
F U M O G R R D O
O FO M M R R U A
6
R U O A G O M
A G O O R 6
M
D M R FO D O O
M R F U O A G O M R 6 6
M A F U M O O R M
R G
7
O G O O R D A F DO O
D A M M
6
M M R F U O O M R 6
R G
5
U
6
M M R F U A G F O M
U O G O R M D O O
U M O R
G O D R U A G 7
R
7 7
M
7
R D A
M R U A G O M
FO U M O O R M F D O O
19300_055_120418.eps
D G
120418
O O R A F D O O M G R
M M U
F U O O M R R A
R
O MD U G O M
4.3.2 Small Signal Board (SSB) - LVDS connector
R U A F D
ATTENTION!
O O M
G O OR M R
The LVDS connector(s) require(s) a special procedure for

disconnecting.
O O D R U G
R F M G R A
Refer to Figure 4-10 to Figure 4-12 for clarification.
G D R U
1. Press the catches [1] simultaneously.
A F O M
A O U M G R M
2. Slide the LVDS cable sidewards carefully [2].
O O O
M R A F D
Failure to pressing the catches leads to a damaged LVDS
O G O R M
cable [3]!
D O O M R
F G
DO U
Any LVDS cable that is damaged at the notch area must be
MA O M G R
replaced with a new one to avoid future unnecessary
U R A
O M R
repair actions.
R A F O M 19054_001_111010.eps
U G O M O O
111010
R R A F O D R
G O M O M
Figure 4-11 Unlocking LVDS connector
D G
MA F O O M U A
1
D R U G R O R M
O O M G O R A F O O
U
3
R R A F M D R
M O2 O R R A
LVDS CABLE
O D R U M G O M
O U M G R M A F D O O
A O
LVDS CABLE
G R O R M 1 F O O M R
A F O D R R U A G
M D O U M G O M
O O R A F O O
19220_067_120229.eps
M R M
120229
G M
Figure 4-10 LVDS connector - correct handling
A F O M D R U A G 19220_068_120229.eps
M O O M G R M
120229
M M
Figure 4-12 LVDS cable - damaged notch area [3]
R U A G F O O D R
G O R M D O U M G
MA F DO R O
R U M G R
F O R M A
O M
2012-Apr-20
U G O M A D O O
R R M A F O O M G R
G O D U A
MA F DO R O
U M
A G R
F O R
O
M O
O U M G O R M D R
R R M A F O O M G
A G F O O D R U A
M D O U M G R O M
O M R R A F D O O
G O M D O U A G
O D R U A F D O O
M G R M R
O O R D M A
F U M O G R
GR R D A O
O FO M M R
R R U D O A G O
G O O M M R
MA R F
R U D O A G
O
A G O F O M M R
M R U O A G O
O G O O R D M R
D M A F U M O G O
M O G R R D A
D A O F O M M R
M M R R U D O A G O
U O A G O M
OR D M R F U O
U M O G O
Mechanical
O R D M A
R D A F U M O G R
F O M M
4.4 Set Re-Assembly
R R D A O
O O M
4.4.1
M
Re-mounting of Small Signal Board (SSB)
R U O G
F U O G O O R D A
R D A F M M
Refer to Figure 4-13 and Figure 4-14 for details.
O O M R U O O
1. Attach the SSB back to the panel with mounting three
F U M O G
screws [1] as indicated on the figure.
O R
O M D R
GR R D A F
2. Slide the side I/O bracket [2] into its position.
O O M R
3. Slide the bottom I/O bracket [3] into its position.
M U A G
F U O G R M
4. Mount the three remaining screws [4].
G R R D A O
FO
5. Before closing the connector, slide the flat foil in its position
O O
O O M R
[5].
M A F U M O G O D R
O G R R 1
D A U M G
A O F O M M R R M A
M R R U D O G F O O
D O A G O O M M A D O
M M R F U O O M R
G R D U G
DO A
1
O O M R
1
3
A F G O R M
M M R R U A F O O
U D O A G O O M D
OR M O
M
G OR F D O
R O
U M
A G R
R U D A M G R M
M R U A O
FO U M O G O R M F D O O
F M M U G
19300_071_120419.eps
U O O M R R A
120419
O R
O MD R R U A G
Figure 4-13 Re-mounting of SSB -1-
F O M
F G O M D O O
R U A F O O M
G
O OR O
M
O D R U G R
R F D U M G 4
O R M A
M R R U A FO O O D
O G O M D M G R
F DO R U
MA O M R O
R U M
A G O R M A
G M F O O
2
R R U A F O O D
G O M D O M G R
MA F
D O O M R R U A
5
O O M R R U
3
A G F O M
G O O
4
R R U A F O M 4
D R
M D O O M R R
19300_072_120419.eps
M A
O U G O
120419
O U M G R R A F D O O
R R A O M
Figure 4-14 Re-mounting of SSB -2-
F R
O O M R R U A F O O
R U A G F O M D R
A G O R M D O O M G
M F O O M R R U A
O D U A G F O M
O M G R O R M D O O
R R U A F O O M R
G O M D U G
MA F DO R O
R U M G R
F O R M A
O U M G O M A D O O
2012-Apr-20
R R M A F O O M G R
G O D U A
MA F DO R O
U M
A G R
F O R
O
M O
O U M G O R M D R
R R M A F O O M G
A G F O O D R U A
M D O U M G R O M
O M R R A F D O O
G O M D O U A G
O D R U A F D O O
M G R M R
O O R D M A
F U M O G R
GR R D A O
O FO M M R
R R U D O A G O
G O O M M R
MA R F
R U D O A G
O
A G O F O M M R
M R U O A G O
O G O O R D M R
D M A F U M O G O
M O G R R D A
D A O F O M M R
M M R R U D O A G O
U O G M
F O
U M O G R
O
U M O G O O R D M A
R D A F U M O G R
F O M
4.4.2
M R
Cable dressing & taping
R D A O
O O M M U
Refer to Figure 4-15 correct positioning of speaker connectors
R O G
F G R D A
in the set (ridges on top side) - to avoid unwanted
R U D O A O
disconnection when mounting the back cover.
F O M M
O O M U O
Refer to Figure 4-16 to Figure 4-21 for cable dressing and
F M
taping details.
U O G R R D O
O FO M M R R U A
R U O A G O M
R D FO
19300_056_120418.eps
G O O
120418
A O FO M M R D
M U O G O R
Figure 4-15 Speaker connector orientation - ridges on top side
O G R R D A UM G
A O F O M M R R M A
M R R U D O G F O O
M M R F U O O M R
G R D U G
DO M A
R O F O M
U G R O R M A
U M O G R M A F O O
D A O O D
OR M O
M R
G O
F D O
R O
U M
A G R
R U D A M G R M
M R U A O
F M
U O M O M R R U A G
O R
F G O M D O O
R U A F O O M
G
O OR O
M
O D R U G R
R F D U M G O R M A
M R R U A FO O O D
O G O M D M G R
F DO R U
MA O M R O
R U M
A G O R M A
U A G F O M F D O O 19300_057_120418.eps
R R O
120418
G O M D O M G R
MA F U
Figure 4-16 Cable dressing back cover 32PFL5007G (keyboard control panel)
D O O M R R M A
O O M R R U A G F O O O
R U AG F O M D
G O R M O O M G R
M A F O O D R R U A
O D R U M G O M
R R A F O O O M R
G O M D U G
19300_058_120418.eps
A F R A
120418
M D O O M G O R M
O O U A F
Figure 4-17 Cable dressing back cover 32PFL5007G (keyboard
M R R M O O
control panel - detail)
A G O M D U M G
M F O O M G R R M A
U M G O M D
O U
MA F DO R O
R U M G R
F O R M A
O M
2012-Apr-20
U G O M A D O O
R R M A F O O M G R
G O D U A
MA F DO R O
U M
A G R
F O R
O
M O
O U M G O R M D R
R R M A F O O M G
A G F O O D R U A
M D O U M G R O M
O M R R A F D O O
G O M D O U A G
O D R U A F D O O
M G R M R
O O R D M A
F U M O G R
GR R D A O
O FO M M R
R R U D O A G O
G O O M M R
MA R F
R U D O A G
O
A G O F O M M R
M R U O A G O
O G O O R D M R
D M A F U M O G O
M O G R R D A
D A O F O M M R
M M R R U D O A G O
U O AG O M
OR D M R F U O
U M O G O
Mechanical
O R D M A
R D A F U M O G R
F O M M R R D A O
O O M M R U O G
F U O G O O R D A
F U M O G R R D O
O FO M M R R U A
R U O A G O M
A G O O R
M
D M R FO D O O
M R F U O A G O M R
M A F U M O O R M
O G R R D A G F O O
D A O FO M M D R
M M R R U O O UM G
M M R F U A G F O M
U O G O R M D O O
U M O R
G O D R U A G
R D A U M G O R M
R U D O G F O O D R
O O M M A D O U M G
19300_059_120418.eps
F
120418
R U O O U M G R O R M A
O MD
Figure 4-18 Cable dressing back cover 42PFL5007G & ...6007G (keyboard control panel)
R U A F O O D
G O OR M D U M G R
R F D O O M G R R A
G M R R U A F O M
A
M R O U A G O M D O O
O G O R M F D O O M R
F G
MA DO R O U M
A G R
O R U
M A
O U M G O R M F O O
R R A F O D R
G O M D O M G
MA F O O M R R U A
19300_060_120418.eps
D U M
120418
O O M G R R A G F O O O
O
Figure 4-19 Cable dressing back cover 42PFL5007G & ...6007G
R R U A F M
(keyboard control panel - detail)
D R
M D O O M R R M A
O O M R U A G F O O
R U A G O R M D O
G O R M F O O M R
A F O D R R U A G
M D O U M G O M
O O M R R M A F O O
A G O M D U M G
M F O O M G R R M A
U M G O M D
O U
MA F DO R O
R U M G R
F O R M A
R R M A F O O M G R
G O D U A
MA F DO R O
U M
A G R
F O R
O
M O
O U M G O R M D R
R R M A F O O M G
A G F O O D R U A
M D O U M G R O M
O M R R A F D O O
G O M D O U A G
O D R U A F D O O
M G R M R
O O R D M A
F U M O G R
GR R D A O
O FO M M R
R R U D O A G O
G O O M M R
MA R F
R U D O A G
O
A G O F O M M R
M R U O A G O
O G O O R D M R
D M A F U M O G O
M O G R R D A
D A O F O M M R
M M R R U D O A G O
U O G M
F O
U M O G R
O
U M O G O O R D M A
R D A F U M O G R
F O M M R R D A O
O O M M R U O G
F U O G O O R D A
F U M O G R R D O
O FO M M R R U A
R U O A G O M
A G O O R
M
D M R FO D O O
M R F U O A G O M R
M A F U M O O R M
O G R R D A G F O O
D A O FO M M D R
M M R R U O O U M G
M M R F U A G F O M
U O G O R M D O O
U M O R
G O D R U A G
R D A U M G O R M
R U D O G F O O D R
O O M M A D O U M G
F U O O M R R A
O R
F G O M D O O
R U A F O O M
G O OR M D R
19300_061_120418.eps
U G
120418
R F D O O M G R R A
U O
Figure 4-20 Cable dressing back cover 42PFL7007G (keyboard control panel and Ambilight fixation double-sided tape)
A G O M R R M A F M
M R U A G FO DO O
O G O R M D O O M R
F G
MA DO R O U M
A G R
O R U
M A
O U M G O R M F O O
R R A F O D R
G O M D O M G
MA F
D O
R O
U M G R
O R U
M A
O O M G O R A F O O
R R U A F M D R
M D O O M R R M A
O O M R U A G F O O
R U A G O R M D O
G O R M F O O M R
A F O D R R U A G
M D O U M G O M
O O M R R M A F O O
A G O M D U M G
M F O O M G R R M A
U M G O M D
O U
MA F DO R O
R U M G R
F O R M A
O M
2012-Apr-20
U G O M A D O O
R R M A F O O M G R
G O D U A
MA F DO R O
U M
A G R
F O R
O
M O
O U M G O R M D R
R R M A F O O M G
A G F O O D R U A
M D O U M G R O M
O M R R A F D O O
G O M D O U A G
O D R U A F D O O
M G R M R
O O R D M A
F U M O G R
GR R D A O
O FO M M R
R R U D O A G O
G O O M M R
MA R F
R U D O A G
O
A G O F O M M R
M R U O A G O
O G O O R D M R
D M A F U M O G O
M O G R R D A
D A O F O M M R
M M R R U D O A G O
U O AG O M
OR D M R F U O
U M O G O
Mechanical
O R D M A
R D A F U M O G R
F O M M R R D A O
O O M M R U O G
F U O G O O R D A
F U M O G R R D O
O FO M M R R U A
R U O A G O M
A G O O R
M
D M R FO D O O
M R F U O A G O M R
M A F U M O O R M
O G R R D A G F O O
D A O FO M M D R
M M R R U O O UM G
M M R F U A G F O M
U O G O R M D O O
U M O R
G O D R U A G
R D A U M G O R M
R U D O G F O O D R
O O M M A D O U M G
F U O O M R R A
O R
F G M O
19300_062_120419.eps
R O D O
120419
U A F O O M
G O OR M D R
Figure 4-21 Cable dressing back cover 47PFL7007G (keyboard control panel and Ambilight fixation double-sided tape)
F O O M R R U A G
G R D R U A G O M
M R R M A F O O D R
O G FO D M G
MA DO R O U M
A G R
O R U
M A
O U M G O R M F O O
R R A F O D R
G O M D O M G
MA F
D O
R O
U M G R
O R U
M A
O O M G O R A F O O
R R U A F M D R
M D O O M R R M A
O O M R U A G F O O
R U A G O R M D O
G O R M F O O M R
A F O D R R U A G
M D O U M G O M
O O M R R M A F O O
A G O M D U M G
M F O O M G R R M A
U M G O M D
O U
MA F DO R O
R U M G R
F O R M A
R R M A F O O M G R
G O D U A
MA F DO R O
U M
A G R
F O R
O
M O
O U M G O R M D R
R R M A F O O M G
A G F O O D R U A
M D O U M G R O M
O M R R A F D O O
G O M D O U A G
O D R U A F D O O
M G R M R
O O R D M A
F U M O G R
GR R D A O
O F O M M R
R R U D O A G O
G O O M M R
MA R F
R U D O A G
O
A G O FO M M R
M R U O A G O
O G O O R D M R
D M A F U M O G O
M O G R R D A
D A O F O M M R
M M R R U D O A G O
U O G M
OR D EN 20 5.MA L12M1.1L LAROService Modes, Error
F OCodes, and Fault Finding
U M O G R
O
U M O G O and FaultFFinding
O R D M A
R D A U M O G R
F O M
5. Service M
Modes, Error R
Codes,
R D A O
U O
Index of this chapter: 5.2.1 General
O F O M
5.1 Test Points
M R R D A G
R U D O
5.2 Service Modes
A G O F O M M
Next items are applicable to all Service Modes or are general.
U
5.3 Service Tools
O F O M
5.4 Error Codes
M R R D O O
O G
Life Timer
U O O M R
GR
5.5 The Blinking LED Procedure
R D A
During the life time cycle of the TV set, a timer is kept (called
F G
5.6 Fault Finding and Repair Tips
O O M R
Op. Hour). It counts the normal operation hours (not the
F M U A
5.7 Software Upgrading
O G R
Stand-by hours). The actual value of the timer is displayed in
R R U D A O
FO M
SDM and SAM in a decimal value. Every two soft-resets
G M O O
5.1 Test Points
O O R
increase the hour by +1. Stand-by hours are not counted.
M A F M
In the chassis schematics and layout overviews, the test points
U O G O D R
R A M
are mentioned. In the schematics and layouts, test points are
R D G
Software Identification, Version, and Cluster
O G M R U A
indicated with Fxxx or Ixxx.
O O M
The software ID, version, and cluster will be shown in the main
A F R M
As most signals are digital, it will be difficult to measure
U O O
menu display of SDM, SAM, and CSM.
M R G
waveforms with a standard oscilloscope. Several key ICs are
R D F O
The screen will show: AAAAAAB-XX.YY, where:
O G A O
capable of generating test patterns, which can be controlled via
O O M D
AAAAAA is the chassis name: L12M11L.
D A F M
ComPair. In this way it is possible to determine which part is
U O O M R
B is the region indication: E= Europe, A= AP/China, U=
M M R
defective.
R U G
NAFTA, L= LATAM.
XX is the main version number: this is updated with a major
F G M
Perform measurements under the following conditions:
O
change of specification (incompatible with the previous
M M R U A F
Service Default Mode.
O O
software version). Numbering will go from 01 - 99 and AA -
U O G R M
Video: Color bar signal.
O D
ZZ.
OR D A F O R
Audio: 3 kHz left, 1 kHz right.
O O M
If the main version number changes, the new version
M 5.2 ServiceM R D G
U
number is written in the NVM.
R U D O
Modes
A G O M G R R A
If the main version number changes, the default
M
U O
The Service Mode feature is split into four parts:
M R
settings are loaded.
FO M R
Service Default Mode (SDM).
M A F O O
YY is the sub version number: this is updated with a minor
U O G O D
Service Alignment Mode (SAM). change (backwards compatible with the previous versions)
R D A F O O M R
Customer Service Mode (CSM). Numbering will go from 00 - 99.
O O M M D U G
Computer Aided Repair Mode (ComPair).
F
If the sub version number changes, the new version
R U O O U M G R O R M A number is written in the NVM.
O MD
SDM and SAM offer features, which can be used by the Service If the NVM is fresh, the software identification, version,
O F G R O R M A
engineer to repair/align a TV set. Some features are:
F O
and cluster will be written to NVM.
O
D
A pre-defined situation to ensure measurements can be
R U A F O O M
G O OR
made under uniform conditions (SDM).
M D R
Display Option Code Selection
U G
Activates the blinking LED procedure for error identification
O O R
When after an SSB or display exchange, the display option
F M R A
when no picture is available (SDM).
R D G
code is not set properly, it will result in a TV with no display.
G U A O M
The possibility to overrule software protections when SDM
R F
Therefore, it is required to set this display option code after
A O M G R M
is entered via the Service pins.
O O O
such a repair.
M R U A D
Make alignments (e.g. White Tone), (de)select options,
R F O
To do so, press the following key sequence on a standard RC
M O R
enter options codes, reset the error buffer (SAM).
O G O D M
transmitter: 062598 directly followed by MENU/HOME and
F G
Display information (SDM or SAM indication in upper
MA DO O R U
xxx, where xxx is a 3 digit decimal value of the panel type,
M R A
right corner of screen, error buffer, software version,
U G
see sticker on the side/bottom of the cabinet. When the value
A O M
operating hours, options and option codes, sub menus).
O M R R
is accepted and stored in NVM, the set will switch to Stand-by,
U A G F O M F D O O
to indicate that the process has been completed.

R R
The CSM is a Service Mode that can be enabled by the
G O M O O
consumer. The CSM displays diagnosis information, which the
D M G R
MA F U
customer can forward to the dealer or call centre. In CSM
D O O M R
mode, CSM, is displayed in the top right corner of the screen.
R M A
O O M R R U A G
The information provided in CSM and the purpose of CSM is to:
F O O O
Display Option
G
Increase the home repair hit rate.
U O
Code
R R A F
Decrease the number of nuisance calls.
M D R
G O M O O M G
Solved customers' problem without home visit.
A F O O D U A
39mm
M D M R R M
PHILIPS

ComPair Mode is used for communication between a computer
G
040
O O
27mm
U
MODEL:
O M R A F
and a TV on I2C /UART level and can be used by a Service
O
32PF9968/10
U G R D O
PROD.SERIAL NO:
M
engineer to quickly diagnose the TV set by reading out error
O
AG 1A0620 000001
R R A
codes, read and write in NVMs, communicate with ICs and the
F R
(CTN Sticker)
A G F O M O O
uP (PWM, registers, etc.), and by making use of a fault finding
D U M G
A
10000_038_090121.eps
R R
database. It will also be possible to up and download the
M O O M
090819
D G O M
software of the TV set via I2C with help of ComPair. To do this,
O O M R R U A
ComPair has to be connected to the TV set via the ComPair
F O O
Figure 5-1 Location of Display Option Code sticker
M D
connector, which will be accessible through the rear of the set
G R R U A G F O
(without removing the rear cover).
O O R
M
During this algorithm, the NVM-content must be filtered,
A O M D G
In this chassis, the set has to be put in Service Mode (SDM,
U A
because several items in the NVM are TV-related and not SSB-
M F R
SDA) before you can use ComPair.
O O M G R M
related (e.g. Model and Prod. S/N). Therefore, Model and
O D U A O
Prod. S/N data is changed into See Type Plate.
O M G R O R M F D O O
In case a call centre or consumer reads See Type Plate in
R R U A F O M R
CSM mode, he needs to look to the side/bottom sticker to
M D O
identify the set, for further actions.
G O U G
MA F DO R O
R U M G R
F O R M A
O M
2012-Apr-20
U G O M A D O O
R R M A F O O M G R
G O D U A
MA F DO R O
U M
A G R
F O R
O
M O
O U M G O R M D R
R R M A F O O M G
A G F O O D R U A
M D O U M G R O M
O M R R A F D O O
R R U AG F O M O M R
G O M D O U A G
O D R U A F D O O
M G R M R
O O R D M A
F U M O G R
GR R D A O
O FO M M R
R R U D O A G O
G O O M M R
MA R F
R U D O A G
O
A G O F O M M R
M R U O A G O
O G O O R D M R
D M A F U M O G O
M O G R R D A
D A O F O M M R
M M R R U D O A G O
U O AG O Modes, Error Codes, M
O and Fault FindingM L12M1.1L LAO 5. EN 21 GR
OR D M R F U O
U M O G
Service
O O R D M A
R D A F U M O G R
F O M
5.2.2
M R
Service Default Mode (SDM)
R D A O
AAAAAAB-XX.YY: See paragraph Software
Identification, Version, and Cluster for the SW name
M U O
definition.
O O G
Purpose
F U M G R R
Set the TV in SDM mode in order to be able to create a pre-
O D A
ERR: Shows all errors detected since the last time the
A O O M M
buffer was erased in format <xxx> <xxx> <xxx> <xxx>
R D
defined setting for measurements to be made. In this platform,
O O M M F
a simplified SDM is introduced (without protection override and
R U O O
<xxx> (five errors possible).
F R
OP: Used to read-out the option bytes. Ten codes (in two
G D
without tuning to a predefined frequency).
U O O O M R
GR A
rows) are possible.
O O R D M R F U G
A
Specifications
F U M O G
Set linear video and audio settings to 50%, but volume to
O R M
How to Navigate
R R D A FO
25%. Stored user settings are not affected. As this mode is read only, there is not much to navigate. To
G O O M O O
switch to other modes, use one of the following methods:
R
Set Smart Picture to Game.
M A F U M O
Set Smart Sound to Standard.
G O D
Command MENU from the user remote will enter the
R
R R D A M
normal user menu (brightness, contrast, color, etc...) with
G
Tune channel to:
O G O O M R U A
- for analogue SDM: channel 3 (61.25 MHz) SDM OSD remaining, and pressing MENU key again will
M A F U M O
- for digital SDM: channel 26 (545.143 MHz).
O R M
return to the last status of SDM again.
R D G
To prevent the OSD from interfering with measurements in
R F O
For digital SDM: set PID default from the stream.
D O A G O O A
All service-unfriendly modes (if present) are disabled, since
M M D O
SDM, command OSD or i+ (STATUS or INFO for

F
NAFTA and LATAM) from the user remote will toggle the
U O R
they interfere with diagnosing/repairing a set. These
M M R R
service unfriendly modes are:
D O UM G
OSD on/off with SDM OSD remaining always on.
DO G O O M R A
Press the following key sequence on the remote control
R
(Sleep) timer.
M A F
Blue mute/Wall paper.
G O M
transmitter: 062596 directly followed by the INFO[i+]/OK
M R U A F
button to switch to SAM (do not allow the display to time out
O O
Auto switch off (when there is no ident signal).
U O G O R M D
Hotel or hospital mode. between entries while keying the sequence).
OR D M A F O O O
Child lock or parental lock (manual or via V-chip).
M R
M R D U G
Skipping, blanking of Not favorite, Skipped or How to Exit
R U D O A G O M
Locked presets/channels.
G R R M A Switch the set to Stand-by.
U O
Automatic storing of Personal Preset or Last Status pressing the standby button on the remote control
FO M M R settings.
R M A F O O
transmitter or on the television set, or
U O G O D
Automatic user menu time-out (menu switches back/ via a standard RC-transmitter by keying the 00 sequence.
O O R D A F
OFF automatically.
D O O M R
If you switch the television set off by removing the mains (i.e.,
M M U G
Auto Volume levelling (AVL). unplugging the television), the television set will remain in SDM
F U O O M R R A when mains is re-applied, and the error buffer is not cleared.
O R
O MD
How to Activate
R R U A G F O M The error buffer will only be cleared when the clear command
O
is used in the SAM menu.
F M
To activate analogue SDM, use one of the following methods:
R U A G F O
Press the following key sequence on the RC transmitter:
D O
G O OR M O
062596 directly followed by the MENU button.
D O M R
Note:
R U G
Short one of the Service pads on the TV board during cold If the TV is switched off by a power interrupt while in SDM,
R F D O O M G
start (see Figure 5-2). Then press the mains button
O R A
the TV will show up in the last status of SDM menu as soon
A G M R U
(remove the short after start-up).
R A F M
as the power is supplied again. The error buffer will not be
O G M O O
Caution: When doing this, the service-technician must cleared.
M R R U A F O O
know exactly what he is doing, as it could damage the
O D
In case the set is accidentally in Factory mode (with an F
O G O M D M R
television set. displayed on the screen), pressing and holding VOL-
F G
MA DO R U
To activate digital SDM: button for 5 seconds and then followed by pressing and
O U M G
Press the following sequence on the RC transmitter:
R M A holding the CH- button for another 5 seconds should exit
O M R R A O
062593 directly followed by the MENU button. the Factory mode.
U A G F O M F DO O
R R O R
5.2.3 Service Alignment Mode (SAM)
G O M D O M G
MA F O O M R R U A
Purpose
O O D R U G O M
To change option settings.
M G R A F O O
To display / clear the error code buffer.
R U A F O M D
To perform alignments.
G O R M O O M G R
A
SDM
F O D U A
Specifications
M D O M G R O R M
Operation hours counter (maximum five digits displayed).
O R U
Software version, error codes, and option settings display.
Error buffer clearing.
R R A F O O O M
Option settings.
R
G O M
Software alignments (White Tone).
A F O D R R U
19300_068_120419.eps
A G NVM Editor.
M O M G M
120419 Set screen mode to full screen (all content is visible).
O O D R U A F O O
O
R U M G O R M
Figure 5-2 Service pad
D
R A F O O R
How to Activate
A G O M
On Screen Menu
D U M G
To activate SAM, use one of the following methods:
M F R R A
After activating SDM, the following items are displayed, with
O O
O D U M G O
SDM in the upper right corner of the screen to indicate that the
M
transmitter: 062596 directly followed by the INFO[i+] /OK
O M R R
television is in Service Default Mode.
M A F O O
button. Do not allow the display to time out between entries
G O D
Menu items and explanation: while keying the sequence.
R R U A F O
xxxxx: Operating hours (in decimal).
O M R
Or via ComPair.
G O M D U G
MA F DO R O
R U M G R
F O R M A
R R M A F O O M G R
G O D U A
MA F DO R O
U M
A G R
F O R
O
M O
O U M G O R M D R
R R M A F O O M G
A G F O O D R U A
M D O U M G R O M
O M R R A F D O O
G O M D O U A G
O D R U A F D O O
M G R M R
O O R D M A
F U M O G R
GR R D A O
O FO M M R
R R U D O A G O
G O O M M R
MA R F
R U D O A G
O
A G O F O M M R
M R U O A G O
O G O O R D M R
D M A F U M O G O
M O G R R D A
D A O F O M M R
M M R R U D O A G O
U O G M
U M O G R
O
U M O G O O R D M A
R D A F U M O G R
F O M M R R
After entering SAM, the following items are displayed, with
D A O
How to Exit
R U D O A G O O
SAM in the upper right corner of the screen to indicate that the
F M M
Switch the set to STANDBY by pressing the mains button on
R
M U O
television is in Service Alignment Mode. the remote control transmitter or the television set, or by
O F O M O G R R D A G
keying-in the 00 sequence on a standard RC-transmitter.
R U D A
Menu items and explanation:
O F O M M
O O M U O
1. System Information. Note:
F U M G R
Op Hour: This represents the life timer. The timer
O R D O
When the TV is switched off by a power interrupt while in
GR R D A O O M R
counts normal operation hours, but does not count SAM, the TV will show up in normal operation mode as
O O M
Stand-by hours.
M R F U G
soon as the power is supplied again. The error buffer will
A
F R
MAIN SW ID: See paragraph Software Identification, not be cleared.
R U O A G O M
R D FO
Version, and Cluster for the SW name definition. In case the set is in Factory mode by accident (with F
G O O M O O
ERR: Shows all errors detected since the last time the displayed on screen), pressing and holding VOL- button
A F M
buffer was erased. Five errors possible.
U O G OR D
for 5 seconds and then followed by pressing and holding
R
M R R D A
OP1/OP2: Used to read-out the option bytes. See
UM
the CH- button for another 5 seconds should exit the
G
O G O O M R A
paragraph 6.4 Option Settings in the Alignments Factory mode.
M A F M
section for a detailed description. Ten codes are
U O O R M
R D G
possible.
R F O
5.2.4 Customer Service Mode (CSM)
D O A G O O A
2. Clear. Erases the contents of the error buffer. Select this
M M D O
F
menu item and press the MENU RIGHT key on the remote
M U O O M R
Purpose
M R
control. The content of the error buffer is cleared.
R U G
The Customer Service Mode shows error codes and
DO G O O M D R A
3. Options. To set the option bits. See paragraph 6.4 Option
A R
information on the TVs operation settings. A call centre can
F G O M
Settings in the Alignments chapter for a detailed
M
instruct the customer (by telephone) to enter CSM in order to
M R U A F
description.
O O
identify the status of the set. This helps them to diagnose
U O G O R M D
4. Alignments.
A
problems and failures in the TV before making a service call.
OR D F O O O R
RGB Align. To align the White Tone. See White Tone
M M
The CSM is a read-only mode; therefore, modifications are not
M R D G
Alignment: for a detailed description.
U
possible in this mode.
U O G O R A
Ambilight. To align the Ambilight Units.
R D A
5. NVM editor.
U M G O R M
FO M R A
Specifications
M R F O
NVM Editor. To change the NVM data in the television
M O
Ignore Service unfriendly modes.
U O O D
set. See also paragraph 5.6 Fault Finding and Repair
R D G F
Set volume to 25%.
A O O M R
Tips.
O O D
M M U G
Service Data. 12 nc data.
F A
Set Smart Sound to Standard.
U O O M R R
6. Upload to USB.
R G M
Line number for every line (to make CSM language
O MD U O
7. Download from USB.
O R R A F
independent).
O
8. Initialise NVM. To initialize a (corrupted) NVM. Be careful,
F G O M O
Set the screen mode to full screen (all contents on screen
D
this will erase all settings!
R U A F
is visible).
O O M
9. Dealer Options.
G O OR M D R
After leaving the Customer Service Mode, the original
U
10. Event Count.
O O R G
settings are restored.
F M R A
Hardware Events. To Display and Clear the hardware
R D G
Possibility to use CH+ or CH- for channel surfing, or
U O M
events.
G R R A F
enter the specific channel number on the RC.
A O M
Software Events. To Display and Clear the software
M R U A Gevents.
F O M DO O
R O O R
How to Activate
O G FO M D M G
To activate CSM, press the following key sequence on a
DO U
How to Navigate
MA O M R A
standard remote control transmitter: 123654 (do not allow the
R
In the SAM menu, select menu items with the UP/DOWN
U G M
display to time out between entries while keying the sequence).
R A O
keys on the remote control transmitter. The selected item
O U M G O R M F
will be indicated. When not all menu items fit on the screen,
O O
D
After entering the Customer Service Mode, the following items
R R A F
use the UP/DOWN keys to display the next / previous
O R
are displayed:
G O M D O M
menu items.
G
MA F O O U
With the LEFT/RIGHT keys, it is possible to:
D M
Activate the selected menu item.
U R R A
Menu Explanation CSM1
M
O R G O
1. Set Type. Type number, e.g. 32PFL3605/78. (*)
O
Change the value of the selected menu item.
U M G O R
Activate the selected sub menu.
M A F D O O
2. Production code. Product serial no., e.g.

R A F
BZ1A1008123456 (*). BZ= Production centre, 1= BOM
R R
When you press the MENU button twice while in top level
G M O O M
code, A= Service version change code, 10= Production
O G
SAM, the set will switch to the normal user menu (with the
A F O D U A
year, 08= Production week, 123456= Serial number.
O
SAM mode still active in the background). To return to the
M D M
SAM menu press the MENU button.
G R O R M
3. Installation date. Indicates the date of the first initialization
O R U
of the TV. This date is acquired via time extraction.
O M A F O
The INFO[i+]/OK key from the user remote will toggle the
U G R O
4. a - Option Code 1. Option code information (group 1).
M D
OSD on/off with SAM OSD remaining always on.
R R A O
F O O M R
b - Option Code 2. Option code information (group 2).
G O M
5. SSB. Indication of the SSB factory ID (= 12nc). (*)
G
transmitter: 062596 directly followed by the MENU button
A F O D R
to switch to SDM (do not allow the display to time out
R U A
6. Display. Indication of the display ID (=12 nc). (*)
M O M G M
7. PSU. Indication of the PSU factory ID (= 12nc).
D O
between entries while keying the sequence).
O O M R R U A F O O
G M D
(*) If an NVM IC is replaced or initialized, these items must be
R U O
How to Store SAM Settings
R A F O O R
re-written to it. ComPair will foresee in a possibility to do this.
G M
To store the settings changed in SAM mode (except the
A O M D G
Also the NVM editor in the SAM menu can be used.
U
OPTIONS and RGB ALIGN settings), leave the top level SAM
M F O O M
menu by using the POWER button on the remote control
G R R M A
O D U O
transmitter or the television set. The mentioned exceptions Menu Explanation CSM2
O M R R A
must be stored separately via the STORE button.
M F O O
1. Current Main SW. Shows the main software version.
R U A G F O O D
2. Standby SW. Shows the Stand-by software version.
R
R O M
3. Panel Code. Shows the current display code.
G O M D U G
4. Bootloader ID. Shows the Bootloader software ID.
MA F DO O M R R A
5. NVM Version. The NVM software version no.
R R U A G F O M
O M
2012-Apr-20
U G O M D O O
R R M A F O O M G R
G O D U A
MA F DO R O
U M
A G R
F O R
O
M O
O U M G O R M D R
R R M A F O O M G
A G F O O D R U A
M D O U M G R O M
O M R R A F D O O
G O M D O U A G
O D R U A F D O O
M G R M R
O O R D M A
F U M O G R
GR R D A O
O FO M M R
R R U D O A G O
G O O M M R
MA R F
R U D O A G
O
A G O F O M M R
M R U O A G O
O G O O R D M R
D M A F U M O G O
M O G R R D A
D A O F O M M R
M M R R U D O A G O
U O A G O Modes, Error Codes, M
OR D M R F U O
U M O G
Service
O O R D M A
R D A F U M O G R
F O M M R
6. Flash ID. Shows the flash ID.
R D A O
R U D O A G O
7. e_UM version. To display eUM version.
F O M M R
TO TV
M U O
8. Channel_table_struct_version. Channel structure
O O M R D A G
TO TO TO
F R
I2C SERVICE
version. UART SERVICE UART SERVICE
U O G
CONNECTOR CONNECTOR CONNECTOR
R D A O F O M M
O O M U O
Menu Explanation CSM3
M R R O
ComPair II
F
Multi
G D
1. Signal Quality. Shows the signal quality for RF signals
U O
RC in function
O O M R
RC out
GR R D A
and other sources (No Tuned/Poor/Average/Good).
O O M
2. Child lock. This is a combined item for locks. If any lock
M R F U A G Optional Power Link/ Mode
F
Switch Activity I2C RS232 /UART
R
(Preset lock, child lock, lock after, or Parental lock) is
R U O A G O M
R D FO
active, this item indicates active.
G O O M O O
3. HDCP Keys. not used (HDCP key is embedded in the
A M R D
PC
F
SiL9187 mux IC).
M R R U D O
4. To display ethernet MAC address.
A G O M G R
O G O O M R U A
5. To display wireless MAC address.
M A F
6. not used.
U M O O R M
R D G
7. not used.
O G O
8. not used.
O R A F DO O
ComPair II Developed by Philips Brugge
D M A
9. not used.
F M
U O M O M R Optional power
R
HDMI 5V DC
M
10. Event Counter. Display event and Clear event.
R U G
I2C only
F G O M
Create a CSM dump on an USB stick 10000_036_090121.eps
M R U A F
091118
M O O
There will be CSM dump to a plugged in USB-stick upon
U D O A G O R M
entering CSM-mode. An extended CSM dump will be created
O D
Figure 5-3 ComPair II interface connection
OR F O O R
when the OK button on RC is pressed in CSM while a USB
M M R D
stick is plugged in. A direct CSM flash dump will be created
U M G
U O G O R A
Caution: It is compulsory to connect the TV to the PC as
M R
when the buttons red + 2679 on the remote control are
R D A G M
shown in the picture above (with the ComPair interface in
U O
pressed in CSM while a USB stick is plugged in.
FO M R A F
between), as the ComPair interface acts as a level shifter. If
U M O O R M D O O
one connects the TV directly to the PC (via UART), ICs will be

G
How to Exit
R D F O
blown!
A O M R
To exit CSM, use one of the following methods:
O F O M M D
Press the MENU/HOME button on the remote control
R U A G
U O O M R
How to Order
transmitter.
R U G O M
ComPair II order codes:
O MD A F
Press the POWER button on the remote control
O R R O
ComPair II interface: 3122 785 91020.
F M
transmitter.
G O D O
ComPair UART interface cable: 3138 188 75051.
R U A F
Press the POWER button on the television set.
O O
Program software can be downloaded from the Philips
G O OR M D U M R
Service web portal.
G
O O R
5.3 Service Tools
R F D U M G O R M A
G A
Note: For this chassis, Pgammar and T-con NVM
A O M
5.3.1 ComPair
G R R M F O
programming (VCOM alignment) are added to ComPair.
O
M R R U A F O O O D
M R
Prerequisite
O G D
Additional cables for VCOM Alignment
FO
In this chassis, ComPair can only be used in one of the
M G
DO U
ComPair/I2C interface cable: 3122 785 90004.
MA O
Service Modes (SAM, SDM).
U M G R R A
ComPair/VGA adapter cable: 9965 100 09269.
O M R R A F O M
G O M O O
Introduction
U
5.4 Error Codes
R R A F D
ComPair (Computer Aided Repair) is a Service tool for Philips
G O M D O
Consumer Electronics products. and offers the following:
O M
5.4.1
G R
Introduction
MA F O O U
1. ComPair helps you to quickly get an understanding on how
D M R
to repair the chassis in a short and effective way.
U R M A
R G O
Error codes are required to indicate failures in the TV set. In
O O
2. ComPair allows very detailed diagnostics and is therefore
U M G O R A F
capable of accurately indicating problem areas. You do not
M D O O
principle a unique error code is available for every:

R A
Activated (SW) protection.
R F R
have to know anything about I2C or UART commands
G M O O M
Failing I2C device.
O G
yourself, because ComPair takes care of this.
A F D U
General I2C error.
O O A
3. ComPair speeds up the repair time since it can
M D M R R M
The last five errors, stored in the NVM, are shown in the

automatically communicate with the chassis (when the uP
O R U G O
Service menus. This is called the error buffer.
O M A F O
is working) and all repair information is directly available.
U G R O
The error code buffer contains all errors detected since the last
M D
4. ComPair features TV software up possibilities.
R R A O
time the buffer was erased. The buffer is written from left to
G O M
Specifications
F D O O U M R
right. When an error occurs that is not yet in the error code
G
A F A
buffer, it is displayed at the left side and all other errors shift one
O R R
ComPair consists of a Windows based fault finding program
M O M M
position to the right.
D G O
and an interface box between PC and the (defective) product.
O O U A F
An error will be added to the buffer if this error differs from any
M R R O O
The (new) ComPair II interface box is connected to the PC via
M
error in the buffer. The last found error is displayed on the left.
R U G O D
an USB cable. For the TV chassis, the ComPair interface box
R
An error with a designated error code never leads to a
G R A F O O M
and the TV communicate via a bi-directional cable via the
D G
deadlock situation. It must always be diagnosable (e.g. error
A O M U
service connector(s).
F R A
buffer via OSD or blinking LED or via ComPair).
M DO O U M G O R M
In case a failure identified by an error code automatically
O A
How to Connect
R F O
results in other error codes (cause and effect), only the error
O M G O R M
This is described in the ComPair chassis fault finding database.
D O
code of the MAIN failure is displayed.

R R U A F O O M R
G O M D U G
MA F DO R O
R U M G R
F O R M A
R R M A F O O M G R
G O D U A
MA F DO R O
U M
A G R
F O R
O
M O
O U M G O R M D R
R R M A F O O M G
A G F O O D R U A
M D O U M G R O M
O M R R A F D O O
G O M D O U A G
O D R U A F D O O
M G R M R
O O R D M A
F U M O G R
GR R D A O
O F O M M R
R R U D O A G O
G O O M M R
MA R F
R U D O A G
O
A G O F O M M R
M R U O A G O
O G O O R D M R
D M A F U M O G O
M O G R R D A
D A O F O M M R
M M R R U D O A G O
U O G M
OR D EN 24 5.MA L12M1.1L LAROService Modes, Error F OCodes, and Fault Finding
U M O G R
O
U M O G O O R D M A
R D A F U M O G R
F O M
5.4.2
M R
How to Read the Error Buffer
R D

A O
12 short blinks followed by a pause of 1.5 seconds,
R U D O A G O F O M

M
R
M U O
O O G
You can read the error buffer in three ways:
F U M G R
On screen via the SAM/SDM/CSM (if you have a picture).
O R

D A
1 long blink of 1.5 seconds to finish the sequence,
A O O M M
The sequence starts again with 12 short blinks.
R D
Example:
O O M
ERROR: 0 0 0 0 0 : No errors detected
M R F U O O
F G R D
ERROR: 6 0 0 0 0 : Error code 6 is the last and only 5.5.2 Displaying the Entire Error Buffer
U O O O M R
GR R D A
detected error
O O M
ERROR: 9 6 0 0 0 : Error code 6 was detected first and
M R F U A G
Additionally, the entire error buffer is displayed when Service
F R
error code 9 is the last detected (newest) error
U O G M
Mode SDM is entered.
R R D A Finding and Repair O O

Via the blinking LED procedure (when you have no
A G O O M
picture). See paragraph 5.5 The Blinking LED Procedure.
M
5.6 Fault
R Tips
F D O O
F
Via ComPair.
M U O G O R
Notes:
O G R R D A UM G
It is assumed that the components are mounted correctly
O O M R A
5.4.3 Error codes
A M R
with correct values and no bad solder joints.
M R F U O G O M
Before any fault finding actions, check if the correct
R D A F O
The layer 1 error codes are pointing to the defective board. options are set.
D O A G O O M M
They are triggered by LED blinking when CSM is activated. In
D O
M M F U O
the LC10 platform, only two boards are present: the SSB and
R O
5.6.1
M
NVM Editor
R
R U G
the PSU/IPB, meaning only the following layer 1 errors are
DO A G defined:
O O M D R R A
F
In some cases, it can be convenient if one directly can change
M G O M
2: SSB
M R U A F
the NVM contents. This can be done with the NVM Editor in
O O
3: IPB/PSU
U O G R M
SAM mode. With this option, single bytes can be changed.
A O D
4: Display
OR D M R F O O O M R
M G
Caution:
U O G O
Table 5-1 Error code table
D R U A
Do not change these, without understanding the
R D A U M G O R M
function of each setting, because incorrect NVM
FO M R A F O
settings may seriously hamper the correct functioning
M R
Layer-1 Defective Layer-2
U O M D O
error code board error code Defective device
O
of the TV set!
R
3
D A G
IPB/PSU 16
F O
+12 V missing/low, PSU defective
O R
Always write down the existing NVM settings, before
M
O O D
3 IPB/PSU 17 POK line defective
G
changing the settings. This will enable you to return to the
F U OM 2
M SSB
O
13
R
general I2C bus error on SSB
M R U A
original settings, if the new settings turn out to be incorrect.
R U G O M
2 SSB 35 EEPROM I2C error on SSB, 24MC64-W
O O MD R R A F
2 SSB 34 tuner I2C error on SSB
O
5.6.2 Load Default NVM Values
F G O M D O
2 SSB 27 channel decoder on SSB
R U A F O O M
G O OR R
It is possible to download default values automatically into the

5.4.4
M
How to Clear the Error Buffer
D R U G
NVM in case a blank NVM is placed or when the NVM first 20
R F D O O M G O R A
address contents are FF. After the default values are
G R U A M
The error code buffer is cleared in the following cases: downloaded, it is possible to start-up and to start aligning the
A O U M G R
By using the CLEAR command in the SAM menu:
O M F O O
TV set. To initiate a forced default download the following
M R A D
By using the following key sequence on the remote control action has to be performed:
O G O R M F D O
transmitter: 062599 directly followed by the OK button.
O M R
1. Switch off the TV set with the mains cord disconnected
F G
DO U
If the contents of the error buffer have not changed for 50 from the wall outlet (it does not matter if this is from Stand-
MA O M
hours, the error buffer resets automatically.
U G R R A
by or Off situation).
O M R R A F O M
2. Short-circuit the SDM pads on the SSB (keep short
G O M O O
Note: If you exit SAM by disconnecting the mains from the circuited, see Figure 5-2).
R R U A F
television set, the error buffer is not reset.
O D
3. Press P+ or CH+ on the local keyboard (and keep it
G O The Blinking LEDM D O M R

pressed).
G
MA F O O U
4. Reconnect the mains supply to the wall outlet.
A
5.5 Procedure
D U M G R O R
5. Release the P+ or CH+ when the set is started up and
M
O O R
has entered SDM.
M R A F O O
5.5.1 Introduction
G O
When the downloading has completed successfully, the set will
R R U A F M D R
perform a restart. After this, put the set to Stand-by and remove
G M O O M
The software is capable of identifying different kinds of errors.
O G
the short-circuit on the SDM pads.
A F D U
Because it is possible that more than one error can occur over
M D O O R
time, an error buffer is available, which is capable of storing the
M R M A
O U G O
last five errors that occurred. This is useful if the OSD is not
O M R A F O
Alternative method:
G R O
working properly.
U M D
It is also possible to upload the default values to the NVM with
G R O R M A F O O
Errors can also be displayed by the blinking LED procedure.
O M R
ComPair in case the SW is changed, the NVM is replaced with
D U G
a new (empty) one, or when the NVM content is corrupted.
A F
The method is to repeatedly let the front LED pulse with as
O R R A
After replacing an EEPROM (or with a defective/no EEPROM),
M O M
many pulses as the error code number, followed by a period of
D G O M
default settings should be used to enable the set to start-up and
O O U A F
1.5 seconds in which the LED is off. Then this sequence is
M R R O O
allow the Service Default Mode and Service Alignment Mode to
M
repeated.
R U G O D
be accessed.
G O R A F O O
Example (1): error code 4 will result in four times the sequence
M D M G R
A U A
5.6.3 No Picture
F R
LED on for 0.25 seconds / LED off for 0.25 seconds. After
M D O O U M G
this sequence, the LED will be off for 1.5 seconds. Any RC
O R M
O A F
command terminates the sequence. Error code LED blinking is When you have no picture, first make sure you have entered
O M
in red color.
G R O R M D O O
the correct display code.

R U A F O
See Display Option Code Selection for the instructions.
G O R M D
Example (2): the content of the error buffer is 12 9 6 0 0
O U M G R

MA F R A
After entering SDM, the following occurs:
DO O U M R O M
1 long blink of 5 seconds to start the sequence,
O M R R A G F O O
G O D
2012-Apr-20
R R U A F M R
G O M D O O U M G
MA F DO O M R R M A
O M R U A G F O O O
U A G O R M D R
A F O R R M A
M D O U M G O O O
O U M R R A F D
A G F O M D O R U A
M O O M G R O M O
O D R U A F D O
M G R M R
O O R D M A
F U M O G R
GR R D A O
O FO M M R
R R U D O A G O
G O O M M R
MA R F
R U D O A G
O
A G O F O M M R
M R U O A G O
O G O O R D M R
D M A F U M O G O
M O G R R D A
D A O F O M M R
M M R R U D O A G O
U O AG O Modes, Error Codes, M
OR D M R F U O
U M O G
Service
O O R D M A
R D A F U M O G R
F O M
5.6.4
M R
Unstable Picture via HDMI input
R D

A O
Transport stream output from 7210 is available; if yes,
check Video section.
R
O O M M
Check (via ComPair) if HDMI EDID data is properly
R U O G
F G R D A
programmed. 5.6.13 USB troubleshooting
R U D O A O F O M M
O O M R U O O
5.6.5 No Picture via HDMI input USB hub does not work when it is plugged in to USB2 and
F U M O G O R
O M D
-3.
R
GR R D A F
-> Connect USB hub to USB1 (only this port supports hub)
G
Check if HDCP key is valid. This can be done in CSM.
O O M R U A
TV cannot detect the presence of USB devices.
F U M O G O R M
-> USB device maybe faulty, replace with another USB
R
5.6.6 HDMI CEC Not Functioning
R D A FO
device.
A G O O M M R D O
O
TV cannot detect the presence of USB devices.

F
Go to Home/Menu ->Setup -> Installation -> Preference and
U O G O R
-> Ensure USB device connected to the TV USB input ports
M R M
set the Easylink option to on. Also check if the connected
R D A G
comply with USB standard (USB certified).
O G M R U
device is CEC enabled.
O O A
TV sometimes can/cannot detect USB devices.
M A F U M O O R M
-> If connected to a passive USB hub, remove the passive
R D G
5.6.7 TV Will Not Start-up from Stand-by.
R F O
USB hub.
-> Devices connected to a passive USB hub may have

F U O R
Possible Stand-by Controller failure. Reflash the SW. drawn current exceeding 500 mA (= limit from TV USB
M M R R D O U M G
port).
DO A G 5.6.8
O O M R
Cannot measure 1 kHz signal at tweeter 1D01 connector
F R A
M M R U A G F O M
5.6.14 Ethernet troubleshooting
G R O O
This is normal behavior. Sound system is active 2.1 system
U D O A O O M D
OR
with separate tweeter and subwoofer paths. Use 8 kHz test Ethernet cannot establish link.
M M F
signal for tweeter measurement.
R D O O M R
-> Check the ethernet magnetic that it is stuffed with the
G
G O U A
correct orientation.
R U D O 5.6.9
A M G
Low output measured at tweeter 1D01 connector
R R M
When connected to computer, the speed indicated on the
M R U A O
FO
computer screen is 10 Mbps instead of 100 Mbps.
U M O O R M F D O O
-> Check the computer network properties setting and

This is normal behavior. Tweeter only covers higher frequency
R D G F
ensure that it is set to Auto.
A O O M R
for rated power (4 W each), whereas the subwoofer output
O O D
Unable to login to NetTV website.
M M U G
(1D02 connector) is full range coverage for output power of 12
F A
-> Make sure all of the keys are loaded in e.g. MAC
U O O M R R
W.
R G M
address, ECD key, etc.
O O MD R R U
5.6.10 No sound output at class D amplifier
A F O O
F G O M D O
5.6.15 HDMI troubleshooting
R U A F O O M
G O OR M R
Check following points:
D U
TV cannot detect the presence of HDMI source.
R G
Presence of both supply +VSND (12 V) & 3V3D (3.3 V)
F O O M R A
-> Check if there is +5 V at pin 18 of HDMI connector.
R G
I2S input signal: pins 15, 20, 21, 22
G D R U
- pin 15: MCLK = 12.288 MHz
A F O M
No picture on TV screen.
A O M R
-> Make sure HDCP is valid.
G M O O
- pin 20: LRCLK = 48 kHz
M R U A O D
In PC mode, TV is unable to display picture for certain
R F O
- pin 21: SCLK = 3.072 MHz
M O R
output resolutions.
O G O D M
- pin 22: SDIN = audio data.
G
-> Check TV specification if the TV can support the
F DO U
Check I2C communication: pins 23 and 24
MA O U M G R
Check startup GPIO: pins 19 and 25; for normal operation,
R A
selected resolution.
O M
CEC not functioning.
O M R R A
both should be HIGH
F O O
-> Turn on Easyliok feature from the TV menu.
U G O 5.7 M
Check outputs: pins 1, 36, 39 and 46; all should have a
R R A F O
12 V PWM signal with a switching frequency of 384 kHz.
D R
G O M D O M
Software Upgrading
G
MA F O O M U A
5.6.11 Front-end: no picture in analog RF mode
D R U G R O R 5.7.1
M
Introduction
O O M G R
O A F O O
U A M D
It is possible for the user to upgrade the main software via the
R
Tuner supply voltage (3V3) presence available at pin 2/4
G O R M F
7216 and F203
O O M G R
USB port. This allows replacement of a software image in a
A D U
I2C lines are working correctly (3V3) stand alone set. A description on how to upgrade the main
M F D O O R
Manually store a known channel and check if there is IF
M R M A
software can be found in the DFU or on the Philips website.
O O M R U A G
output at tuner pins 7 & 8; if not, tuner may be faulty
F O O
G R O
Check whether picture is present in CVBS; in not, check 5.7.2 Main Software Upgrade
R RU A O
Video section.
M D
G O M F D O O U M R
Automatic Software Upgrade
G
A F A
5.6.12 Front-end: no picture in digital RF mode In normal conditions, so when there is no major problem with
M D O O M G R O R M
the TV, the main software and the default software upgrade
O O M R U
R A F O
application can be upgraded with the autorun.upg (FUS part
O
M
in the one-zip file). This can also be done by the consumers
G D
Tuner supply voltage (3V3) presence available at pin 2/4
G R R U A F O
7216 and F203
O O M R
themselves, but they will have to get their software from the
M D G
commercial Philips website or via the Software Update
O
I2C lines are working correctly (3V3)
M A F O R
Manually store a known channel and check if there is IF
O M R U A
Assistant in the user menu (see DFU). The autorun.upg file
G M
must be placed in the root of your USB stick.
D U O
output at tuner pins 2& 3; if not, tuner may be faulty
O O M R R A
Supply voltage (1V2, 2V5, 3V3) presence available to
M F O O
G O D
digital demodulator 7210 How to upgrade:
R R U A F O
Correct functioning of crystal 1205 (41 MHz)
O M R
1. Copy the autorun.upg file to the root of an USB stick.
G M D U G
2. Insert the USB stick in the side I/O while the set is on.
O
Pin DEMOD_RST is HIGH in normal operation
MA F DO O M R A
The TV will prompt an upgrade message. Press Update
U G R O M
to continue, after which the upgrading process will start. As
O M G R O R A F O O
M D
2012-Apr-20
R R U A F O O M R
G O M D U A G
MA F DO R O
U M
A G R
F O R
O
M O
O U M G O R M D R
R R M A F O O M G
A G F O O D R U A
M D O U M G R O M
O M R R A F D O O
G O M D O U A G
O D R U A F D O O
M G R M R
O O R D M A
F U M O G R
GR R D A O
O FO M M R
R R U D O A G O
G O O M M R
MA R F
R U D O A G
O
A G O F O M M R
M R U O A G O
O G O O R D M R
D M A F U M O G O
M O G R R D A
D A O F O M M R
M M R R U D O A G O
U O G M
U M O G R
O
U M O G O O R D M A
R D A F U M O G R
F O M M R R
soon as the programming is finished, the set must be
D A O
R U D O A G
restarted.
O F O M M R
M U O
In the Setup menu you can check if the latest software is
O F O M
running.
O G R R D A G
R U D A O F O M M
O O M U O
5.7.3 How to Copy NVM Data to/from USB
F U M O G R R D O
GR R D
Write NVM Data to USB
A O F O M G R
O O M R U A
1. Insert the USB stick into the USB slot while in SAM mode.
F U M O G
2. Execute the command "NVM Copy" > "NVM Copy to USB",
O R M
R R D A FO
to copy the NVM data to the USB stick. The NVM filename
A G O O
on the USB stick will be named
M M R D O O
F U O G O R
"L12M11L_NVM_T2U.BIN" (this takes a couple of
M R R
seconds).
D A UM G
O A G O F O M M R R A
M R U
Write NVM Data to TV
O G O M
R D A F O
1. First, ensure (via a PC) that the filename on the USB stick
D O A G O O M M
has the correct format: "L12M11L_NVM_U2T.BIN".
D O
M M R F U O O
M R
R U G
3. Execute the command "NVM Copy" > "NVM Copy from
DO A G O O M D R
USB" to copy the USB data to NVM (this takes about a
R A
M M R F
minute to complete).
U A G F O M
O O
To write an NVM mask to the TV, ensure that the mask has the
U D O A G O R M
correct format: "L12M11L_NVM_U2T.MAK" (0x00 to write
O D
OR M F O O M R
protect, 0xFF to overwrite).
U M O R D
Important: The file must be located in the "/Repair" directory
G O R U A G
A M R
of the USB stick.
R D M R U A G O M
FO M R M F O O
5.7.4 How to Copy EDID Data to/from USB
R U D O G F O O D R
O O M A
Write EDID Data to USB
M D O U M G
F U O O R R A
R U M
2. Execute the command "NVM Copy" > "EDID Copy to
G O M
O O MD R R A F O
USB", to copy the EDID data to the USB stick. The
F G O M D O
filename on the USB stick will be named
R U A F O
"L12M11L_EDID_T2U.BIN" (this takes a couple of
O M
G O OR M D R
seconds).
F O O M R R U A G
G R D
Write EDID Data to TV
R U A G O M
A O M R F
M R U A G O M
has the correct format: "L12M11L_EDID_U2T.BIN".
F DO O
O G O R M O O
D M R
G
3. Execute the command "NVM Copy" > "EDID Copy from
F DO R U
MA O M A
USB" to copy the USB data to EDID (this takes about a

minute to complete).
R R U A G O R M
O U M G O M F O O
R A F D
G O R M
of the USB stick.
D O O M R
G
MA F
D O O M R R U A
5.7.5 How to Copy the Channel List to/from USB
O O M R R U A G F O M
R U G O
Write Channel List Data to USB
A M D O O
R F R
A G F O M O
2. Execute the command "Channel list Copy to USB", to copy
D O U M G
O O R A
the channel list data to the USB stick. The filename on the
M D M G
USB stick will be named "L12M11L_CHTB_T2U.BIN" (this
O R M
O O M R U
takes a couple of seconds).
G R A F O O
R RU A O M D
M F O O M R
Write Channel List Data to TV
A G F O D
U G
M D O O M
has the correct format: "L12M11L_CHTB_U2T.BIN".
G R O R M A
U
O O M R R A
3. Execute the command "Channel list Copy from USB" to
M F O O
R U G O D
copy the USB data to the TV (this takes about a minute to
G O R M A
complete).
F D O O M G R
M A F O O M R R U A
M
O D
of the USB stick.
U A G F O
O M G R O R M D O O
R R U A F O O M R
G O M D U G
MA F DO R O
R U M G R
F O R M A
O M
2012-Apr-20
U G O M A D O O
R R M A F O O M G R
G O D U A
MA F DO R O
U M
A G R
F O R
O
M O
O U M G O R M D R
R R M A F O O M G
A G F O O D R U A
M D O U M G R O M
O M R R A F D O O
G O M D O U A G
O D R U A F D O O
M G R M R
O O R D M A
F U M O G R
GR R D A O
O FO M M R
R R U D O A G O
G O O M M R
MA R F
R U D O A G
O
A G O F O M M R
M R U O A G O
O G O O R D M R
D M A F U M O G O
M O G R R D A
D A O F O M M R
M M R R U D O A G O
U O AG O M
O AlignmentsM L12M1.1L LAO 6. EN 27 GR
OR D M R F U O
U M O G O O R D M A
R D A F U M O G R
F O M 6. M
Alignments R R D A O
U O
Index of this chapter: In case you have a color analyzer:
O F O M M R
6.1 General Alignment Conditions
R D A G
Measure with a calibrated (phosphor- independent) color
R U D O
6.2 Hardware Alignments
A G O F O M M
analyzer (e.g. Minolta CA-210) in the centre of the screen.
U
6.3 Software Alignments Consequently, the measurement needs to be done in a
O F O M M
6.4 Option Settings
R R D O O
dark environment.
U O G O O M R
GR
Adjust the correct x,y coordinates (while holding one of the
O O R D A F
Note: Figures below can deviate slightly from the actual
M G
White point registers R, G or B on max. value) by means of
F M R U A
situation, due to the different set executions.

decreasing the value of one or two other white points to the
R U O A G O R M
correct x,y coordinates (see Table 6-1 White D alignment
G R D FO O O
values LC320EUE-SEM1 (panel ID 402) to 6-7 White D
M
General: The Service Default Mode (SDM) and Service
A O F O M R
Alignment Mode (SAM) are described in chapter 5. Menu
O G O D
alignment values LC420EUE-SEF2 (panel ID 411)).
R
M U
Tolerance: dx: 0.002, dy: 0.002.
R A M
navigation is done with the CURSOR UP, DOWN, LEFT or
O G R D M R
RIGHT keys of the remote control transmitter.
O General Alignment
O Conditions M U G
Repeat this step for the other color Temperatures that need
A
A F R
to be aligned.
M R U O G O M
When finished return to the SAM root menu and press
R D F O
6.1
O G A O
STANDBY on the RC to store the aligned values to the
O O D
Perform all electrical adjustments under the following
D A F M M
NVM.
R
conditions:
M M R R U O
Power supply voltage (depends on region):
O UM G
DO G D A
Table 6-1 White D alignment values LC320EUE-SEM1
O O M R R
AP-NTSC: 120 VAC or 230 VAC / 50 Hz ( 10%).
M A F G
AP-PAL-multi: 120 - 230 VAC / 50 Hz ( 10%).
O M
(panel ID 402)
M R U A F O
EU: 230 VAC / 50 Hz ( 10%).
U O G O R M
LATAM-NTSC: 120 - 230 VAC / 50 Hz ( 10%).
D O
A
Value Cool (9480 K) Normal (8050 K) Warm (6100 K)
OR D F O O O R
US: 120 VAC / 60 Hz ( 10%).
M M
x 0.280 0.292 0.319
M R D G
Connect the set to the mains via an isolation transformer
U
y 0.299 0.314 0.347
U O G O R R A
with low internal resistance.
R D A U M G O
Allow the set to warm up for approximately 15 minutes.
M
FO M R A F
M R O
Measure voltages and waveforms in relation to correct
U O G O M
ground (e.g. measure audio signals in relation to
D O
(panel ID 403)

R D A F O O M R
AUDIO_GND).
O O M M D U G
Caution: It is not allowed to use heatsinks as ground.
F
U O O M R R A
Test probe: Ri > 10 Mohm, Ci < 20 pF. x 0.280 0.291 0.318
R D U G O M
Use an isolated trimmer/screwdriver to perform y 0.296 0.311 0.345
O F O M R
alignments.
G O R M A F O O
R U A F O O D
G O OR M M R
6.2 Hardware Alignments
D
(panel ID 404)
U G
There are no hardware alignments foreseen for this chassis.
R F O
6.3 Software Alignments
D O M G R R A
U O M
A G O M G R R M A F O
x 0.281
O
0.292 0.319
O
With the software alignments of the Service Alignment Mode
M R U A D
y 0.297 0.311 0.345
R F O
(SAM) the RGB settings can be aligned.
O G O M D O M G R
F DO U
Table 6-4 White D alignment values LC420EUE-FEP1
MA O U M G R R A
(panel ID 406)
M
6.3.1 Tuner Adjustment (RF AGC Take Over Point)
O M G R O R M A F O O O
U D
A
Purpose: To keep the tuner output signal constant as the input
G R O R M F
signal amplitude varies.
O O M
x
R
0.280 0.291 0.318
D G
MA F
y 0.300 0.314 0.347
D O O M R
No alignment is necessary, as the AGC alignment is done
R U A
O O M R
automatically.
R U A G F O M
Table 6-5 White D alignment values LC470EUF-FEP1
R U A G O M D O O
(panel ID 407)
R F R
6.3.2 RGB Alignment
A G F O M D O O U M Value
G
Cool (10100 K) Normal (8450 K) Warm (6310 K)
M O O R
Before alignment, set the picture as follows:
R A
x 0.277 0.288 0.315
O D R
Picture Setting
U M G O
y
M
0.295 0.310 0.343
O U M G
Dynamic backlight
R M A Off
F D O O
R R A O
Dynamic Contrast Off Table 6-6 White D alignment values LC550EUF-FEP1
G O M
Colour Enhancement
F D O
Off
O U M R
(panel ID 410)
G
A F A
Picture Format Unscaled
M D O Light Sensor
O M G ROff
O R M
U
Value Cool (t.b.d. K) Normal (t.b.d. K) Warm (t.b.d. K)
O O A F
Brightness 50
M R R O O
x t.b.d. t.b.d. t.b.d.
M
Colour 0
R U G O D
y t.b.d. t.b.d. t.b.d.
A F R
Contrast 100
A G O R M D O O M G
R U A
White Tone Alignment: Table 6-7 White D alignment values LC420EUE-SEF2
M F O O
Activate SAM.
M G R M
(panel ID 411)
O O D U A
Select RGB Align. and choose a color temperature.
R R F O O O
M M
Use a 100% white screen as input signal and set the
G O D
Value Cool (t.b.d. K) Normal (t.b.d. K) Warm (t.b.d. K)
U A F O
following values:
R R M R
x t.b.d. t.b.d. t.b.d.
G M D O
Red BL Offset and Green BL Offset to 7 (if
O U G
y t.b.d. t.b.d. t.b.d.
MA A
present).
F DO O M R
All White point values initial to 127.
U G O R M
O M G R O R A F O O
M D
2012-Apr-20
R R U A F O O M R
G O M D U A G
MA F DO R O
U M
A G R
F O R
O
M O
O U M G O R M D R
R R M A F O O M G
A G F O O D R U A
M D O U M G R O M
O M R R A F D O O
G O M D O U A G
O D R U A F D O O
M G R M R
O O R D M A
F U M O G R
GR R D A O
O F O M M R
R R U D O A G O
G O O M M R
MA R F
R U D O A G
O
A G O F O M M R
M R U O A G O
O G O O R D M R
D M A F U M O G O
M O G R R D A
D A O F O M M R
M M R R U D O A G O
U O G M
OR D EN 28 6.MA L12M1.1L LAROAlignments FO U M O G R
O
U M O G O O R D M A
R D A F U M O G R
F O M M R R
If you do not have a color analyzer, you can use the default
D A O
R U D O A G O F O M
values. This is the next best solution. The default values are
M R
M U O
average values coming from production (statistics).
O F O M R
Set the RED, GREEN and BLUE default values per
O G R D A G
R U A O O
temperature according to the values in the Tint settings
D F M M
M U O
table.
O F O M R
When finished return to the SAM root menu and press
O G R D O
U O O M R
GR A
STANDBY on the RC to store the aligned values to the
O O R NVM.
D M R F U G
F U M O G R M A
R R D A O
FO
Table 6-8 Tint settings 32"
A G O O M M R D O O
M F U O G O R
Colour Temp. R G B
R R D A M G
Cool t.b.d. t.b.d. t.b.d.
O A G O
Normal
F O
t.b.d.
M
t.b.d.
M R
t.b.d.
R U A
U O O M
Warm t.b.d. t.b.d. t.b.d.
M R R D A G F O O
D O A G O O
F M M D
M M R U O O M R
G R D U G
DO A
Colour Temp. R G B
A
Cool
O t.b.d.
F O M t.b.d.
G R
t.b.d.
O R M
M M R U A F
Normal t.b.d. t.b.d. t.b.d.
U O
Warm
G
t.b.d.
O R
t.b.d.
M
t.b.d.
D O O
M R D U G
R U D O A G O M G R R M A
M R U A O
FO
Colour Temp. R G B
U M
Cool
O
t.b.d.
O R
t.b.d.
M
t.b.d.
F D O O
D G
Normal t.b.d. t.b.d. t.b.d.
O O R Warm
A
t.b.d.
F D
t.b.d.
O O
t.b.d.
M G R
F U OM M O M R R U A
R U G O M
6.4 Option Settings
O F O MD
6.4.1 Introduction
G R O R M A F
D O O
R U A F O O M
G
O OR M D
The microprocessor communicates with a large number of I2C
O O R U G R
R F M R A
ICs in the set. To ensure good communication and to make
G D R U A G
digital diagnosis possible, the microprocessor has to know
F O M
A O U M G R M
which ICs to address. The presence/absence of these specific
O O O
M R A D
ICs (or functions) is made known by the option codes.
F G
DO U
Notes:
MA O M R
After changing the option(s), save them with the STORE
U G R A
O M
command.
R R A F O M
G O M O O
The new option setting becomes active after the TV is
R R U A F
switched off and on again with the mains switch (the
O D
G O M
EAROM is then read again).
D O M G R
MA F 6.4.2
D O O
How To Set Option Codes
R U M G R
O R U
M A
O O M G O R A F O O
U A M D
When the NVM is replaced, all options will require resetting. To
G R R M F
be certain that the factory settings are reproduced exactly, you
O O M R
A O D U G
must set all option numbers. You can find the correct option
M F O O
numbers see sticker on the inside the cabinet.
D M R R M A
O O M R U A G F O O
G R O
How to Change Options Codes
R R U A O M
An option code (or option byte) represents eight different
D
G O M F O O M R
options (bits). All options are controlled via ten option bytes
A F
(OP#1... OP#10).
O D R R U A G
M O M
Activate SAM and select Options. Now you can select the
O O D U A G
option byte (OP#1... OP#10) with the CURSOR UP/ DOWN
F O M
M R R M O O
keys, and enter the new 3 digit (decimal) value. For the correct
R R U G O
factory default settings, see the sticker inside the set.
A F O O D R
A G O M D U M G
M F O O M G R R M A
U M G O M D
O U
MA F DO R O
R U M G R
F O R M A
O M
2012-Apr-20
U G O M A D O O
R R M A F O O M G R
G O D U A
MA F DO R O
U M
A G R
F O R
O
M O
O U M G O R M D R
R R M A F O O M G
A G F O O D R U A
M D O U M G R O M
O M R R A F D O O
G O M D O U A G
O D R U A F D O O
M G R M R
O O R D M A
F U M O G R
GR R D A O
O FO M M R
R R U D O A G O
G O O M M R
MA R F
R U D O A G
O
A G O F O M M R
M R U O A G O
O G O O R D M R
D M A F U M O G O
M O G R R D A
D A O F O M M R
M M R R U D O A G O
U O A G O M
OCircuit DescriptionsM L12M1.1L LAO 7. EN 29 GR
OR D M R F U O
U M O G O O R D M A
R D A F U M O G R
F O M 7. M
Circuit R
Descriptions
R D A O
7.1 Introduction
U O
Index of this chapter:
O F O M M
7.1 Introduction
R R D A G The LC12M1.1L LA chassis is a digital chassis using a
R U D O
7.2 Power Supply
A G O F O M M
Mediatek chipset. It covers screen sizes of 32" to 55".
U
7.3 DC-DC converter
O F O M
7.4 Front-End
M R R D O O
Main key components are the Mediatek MT5396 integrated
U O G O O M R
GR
7.5 Audio
A
System On Chip (SoC) that supports multimedia video/audio
O O R D
7.6 USB configuration
M R F U G
input.
F U M O G R M A
R A O
Notes:
R D FO
System SoC is based on MT5396:
G M O O
Only new circuits (circuits that are not published recently)
O O R
NAND Flash 512 Mbyte, Hynix.
M A F M
are described.
U O G O D R
DDR 1.33 GHz 512 + 256 Mbyte, Hynix.
R A M
Figures can deviate slightly from the actual situation, due
O G O R D
to different set executions.
O M R U A G
M
Tuner/Frontend configuration:
A F R M
For a good understanding of the following circuit
U O O
Sony Silicon In Can Tuner (SUT-RA214Z).
M R G
descriptions, please use chapter 9. Block Diagrams and
R D F O
Sony Digital Demodulator (CXD2828).
O G A O
10. Circuit Diagrams and PWB Layouts. Where necessary,
O O M D
Analog demodulator embedded in MT5396.
D A F M
you will find a separate drawing for clarification.
M M R R U O O UM G R
D
Audio configuration:
DO A G O FO M R R A Texas Instruments Audio Class-D Amplifier
M M R U A G F O M (TAS5731PHP).
O O
Texas Instruments Headphone Amplifier
U D O A G O O R M D
(TPA6111A2DGN).
OR M O
M R
G O
F D O
R O
U M
A G R
U
Refer to Figure 7-1 for details.
R D A U M G O R M
U O G O D
DDR3 1.33GHz FLASH NVM
R D A F O R
512+256MB 512MB 64kB
O O M M D O U M G
Quad LVDS (7000)
F
32+32 Display(7000)
U O R R A
Dual LVDs (5000/6000)
O M
FHD@120Hz
Low or Direct IF
R G O M
BLU
U
Analogue
FHD@100Hz
O MD
Tuner
DVB-T/C
ATSC
O R A F
W-SL
R
Display(5/6000)
F G O M
TS
D O O
FHD@60Hz
R U A F
ISDB-T FHD@50Hz
G O OR M
Demodulator
D O O M R
Backlight Control
U
PWM
R F O O M MediaTek G R R A G
D
7000
G M R R U A F O M LDM Ambilight series
A O G SOC M O O
only
U O
MT5396
M R R M A F O O D R Audio DAC Headphone
O G FO D M G
MA DO O M R U A
I2S BTL
R
Class-D
O M R R U A G O M
U A G F O M F DO O UART Service
G R O R M D O O M R
G
MA F U
AVIO Ethernet HDMI4:1 USB4:1
D O O M R R M A
O O M R R U A G CVBS 1
F O RJ45
O O
User 3
G
HDMIx4
U O M D
YPbPr 1 Internal 1 WLAN (Integrated) (Reserved)
R A
(1 ARC)
R F R
VGA 1
O O A
19300_063_120419.eps
M D M R R M
120419
O O M R U A G F O O O
Figure 7-1 L12M1.1L LA Architecture
R RU A G O R M D
G O M F D O O U M G R
M A F O O M R R A
O O D U A G F O M
R U M G R O R M D O O
G O R M A F D O O M G R
M A F O O M R R U A
O D U A G F O M
O M G R O R M D O O
R R U A F O O M R
G O M D U G
MA F DO R O
R U M G R
F O R M A
R R M A F O O M G R
G O D U A
MA F DO R O
U M
A G R
F O R
O
M O
O U M G O R M D R
R R M A F O O M G
A G F O O D R U A
M D O U M G R O M
O M R R A F D O O
G O M D O U A G
O D R U A F D O O
M G R M R
O O R D M A
F U M O G R
GR R D A O
O FO M M R
R R U D O A G O
G O O M M R
MA R F
R U D O A G
O
A G O F O M M R
M R U O A G O
O G O O R D M R
D M A F U M O G O
M O G R R D A
D A O F O M M R
M M R R U D O A G O
U O G M
OR D EN 30 7.MA L12M1.1L LAROCircuit DescriptionsFO U M O G R
O
U M O G O O R D M A
R D A F U M O G R
F O M M R R D A O
O O M M R U O G
F R D A
(Reserved)
O O M M R U O O
F U O G O R
O M D R
GR O FO R
M
D M A
R F U A G
R U O A G O R M
A G O O R
M
D M R FO D O O
M R F U O A G O M R
M A F U M O O R M
O G R R D A G F O O
D A O FO M M D R
M M R R U O O U M G
M M R F U A G F O M
U O G O R M D O O
U M O R
G O D R U A G
R D A U M G O R M
R U D O G
(Reserved)
F O O D R
O O M M A D O U M G
F U O O M R R A
O R
F G O M D O O
R U A F O O M
G
O OR O
M
O D R U G R
R F D U M G O R M A
M R R U A F O O O D
O G O M D M G R
F DO R U
MA O M R O
R U M
A G O R M A
U A G F O M F D O O
G R O R M D O O M
19300_064_120419.eps
R
G
MA F
120419
D O O M R R U A
M
Figure 7-2 SSB cell layout
O O M R R U A G F O O O
R U AG F O M D
G O R M O O M G R
M A F O O D R R U A
O D R U M G O M
R R A F O O O M R
A G F O M D U G
O O M R R U A F O O
R U A G F O M D R
A G O R M D O O M G
M F O O M R R U A
O D U A G F O M
O M G R O R M D O O
R R U A F O O M R
G O M D U G
MA F DO R O
R U M G R
F O R M A
O M
2012-Apr-20
U G O M A D O O
R R M A F O O M G R
G O D U A
MA F DO R O
U M
A G R
F O R
O
M O
O U M G O R M D R
R R M A F O O M G
A G F O O D R U A
M D O U M G R O M
O M R R A F D O O
G O M D O U A G
O D R U A F D O O
M G R M R
O O R D M A
F U M O G R
GR R D A O
O FO M M R
R R U D O A G O
G O O M M R
MA R F
R U D O A G
O
A G O F O M M R
M R U O A G O
O G O O R D M R
D M A F U M O G O
M O G R R D A
D A O F O M M R
M M R R U D O A G O
U O AG O M
OR D M R F U O
U M O G O O R D M A
R D A F U M O G R
F O M M R R D A O
O O M M R U O G
F U O G O O R D A DC-DC 1.1 V
R O
DC-DC 1.5 V
M R
NAND flash
F U O G O O M D R
GR O FO R
M
D M A
R F U A G DC-DC 3.3 V
U O G O R M
DDR3
G R R D A FO O O
A O FO M M R D
M R R U D O A G O M G R DC-DC 5 V
O A G O F O M M R R U A
M
DDR3
M R R U D O G F O O
D O A G O O M M A MT5396
D O
M M R F U O O M R
G R D U G
DO M A
R O F O M
U G R O R M A
U M O G R M A F O O
D A O O D
OR M O
M R
G O
F D O
R O
U M
A G R Headphone-Amp
R U D A M G R M
M R U A O
Class-D amplifier
F M
U O M O M R R U A G
O R
O MD R R U Digital
A G F O M
F G M O
Demodulator
R U A F O O O D O
G O OR M D U M G R
R F D O O M G R R A
G M R R U A F O M
A
F G
MA DO R O U M
A G R
O R U
M A
O U M G O R M F O O
R R A F O D R
G O M D O M G
MA F
D O O M R R U A 19300_069_120419.eps
R U G O M
120419
O O M G O R A F O O
U M D
Figure 7-3 SSB key component overview (top)
G R R M A F O O M R
A F O O O D U A G
M D M G R O R M
O O M G R R U A F O O
R RU A O M D
M A F O O M R R A
O O D U A G F O M
M A F O O M R R U A
O D U A G F O M
O M G R O R M D O O
R R U A F O O M R
G O M D U G
MA F DO R O
R U M G R
F O R M A
R R M A F O O M G R
G O D U A
MA F DO R O
U M
A G R
F O R
O
M O
O U M G O R M D R
R R M A F O O M G
A G F O O D R U A
M D O U M G R O M
O M R R A F D O O
G O M D O U A G
O D R U A F D O O
M G R M R
O O R D M A
F U M O G R
GR R D A O
O FO M M R
R R U D O A G O
G O O M M R
MA R F
R U D O A G
O
A G O F O M M R
M R U O A G O
O G O O R D M R
D M A F U M O G O
M O G R R D A
D A O F O M M R
M M R R U D O A G O
U O G M
O
U M O G O O R D M A
R D A F U M O G R
F O M M R R D A O
O O M M R U O G
F U O G O O R D A
F U M O G R R D O
O O M R
V-Disp switch
GR O FO R
M
D M A
R F U A G
R U O A G O R M
A G O O R
M
D M R FO D O O
M R F U O A G O M R
M A F U M O O R M
O G R R D A G F O O
D A O FO M M D R
M M R R U O O U M G
M M R F U A G F O M
U O G O R M D O O
U M O R
G O D R U A G
R D A U M G O R M
R U D O G F O O D R
O O M M A D O U M G
F U O O M R R A
O R
F G O M D O O
R U A F O O M
G
O OR O
M
O D R U G R
R F D U M G O R M A
M R R U A F O O O D
O G O M D M G R
F DO R U
MA O M R O
R U M
A G O R M A
U A G F O M F D O O
G R O R M D O O M R
G
MA F
D O
R O
U M G R
O R U
M A
O O M R A F O O
19300_070_120419.eps
G O
120419
R R U A F M D R
G M O O M
Figure 7-4 SSB key component overview (bottom)
A F O O O D U A G
M D M G R O R M
O O M G R R U A F O O
R RU A O M D
M A F O O M R R A
O O D U A G F O M
M A F O O M R R U A
O D U A G F O M
O M G R O R M D O O
R R U A F O O M R
G O M D U G
MA F DO R O
R U M G R
F O R M A
O M
2012-Apr-20
U G O M A D O O
R R M A F O O M G R
G O D U A
MA F DO R O
U M
A G R
F O R
O
M O
O U M G O R M D R
R R M A F O O M G
A G F O O D R U A
M D O U M G R O M
O M R R A F D O O
G O M D O U A G
O D R U A F D O O
M G R M R
O O R D M A
F U M O G R
GR R D A O
O FO M M R
R R U D O A G O
G O O M M R
MA R F
R U D O A G
O
A G O F O M M R
M R U O A G O
O G O O R D M R
D M A F U M O G O
M O G R R D A
D A O F O M M R
M M R R U D O A G O
U O A G O M
OR D M R F U O
U M O G O O R D M A
R D A F U M O G R
F O M M
7.2 Power Supply
R R D A O
O O M
7.2.1
M
Connector Overview, Block Diagram and Fault Finding
R U O G
F U O G O O R D A
R D A F M M
Table 7-1 Connector overview 32PFL5007G sets
O F O M M R R U O O
U O G O O M D R
Connector
GR R D A F G
no. 1308 1M95 1M99 1M11 1M09
O O M M R U A
Descr. Mains PSU to SSB PSU to SSB Ambilight/Bolt-on Bolt-on
R F Pin
U O
CN1
A G
CN4
O R
CN5
M
CN6 CN7
G R D FO O O
1 N 3V3stdby GND_AL GND_AL GND_BO
A O O M M R D
2 L Standby +12V_AL +12V_AL +12V_BO
M R F 3
U
-
O
GND1
A G O
GND_AL
M R
GND_AL GND_BO
R D U G
4 - GND1 +12V_AL +12V_AL +12V_BO
O A G O
5
F O M
- +12V
M R R
GND1
A
- GND_BO
M R 6
U
-
O
+12V
G O
+12V
M
- +12V_BO
R D A F O O
7 - +Vsnd GND1 - -
D O A G O
8
F O
-
M M
+Vsnd +12V
D
- -
M U O O M R
9 - GND_SND - - -
M G R 10
R
-
D
GND_SND
U G
- -
DO A O O M R R A
11 - BL-ON - - -
M M
12
R F -
U G
BL-DIM (Vsync)
A
-
F O M
- -
O O
13 - BL-I-CTRL - - -
U D O A G 14
O O R - POK
M -
D
- -
OR M F O O M R
15 - - - - -
U M O R
G O D R U A G
R D A U M G O R M
U O G O D
BL Driver 1
R D A F O O M R
Line Back Light
O O D
PFC Resonant
M M U G
filter
F
converter BL Driver 2
R U O
ACin
O U M G R O R M A
O MD
198 V - 264 V Diode
O R R A F
VSSB
O
90 V - 276 V bridge
R F U A G F O M D O
G O OR M D O O M R
F O O M R R U A G
R G
Regulator
D
STBY VSTB VSND
G M R R U A F O M
A
G
19132_012_111221.eps
F DO R U
MA O M A
111221
R R U A G O R M
Figure 7-5 Block diagram
O U M G O M F O O
R R A F
The PSU delivers the following voltages to the chassis:
O D R
G O M D O M
VSTB: 3.3 V +/- 3%.
G
MA F O O U A
VSSB: 12.3 V +/- 5%.
D M
VSND: 12.3 V (11 V - 14 V).
U G R O R M
O O M G R R A F O O
R R U A F O M D R
M D O O M R R M A
O O M R U A G F O O
R U A G O R M D O
G O R M F O O M R
A F O D R R U A G
M D O U M G O M
O O M R R M A F O O
A G O M D U M G
M F O O M G R R M A
U M G O M D
O U
MA F DO R O
R U M G R
F O R M A
R R M A F O O M G R
G O D U A
MA F DO R O
U M
A G R
F O R
O
M O
O U M G O R M D R
R R M A F O O M G
A G F O O D R U A
M D O U M G R O M
O M R R A F D O O
G O M D O U A G
O D R U A F D O O
M G R M R
O O R D M A
F U M O G R
GR R D A O
O F O M M R
R R U D O A G O
G O O M M R
MA R F
R U D O A G
O
A G O F O M M R
M R U O A G O
O G O O R D M R
D M A F U M O G O
M O G R R D A
D A O F O M M R
M M R R U D O A G O
U O G M
O
U M O G O O R D M A
R D A F U M O G R
F O M M R R D A O
O O M M R U O G
F U O G O O R D A
R D A M M
Check First step Second step
O O M M R F U O O
F U O
Normal operation
G O R
O M D R
Check the fuse (F101)
GR O F O R
M
D M A
R F U A G

Apply the mains voltage (ACin) Check the Standby voltage Check the entire block (PC102, VCC, etc.)
U O G O R M
at C306: measure 3.3 V
G R R D A FO O O
A O F O M M R D
Check the PFC voltage at C644
M U O G O R
PFC present: measure 380 V to 400 V
R M
Check the entire block (VCC, ICs, etc.)
R D A G
Pull the Standby pin to LOW (GND) PFC not present: measure ACin 2
O A G O F O M M R R U A

Check the main supply at C208: measure 12.3 V Check the entire block (VCC, ICs, etc.)
M U O O M
Check the audio supply at C233: measure 24.5 V
O G R R D A G F O O
A O O M M D
Allow the power supply to start-up a few times
D
Pull the BL_ON_OFF pin to HIGH (3.3 V) No turn on
M M R F U O O M R
G R D U G
DO O O M R R A
Check the reference voltage of the
A F M
LED Driver (U401): measure approximately 12 V
M M R U A G F O
U O G O R M D O O
A
19132_013_111221.eps
OR D F O O O R
111222
M M R D U M G
U O G O R A
Figure 7-6 Test instructions
R D A U M G O R M
FO M R A F
Following checks have to be performed:
U M O
check fuse (F101)
O R M D O O
R D G F O
standby check VSTB (C302), measure 3.3 V
A O M R
O O D
PFC voltage check (C644), measure 380 - 400 V; if no PFC
F U OM M
applied, measure 311 @ 220 V
O M R R U A G
R U G O M
multi-level check VSSB (C203), measure 12.3 V
O O MD R R A F
multi-level check VSND (C206), measure 12.3 V
F G O M
reference voltage check (U401), measure 5.96 V (appr.).
D O O
R U A F O O M
G O OR M D R
SAFETY INSTRUCTION
F O O R
Replace safety components, indicated by the symbol h, only
M R U A G
R D U G O
by components identical to the original ones. Any other
A G O M R R A F
component substitution (other than original type) may increase
M M
U G O O O
risk of fire or electrical shock hazard.
M R 7.3 RDC-DC converter

M A F O O D R
O G FO D M G
MA DO O M R U A
Refer to Figure 7-7.
R R U A G O R M
O U M G O
DC/DC
M F O O
R R A F D
RT8288A
O
+1V1_SW
G O M O M R
Enable
D G
MA F U
DC/DC
O O M R R A
RT8293A

+1V5_SW
D U M
+12VS
G O
Enable
O O R
PSU/PSL
M G R A F O O
DC/DC
R U A O M D
RT8293A
F
+5V_SW
R R
Enable
A G F O M D O
DC/DC
O U M G
O O A
+3V3_SW
M R R
RT8293A
D M M
Enable
G
DELAY
O O M R U A F O
Lin
O
+1V2_SW
G R O
LD1117
R R U A O M D
M F O O M R
19300_065_120419.eps
G O D U G
120419
M A F O O M R R A
D G O M
Figure 7-7 DC-DC block diagram
O O M R R U A F O O
R U A G F O M D R
A G O R M D O O M G
M F O O M R R U A
O D U A G F O M
O M G R O R M D O O
R R U A F O O M R
G O M D U G
MA F DO R O
R U M G R
F O R M A
O M
2012-Apr-20
U G O M A D O O
R R M A F O O M G R
G O D U A
MA F DO R O
U M
A G R
F O R
O
M O
O U M G O R M D R
R R M A F O O M G
A G F O O D R U A
M D O U M G R O M
O M R R A F D O O
G O M D O U A G
O D R U A F D O O
M G R M R
O O R D M A
F U M O G R
GR R D A O
O FO M M R
R R U D O A G O
G O O M M R
MA R F
R U D O A G
O
A G O F O M M R
M R U O A G O
O G O O R D M R
D M A F U M O G O
M O G R R D A
D A O F O M M R
M M R R U D O A G O
U O A G O M
OR D M R F U O
U M O G O O R D M A
R D 7.4 Front-End A F U M O G R
F O M M R R D A O
R U D O A G O
Refer to Figure 7-8 for details.
F O M M R
O O M M R U O G
F U O G O O R D A
R D A F U M M
RF input from
O O M O
Antenna
F U M O G R R D O
O F O M M R R U A
R U O A G O M
A G O O R
M
D M R FO D O O
M R F U O A G O M R
M A F U M O O R M
O G R R D A G F O O
D A O F O M M
19300_066_120419.eps
D R
M M R U O O M
120419
G R D U G
DO A O FO M R R A
Figure 7-8 Front-end functional block diagram
M M R U A G F O M
U O G O R M D O O
U M O R
G O D R U A G
R D A U M G O R M
R U D O G F O O D R
O O M M A D O U M G
F U O O M R R A
O R
F G O M D O O
R U A F O O M
G
O OR O
M
O D R U G R
R F D U M G O R M A
M R R U A F O O O D
O G O M D M G R
F DO R U
MA O M R O
R U M
A G O R M A
U A G F O M F DO O
G R O R M D O O M R
G
MA F
D O
R O
U M G R
O R U
M A
O O M G O R A F O O
R R U A F M D R
M D O O M R R M A
O O M R U A G F O O
R U A G O R M D O
G O R M F O O M R
A F O D R R U A G
M D O U M G O M
O O M R R M A F O O
A G O M D U M G
M F O O M G R R M A
U M G O M D
O U
MA F DO R O
R U M G R
F O R M A
O U M G O M A D O
2012-Apr-20
O
R R M A F O O M G R
G O D U A
MA F DO R O
U M
A G R
F O R
O
M O
O U M G O R M D R
R R M A F O O M G
A G F O O D R U A
M D O U M G R O M
O M R R A F D O O
G O M D O U A G
O D R U A F D O O
M G R M R
O O R D M A
F U M O G R
GR R D A O
O F O M M R
R R U D O A G O
G O O M M R
MA R F
R U D O A G
O
A G O F O M M R
M R U O A G O
O G O O R D M R
D M A F U M O G O
M O G R R D A
D A O F O M M R
M M R R U D O A G O
U O G M
O
U M O G O O R D M A
R 7.5 D A F U M O G R
F O M Audio
M R R D A O
R U D O A G O
Refer to Figure 7-9 for the implementation.
F O M M R
O O M M R U O G
F U O G O O R D A
O O R Front-end D M A Digital ClassF U M M O
F U M O G R R
I2S
D O
GR O O M R
Speaker out
O O R D M A
D amp
F
I2C
G
F U M O G R U
MUTE
R M A
G R Analog R D AIN0_L/R
A O
FO O O
A O F O M M Muting /R D
M U O G O R
AIN1_L/R POWER_DOWN
R M
input pairs
R D A G
MT5396
O A G O F O M
AIN2_L/R
M R
reset circuit
U
RESET_AUDIO
R A
M R U O G O M
O G O O R D A F DO O
D M A F M
U O MHeadphone
O
AL/R3_ADAC
M R Headphone out
R
USB
M G R D
Amp
U G
DO M A
R O F O M
U G R O R M A
M A F
SPDIF_OUT Optical SPDIF out
U O G O R M D O O
OR D M A F O O O
ARC
M R HDMI1-ARC out
M R D G
HDMI
U O A G O M R R U A
R D M R U A G O M
FO U M O O R M F D O O 19300_067_120419.eps
R D G F O
120419
O O M M A D O U M G R
Figure 7-9 Audio functional block diagram
F U configuration
O O M R R A
O R
O MD
7.6 USB
R R U A G F O M
O
This chassis comes with three external and one internal USB
R F U
port.
A G F O M D O
G O OR M D O O M R
R U G
7.6.1 USB1 (external)
R F D O O M G O R A
A G M
To be used for
R R U A F M
O U G O M O O
Mass storage
M R R
Hub
M A F O O D R
O G O D M
WiFi
F G
MA DO O M R U A
Bluetooth
U G R M
Camera
O M R R A O
Mouse/Keyboard.
U A G F O M F D O O
G R O R
7.6.2 USB2 & 3 (external)
M D O O M R
G
MA F O O M R R U A
To be used for
O O D
Mass storage
R U G O M
U M
WiFi
G O R M A F D O O
R A F
Bluetooth
G O R Camera
M O O M G R
A F O D U A
Mouse/Keyboard.
M D O M G R O R M
O O M R U A F O
7.6.3 USB4 (reserved for internal WiFi)
R U A G O R M D O
R F O O M R
To be used for
A G F O M
Mass storage
D U G
O R R A
Hub
M D
WiFi
O U M G O M
O O M R
Mouse/Keyboard.
R M A F O O
A G O M D U M G
M F O O M G R R M A
U M G O M D
O U
MA F DO R O
R U M G R
F O R M A
O M
2012-Apr-20
U G O M A D O O
R R M A F O O M G R
G O D U A
MA F DO R O
U M
A G R
F O R
O
M O
O U M G O R M D R
R R M A F O O M G
A G F O O D R U A
M D O U M G R O M
O M R R A F D O O
G O M D O U A G
O D R U A F D O O
M G R M R
O O R D M A
F U M O G R
GR R D A O
O FO M M R
R R U D O A G O
G O O M M R
MA R F
R U D O A G
O
A G O F O M M R
M R U O A G O
O G O O R D M R
D M A F U M O G O
M O G R R D A
D A O F O M M R
M M R R U D O A G O
U O A G O M
O IC Data SheetsM L12M1.1L LAO 8. EN 37 GR
OR D M R F U O
U M O G O O R D M A
R D A F U M O G R
F O M 8. IC M
Data Sheets R R D A O
U O
This section shows the internal block diagrams and pin layouts
O F O M M R R
of ICs that are drawn as "black boxes" in the electrical diagrams
D A G
U O G O
(with the exception of "memory" and "logic" ICs).
D A
R 8.1 Diagram 10-2-2 B02, Tuner &MDemodulator, TypeRSUT-RA214 O M M
(IC1201) F U
O F O M R D O O
U O G O O M R
GR O FO R Block diagram
M
D M A
R F U A G
R U O A G O R M
A G O O R
M
D M R FO D O O
M R F U O A G O M R
M A F
Terr.
U M O O R M
O G R
In
R D A G F O O
D A O F O M M D R
M M R R U O O U M G
DO G O O M D R A
PLL
A F G O R M
100
M
FIL
R U A F
10
M O O
IQ Gen. I2C 100 Tuner I2C (SDA, SCL)
U O G R M
11
D A O O D
OR F O O R
100
M M R D M G
7
U
IFOUT2
U O G O R A
Image 8
M R
Balun
R D A G M
Rejection 100
M R U O
2
FO A F
IFOUT1
M R O O
3
R U D O G F O M D AGC

O O A D O O M G R 1K
F M
U O M O M R R U A
9 AGC2
O R
O MD R R U A G F O M 4 AGC1
F O
1K
R U A G F O M D O
G O OR M D O O M R
U G
1
R F D O O M G R R A
G R U A O M
3.3 V
M R R A F O D
19300_043_120416.eps
O G M O R
120416
FO D M G
MA DO O M R U A
Figure 8-1 Internal block diagram and pin configuration
R R U A G O R M
O U M G O M F O O
R R A F O D R
G O M D O M G
MA F
D O
R O
U M G R
O R U
M A
O O M G O R A F O O
R R U A F M D R
M D O O M R R M A
O O M R U A G F O O
R U A G O R M D O
G O R M F O O M R
A F O D R R U A G
M D O U M G O M
O O M R R M A F O O
A G O M D U M G
M F O O M G R R M A
U M G O M D
O U
MA F DO R O
R U M G R
F O R M A
R R M A F O O M G R
G O D U A
MA F DO R O
U M
A G R
F O R
O
M O
O U M G O R M D R
R R M A F O O M G
A G F O O D R U A
M D O U M G R O M
O M R R A F D O O
G O M D O U A G
O D R U A F D O O
M G R M R
O O R D M A
F U M O G R
GR R D A O
O F O M M R
R R U D O A G O
G O O M M R
MA R F
R U D O A G
O
A G O F O M M R
M R U O A G O
O G O O R D M R
D M A F U M O G O
M O G R R D A
D A O F O M M R
M M R R U D O A G O
U O G M
OR D EN 38 8.MA L12M1.1L LAROIC Data Sheets FO U M O G R
O
U M O G OType CXD2828 (IC7210)
O R D M A
R 8.2 DDiagram 10-2-2 B02,A F U M O G R
F O M M R
Tuner & Demodulator,
R D A O
R U O
D diagram MA G O F O M M R
O O M R U O G
F U Block
O G O O R D A
F U M O G R R D O
O F O M M R R U A
R U O A G O M
A G O O R
M
D M R FO D O O
TSCLK
F
TSSYNC
U O G O R
ISDB-T
M
TSVALID
R A M
TSDATA[7:0]
D
TAINP
O G R U G
TAINM
M R A
Viterbi RS
O O
TSIF
M
ADC
A F R
decoder decoder
M
OFDM
M R R U D O G F O
Demodulator
O
A O
TIFAGC
G
Status
O
Terrestrial AGC TMCC
A O O M M D
Monitor
D F
Tuner
M M R U O O M R
SDA
R U G
SCL
DO G O O M D R R A
Tuner I2C Host I2C
A F
CXD2828ER
G O M
TTUSDA
M R U A F
TTUSCL
U M O G O R M D O O
OR D A O
Oscillator PLL Logic GPIO
M F O O M R
XTALI
R
GPIO0 (EWS)
M D G
XTALO
U
GPIO1 (PWM)
U O G O R A
41/20.5MHz GPIO2 (TSERR)
R D A U M G O R M
M R
OSCEN_X
FO M A F O
XTALSEL
U O G O R M D O
F U OM M O M R R U A G
O R
F G O M D O O
R U A F O O M
G
O OR M
Pinning information
O O D R U G R
R F D U M G O R M A
G R A
OSCMODE
F
OSCEN_X
M R
SLVADR0
A O G M O O
XTALO
U O
RST_X
M R
CVDD
PVDD
XVDD
XTALI
A
XVSS
PVSS
R F O D
VSS
O G O M D O M G R
F DO R U
MA
36 35 34 33 32 31 30 29 28 27 26 25
O U M G R M A
R R A O
TAINM 37 24 TESTMODE
O U M G O M F O O
D
TAINP 38 23 VSS
G R O R M A F O O M R
D
TAVSS 39 22 CVDD
G
MA F O O M R U A
21 SDA
R
TAVDD 40
O O D R SLVADR1 41
U G O M 20 SCL
U M G O R M A F D O O
A
XTALSEL 42 19 DVDD
R F
CXD2828ER-T4
G O R M
VSS 43
O O M G R 18 VSS
M A F O O
CVDD 44
D R R U A 17 TSDATA7
O D R TTUSDA 45
U M G O M
O M A F
16 TSDATA6
U G
TTUSCL 46
R M D O O 49
O
15 TSDATA5
G R O R M A F
GPIO1 47
O O M R 14 TSDATA4
A F O
TIFAGC 48
D R R U A G
M
13 TSDATA3
O O D O U M G O M
A F
1 2 3 4 5 6 7 8 9 10 11 12
U M G R O R M D O O
TSCLK
VSS
TSDATA0
TSDATA1
TSVALID
GPIO2
DVDD
CVDD
GPIO0
TSSYNC
R
VSS
TSDATA2
M A F O O M R R U A
O D U A G F O M
O R R O O
19260_300_120320.eps
M G O M D
120323
R R U A F O O M R
D
Figure 8-2 Internal block diagram and pin configuration
G O M U G
MA F DO R O
R U M G R
F O R M A
O M
2012-Apr-20
U G O M A D O O
R R M A F O O M G R
G O D U A
MA F DO R O
U M
A G R
F O R
O
M O
O U M G O R M D R
R R M A F O O M G
A G F O O D R U A
M D O U M G R O M
O M R R A F D O O
G O M D O U A G
O D R U A F D O O
M G R M R
O O R D M A
F U M O G R
GR R D A O
O FO M M R
R R U D O A G O
G O O M M R
MA R F
R U D O A G
O
A G O F O M M R
M R U O A G O
O G O O R D M R
D M A F U M O G O
M O G R R D A
D A O F O M M R
M M R R U D O A G O
U O A G O M
OR D M R F U O
U M O G O O R D M A
R D A Power, Type MT5396F
U M O G R
F O M M
8.3 Diagram 10-2-4
R
B04A, MTK5396 (IC7300)
R D A O
R U O
D Block diagram A G O F O M M R
O O M M R U O G
F U O G O O R D A
F U M O G R R D O
O F O M M R R U A
R U O A G O M
A G O O R
M
D M R FO D O O
M R F U O A G O M R
M A F U M O O R M
O G R R D A G F O O
D A O F O M M D R
M M R R U O O U M G
M M R F U A G F O M
U O G O R M D O O
OR D M A F O O MT5396JDNJ O M R
U M O G OR D R U A G
R D A U M G O R M
R U D O G F O O D R
O O M M A D O U M G
F U O O M R R A
O R
F G O M D O O
R U A F O O M
G
O OR O
M
O D R U G R
R F D U M G O R M A
M R R U A F O O O D
O G O M D M G R
F DO R U
MA O M R O
R U M
A G O R M A
U A G F O M F D O O
G R O R M D O O M R
G
19300_040_120416.eps
MA F O O U A
120416
D U M G R O R M
R
Figure 8-3 Internal block diagram
O O M G O R A F O O
R R U A F M D R
M D O O M R R M A
O O M R U A G F O O
R U A G O R M D O
G O R M F O O M R
A F O D R R U A G
M D O U M G O M
O O M R R M A F O O
A G O M D U M G
M F O O M G R R M A
U M G O M D
O U
MA F DO R O
R U M G R
F O R M A
O U M G O M A D O
2012-Apr-20
O
R R M A F O O M G R
G O D U A
MA F DO R O
U M
A G R
F O R
O
M O
O U M G O R M D R
R R M A F O O M G
A G F O O D R U A
M D O U M G R O M
O M R R A F D O O
G O M D O U A G
O D R U A F D O O
M G R M R
O O R D M A
F U M O G R
GR R D A O
O FO M M R
R R U D O A G O
G O O M M R
MA R F
R U D O A G
O
A G O F O M M R
M R U O A G O
O G O O R D M R
D M A F U M O G O
M O G R R D A
D A O F O M M R
M M R R U D O A G O
U O G M
O
U M O G O O R D M A
R D A F U M O G R
F O M M R R D A O
O O
Pinning
M M
information 1,
MT5396JDNJ
R U O G
F U O G O O R D A
R D A F M M
825 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19
O F O M M R R U O O ARDQS2
D
A BRDQ0 BRDQ6 DDRV DDRV ARDQ21 ARDQM2 ARDQ22 ARBA0 ARA2 ARA13 ARDQ8 DVSS
U O G
#
GR R D A O O M R
ARRESE
F G
B BRDQ9 BRDQ2 DDRV DDRV ARDQ23 ARDQ30 ARDQS2 ARDQ31 ARDQ18 ARA3 ARA7 ARDQ1 DVSS
T
O O M M R U A
ARCLK1
F
C BRDQ13 BRDQ4 DDRV DDRV ARDQ19 ARDQ24 ARDQ28 ARDQS3 ARDQ29 ARDQ27 ARDQ16 ARDQ20 ARA11 ARA14 ARDQ5 ARDQ3 DVSS ARDQM0
U O G R M
#
R R D A O
FO
ARDQS3
O O
D BRDQM1 BRDQ15 BRDQ11 DDRV DDRV ARDQ17 ARDQ26 ARCLK1 ARDQ25 DVSS DVSS ARA8 ARWE# ARDQ7 ARBA2 ARDQ10 DVSS ARDQ14
G
#
A O O M M R D
BRDQS0
F
E BRDQS0 DDRV DDRV DVSS DVSS DVSS ARDQM3 DVSS DVSS AR A4 ARA6 ARA9 ARCS# ARCAS# ARODT DVSS
U O G O R
#
M R R D A M G
BRDQS1 BRCLK0
F BRDQS1 BRCLK0 DVSS DDRV DDRV DVSS DVSS ARCKE ARA10 DVSS ARA12 ARA1 ARA0 ARA5 ARRAS# ARCSX# DVSS
O G M R U
# #
A O O M R A
RVREF_
F M
G BRDQM0 BRDQ12 BRDQ14 BRCSX# DDRV DDRV MEMTN MEMTP ARBA1 DVSS DDRV DVSS DVSS DDRV DVSS
U O
B
M R
H
R D
BRDQ10
A G
BRRAS# BRCAS#
F OBRODT
O
DDRV DDRV
O
DDRV DVSS DDRV DVSS
D O A G O F O M M D

J BRDQ1 BRDQ3 BRDQ8 DVSS DVSS DVSS DDRV DDRV DVSS DVSS
M M R
K BRDQ5 BRDQ7
R U O
BRCS# BRBA2
O
BRA5
U
BRA0
M DVSS
G R
F M
L
G
BRA7 BRWE# BRA14 BRA8 DVSS DVSS
M M M
R
BRA2
BRRESE
U
BRA9
A
BRA13 BRA11
F O O
DVSS
O
U O G R M
T
D A O O D
AVDD33_ AVSS33_
OR F R
N BRBA0 BRA3 BRA1 BRA6 BRA12 BRA4 DDRV
O O
MEMPLL MEMPLL
M M R D M G
RVREF_
U
P BRDQ22 BRDQ18 BRDQ20 BRA10 BRBA1 BRCKE DDRV VCCK VCCK VCCK VCCK VCCK VCCK
U O G O R A
C
R D A M G R M
R DVSS DVSS DVSS DVSS DVSS DVSS DVSS VCCK DVSS DVSS DVSS DVSS DVSS
M R U A O
FO M R F O O
T BRDQ27 BRDQ16 DDRV DDRV DVSS DVSS VCCK DVSS DVSS DVSS DVSS DVSS
R U D O G F O M D
O R
U BRDQM3 BRDQ31 BRDQ29 BRDQ25 DDRV DDRV DVSS VCCK DVSS DVSS DVSS DVSS DVSS
O O M M A BRDQS2 BRCLK1
D O U M G
RVREF_
F
V BRDQS2 BRCLK1 DDRV DDRV VCCK DVSS DVSS DVSS DVSS DVSS
R A
# # D
U O O M R
BRDQS3
R U G O M
W BRDQS3 DVSS DVSS DVSS DVSS VCCK DVSS DVSS DVSS DVSS DVSS
O MD
#
O F
Y
G R
BRDQM2 BRDQ30
O R
BRDQ28
M A
DVSS DVSS
F DVSS
O
DVSS DVSS
O
VCCK DVSS DVSS DVSS DVSS DVSS
R U
AA
A F
BRDQ24
O
BRDQ26
O
DVSS
D DVSS

VCCK DVSS DVSS DVSS DVSS DVSS
G O OR M
AB BRDQ21 BRDQ23
D
BRDQ19 BRDQ17

DVSS
U
DVSS
M G R VCCK DVSS DVSS DVSS DVSS DVSS
R F D O O M G R R A
U O
AC DDRV DDRV DDRV DDRV DDRV DDRV VCCK VCCK VCCK VCCK VCCK VCCK
A G O M R R M A F M AVDD12_ AVDD33_ AVDD33_ AVDD12_
G O O
AD BE4P BE4N REXT VCCK
U O
REC COM LD RGB
M R A F O D
AVSS33_ AVDD33_
R O
AE BE3P BE3N BECKP BECKN
M R
LVDSB LVDSB
O G O D M G
AVSS12_ AVDD12_
F DO U
AF BE2P BE2N
MA O M R A
VPLL VPLL
U G R
AVSS12_ AVDD12_ REXT_V
M
AG BE1P BE1N BE0P BE0N
O
LVDS_1 LVDS_1 PLL
O M R R A F O O
AVSS33_ AVDD33_
G O M
AH BO4P BO4N
U
LVDSA LVDSA
R R A F O D
AVSS12_ AVDD12_
R
AJ BO3P BO3N BOCKP BOCKN
G O M O M
LVDS_2 LVDS_2
D G
MA F
AVSS33_ AVDD33_
U
VCC3IO_ VCC3IO_ VCC3IO_
O O A
AK BO2P BO2N VGA_ST VGA_ST
M R R
B B B
D
B B
R U G O M
VCC3IO_ AVSS12_ AVSS33_ AVSS33_
O O
AL BO1P BO1N BO0P BO0N
M R A F O O
B REC COM LD
U G O D
AOSDAT AOSDAT PHYLED OPCTRL OPCTRL
R A M
AM AE4P AE4N VCCK VCCK LDM_DO AOMCLK JTDI
F
A4 A3 0 7 2
G R M O O M R
AOSDAT AOSDAT AOSDAT PHYLED OPCTRL OPCTRL
O G
AN AE3P AE3N VCCK VCCK OSCL0 JTRST# OSCL1
A D U
A0 A1 A2 1 9 6
F O O A
AVDD33_
M R R
OPCTRL
D M M
AP

AECKP AECKN AO4P AO3P AO2P AO1P VCCK VCCK GPIO52 LDM_DI AOLRCK OSDA0 USB_P2 JTCK OSDA1 U0RX
G
5
O
P3
O O M R U A F O
LDM_VS AVSS33_ OPCTRL
R O
AR AE2P AE2N AO4N AO3N AO2N AO1N VCCK VCCK GPIO54 AOBCK OPWM0 JTDO JTMS ASPDIF0 U0TX
U G M D
YNC USB_P2 4
R R A O
USB_DP USB_DP
R
AT AE1P AE0P AOCKP AO0P VCCK VCCK GPIO53 LDM_CS OPWM1 U1TX RXVP_1 TXVP_0
M F O O M
_P2 _P3
G O D U G
LDM_CL USB_DM USB_DM
A F
AU AE1N AE0N AOCKN AO0N VCCK VCCK GPIO55 OPWM2 U1RX RXVN_1 TXVN_0
R A
K _P2 _P3
M D O LB 1
O
2
M
3 4
G
5
O R 6
M
7 8 9 10 11 12 13 14 15 16 17 18 19
O O M R R U A F O O
R U A G F O M D R
R O O
20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 RT
A G O M D U M G
M F O O M G R R M A 19300_041_120416.eps
D U O
120416
O O M R R M A F O O
G D
Figure 8-4 Pin configuration -1-
R U A F O O M R
G O R M D O U G
MA F DO R O
R U M G R
F O R M A
O M
2012-Apr-20
U G O M A D O O
R R M A F O O M G R
G O D U A
MA F DO R O
U M
A G R
F O R
O
M O
O U M G O R M D R
R R M A F O O M G
A G F O O D R U A
M D O U M G R O M
O M R R A F D O O
G O M D O U A G
O D R U A F D O O
M G R M R
O O R D M A
F U M O G R
GR R D A O
O FO M M R
R R U D O A G O
G O O M M R
MA R F
R U D O A G
O
A G O F O M M R
M R U O A G O
O G O O R D M R
D M A F UM O G O
M O G R R D A
D A O F O M M R
M M R R U D O A G O
U O AG O M
OR D M R F U O
U M O G O O R D M A
R D A F U M O G R
F O M M R R D A O
O O M
Pinning
M
information 2,
MT5396JDNJ
R U O G
F U O
ARCLK0
G O O R D A
R D A M M
ARCLK0 ARDQ9 DDRV DVSS TCON5 TCON7 GPIO45 PDD3 PDD1 PACLE POWE# SD_D2 SD_D0 A
F
#
O O M R U O O
ARDQS0
M R
ARDQS1 ARDQ11 DDRV DVSS TCON4 TCON6 TCON12 PDD4 PDD2 POCE1# SD_D3 SD_CMD SD_CLK B
F
#
U O G O O M D R
GR
ARDQS1 EMMC_C USB_DP USB_DM
R D A
ARDQS0 ARDQ15 ARDQ0 ARDQ6 DDRV DVSS TCON8 PDD6 GPIO47 PDD0 POOE# PAALE SD_D1 C
F G
# LK _P0 _P0
O O M R U A
AVDD33_
M
FSRC_W AVSS33_ USB_DP USB_DM
F
ARDQ12 ARDQM1 ARDQ13 ARDQ2 ARDQ4 DDRV DVSS TCON9 PDD7 PDD5 GPIO46 PARB# POCE0# USB_P0 D
U O G R M
R USB_P1 _P1 _P1
O
P1
R R D A FO
VCC3IO_
G O O
DDRV DVSS DVSS DDRV DDRV DVSS TCON1 TCON10 GPIO51 GPIO48 GPIO49 GPIO43 GPIO42 GPIO35 GPIO28 GPIO36 E
O O M
A
A F M R D
VCC3IO_
O G O R
DDRV DVSS DVSS DDRV F
U
DDRV DVSS TCON0 TCON11 TCON3 TCON2 GPIO50 GPIO44 GPIO27 GPIO34 GPIO2 GPIO1
M
A
R R D A M G
RVREF_ VCC3IO_ VCC3IO_
O G U
DDRV DVSS DDRV DDRV DVSS GPIO24 GPIO6 GPIO5 GPIO4 GPIO3 G
O O M R A
A A A
A F M R
VCC3IO_ VCC3IO_
O M
DVSS GPIO26 GPIO0 GPIO12 GPIO7 GPIO25 H
M U O
A A
R R D G F O
VCC3IO_ VCC3IO_
O G A O
DVSS GPIO15 GPIO23 GPIO16 GPIO22 GPIO20 GPIO21 J
O O D
A A
D M A F M
U O M O M R GPIO11 GPIO10 GPIO17 GPIO18 GPIO14 GPIO19 K
M G R R D U G
DO
GPIO9 GPIO41 GPIO8 GPIO13 L
A O F O M G R O R M A GPIO40 GPIO33 GPIO38 GPIO31 GPIO39 GPIO32 M
M M R R U A F O O
SPI_DAT SPI_CLK
O G
DVSS GPIO37 GPIO29 SPI_CLE CI_INT N
U M
A 1
D A O O D
OR F R
PVR_TS PVR_TS
O O
VCCK DVSS DVSS VCCK GPIO30 SPI_CLK P
M M
DATA0 DATA1
M R D U G
PVR_TS PVR_TS PVR_TS CI_TSDA CI_TSVA CI_TSSY
G O A
DVSS DVSS DVSS DVSS VCCK R
U O R
VAL SYNC CLK TA0 L NC
R D A M G R M
DEMOD_ DEMOD_ DEMOD_ DEMOD_ DEMOD_ DEMOD_ DEMOD_ CI_TSCL
U O
DVSS DVSS DVSS DVSS VCCK T
M R A
TSDATA3 TSVAL TSCLK TSDATA2 RST TSSYNC TSDATA0 K
FO M R F O O
AVDD12_ DEMOD_
M
DVSS DVSS DVSS DVSS RF_AGC IF_AGC U
U O O D
PCIE11 TSDATA1
R D G F O
AVDD33_ DEMOD_ DEMOD_ DEMOD_ DEMOD_
A O M R
DVSS DVSS DVSS VCCK OSDA2 OSCL2 V
PCIE11 TSDATA7 TSDATA6 TSDATA5 TSDATA4
O F O M M D U G
AVDD12_
A
AVSS12_ PCIE11_ PCIE11_ PCIE11_ PCIE11_
U O O M R R
DVSS DVSS DVSS VCCK HDMI_2_ W
PCIE11 TXN TXP REFCKN REFCKP
R M
RX
O MD U G O
AVDD12_ AVDD33_
O R R A F
PCIE11_ PCIE11_
O
DVSS DVSS DVSS VCCK HDMI_1_ HDMI_2_ ASPDIF1 ALIN Y
F
RXN RXP
G O M O
RX RX
R U A F D
AVDD12_ AVDD33_
O O
HDMI_C HDMI_2_ HDMI_2_ HDMI_2_ HDMI_2_
M
DVSS DVSS DVSS VCCK HDMI_0_ HDMI_1_ AA
G O OR M R
EC RX_1B RX_1 RX_2B RX_2
D
RX RX
R U G
AVDD12_ AVDD33_ AVSS33_
F O O R
HDMI_2_ HDMI_2_ HDMI_2_
M A
DVSS DVSS DVSS DVSS HDMI_3_ HDMI_0_ HDMI_R AB
R D G
SDA RX_0B RX_0
U O
RX RX X
G R A F M
AVDD33_
M R
HDMI_2_ HDMI_2_ HDMI_2_ HDMI_1_ HDMI_1_ HDMI_2_ HDMI_2_
A O G M O O
VCCK VCCK VCCK VCCK VCCK HDMI_3_ AC
O
PWR5V HPD SCL RX_2B RX_2 RX_CB RX_C
M R U
RX
R A F O D
AVDD33_ AVSS33_
M O R
AVDD33_ AVDD33_ HDMI_1_ HDMI_1_ HDMI_1_
O G D
VDAC_B VCCK VCCK HDMI_R AD
O M
VDAC DEMOD SDA RX_1B RX_1
G
G X
F DO R U
MA O M A
AVSS33_ HDMI_1_ HDMI_1_ HDMI_1_ HDMI_1_ HDMI_1_ HDMI_1_ HDMI_1_
AE
G R
DAC1 PWR5V HPD SCL RX_CB RX_C RX_0B RX_0
U A O M
AVSS33_ AVSS33_
O M R R
AVDD33_ HDMI_0_ HDMI_0_ HDMI_0_
F
HDMI_R HDMI_R AF
G M O O
DAC1 SDA RX_2B RX_2
U O
X X
R R A F D
AVDD33_ HDMI_0_ HDMI_0_ HDMI_0_ HDMI_0_ HDMI_0_ HDMI_0_ HDMI_0_
O R
AG
M
DAC PWR5V HPD SCL RX_0B RX_0 RX_1B RX_1
G O D O M G
AVSS33_
MA F U
HDMI_3_ HDMI_3_ HDMI_3_ HDMI_0_ HDMI_0_
O O A
XTAL_ST AH
M R
PWR5V SCL SDA RX_CB RX_C
D R
B
U G O M
AVSS33_
O O R
AVDD10_ AVSS12_ AVSS12_ VMID_AA AVSS33_ HDMI_3_ HDMI_3_ HDMI_3_ HDMI_3_ HDMI_3_ HDMI_3_
M R A F
VDAC_B AJ
G O O
LDO RGB DEMOD DC AADC HPD RX_C RX_1B RX_1 RX_2B RX_2
R U A O M D
AVDD33_
R F R
AVDD33_ AVDD33_ AVDD33_ AVSS33_ HDMI_3_ HDMI_3_ HDMI_3_
XTAL_ST AK
G M O O M
PLLGP CVBS_1 CVBS_2 DAC RX_CB RX_0B RX_0
O G
B
A F O D U A
AVSS33_ AVSS33_ AVDD12_ AVDD33_
O
AL
M R R
VDAC CVBS_1 DEMOD AADC
D M G O M
OPWRS ORESET ADIN7_S ADIN6_S AVSS33_ AVSS33_ AVSS33_ AR1_AD AL2_ADA AL1_ADA AL3_ADA AR3_AD AR2_AD
O U
VSYNC AM
O M R A F
B # RV RV CVBS_2 PLLGP DEMOD AC C C C AC AC
U G R O O
OPCTRL OPCTRL LED_PW ADIN0_S ADIN1_S AL0_ADA AR0_AD
M D
HSYNC MPXP CVBS0P LOUTP AN
A O
1 3 M1 RV RV C AC
R R F O O M R
OPCTRL LED_PW VGA_SC ADIN2_S VDACY_ CVBS_C AIN4_L_ AIN2_L_ AIN6_L_ AIN5_L_
G O M
COM SOY1 PR1P Y0P SC0 LOUTN AP
G
8 M0 L RV OUT OM AADC AADC AADC AADC
A F D U A
OPCTRL STB_SD VGA_SD ADIN3_S AIN4_R_ AIN6_R_ AIN5_R_ AIN3_L_
O R R
GP RP PB1P SOY0 PR0P SY0 CVBS2P CVBS1P AR
M O M
0 A A RV AADC AADC AADC AADC
D U G O M
OPCTRL STB_SC ADIN5_S ADCINN_ AIN1_R_ AIN3_R_ AIN1_L_
O O A F
SOG COM1 PB0P CVBS3P XTALI AT
10 L RV DEMOD AADC AADC AADC
M R R M O O
OPCTRL ADIN4_S VDACX_ ADCINP_ AIN0_L_ AIN2_R_ AIN0_R_
U G O D
OIRI BP Y1P COM0 XTALO AU
R
11 RV OUT DEMOD AADC AADC AADC
G O R M A
20 21
F
22 23
D O
24
O
25 26
M
27
G R 28 29 30 31 32 33 34 35 36 37 RB
M A F O O M R R U A
M
19300_042_120416.eps
D U G O
120416
O O M R R M A F O O
G D
Figure 8-5 Pin configuration -2-
R U A F O O M R
G O R M D O U G
MA F DO R O
R U M G R
F O R M A
R R M A F O O M G R
G O D U A
MA F DO R O
U M
A G R
F O R
O
M O
O U M G O R M D R
R R M A F O O M G
A G F O O D R U A
M D O U M G R O M
O M R R A F D O O
G O M D O U A G
O D R U A F D O O
M G R M R
O O R D M A
F U M O G R
GR R D A O
O FO M M R
R R U D O A G O
G O O M M R
MA R F
R U D O A G
O
A G O F O M M R
M R U O A G O
O G O O R D M R
D M A F U M O G O
M O G R R D A
D A O F O M M R
M M R R U D O A G O
U O G M
O
U M O G O O R D M A
R D A F U M O G R
F O M M R R D A O
O O
Personal
M
Notes:
M R U O G
F U O G O O R D A
F U M O G R R D O
O FO M M R R U A
R U O A G O M
A G O O R
M
D M R FO D O O
M R F U O A G O M R
M A F U M O O R M
O G R R D A G F O O
D A O F O M M D R
M M R R U O O U M G
M M R F U A G F O M
U O G O R M D O O
U M O R
G O D R U A G
R D A U M G O R M
R U D O G F O O D R
O O M M A D O U M G
F U O O M R R A
O R
F G O M D O O
R U A F O O M
G
O OR O
M
O D R U G R
R F D U M G O R M A
M R R U A F O O O D
O G O M D M G R
F DO R U
MA O M R O
R U M
A G O R M A
U A G F O M F D O O
G R O R M D O O M R
G
MA F
D O
R O
U M G R
O R U
M A
O O M G O R A F O O
R R U A F M D R
M D O O M R R M A
O O M R U A G F O O
R U A G O R M D O
G O R M F O O M R
A F O D R R U A G
M D O U M G O M
O O M R R M A F O O
A G O M D U M G
M F O O M G R R M A
U M G O M D
U
10000_012_090121
O
MA A
110
F DO O U M G R O R M
O M G R O R A F O O
D
2012-Apr-20
R R U A F M R
G O M D O O U M G
MA F DO O M R R M A
O M R U A G F O O O
U A G O R M D R
A F O R R M A
M D O U M G O O O
O U M R R A F D
A G F O M D O R U A
M O O M G R O M O
O D R U A F D O
M G R M R
O FO M O G R R D A O
R R U D A O FO M M R
O F O M M R R U D O A G O
R 9. Block Diagrams R U
Block
O
Diagrams
A G
L12M1.1L LA 9.
O
EN 43
O M M R
G O O D M R F U O G
MA F U M O G O O R D M A O
G R R D A F U M O R
A 9-1
O F O
32" 5000 series
M M R R D A G
M R R U D O A G O F O M M
G
DO U O
Wiring diagram
A O F O M M R R D O
M R R U D O A G O F O M R
O A G O O M
LED Power
M R U A G
D
8M95
M M R F U O A G O O R M
U O G O O R D M R F O O
R D M A F U M O G O D R
U M O G R R D A U M G
M R
1316 1M95
A O O M A
8P 14P
R D M F U O O R M
FO U M O A G R
O O R
M
D AG
M
F D O O
R D M F U O O M R
FO U M O A G R
O R
O MD R R U A G
R D
1D02 1M95
F G O M
3P 14P
O F O M M R R U A F O O
R U O A G O M D
R D FO R
1G51
O O
52P
O FO M M R D U M G
A
USB 3
R R U A
D O A G O MAIN POWER SUPPLY
M G R R M
G U O
(1005)
A O F O M M R R M A F OB O
U O D
SSB
M R R D A G F O O O M R
(1150)
G O O D
USB 2
M A F U OM M O M R R U A G
R R U G O M
DO G O O MD R A F
8G51
A F G O R M D O O
M
1D01
8D01
R U A F
4P
M O O M
DO G O OR M D R
HDMI
A U G
SIDE
EM F O O M R R A
SERV.U
M R D G
DIGITAL
1C22
11P
8C20
O
AUDIO
U M
OUT
U O G R A
AV IN AUDIO IN
R F
NETWORK
M
DVI/VGA
O R D M A O U A G O M D O O
U M O R O R M F D O N
O
L
M R
G G
KEYBOARD CONTROL
1308
R D A F O R U
TV ANTENNA
D 8308 RO M A
2P HDMI
FO G R
51P
M
U O M O M R U A O M
R D U A G F O M F DO O
O
F UM G R O R M D O O M R
A F G
(1114)
R M D O O M R R U
RED Wires
A
U M
White wires
O R G O
F DO R O
U M
A G F O R M A F D O O
M R M R
CN2 CN1
U AG F O D O O U M G
O R M D O O J M R R M A
F G O
DO U
J2 J1 SENSOR BOARD
O M R A F O O
3P (1122)
R
11P
M R R U A G O M D
U G O M F D O O U M G R
A F
1M95 (B01)
O R M
1. +3V3STBY
O O M R R A
D G O M
2. STANDBY
F U
1C22 (B04C) J1 (J)
DO O A F
3. GND
M R R O O
4. GND 1. LIGHT-SENSOR 1. SDA-SET
U G O M D
2. 3D-LED 2. GND
R
5. +12Vin
M A F O O R
3. LED-2 3. SCL-SET
R
6. +12Vin
G M
1G51 (B04D)
U
4. GND 4. +5 V
D G
7. +12VAUDIO
A O M U
1. +VDISP 5. KEYBOARD 5. RC
A
8. +12VAUDIO
R F R
2. +VDISP
M O O M R
9. GND 6. +3V3-STANDBY 6. +3.3 V - STANDBY
O G M
3. +VDISP 7. RC 1D01 (B03) 1D02 (B03) 7. KEYBOARD J2 (J)
D U O
10. GND
F DO A
4. +VDISP 8. +5V 1. LEFT-+ 1. LEFT-+ 8. GND 1. +5 V
F
11. BL-ON-1
O R R O O
|
M
2. LEFT-- 2. GND 2. KEYBOARD
M
12. BL-DIM-1 9. SCL-SET 9. LED-2
G O D
| 10. GND 3. RIGHT-+ 3. RIGHT-- 10. 3D-LED 3. +3.3 V - STANDBY
U
13. BL-I-CTRL-1
M R A F O
51.
R
14. POWER-OK-1 11. SDA-SET 4. RIGHT-- 11. LIGHT-SENSOR
U G O R M D O U M G
O R M A F O O M R R A
19300_030_120406.eps
F D U G O M
120406
DO R R A F
O M G O DO O
2012-Apr-20 back to
U M
div. table
R U
Block
O
Diagrams
A G
L12M1.1L LA 9.
O
EN 44
O M M R
G O O R D M R F U O G
MA F M R D A O
9-2 Wiring Diagram 42" (5000 series)
RWiring diagram 42" 5000 series RU D O A G O FO M M R

A G O O M M R U O G
M R F U O G O O R D A
G R D A F M M
LED Power
DO M A
R O F O
U M O
M
G R
O R
O M
U O
D R O
O G O O R D M A F G
D A F U M O G R R U M A
M M R R D A O O O O
R U D O A G O F O M M R F D

8M95
M M R R U D O A G O M G
1316
R 1M95
O G U
8P 14P
R U D A O F O M M R R M A
FO M M R R U O
D AG FO O
R U D O A G O O M M D O
M F U O O M R
FO U M O A G R
O R
O MD R R U A G 1D02 1M95
R D
3P 14P
O O M M R F U A G F O M
F U O G O R M D O O
1G51
R
52P
O O R D M A FO
A
O O M R
MAIN POWER SUPPLY USB 3
M R D G
(1005)
R F U O A G O M R R U A
G O O R D M R U A G O
B
M
SSB
A M R F O
(1150)
F U O O M D O
USB 2
M R R D A G F O O M R
A G O F O M M D U G
M R U O O M R R A
R G M
N L
U O
1D01
4P
DO G O MD
1308
O R R A F
2P
A F O
HDMI
G O M O
SIDE
M R U A F D
SERV.U
M O O
DIGITAL
1C22
11P
AUDIO
DO G O OR M M R
OUT
D
AV IN AUDIO IN
NETWORK
A U
DVI/VGA
M E R F O O M G R R A G
M D U O
8308
8G51
U O G R R A F M
R D A O M G M O O
TV ANTENNA HDMI
O M M R R U A F O O O D
U O G O M D M R
KEYBOARD CONTROL
R D F G
8D01
A O O M R U A
FO M
U O M O M
D R R U AG
F O R
O
M
O
51P
R U G O M
RED Wires
O D R R A F O D R
White wires
F UM G M
(1114)
A F O O O D O U M G
R M D U M R R M A 8C20
O R G O
F DO R O
U M
M R R
CN2 CN1
U A G F O M D O O U M G
R O A
J2 J1 SENSOR BOARD
O R
J
M D R
3P 11P (1122)
F O M G O M
DO R O U M
A G R
O R U
M A F D O O
M R
1M95 (B01)
U
1. +3V3STBY
R A F
2. STANDBY
R R A
1C22 (B04C) J1 (J)
M O
3. GND
O D O M G O M
F U
DO O A F
5. +12Vin 2. 3D-LED 2. GND
M R R O O
6. +12Vin 3. LED-2 3. SCL-SET
M
1G51 (B04D)
U G O D
4. GND 4. +5 V
R
7. +12VAUDIO
1. +VDISP
M A F R
5. KEYBOARD 5. RC
O O
8. +12VAUDIO
G R M
2. +VDISP 6. +3.3 V - STANDBY 6. +3.3 V - STANDBY
U G
9. GND
A O M D U
A
10. GND
R F R
4. +VDISP
M R
1. LEFT-+ 1. LEFT-+ 1. +5 V
O O
8. +5 V 8. GND
M
11. BL-ON-1
O G M
| 9. SCL-SET 2. LEFT-- 2. GND 9. LED-2 2. KEYBOARD
D O
12. BL-DIM-1
F DO U A
F
13. BL-I-CTRL-1
O R R O O
51. 4. RIGHT--
M
11. SDA-SET 11. LIGHT-SENSOR
M
14. POWER-OK-1
M R U A G F O O D R
U G O R M D O U M G
R A F O O M R R A
19300_035_120416.eps
O M D U O M
120416
F R R G F
DO O M G O A DO O
2012-Apr-20 back to
U M
div. table
R U
Block
O
Diagrams
A G
L12M1.1L LA 9.
O
EN 45
O M M R
MA F M R D A O
R R U D O A G O F O M M R
A G Wiring diagram 42" 6000 series
O O M M R U O G
R D A F M M
LED Power
DO A G O F O M M R R U O O
M R U O A G O O M D R
O G O O R D M R F U G
D M A F U M O G R M A
M O G R R D A O O O O
R U D A O F O M M R F D
U O G O R
8M95
M M R R D A UM G
O G
1316 1M95
U O O M R A
8P 4P 14P
R D M A F U M O O R M
FO U M O A G R
O O R
M
D AG
M
F D O O
R D M F U O O M R
FO U M O A G R
O R
O MD R R U A G
R D
1D02 1M95
F G O M
3P 14P
R U O A G O M D
1G51
R D FO
52P
O O M M R
A
D O O M G R MAIN POWER SUPPLY USB 3
F U
(1005)
R R U D O A G O M G R R M A
G O O M R U A O
SSB
M F O
B
A F R M O
(1150)
M R U O G O D
USB 2
G O O R D A F D O O M R
R R U G O M
G O MD
N L
DO
1D01
A F
4P
O R R
1308
A O
2P
F G O M D O
HDMI
M
SIDE
M R U A F O O
SERV.U
DO G O OR M R
DIGITAL
1C22
M
11P
AUDIO
D
OUT
A U
AV IN AUDIO IN
G
NETWORK
R
DVI/VGA
M M E R F D O O M 8G51 G O R A
O G U A M
8308
U D A O M R R F
R U G O M O O
TV ANTENNA HDMI
O M M R R M A F O O D R
U O G O D M
8M54
R D F G
KEYBOARD CONTROL
A O O M R U A
8D01
FO M
U O M O M
D R R U A G
F O R
O
M
O
R G O M
51P
D U A F D
RED Wires
O
White wires
(1114)
R A F O O M U A G
O M D R U G R O R M 8C20
F DO R O
U M
A G F O R MA F D O O
U M G O R M O O M G R
CN2 CN1
R M A F O O D R R U A
J2 J1 SENSOR BOARD
D
J
O M M
(1122)
G
3P 11P
F O
DO R O U M
A G R
O R U
M A F D O O
U M
1M95 (B01)
G O R M F O O M R
D U G
1. +3V3STBY
R A F R R A
2. STANDBY
O M O O M
3. GND 1C22 (B04C) J1 (J)
F D U G O M
DO O R A F O O
2. 3D-LED 2. GND
R
5. +12Vin
M M
3. LED-2 3. SCL-SET
D
6. +12Vin
R U G O
7. +12VAUDIO 1G51 (B04D) 4. GND 4. +5 V
M R A F O O R
1. +VDISP
G M
8. +12VAUDIO 5. KEYBOARD 5. RC
U M D G
2. +VDISP
A O
6. +3.3 V - STANDBY 6. +3.3 V - STANDBY
U
9. GND
R R A
3. +VDISP 1D01 (B03) 1D02 (B03) J2 (J)
F
10. GND 7. RC 7. KEYBOARD
M O O M R
4. +VDISP
O M
1. LEFT-+ 1. LEFT-+ 1. +5 V
G
11. BL-ON-1 8. +5 V 8. GND
D U O
|
F
2. LEFT-- 2. GND 2. KEYBOARD
DO
9. SCL-SET 9. LED-2
A
12. BL-DIM-1
R R F O
|
O
10. GND 3. RIGHT-+ 3. RIGHT-- 10. 3D-LED 3. +3.3 V - STANDBY
O
13. BL-I-CTRL-1
M M
51.
D
4. RIGHT--
G
O
14. POWER-OK-1
M R R U A F O M R
R U A G O M D O U G
F O O M R R A
19300_036_120416.eps
O M D U O M
120416
F R R G F
DO O M G O A DO O
2012-Apr-20 back to
U M
div. table
R R U D A O F O M M R
R U
Block
O
Diagrams
A G
L12M1.1L LA 9.
O
EN 46
O M M R
MA F M R D A O
R R U D O A G O FO M M R
A G O O
Wiring diagram 42" 7000 series
M M R U O G
G R D A F M M
DO O O M R U O O
8M83
M A F U M O G O R
O M D R
R R D A F
LED Power
D O A G O O M M R U A G
8M99
R D M A F U M O G O D R 8M95
U M O G R R D A UM G
1316 1316 1M99 1M95
O O M R A
8P 8P 4P 8P 14P
R D A M R
1M83
F M
20P
FO M U O O
1M84
R D AG
20P
U M O G O O R F D O O
R D M A F M
U O M O M R 8M59
FO U M O A G R
O R
O MD R R U A G
R D
1D02 1M95 1M99 1A04
F G O M
3P 14P 8P 18P
R U O A G O M D
R D FO
1G51
51P
O O M M R
A
D O O M G R MAIN POWER SUPPLY USB 3
F U
(1005)
A G O O M M R R U A F O B
O O
SSB
F M
(1150)
1G51
U O D
41P
M R G O
USB 2
R D A F O R
AMBILIGHT MODULE 10 LED

A G O O M M D O U M G
M R F U O O M R R A
G R
O MD U G O M
DO
N L
1D01
O R A F
4P
R
1308
A F O
2P
M G O M D O
HDMI
R
SIDE
M U A F O O
SERV.U
DO G O OR M M R
DIGITAL
1C22
11P
D
AUDIO
OUT
A U G
AV IN AUDIO IN
R
NETWORK
O
DVI/VGA
M M E R F D O 8G50 M
G O R A
U O G R U A M
8G51 8308
R D A O M G R M F
U O O O
TV ANTENNA

HDMI
O M M R R M A F O O D R
(1163)
(1163)
R U D O G FO O D U M G
KEYBOARD CONTROL
A O M R A
8D01
FO M M D R U AG O R M
AL
AL
R U O O U M G O R M F O O
41P 51P
O D R A F D
RED Wires
F UM G O R M D O O M R
White wires
G
(1114)
R M A F O O M R R U A
O D R U G O M
DO O
8C20
F U M G O R M A F D O O
M R R A F R
1M83
20P
G M O O M
CN2 CN1
R U A F O O O D U A G
M R R
J2 J1
D
SENSOR BOARD
O M M
J
G
(1122)
O
3P 11P
F DO O M G R R U A F O O
M R R U A O M D
M F O O M R
1M95 (B01)
R U
1. +3V3STBY
A G F O D U G
O R R A
2. STANDBY
O M O M
1C22 (B04C) J1 (J)
G M
3. GND
F D O
1A04 (B08)
U
1. LIGHT-SENSOR 1. SDA-SET
DO O
4. GND
A F O O
11. GND
R
1. 3V3_AL
R
2. 3D-LED 2. GND
M
5. +12Vin
M
2. DATA_GND 12. GND
D
3. LED-2 3. SCL-SET
G
6. +12Vin
R U O
1G50/1G51 (B04D) 4. GND 3. SPI-DATA-OUT 13. 12V_AL 4. +5 V
M A R
7. +12VAUDIO
G R F O O M
8. +12VAUDIO 1. +VDISP 5. KEYBOARD 4. DATA_GND 14. 12V_AL 5. RC
U A O M D G
2. +VDISP 5. SPI-DATA-RETURN 15. 12V_AL
U
9. GND 6. +3.3 V - STANDBY 6. +3.3 V - STANDBY
R F R A
3. +VDISP 7. RC 1D01 (B03) 1D02 (B03) 6. DATA_GND 16. 12V_AL 7. KEYBOARD J2 (J)
M R
10. GND
O O O M M
4. +VDISP 7. AMBI_TEMP 17. 12V_AL
G
11. BL-ON-1 8. +5 V 1. LEFT-+ 1. LEFT-+ 8. GND 1. +5 V
F D U O
| 8. GND 18. 12V_AL
DO A
12. BL-DIM-1 9. SCL-SET 2. LEFT-- 2. GND 9. LED-2 2. KEYBOARD
O R R F O
| 3. RIGHT-+ 3. RIGHT-- 9. GND 19. 12V_AL 3. +3.3 V - STANDBY
O
13. BL-I-CTRL-1 10. GND 10. 3D-LED
M G M D
41. / 51. 10. GND 20. GND
O
11. SDA-SET 4. RIGHT-- 11. LIGHT-SENSOR

14. POWER-OK-1
U M R R U A F O O M R
R A G O M D U A G
F O O M R R
19300_037_120416.eps
O M D U O M
120416
F R R G F
DO O M G O A DO O
2012-Apr-20 back to
U M
div. table
R U
Block
O
Diagrams
A G
L12M1.1L LA 9.
O
EN 47
O M M R
MA F M R D A O
RWiring diagram 47" 5000 series RU D O A G O FO M M R

A G O O M M R U O G
G R D A F M M
LED Power
DO M A
R O F O
U M O
M
G R
O R
O M
U O
D R O
O G O O R D M A F G
M M R R D A O O O O

8M95
M M R R U D O A G O 1315
M G
1316
R 1M95
O G U
8P 8P 14P
R U D A O F O M M R R M A
FO M M R R U O
D AG FO O
R U D O A G O O M M D O
M F U O O M R
FO U M O A G R
O R
O MD R R U A G
R D F G O M
1D02 1M95
O O M
3P 14P
F U M O G R R U M A F O O
R R D A O
FO D
1G51
R
52P
O O
MAIN POWER SUPPLY
M
A
O O M M R D G
(1005) USB 3
G O O R D M R U A G O B
M SSB
A F M R F O O
(1150)
M U O O M D
USB 2
G R R D A G F O O M R
A O F O M M D R U A G
M R U O O M R
1D01
R G M
N L
4P
G O MD U
DO
1308
O R R A F
2P
A O
HDMI
SIDE
F G O M D O
SERV.U
M
DIGITAL
1C22
R U A F
11P
M
AUDIO
OUT
O O
AV IN AUDIO IN
G O OR M
NETWORK
DO M R
DVI/VGA
A O O D R U G
M M E R F D M G R A
U O
8308
8G51
G A M
TV ANTENNA
O R
HDMI
R U D A O M G R M F O O
U O G O M D M G R
KEYBOARD CONTROL
R D F
8D01
A O O M R U A
FO M
U O M O M
D R R U AG
F O R
O
M
O
51P
R U G O M
RED Wires
O D R R A F O D R
White wires
(1114)
F UM A G F O M D O U M G
R M D O O M R R M A
U
8C20
O R G O
F DO R O
U M
M R R
CN2 CN1
R O O A
J2 J1 SENSOR BOARD
R
J
M D R
3P 11P (1122)
F O M G O M
DO R O U M
A G R
O R U
M A F D O O
M R
1M95 (B01)
U
1. +3V3STBY
R A F
2. STANDBY
R R A
1C22 (B04C) J1 (J)
M O
3. GND
O D O M G O M
F U
DO O A F
5. +12Vin 2. 3D-LED 2. GND
M R R O O
6. +12Vin 3. LED-2 3. SCL-SET
M
1G51 (B04D)
U G O D
4. GND 4. +5 V
R
7. +12VAUDIO
1. +VDISP
M A F R
5. KEYBOARD 5. RC
O O
8. +12VAUDIO
G R M
2. +VDISP 6. +3.3 V - STANDBY 6. +3.3 V - STANDBY
U G
9. GND
A O M D U
A
10. GND
R F R
4. +VDISP
M R
1. LEFT-+ 1. LEFT-+ 1. +5 V
O O
8. +5 V 8. GND
M
11. BL-ON-1
O G M
| 9. SCL-SET 2. LEFT-- 2. GND 9. LED-2 2. KEYBOARD
D O
12. BL-DIM-1
F DO U A
F
13. BL-I-CTRL-1
O R R O O
51. 4. RIGHT--
M
M
14. POWER-OK-1
M R U A G F O O D R
U G O R M D O U M G
R A F O O M R R A
19300_038_120416.eps
O M D U O M
120416
F R R G F
DO O M G O A DO O
2012-Apr-20 back to
U M
div. table
R U
Block
O
Diagrams
A G
L12M1.1L LA 9.
O
EN 48
O M M R
MA F M R D A O
A G O O
Wiring diagram 47" 7000 series
M M R U O G
G R D A F M M
DO O O M R U O O
8M83
M A F U M O G O R
O M D R
R R D A F
LED Power
D O A G O O M M R U A G
8M99
R D M A F U M O G O D R 8M95
1316 1316 1M99 1M95
O O M R A
8P 8P 4P 8P 14P
R D A M R
1M83
F M
20P
FO M U O O
1M84
R D AG
20P
U M O G O O R F D O O
R D M A F M
U O M O M R
FO R
8M59
U M O G O R
O MD R U A G
R D A F G O R M
O O M R U A F
1D02 1M95 1M99 1A04
M O O
3P 14P 8P 18P
R F U O A G O R M D
R D FO O O R
1G51
M M
51P
O O R
MAIN POWER SUPPLY
M D G
A
F U
(1005)
A
USB 3
R R U D O A G O M G R R M
A G O O M M R R U A F O O O
SSB
F
B
U O M D
(1150)
1G51
M O
41P
R D A G
USB 2
R F O R

A G O O M M D O U M G
M R F U O O M R R A
R
O MD U G O M
1D01
DO G
N L
4P
O R R A F
1308
A F O
2P
G M
HDMI
O D O
SIDE
M R U A F
SERV.U
M O O
DIGITAL
1C22
11P
AUDIO
G O OR M
OUT
DO M R
AV IN AUDIO IN
D
NETWORK DVI/VGA
M EA F O O 8G50 M R R U A G
M G R D U A G O M
U O R
8G51 8308
R F
TV ANTENNA
M
HDMI
O R D M A O U A G O M DO O
M R R M F O O R
(1163)
(1163)
R U D O G FO O D U M G
KEYBOARD CONTROL
A O M R A
8D01
FO M M D R U AG O R M
AL
AL
R U O O U M G O R M F O O
41P 51P
O D R A F D
RED Wires
F UM G O R M D O O M R
White wires
G
(1114)
O D R U G O M
DO O
8C20
F U M G O R M A F D O O
M R R A F R
1M83
20P
G M O O M
CN2 CN1
R U A F O O O D U A G
M R R
J2 J1
D
SENSOR BOARD
O M M
J
G
(1122)
O
3P 11P
M R R U A O M D
M F O O M R
1M95 (B01)
R U
1. +3V3STBY
A G F O D U G
O R R A
2. STANDBY
O M O M
1C22 (B04C) J1 (J)
G M
3. GND
F D O
1A04 (B08)
U
1. LIGHT-SENSOR 1. SDA-SET
DO O
4. GND
A F O O
11. GND
R
1. 3V3_AL
R
2. 3D-LED 2. GND
M
5. +12Vin
M
2. DATA_GND 12. GND
D
3. LED-2 3. SCL-SET
G
6. +12Vin
R U O
1G50/1G51 (B04D) 4. GND 3. SPI-DATA-OUT 13. 12V_AL 4. +5 V
M A R
7. +12VAUDIO
G R F O O M
8. +12VAUDIO 1. +VDISP 5. KEYBOARD 4. DATA_GND 14. 12V_AL 5. RC
U A O M D G
2. +VDISP 5. SPI-DATA-RETURN 15. 12V_AL
U
9. GND 6. +3.3 V - STANDBY 6. +3.3 V - STANDBY
R F R A
3. +VDISP 7. RC 1D01 (B03) 1D02 (B03) 6. DATA_GND 16. 12V_AL 7. KEYBOARD J2 (J)
M R
10. GND
O O O M M
4. +VDISP 7. AMBI_TEMP 17. 12V_AL
G
11. BL-ON-1 8. +5 V 1. LEFT-+ 1. LEFT-+ 8. GND 1. +5 V
F D U O
| 8. GND 18. 12V_AL
DO A
12. BL-DIM-1 9. SCL-SET 2. LEFT-- 2. GND 9. LED-2 2. KEYBOARD
O R R F O
| 3. RIGHT-+ 3. RIGHT-- 9. GND 19. 12V_AL 3. +3.3 V - STANDBY
O
13. BL-I-CTRL-1 10. GND 10. 3D-LED
M G M D
41. / 51. 10. GND 20. GND
O
11. SDA-SET 4. RIGHT-- 11. LIGHT-SENSOR

14. POWER-OK-1
U M R R U A F O O M R
R A G O M D U A G
F O O M R R
19300_039_120416.eps
O M D U O M
120416
F R R G F
DO O M G O A DO O
2012-Apr-20 back to
U M
div. table
R U
Block
O
Diagrams
A G
L12M1.1L LA 9.
O
EN 49
O M M R
G O OR D M R F U O G
MA F M R D A O
9-7 Block Diagram Video
R
VIDEO
A G B02
O
TUNER & DEMOD
O M
B04
M R B04D
U
MT5396
O G
LVDS DISPLAY
F O G R D A
1201
U
7210
M
7300
R O O M
SUT-RA214ZN
R D A M
CXD2828 MT5396
GTUNER F
DO M U O O
1G50
O O
B02 DEMOD_IF
R
B04D LVDS_EPI
A M
29 DEMOD_RST T34
F R
DEMOD_RST 32
G D
DIGITAL
M U O
IF_AGC1
O R
48
O M
4
R
DEMODULATOR 5 DEMOD_TSCLK T32 AO PX1
D A
DEMOD_TSCLK
G R F G
TO DISPLAY
O O O M
2 IF_N 4 DEMOD_TSVAL T31
R
38
M U A
DEMOD_TSVAL
A
IF1_P
D M R F
IF1_N
3 IF_P
U
37 3
O G
DEMOD_TSSYNC T35
O O R
DEMOD_TSSYNC
M
M A
AE PX2
R D
3
G O O
17 DEMOD_TSDATA7
O
T36
U M F
DEMOD_TSDATA0
R D A O F O M R D
IF_AGC2

AGC2 9 U35 IF_AGC 1G51
M R U O G O M R
40
M A
IF2_N AT32 ADCINN_DEMOD
D
IF2_P 7
U O G R M R U G
BO PX3
O O A
IF2_P
A M R
IF2_N 8 AU32 ADCINP_DEMOD
R D F M
TO DISPLAY
FO M M R R U O
D AG FO O
O G O
B06C
U
VGA BE PX4
O O D
B06B VIDEO_IO 11

1A01
R D M
1
A F M
U O
RP
M AR25 RP
O M R
FO R
10
M
15
R G
GP

AR24 GP
5
U O G O MD
B05B
U A
3 BP USB
R
AU24
O R
BP
R D A F
13 HSYNC
1
AN25 HSYNC
M
6
G O
11
B04C GPIO_USB
O O M R
14
U A F
VSYNC AM25 VSYNC
F
VGA
U M O G O R M D O O 1C01
R A
CONNECTOR
R D FO
1
O O R
1
M M
B06B
O
ANALOG I/O-COMPONENT & COMPOSITE
O
USB_DM_P1
R
D37 2
M D G
HDD
3 2
USB_DM_P1
F U
1VA1 D36 USB_DP_P1 3
U O G O R A
USB_DP_P1
R A M R
4
10 SPR0P 4
D
AR28 PR0P
G R M R U G O M
18 SPB0P AT28 PB0P
O O A
CVI1
A M R F O O
14 SY0P AP27
F M
Y0P 1C02
M U O O D
5 CVBS_AV4
G
AR31 CVBS1P
R
1
R D A F O O M R
1
G
AU13 USB_DM_P2 2
O O D
USB_DM_P2 SKYPE
3 2
A M M U
AT13 USB_DP_P2 3
F
USB_DP_P2
M U O O M R R A
4
4
R R U G O M
DO B05AMAG O O MD R R A F
CVBS
O
CVBS_AV3 AN29 CVBS0P 1C03
F G M
SIDE
O D O
1
M R U A F
1
O O
AU14 USB_DM_P3 2
G O OR M R
USB_DM_P3
DO
3 2
M
DIGITAL I/O-HDMI SIDE
D
AT14 USB_DP_P3 3
A U
B05A HDMI-ETHERNET USB_DP_P3
R G
1B01
O
4
4
M R F M G R A
1
M D
RX_3_2 AJ37
O G R U A O M
3
U
RX_3_2B AJ36
D A O M R F
1
M
4 1D01
R
AJ35
G O
RX_3_1
O
2
U O
1
M A
6

AJ34
O D
RX_3_1B
M R F O
1
R O
AK35 HDMI_3_RX C37 USB_DM_P0 2
R
7
M
RX_3_0
O D
3 2
USB_DM_P0
U
WIFI
G O M
9 C36 USB_DP_P0 3
G
RX_3_0B AK34 USB_DP_P0
R D F
18
O R U
19
A O M B04C G
4
4
A
10 RX_3_C AJ33
FO M M D U R
12
M
HDMI 1 RX_3_CB AK33
RES
U O O M R R A O
CONNECTOR
R U G O M F O O
1B02
FLASH+CONTROL+EJTAG
O D R R A F D
1 RX_0_2 AF35
O
7700
F UM G O M O M R
3 RX_0_2B AF34 B04C SERIAL_NAND H27U4G8F2D
D G
1
A F
2

SDIO_SPI
U
4 RX_0_1 AG37
R M O O M R R A
6 RX_0_1B AG36
D U M
FLASH
O G O
7 RX_0_0 AG35 HDMI_0_RX
R
PDD
DO O
NAND_PDD(0-7)
F M R
4Gb
A F O O
9 RX_0_0B AG34
18
G
19
U O M D
10 RX_0_C AH35
M R R A F R
HDMI 2 12 RX_0_CB AH34
U G O M O O M G
CONNECTOR
R M A F
1B03
O O D R R U A
O D M M
B04B DDR3
1 B04B DDR3
G
RX_1_2 AC35
F O
DO O M R U A F
3 AC34
O
RX_1_2B
O
BRDQ
R
BRDQ(0-31)
U G
1
D
AD35
M
RX_1_1
2
M R R A O
6 RX_1_1B AD34
F O O M R
ARDQ ARDQ(0-31)
G O M
AE37 HDMI_1_RX
U
7
ARDQ(16-31)
BRDQ(16-31)
RX_1_0
ARDQ(0-15)
BRDQ(0-15)
R A F D U G
9 RX_1_0B AE36 7601 7602 7603 7604
R A
18
O R
19
M
10 H5TQ2G63BFR H5TQ2G63BFR H5TQ1G63DFR H5TQ1G63DFR
O O M
RX_1_C AE35
F D G O M
12
U
RX_1_CB AE34
DO O
HDMI 3
A F
SDRAM SDRAM SDRAM SDRAM
M R R O O
CONNECTOR
M
2Gb 2Gb 1Gb 1Gb
U G O D
1B04
M R R A F O O R
1 RX_2_2 AA37
U G M D M G
3 AA36
O
RX_2_2B
R A R U A
1
F
2
4 RX_2_1 AA35
O M O O M G R M
6 RX_2_1B AA34
F D U O
DO A
7 RX_2_0 AB35 HDMI_2_RX
O R R F O
ARA ARA(0-14)
M M O
9 RX_2_0B AB34
G D
18
O
19
U
10 RX_2_C AC37
M R A F O
BRA BRA(0-12)
R M R
12
O
RX_2_CB AC36
U
HDMI 4 (SIDE)
G O M D U G
19300_018_120403.eps

CONNECTOR
R A F R A
120403
F O M D O O U M G R O M
DO R R A F
O M G O DO O
2012-Apr-20 back to
U M
div. table
R U
Block
O
Diagrams
A G
L12M1.1L LA 9.
O
EN 50
O M M R
MA F M R D A O
9-8 Block Diagram Audio
R
AUDIO
A GB02
O
TUNER & DEMOD
O M
B04
M R B03
U
MT5396
O G
CLASS-D & MUTING 7400
F R D A
TAS5731
O G
1201
U
7210
M
7300
R O O
5410
M
SUT-RA214ZN
A M
46
R D
CXD2828 MT5396
GTUNER F
DO O O M U O O
B02 DEMOD_IF
R
B06B AUDIO_DAC_ADC
M
1D01
A F R
5 DEMOD_TSCLK T32
G D
DIGITAL 1 1
U O
DEMOD_TSCLK
M
IF_AGC1
O R
48
O M
4
R
AOLRCK 20
DEMODULATOR AOLRCK AP11
R D A F
4 DEMOD_TSVAL T31
G
2467
G
DEMOD_TSVAL
O
AOBCK 21
AOBCK AR11 2
O O M
2 IF_N
R
38
U A
+VSND 1D02
A M
IF1_P
D
3 DEMOD_TSSYNC T35
F
AOMCK 15

DEMOD_TSSYNC AOMCK AM12 SPEAKER L 1
U O G R M
3 IF_P 37 2468
M O O
CLASS D
R
IF1_N
M
17 DEMOD_TSDATA7 T36
A
AOSDATA0 AN9 AOSDATA0 22
R D
DEMOD_TSDATA0 2

POWER
U O G O O M F O O
AMPLIFIER 39 3
R
3
R D A F M D
IF_AGC2

AGC2 9 U35 IF_AGC
O G O R
19
U
MUTE
M
B04A 2469
M R M
4
A
IF2_N AT32 ADCINN_DEMOD
D
IF2_P 7
R G
+VSND SPEAKER
U O G U
SPEAKER R WOOFER
O O M R A
IF2_P 7401 2470
A M R
IF2_N 8 AU32 ADCINP_DEMOD POWER_
R D F U O M
B04A DOWN 25
FO M M R D AG O
B01A
G R F O O
5413
O
B06B
U
ANALOG I/O-COMPONENT & COMPOSITE 36
O O D
B06B AUDIO_DAC_ADC
R D A F M M
1VA1
FO M M R U O O M R
19
B06A
AIN0_L AU35 AIN0_L_AADC ANALOG I/O - HEADPHONE
R U G
CVI1 7800
U O G O MD
23 AIN0_R
A
AU37 AIN0_R_AADC TS48911
O R R
7801-1
R D A F G O M
B04A RESET-AUDIO 5
O O M
1401
R
AIN2_L
U A F
AP34 AIN2_L_AADC 1
M
AMPLI-
F G R O O
PC_AUDIO
O
AIN2_R
U M
AU36 AIN2_R_AADC HPOUT_L 7
O D
B06Q AM35 FIER
R
AL3_ADAC
R D A FO R
HEADPHONE
O O
HPOUT_R
AR3_ADAC AM36 6
O O M M
OUT 3.5 mm
R
AIN1_L AT37 AIN1_L_AADC

CVBS
F U M O G O D
AIN1_R
R U
AT35 AIN1_R_AADC
A G
R
B05B
R M
SIDE USB 1C01
R D A G M
B04C GPIO_USB
G U O
1
O O M R A
1
A M R F O
USB_DM_P1 2
O
D37
B03
F
CLASS-D & MUTING
M
HDD
3 2
USB_DM_P1
M U O O D
USB_DP_P1

D36 3
R G
USB_DP_P1
R D A F O
4
R
4
G O M
1D03 2
O O D
+3V3_SW
A M M U G
SPDIF 1 SPDIF_OUT AR16 ASPDIF0
F R A
OUT 3
U O R
1C02
M R R O U M ARC
G
Y32 ASPDIF1
O M
1
DO B05AMAG O MD
1
O R A F
USB_DM_P2 2
R
AU13
O
USB_DM_P2 SKYPE
3 2
F
USB_DP_P2
M
3
G
AT13
O D O
USB_DP_P2
R
DIGITAL I/O-HDMI
U A F
4
4
O O
5B01 2B01 3B09
DO G O OR M D M R
1B01
A U
B05A HDMI-ETHERNET 1C03
O O R G
1 RX_3_2 AJ37
F M R
1
M M R D G A
3 AJ36
1
RX_3_2B
U O
AU14 USB_DM_P3 2
O G R A M
USB_DM_P3
3 2
1
4 RX_3_1 AJ35 SIDE
F
2
R
USB_DP_P3 3
M
AT14
A
USB_DP_P3
R D O G M O O
6 RX_3_1B AJ34
O
4
4
O M A D
7 RX_3_0 AK35 HDMI_3_RX
M R R M F O O R
9 RX_3_0B AK34
U O O D M
18
G
19
G
10 RX_3_C AJ33 1D01
R D A F O O M R U A
12 RX_3_CB AK33 1
FO D
HDMI 1
1
M M U G
14
M
CONNECTOR C37 USB_DM_P0 2
3 2
USB_DM_P0 WIFI
U O O M R R A
C36 USB_DP_P0 3
F O
USB_DP_P0
R U G O M O
1B02 4
4
O D R R A F D
1 RX_0_2 AF35
F UM O R
RES
G O M O M
3 RX_0_2B AF34
D G
1
A F
2
U
4 RX_0_1 AG37
B04C FLASH+CONTROL+EJTAG
R M O O M R R A
6 RX_0_1B AG36
D
7700
O U G M
B04C SERIAL_NAND
O
7 RX_0_0 AG35 HDMI_0_RX H27U4G8F2D
DO R
PDD
F O M R
SDIO_SPI
A F O O
9 RX_0_0B AG34
18
G
19
U O M D
10 RX_0_C AH35
R A F
FLASH
M R R
HDMI 2 12 RX_0_CB AH34 PDD
G M O O M
NAND_PDD(0-7)
O
4Gb
U G
CONNECTOR
R M A 1B03
F O O D R R U A
O D M M
1
G
RX_1_2 AC35
F O
DO O M R U A F
3 AC34
O
RX_1_2B
G R O
B04B DDR3

B04B
U
DDR3
1
D
AD35
M
RX_1_1
2
R R A O
BRDQ
M
6 RX_1_1B AD34 BRDQ(0-31)
G O M F O O M R
AE37 HDMI_1_RX
U
7 RX_1_0
R A F D U G
9 RX_1_0B AE36 ARDQ ARDQ(0-31)
R A
18
R ARDQ(16-31)
BRDQ(16-31)
O
ARDQ(0-15)
BRDQ(0-15)
19
M
10
O O M
RX_1_C AE35
G O M
7601 7602 7603 7604
F D
12
U
RX_1_CB AE34
DO O
HDMI 3 H5TQ2G63BFR H5TQ2G63BFR H5TQ1G63DFR H5TQ1G63DFR
M R R A F O O
CONNECTOR
U G O M D
1B04 SDRAM SDRAM SDRAM SDRAM
M R R A F O O R
1 RX_2_2 AA37 2Gb 2Gb 1Gb 1Gb
U G M D M G
3 AA36
O
RX_2_2B
R A R U A
1
F
2
4 RX_2_1 AA35
O M O O M G R M
6 RX_2_1B AA34
F D U O
DO A
7 RX_2_0 AB35 HDMI_2_RX
9
O M G R R M
RX_2_0B AB34
F D O O
18
O
19
U
10 RX_2_C AC37 ARA ARA(0-14)
M R R A F O M R
12
O
RX_2_CB AC36
U
HDMI 4 (SIDE)
G M D U G
BRA
O
BRA(0-12) 19300_024_120404.eps

CONNECTOR
R A F R A
120404
DO R R A F
O M G O DO O
2012-Apr-20 back to
U M
div. table
R U
Block
O
Diagrams
A G
L12M1.1L LA 9.
O
EN 51
O M M R
MA F M R D A O
9-9 Block Diagram Control & Clock Signals
R
CONTROL + CLOCK SIGNALS
B04A R
U D O A G O F O M M R
A G O O M M R U O G
R D
B01C DC-DC B04B
MTK5396 POWER DDR3
F A
7300
M R U O G O O
MT5393
G R D A F M M
DO
1M95 7500
U O
B04B DRAM
O O M R O
B04B DDR3
A M
2 STANDBY AM20 BRDQ BRDQ(0-31)
F R
OPWRSB
M R U O G O O M D R
14 POWER_OK AN19
R D A
OPCTRL6 ARDQ(0-31)
F
ARDQ
O G G
ARDQ(16-31)
BRDQ(16-31)
ARDQ(0-15)
BRDQ(0-15)
O O M R U A
TO
A M
B04C GPIO_USB
D
7601 7602 7603 7604
F
POWER
G R
11
O
BL_ON_OFF C31
M U M
H5TQ2G63BFR H5TQ2G63BFR H5TQ1G63DFR H5TQ1G63DFR
O O
GPIO47
R
SUPPLY
U M O G O O R D 7703
M A
B04C MISC
F O O
SDRAM SDRAM SDRAM SDRAM
R D A F M R D
12

PWM-DIMMING AT12
2Gb 2Gb 1Gb 1Gb
G O
OPWM1
M M
13
R
BACKLIGHT-BOOST-A
R U D O AR12
A
OPWM0
M G R
R U B04A D O A G O F O M M R R U A
M U O O M
FO M R D AG
MTK5396 POWER
R F O
B04A OPTCTRL_TCON
U O G O
HDMI_CEC AA32
O O D
HDMI_CEC

B05A ARA(0-14)
M
ARA
R D M A
HDMI_x_HPD
F U O M
Ax32
O M R
FO R
B05A HDMI_x_HPD
M R G
BRA BRA(0-14)
U
7501, 7502
U O G O O MD R R A
POWER_DOWN AN20
R D A
+12VS OPCTRL1
F G O M
ARcontrol ARcontrol
O F O B03
M M R R U A F O O
U O G
7504
M
BRcontrol

BRcontrol
R D A O
FO B04C DO D
AM19
R
RESET_AUDIO
R
B06A OPCTRL2
O O M M R O M G
F U
7503 FLASH+CONTROL+EJTAG
U O G O R A
MUTE B04C SERIAL_NAND
R
AR19
R A M
B03 OPCTRL4 SDIO_SPI 7700
G R D U G O M
H27U4G8F2D
O O M R A
VGA_DETECT
M F O
AN18
A R O
OPCTRL9
F
B06C
M R U O
ENABLE_WOLAN
G O M
AP19
D
PDD NAND_PDD(0-7)
R D A F O
B05B OPCTRL5
R
FLASH
A G O O M
WOLAN_IRQ
M D
AR20
O U M G
4Gb
F
B05B OPCTRL0
M U O O M R R A
Pcontrol NAND_control
R R G M
B04C
O
FLASH+CONTROL+EJTAG
G O MD U
DO O R A F
1C20
A R O
AN22 LED2_PWM1
F
3 LED2
M M R
4
U A G F O M D O AM9 AMBI_SPI_SDO
O O
LDM_CS B08
DO G O OR M D M R
6 B04C GPIO_USB
A U G
+3V3STBY
R
TO AU11 AMBI_SPI_SCKO
O O R
LDM_CLK
F
AU23
M
B08
A
5
M
IR/LED PANEL KEYBOARD
R G
ADIN4_SRV
M D U O M
AND
G A
AT23
U O R
1 LIGHT-SENSOR
R F
KEYBOARD ADIN5_SRV
R D A O M G M O O
CONTROL
U O
AT23
2 3D-LED B07 ETHERNET
O M A D
ADIN5_SRV
M R R M F O O R
8 B05A HDMI_ETHERNET
U O D
+5V_SW
O M
AT18
G
TXVP_0
R D F G
TXVP_0
O
B04C MISC
A O M R U A
7 RC AU21 AU18
FO
TXVN_0
D G R
OIRI
M M U
TXVN_0
R A O M
AT34
U O O M R
XTAL1 AT17 RXVP_1
F O O
RXVP_1
R D U G O M D
+3V3STBY AU17 RXVN_1 ETHERNET
A F
1703
O R R
RXVN_1
O R
7701 27M CONNECTOR
F UM G O M D O M
AU34 RJ45
G
BD45292G XTALO
A F O O U A
5
R M R
VDD
M R
B08 AMBILIGHT
D
4 ORESET AM22
M
ORESET
O U
VOUT
R G O
F DO O M R A F O O
1A04
U G O D
3
M
1701 3 AMBI_SPI_SDO
R A
B08
R F R
TO
M
3 AP18 UORX AMBI_SPI_SCKO 5
G M O O M
UART B08 AMBILIGHT
U O G
AMBI_TEMP 7
A D U
SERVICE B04C
F O
2
R A
AR18 UOTX
M O R R
CONNECTOR
O D M M
1
F G O
DO O M R U A F O
B04C GPIO_USB
U G R O
LCD_PWR_ON
M D
E32

B04D GPIO43
M G R O R 3D_2D_SELECT
M A F O O
AR9
O M R
U
B04D GPIO54
R A F O
YPBPR_DETECT
D D31
R R U A G
O M O M
B06B GPIO46
F D U G O M
DO O A F
CVBS_DETECT E30
R R O O
B06B GPIO48
R U M
ENABLE_3V3_AMBIn
G O M
AT9
D
M A F R
GPIO53
O O
B08
U A G O R M
AMBI_TEMP
D
AM23
U M G
A
ADIN7_SRV
R
B08
O M F O O M G R R M
F D U O
2701
DO A
AP9
R F O
GPIO52
O
SDM
M G O R M D O
M U
2700
R A F O
E29
M R
GPIO51
R U G
PANEL
O R M D O U G
19300_027_120405.eps
A F R A
120405
DO R R A F
O M G O DO O
2012-Apr-20 back to
U M
div. table
R U
Block
O
Diagrams
A G
L12M1.1L LA 9.
O
EN 52
O M M R
MA IC F M R D A O
9-10 Block Diagram I2C
A G B04C
O O M M R U O G
B03 CLASS-D & MUTING B04C
D
FLASH + CONTROL + EJTAG FLASH+CONTROL+EJTAG
M R F U O G O O R A
R D A M M
+3V3_SW
F
7300
DO G O O M U O O
MT5396
A F U M O G R R D
3735
3734
M R A O O M R
B04C MISC
G R D F G
AP12 SDA
O O O M R U A
OSDA0
D M A
AN12
F U M O
SCL
G O O R M
R
OSCL0
M O G R D A O O
3741
3740
3402
3403
3799
3798
U O O M R F
ERR
R D A F M D
13
G O
5 6 23 24
M R U O M R
7702
M R D A G
F32 SYS_EEPROM_WE 7
U O G M R U
7705 7400
A
GPIO44
R D A O O M R
M24C64 TAS5731PHP
F U O M
1T71
FO M M R R D AG FO O
EEPROM
O
CLASS D 1
U O G
(NVM) AMPLIFIER
O O D
TEMPERATURE
M
+3V3_SW
R D A F M
3

SENSOR
FO M R U O O M R
ERR
M R U G
35
3784
3783
G O MD
1C20
R U D O
AP15
A O F
VCOM_SDA
R R A STB_SDA
3759 11 TO RES
G O M
OSDA0
O O M
LOCAL
M R U A F
B04D B04A 37A9
O
9 CONTROL
F O
VCOM_SCL

OSCL0 AN15 STB_SCL
R U O RES
A G O R M D
R D FO R
RES
O O M M R D O O M G
F U
B02 TUNER & DEMOD
R R U D O A G O M G R R M A +3V3_SW
F M
3213
3212
M R
V34
R U D AO G F O
DEMOD_SDA
O D R
3232
G O M
OSDA2
A O O M M D U G
3231
F
V35 DEMOD_SCL
M U O O M R R A
OSCL2
R R U G O M
+3V3_SW
DO AG O O MD R R A F O
B04A MTK5396 POWER B05A HDMI & MUX
F
21 20
G O M D O
OPWR2_5V
3205
3204
M M R
B04C OPTCTRL_
U A F O O M
G O OR
7210 TUNER_SDA
DO M R
TCON 45
D U
3B22
3B21
CXD2828ER
A
1B04
O O R G
TUNER_SCL
F R
46
M M A
HDMI_2_SDA 16
R
AB33
1
M D
2
HDMI_2_SDA DIGITAL
U O M
3218
3217
HDMI 4 (SIDE)
O G R A
DEMODULATOR
U R F
15
M
AC33 HDMI_2_SCL CONNECTOR
A
HDMI_2_SCL
R D O G M O O
18
O
19
U
11 10

OPWR1_5V
O M M R R M A F O O D R ERR
U O O D M
27 1201
G G
3B12
3B11
R D F
1B03
O
SUT-RA214ZN
A O M R U A
FO D R
HDMI_1_SDA 16
G
AD33
1
M M U
HDMI_1_SDA
2
M
MAIN
O
HDMI 3
U O O M R R A
HDMI_SDA2 15 TUNER
F
AE33 HDMI_1_SCL CONNECTOR
O O
HDMI_1_SCL
R U G O M
18
D
19
O R A F D
OPWR0_5V
R
HDMI_SCL2
O
ERR
F UM R
34
A G F O M D O U M G
O O
3B02
3B01
A
1B02
O R M
HDMI_0_SDA AF33
D U M G R R
HDMI_0_SDA
O M
16
F DO O R R 2
HDMI 2
M G A F O O
HDMI_SDA1

AG33 HDMI_0_SCL 15 CONNECTOR
U O
HDMI_0_SCL
R A M D
18
F
19
R
OPWR3_5V
M R
HDMI_SCL1
R O A
B04D LVDS DISPLAY
O
3B32
3B31
M R R
1B01
F O
AH33
D M G O
HDMI_3_SDA
M
16
DO
1
U
2
HDMI_3_SDA
O M R A F O
HDMI 1
U G R O
15
M D
AH32 HDMI_3_SCL CONNECTOR

HDMI_3_SCL
R A O
18
M R
19
A F
+3V3STBY
R A
B06C
R
VGA
O R
7D04
O M D O M G O M
PCA9540BDP
F U
1G51
DO O A
3537
3538
M R R F O O
50

3539 VGA_SDA 2 I2C 7
M
STB_SDA
D
AR21
G
TO
U O
STB_SDA
R
SWITCH
M A F R
49 DISPLAY
R O O
3540 B04C VGA_SCL 1 8
G M
AT21 STB_SCL
U G
STB_SCL
D
+5V_DC
R A F ORES
M R U A
4D23
O M O O M G R M
3A20
3A21
D U O
1A01
4D24
F DO R A F O
10
VCOM_SDA
R
15
3A26
O O
VGA_SDA 12
5
AR22
M M
VGA_SDA
G O D
VGA

B04C
U
3A27 VCOM_SCL
M R A F O
VGA_SCL 15 CONNECTOR
R
AP22
M
VGA_SCL
R
1
RES
O
11
U
19300_001_120330.eps
G O M D U G
120330
F D R R U G F O M
DO O M G O A DO O
2012-Apr-20 back to
U M
div. table
R U
Block
O
Diagrams
A G
L12M1.1L LA 9.
O
EN 53
O M M R
MA LINES OVERVIEW F M R D A O
9-11 Supply Lines Overview
R
SUPPLY
A G O O M M R U O G
R D
B01 DC - DC
F U O G A
B04D LVDS DISPLAY B07 ETHERNET
M
B02 TUNER & DEMOD
R A O O M M
1M99
D
1M99
R F
4D04 5D00
DO G U O
1 1 1G51
M O
+3V3_SW 5F05 +3V3AN
O O
+1V2_SW +1V2_SW
R
B01
A M R
+12VS

4D05 5D01 +VDISP
F
7D00 1

B01 B01
M U O G D
+12V_AL
O R
2 2
O M
+3V3_SW +3V3_SW 2 TO
R
B08
A
4D06 5D02
R D F
B01 DISPLAY
G
3
G
7220
O
3 3
M
PANEL
O O R U A
+5V_SW 4
M
+2V5_SW
D A
IN OUT
F
LCD_PWR_ON
G R
4 4 B01
O
COM
M U M
B08 AMBILIGHT
O O
7D02, 7D03
M R R D A
5 5
U O G O O
7216
O O M F
+3V3_SW
R
+3V3_SW

+3V3_TUN
A M D
B01
R D
IN OUT +3V3STBY +3V3STBY
F
6 6 +12VS B01
U O G O R
B03,B04a,B04d COM
M M R A M
+3V3_SW +3V3_SW
R D G
B01 1A04
O G U
7 7
U O O M R A
5G58 1G07 +3V3_AL
A M
1
R D M F U O O R M
T1A
FO
8 8
POWERM
O G R R D AG F O O
B05A DIGITAL I/O & HDMI
U O O D
1G06 TO
B03 CLASS-D & MUTING
M
+12V_AL +12V_AL 14
R D A M
B01
F
+3V3_SW +3V3_SW AMBILIGHT
M U O O M R
15
FO
B01 T2A
R
+3V3_SW +3V3_SW
M
SUPPLY
R U G
B01 +3V3STBY +3V3STBY 16
O MD
1M95
G
1M95
U O
B01
O R A
+VSND +VSND
R
+3V3STBY 17
A
1 1 B04a,B04c,B04d, B01
R D
1B01
F G O M
2 2 STANDBY B05a,B05b,B06a +12VS +12VS HDMI 1 18 OPWR3_5V 18
O O M
B04a
R
B01
U A F
B04A
M
CONNECTOR
F O O
3 3
U O G R M
4402
O D
4403
R
1B02
R D A FO
4 4 5416 +3V3D
R
HDMI 2 18 OPWR0_5V
O O
B04a
O O M M
CONNECTOR
F M R D U G
5 5 +12VS 7216
U O G O R A
+3V3_AUDIO 1B03
R M R
IN OUT OPWR1_5V
A
6 6 HDMI 3 18
R D G M
COM B04a
G U O
CONNECTOR
O O M R A
+VSND
F
7 7
A M O
B03
F R M O
1B04
M U O O D
8 8 OPWR2_5V
G
HDMI 4 SIDE 18
R
B04a
R D A F O
CONNECTOR
G O M R
9 9
O O D
B04A MTK POWER
A F M M U G
10 10
M U O O M R R A
+1V2_SW +1V2_SW
R R G O M
B01
G O MD U
DO
+1V1_SW +1V1_SW
A F
11 11
O R
BL_ON_OFF
R O
B04C
A
B01
F G O M O
SENSE+1V1_MT5396
B05B DIGITAL I/O - USB
D
B01
M
12 12 PWM-DIMMING
M R U A F
B04C
O O
+3V3STBY +3V3STBY
G O OR M R
+5V_SW
DO
+5V_SW
M
B01
D
13 13 BACKLIGHT-BOOST-A B01
U
B04C
A R G
1C01
O O
+1V5_SW +1V5_SW
F M R
3C01
M A
14 14 +5V_USB1 1
R
POWER-OK
G
B01
M D
B04A
U O G R U A O M
+3V3_SW +3V3_SW
D A O M R M F
B01
R G O O
1C02
U O
3C11

+5V_USB2 1
O M A D
+12VS +12VS
M R R F O O
B01
R
+12VS
R U D O G FO M D
B05a
M
OPWR0_5V
G
OPWR0_5V 1C03
O
7116
A R U
3C21
O M A
RT8293 +5V_USB3 1
FO D R
B02,B03,B04a,
G
OPWR1_5V OPWR2_5V
M M U
5101 2 5100 +3V3_SW
M
Synchronous 3 B04c,B04d,B05a,B05a
U O O R R A O
7113
M
Step-down B06a,B07,B08
F O O
+1V2_SW 1C31
M
Converter
R G
OPWR2_5V OPWR2_5V
U O
IN OUT B02,B04a B05a 3C31
D
USB_PWR_P0 1
D
COM
O R R A F O R
7117
F UM
OPWR3_5V OPWR3_5V
G O M O M
B05a
D
RT8293
G
7C01
A F
5103 2 Synchronous 3 5102 +5V_SW
U
B02,B04c,B05b,
O O A
RT9715
R M R
Step-down
M R
B06c
D M
+3V3STBY +3V3_WOLAN
U
Converter 1
O
5
G
B01
R O
B04B DDR3
F DO O M R A F O O
7118
U G O
4
M D
RT8293 +1V5_SW +1V5_SW
R A F
5105 2 5104 +1V5_SW
R
B01
R
Synchronous 3
M
B04a,B04b
G M O O M
Step-down SENSE+1V5_MT5396 ENABLE_WOLAN
B01
U O G
SENSE+1V5_MT5396
A D
Converter 6
U
B04a
O R M F D
7110
O O M R R M A
G
B06A
O
RT8288 ANOLOG I/O - HEADPHONE
F DO O M R U A F
5106 2 5107
O
+1V1_SW
Synchronous 3 B04a B04C CONTROLLER
U G R O
+3V3_SW +3V3_SW
M D
Step-down B01
A O
SENSE+1V1_MT5396
R
Converter 6
R
B04a +3V3_SW +3V3_SW
M F O O M R
B01 +3V3STBY +3V3STBY
U G O M
B01
R A F O D R R U A G
M
+3V3STBY +3V3STBY
O D O M G O M
B01
F U
DO
+5V_SW +5V_SW
O A F
B06C VGA
M R R O O
B01
M
1C20
R U G O D
6 +5V_SW +5V_SW
TO B01
M G R A F O O M R
37A1 8 CONTROL
U D G
6A06
A O M U
PANEL
R R A
1E01
M F R
9 3A19 6A07
O O M
VGA 5A06 5V_DC
O D G O M
CONNECTOR
F DO O R R U A F O O
M U M G O M D
U G R R M A F D O O M G R
R A F O O O M R R U A
19300_029_120406.eps
O M D U O M
120406
F R R G F
DO O M G O A DO O
2012-Apr-20 back to
U M
div. table
O MFO O G R R D A O
R 10. Circuit Diagrams R U
Circuit Diagrams and
O
PWB Layouts
G
L12M1.1L
A
LA 10. EN
O
54
O M M R
G O O D M R F U O G
MA F and PWB
U M
Layouts
O G O O R D M A O
G R R D A F U M O R
O O M G
10.1 A 272217190587 - 272217190588 PSL
A 10-0-1
Power Supply UnitFwith Integrated Led M
Power Supply Unit with Integrated LED Driver
U Driver O G R R D A
M R R D A O F O M M
DO A01
A G O F O M M R R U O O A01
M R U O A G O O M D R
M M R R U D O A G O M G R DC_LINK
U O G M R U A
TP230 is on Pin 3 of L602 but this pin is not indicated here
R D A O O M R
TP20
M F U O O M
! BD601
FO
L501
M R D AG
10A 600V
TP17
TP24
TP29
R F O
TP18
2
! L602
TP72
TP84
BFS3550A
O G O
D601 D601A
U O O D
4 1 1 4 R130
A M M
Q501
R D
TP63
F
400uH S3V60 S3V60

D602 OPEN R511 5N50_D PACK
OPEN
OPEN
D112
TP134
TP253
R129
3
U O
D
O M
R518
M
C512
FO
D211
E
R
G
! C600 Q103 4.3KF 105
M
! CY105 ! C601 OPEN
R512
! CY106 NUR 460 TP85
L205
R G
TP25

B
470nF / 500V C506 U501
U
47
TP65
470pF 470nF / 500V OPEN
BFD3565R
470pF TP126
VLED
O MD
TP74
TP129
G
S
O
R510 L6599
L603
GND1 TP23
D503 R519 BFD3565R
A
1
C
O R
TP64
T501
R
1 16 C411
TP57
C120 750K CSS VBOOT ! MBRF10150CT
D A
TP81 TP115
R
OPEN 10 TP133
68uF/100V
TP125
15

2 MMSD4148W
G M
C504
O
DELAY HVG 12
GND1
R520
10K
1
C505 TP69
! L601
TP76
M
224
O O
TH601 3 14
R
TP61
C508
U
CF OUT
M A F
11
3ohm SMT TP19 TP75
L511
470k F
PQ3211/10mm
O O
331 C0G 13 104
F
4
R615
RFMIN NC TP231 TP229
G R
2 10
12V3_OVP
O
4
U M
TP27 VCC
12
TP56
5

Q510
O
TP127 TP174
D
STBY VCC BFS3550A L202
R
! VA102 TP26
TP98 TP55
5N50_D PACK
9
A
TP98 is on the pattern of Heatsink2. TP35
12V3_SND
D FO
C610A
C610B
TP50
!
R
750V C645 6 11
C610
TP33
470k F 470k F
D
R
Q602 ISEN LVG R521 BFS3550A
D
O
R616
O
TP78
D 3 8
R604 C509A G OPEN
R609 68uF/450V C205 C214
M
7 10
M
C510
TP128
O O
C509 R501 LINE GND TP54
47TP53 C206
3.3KF
100K F R507
R508
G G 7
G
225/ 25V NXB 1000uF/16V
M D
TP47 TP36 TP254
D504 R522 NXB 1000uF/16V OPEN
100 open 100K 10KF 8 9 R523 S
F U
TP135
DIS PFC_STOP
47p / 1KV
TP44
47p / 1KV
47p / 1KV
TP140 TP116
R617
TP49 6
G O A
MDF11N60
O R
4
U
D603 R608 IC-SOP-16-L6599
S
S TP28
10 10K
TP62
GND_SND
TP97
R
TP70
MMSD4148W TP222 TP117
R610
TP99
R
5
10k
M
VCC JW1
A
TP60
D512 TP235
TP59
D
LINE
M
10
R
TP77
G
MMSD4148 TP34
R509 L201 L201A
PEE3232
O
+12V
36K
G
470k F
R502
M R
R618
R531
A
C526 BFS3550A BFS3550A
R507A
O
1N4148
O
47 C513 L512
TP58
! CY202 TP234
TP121
C215
C511
0
R513
O
TP71
M
C602 C203
104
IC600 100pF/1kV 100/1W D212B
A R
56
103 6.8nF/1kV 471 OPEN
O
104 C501
F
TP39
C502
M
SCY99102BDR2G TP38
JUMPER MBRF2060CTL TP233 NXB 1000uF/16V
O
GND1
U D
TP252 TP232
M O
222

D
C609
R G
C613 1 FB VCC 8 VCC R612 G
TP236
102 C201 C202
D A
561 C0G
R F
TP79
O
TP93
R
COLD 2 CT 100 R621 Q603
TSA601MA1
DRV 7 NXB 1000uF/16V NXB 1000uF/16V
O M
TP251
MMSD4148W
G
TP255
R251
620
S
STK0160
SA101
R527 GND1
O O D
3 6
100k D506
G
CONTROLGND

C607
M U
s
A M
GND1
TP101
TP40
33 ! PC501
F
102

TP42
4 CS ZCD 5
ZD503
TP112
R256
5.6V
A
TP46 TP37
102/50V EL817MC
M U O O M R R
! CY104 ! CY103 R602 C507
R
TP120
OPEN OPEN 10K F TP100
1K F
M
R619
12KF
R G
C608
4.3K F
U
10K F
TP22 TP215
R257
R252
473 TP43
R603
TP114
O MD
120 1W
G
2W 0.12
2W 0.12
DO
TP106
C606
R101
A F
C604
R633
R614
O R
C605 1kF ! PC502
R
C603 102 C211
R255
O
TP41
224
A
102 C0G NC EL817MC
D604
F M R620
120 F
TP45
56 F
G O O
MMSD4148 105
TP111
TP105
M M R U A F
U203
O O M
AS431AZ
DO G O OR M R
2.4K F
D
R253
LF102
U
!
A G
HOT
O O R
3 4 TP113
M F M R A
300 F
R254
M R D U G O M
1 2
U O G R A
GND1 GND1
R F
CS1820250M DC_LINK
ST3V3
D A O M
COLD
R G O O
3V3_OVP
O M U A O D
TP123
TP122
F
TP237
1kF
M O
TP30
R131TP87 R132
R
! CY101 ! T101 D301 L301 12V3_OVP
R O
P6KE160A
! CY102 68K 68K
R
R271
M
OPEN COLD ST3V3
ZD101
OPEN SB560 P=20mm
TP258
U O D
TP238
O M
5 10

C119 D102
G G
TP15
102 1KV
R D F O
4 9
R133 R134 4.7uH
U
GND1
A R
R113 IN4007
O M
MMSD4148 C302
A
68K 68K
TP91
3 C301 R272
NXB 680uF/10V
FO D R
TP95 8
KTN2222S / SOT-23
TP94 TP80
NXB 1000uF/10V 24K F
G
200
M
D106 R105
U
CX101
M
! D106A TP32 D107
M
1 7
O
TP31
A
Q102 R270
R
UF4007 0
U O R
2.7K F
MMSD4148
O M
100nF
8
7
6
5
TP124
R305
100K R302 1kF
F
2 6
FSL106MR
O
1K
O
TP92
GND DRAIN
VCC DRAIN
DRAIN
VSTR
C107 R103
R U G O M
R102
TP107
U101
C121 100F GND1
1.5KF
D
TP136
TP138
TP137

225 EFD1515
R303
TP96
ZS22uF/50V
A F
C103
R
C304
O R
VFB
R304
IPK
U204
O
ZS 10uF/50V 22V 104
R
4.3K F AZ431AN/SMD
F UM TP73
OPEN ZD105
1
2
3
4
G M
TP145
O O M
TP16
! PC101 C260
D
C102 R260
G
! VA101 EL817MC 102
A F U
2KF
1.5K F
TP52
OPEN C303
O
TP214
O
R306
A
225
R M M R R
TP153
GND1
D M
TP144
U301
O U
Q105
120 F
STVCC
O
TP21
AZ431L
R307
! F101 R308
R
R120 2N7002
DO O
LINE
F M R
T3.15AH 250V
A F O O
470K 560
G O
GND1
U A M D
TP239
R
TP89
F
C115 D101
R R
9.1V
M
TP51
TP104
G M
1nF 630V
O O M
Neutral Live
TP2
! PC102
ZD103
OPEN
MMSD4148
U O G
Q104 102 VCC R109 EL817MC
1
TP66
TP90
R122
A
TP67
TP68

TP146 TP147
D U
2N7002 C106
F
ZD103A
R O A
D116 R126 R125 R124 100K 1K R309
O
Q101
R
TP256
M R
! CN1_1308 R121
D
TP82
R110 KTN2222A / TO-92
O M M
RF101L4S 10K 10K Q106 4.7K

220K C109
510K
AC-inlet 220K
E
R128
R310
G
C122
O
R127 2N7002 KST2907A
F
10K TP102
DO
B
U
C116 C117 STANDBY
R
104 TP88
ZD102
ZS 22uF/50V Q301 C305
O M A F
1M 1/2 W PRC 1K
15V
O
104 104 C123
O
C
104
G R
105
U A O M D
GND1
U M G R O R M F O O M R
TP86
TP211
A F D U G
TP259
R R A
3V3_OVP
M O O R
D151
O M
STVCC R156 C151 R160
G M
1N4148W R152 R314
F D O
10
U
1KF 104 1KF 51K F
DO O
R312
A F
TP143
TP139
TP103
R R O O
E
M
! PC103

KTN2907A 1KF
M
B
EL817MC R317

R311
G D
Q151
R U O
TP83
0F
C
1KF
M A F R
TP142
R O O
B TP141
G M
Q150
U G
KTN2222A
O M D
TP48
U306
E
A U
R161 C152 C320
R A
R330
R
AZ431AN / SMD
F
102
M R
1KF
O O
104
M
20K F
O G M
TP257
D U O
GND1
GND1
F DO O M R R M A F O O
U G O D
1 2011-12-08
M R A F O
Power Supply Unit with 2722 171 90587
U R O M R
2722 171 90588
G M D
Integrated Led Driver
O U G
PLDC-P102A
O R M A F O O M R R A 19300_031_120410.eps
F D U G O M
120410
DO R R A F
O M G O DO O
2012-Apr-20 back to
U M
div. table
R U
O
PWB Layouts
G
L12M1.1L
A
LA 10. EN
O
55
O M M R
MA M Led Driver O
F Unit with Integrated R D A O
10-1-1 Power Supply Unit with Integrated LED Driver
R R U D A G O F O M M R
A G A02 O Power Supply
O M M R U O G A02
G R D A F M M
DO M A
R O F O
U M O
M
G R
O R
O M
U O
D R O
R D A F
CN2_1316
O G M G
1
LED_A
O O
Anode_R
A M R U A
TP213
D
2
F
NC
U O G R M
TP164
M
3
R6
O O
R6 Cathode
M R R D A
4
R5 Cathode R5
U O G O O
TP165
F
5
M
R4
O O
R4 Cathode
A M R D
TP163
VREF
TP250
R D
6
R3
F
R3 Cathode

R481F 5.1k
O G O R
TP161
U
7
R481C
M
R2 Cathode R2 R6
R
R3 TP3
M
TP6
E
R412
A
TP162
E
5.1k
D
TP189
R G
8
R1 Cathode R1 SOT89 R485C SOT89 R485F
100KF B
U
B CMP6
O G
CMP3
U
BCX52-16
TP177
100 F
M R A
BCX52-16 TP110 100 F
O O
Q403F
C
M
Q403C
A
TP184 TP190
C
TP209/210 is on the solderjoint of the LED connector
R D
R482C R482F
F
TP192 TP8

R410
M
but the pins are not indicated in schematic IS6
O
IS3
U
BL-DIM(VSYNC)
O
1k
FO M
1k
R D AG
1K
M
TP11
R F O
C409 R486F R483F R484F
GND1
44
43
42
41
40
39
38
37
36
35
34
R486C R483C R484C
G
30 F 3.9 F OPEN
U O
103 R409 30 F 3.9 F OPEN
O O D
PWM6
NC
NC
100KF
PWM3
PWM5
IS7
CMP8
IS8
PWM1

PWM2
PWM4
A M M
TP220
R D F
TP216

1 NC 33
U O R
PWM7
FO M R O M
2 CMP7 32 TP178 GND1 GND1
M
PWM8
R G
R408
TP217
3 IS6 31
O G O MD
RT
U
IS6
O R R A
4 CMP6 30 150K F GND1
A
CMP6 COMM
R D F G M
5 IS5 29
O
IS5 ADIM ADIM
O O M
U401
R U
6 CMP5 28
A F
STATUS
M
CN4_1M95 CMP5 STATUS
LQFP-48 pin 0.8 Pitch OZ9909TN
O
R407 10
F O
TP202

TP247
3V3stdby 1 7 IS4 27
R
+12V
G
ST3V3 VIN
O
IS4
U M
TP119
O D
C319 TP155
R
Standby 2 STANDBY 8 CMP4 26 BL-ON-OFF
CMP4 ENA
D A FO
R481B 5.1K
R
OPEN TP160
R481E 5.1k
TP5
TP118
R406
R
3 9 IS3 25 R2
O
GND1
O
GND1 IS3 VREF
10K R5 TP1
E
M M
E
GND1
VREF TP188
O O
4
TP183
SOT89 R485B TP181
R
GND1 10 CMP3 24 SOT89 R485E
G
GND1
M D
CMP3 NC B
CMP2 B
BCX52-16 CMP5
U
100 F
19 RANGELED
+12V 5 TP182
11 IS2 23
TP201
BCX52-16 100 F
A
+12V SYNC
G O
IS2
O R
18 SSTCMP
Q403B
C
Q403E
C
R415 R482B
TP187
15 GNDA
21 GNDP
12 CMP2
14 CMP1
R
6
17 UVLS
R
C407 R482E
M
+12V C408
16 OVP
22 DRV
+12V
20 ISW
A
13 IS1
100K IS2
R D G M
104 105 1K IS5
+Vsnd 7 1k
O
12V3_SND
G U
TP12
M R A
TP9
O O
TP154
+Vsnd 8
F
12V3_SND
M O
R486B R483B R484B
TP176
TP180
R
R486E R483E R484E
F O
30 F 3.9 F OPEN
M
GND_SND GND_SND 30 F 3.9 F OPEN
O
CMP2
M U O D
10 GND1
G
GND_SND
R
GND_SND TP218
IS1 DRV
R D A F O
TP152
11
R
BL-ON BL-ON-OFF
G O M
GND1
CMP1 ISW
TP151
GND1
O O D
BL-DIM(Vsync) 12 BL-DIM(VSYNC)
TP219
A M M U G
TP248
TP150 UVLS GND1
F
13

BL-I-CTRL BL-I-CTRL
R A
TP206
M U O O M R
TP149 TP203
POK 14 R402
R
POK C402 R403
C404
M
3K F
R G O
1-2041145-4 102
U
C461 1.2K
O MD
102 C0G
DO G
OVP R404 150K TP249
A F
104
O R
TP205
R O
GND1 C406
A
R401 C437
C403 R405 62K
F
474 105
G O M O
GND1
2K F 102
M M R U A F O O D
GND1
R481A 5.1K R481D 5.1K TP4 TP185
M
R1 R4
G O OR
TP7
DO M R
E
D
SOT89 R485A SOT89 R485D
A U
B B
CMP1 CMP4
G
BCX52-16 BCX52-16 100 F
R
100 F
O O
Q403A Q403D
F R
C
M
TP186
M A
R482A TP179
R482D
M R D G
IS1 IS4
U O
1K 1K
A M
TP13
O G R
TP10
U M R F
R486A R483A R484A
A
R486D R483D R484D
R D O G M O O
30 F 3.9 F OPEN 30 F 3.9 F OPEN
U O
R476
O M A D
TP243 TP170 TP172
100
F
CN6_1M11
M R R O O
1 POK
M R
GND_AL GND1 R478 R477 GND1
GND1
U O O D M
4.7K 5.6K
G
+12V_AL +12V VREF
R D F O G
3
A R U
GND_AL
O
C469
M A
TP242
4
FO
473
D
STATUS
R
+12V_AL
G
TP240
M M U M
2041145-4
A O
TP246
U O R R
GND1
O M
CN7_1M09
R U G O M F O O
1
GND_AL/ GND_SND TP228
O D R A F D
2
R
+12V_AL/+Vsnd TP227
F UM O R
3
M
GND_AL/ GND_SND
G
TP226
O D O M G
4
+12V_AL/+Vsnd TP225
D401A
A F
TP131
TP130
O O U A
5
GND_AL/ GND_SND TP224
L401
M
!
R M R R
D401

6
L402
D
+12V_AL/+Vsnd TP223
M
1 4
U
VLED LED_A
O G O
2041145-6 BFD3565R
R
MBRS3200
DO O
TP196
55uH C410
R
R411 R421
F M A F O O
10K F 101 1KV C413 22K F
TP193
G
TP198
TP197
R418 D410
U O
GND1
D
68uF/100V
R A M
R411A 15 D TP108
R421A
F
D4148W
TP194
TP108.207.208 is on the pattern of Heatsink4 TP207
R
G
M
TP199 10K F DRV TP208
22K F
G M O O M
TP175
R468
TP245 R417 100 Q402
U O G
GND1
KTN2907A TP159
R411B S
AOD478/D-PACK TP204 R421B
560 TP158
R470B TP195
TP191

TP132
D U
VREF 10K F C442 R419 12K F
F
R420
O
TP14
R A
OPEN 103 ISW
O
U405 UVLS 10k OVP
R
R470C
AS431ANTR/SMD
R470A
M R
OPEN
OPEN
3.9KF
R462
R470
Q407 1K
3.9K
R455A 1F
R455B 1F
R455C 1F
R455D 1F
R455E 1F
D R455F 1F
R455 1F
TP212
O M M
TP200

C460
G O
TP241 TP157
C423 OPEN C422
F DO U
C471
O R
OPEN OPEN
M A F O
TP109
TP169
R469
680F
104 +12V TP171
R O
R463
G
3.9K

GND1 GND1 GND1
U D
R472
M
GND1 GND1 TP173

ADIM
1.2KF
1.2KF
TP156
R464
R473
R A O
R467
100K
47K
M R
R471
12KF
R
Q451
F O O M
TP168
G M
2N7002
U O G
TP148 TP260
D U
R465
R A F
BL-I-CTRL
A
10K
O R R
C472
R466
R461
M
220K
220F
C473
O O M
C474
G M
R460 475 105
D O
OPEN
F U
TP244
0R0
DO
GND1
O A F
GND1 GN D 1 GND1 GND1 GND1
R R O O
TP167
M M D
ZD401
G O
TP166
U
Q408
R
2N7002
M G R A F O O R
5.1V
M
R475 C475
U M D G
103
A O
TP221
470K
R U A
GND1 GND1 GND1
O M F O O M G R R M
F D U O
DO O M G R O R M A F D O O
1 2011-12-08
U
Power Supply Unit with 2722 171 90587
M R R A F O M R
Integrated Led Driver 2722 171 90588
U G M D O G
PLDC-P102A
19300_032_120410.eps
O M D U O M
120410
F R R G F
DO O M G O A DO O
2012-Apr-20 back to
U M
div. table
R U
O
PWB Layouts
G
L12M1.1L
A
LA 10. EN
O
56
O M M R
MA F M R D A O
10-1-2 Layout top
A G O O M M R U O G
G R D A F M M
DO M A
R O F O
U M O
M
G R
O R
O M
U O
D R O
O G O O R D M A F G
M M R R D A O O O O
M M R U O A G O M R
U O G O O R D M R U A G
FO U M O A G R
O O R
M
D AG
M
F DO O
R D M F U O O M R
FO UM O A G R
O R
O MD R R U A G
O O R D M R F U G O M
F U M O G R M A F O O
R R D A O
FO O O D R
O F O M M R D U M G
M R F U O G O M D
R R U G O M
DO A G
O F O MD G R O R M A F
D O O
M M R U A F O O M
DO A G
O OR O
M
O D R U G R
M M R F D U M G O R M A
R U D O A G O M G R R M A F O O
U O G O M D M G R
R D A F O O M R U A
FO M
U O M O M
D R R U A G
F O R
O
M
O
O R D R R U A G F O M D
F UM G O M D O O M G R
O D R U G O M
F DO R O
U M
F O D M G O M
DO R O U M
A G R
O R U
M A F D O O
U M G O R M F O O M R
R A F O D R R U A G
F O M D O U M G O M
DO R O
U M G R O R M A F
D O O
U M G O R M A F D O O M G R
F O D U G O M
1 2011-12-08
U
Layout top 2722 171 90587
M R R A F O M R
2722 171 90588
U G M D O G
PLDC-P102A
19300_033_120410.eps
O M D U O M
120410
F R R G F
DO O M G O A DO O
2012-Apr-20 back to
U M
div. table
R U
O
PWB Layouts
G
L12M1.1L
A
LA 10. EN
O
57
O M M R
MA F M R D A O
10-1-3 Layout bottom
A G O O M M R U O G
G R D A F M M
DO M A
R O F O
U M O
M
G R
O R
O M
U O
D R O
O G O O R D M A F G
M M R R D A O O O O
M M R U O A G O M R
FO U M O A G R
O O R
M
D AG
M
F DO O
R D M F U O O M R
FO UM O A G R
O R
O MD R R U A G
R R D A O
FO O O D R
O F O M M R D U M G
M R F U O G O M D
R R U G O M
DO A G
D O O
M M R U A F O O M
DO A G
O OR O
M
O D R U G R
U O G O M D M G R
R D A F O O M R U A
FO M
U O M O M
D R R U A G
F O R
O
M
O
O D R U G O M
F DO R O
U M
F O D M G O M
DO R O U M
A G R
O R U
M A F D O O
R A F O D R R U A G
F O M D O U M G O M
DO R O
U M G R O R M A F
D O O
F O D U G O M
1 2011-12-08
U
Layout bottom 2722 171 90587
M R R A F O M R
2722 171 90588
U G M D O G
PLDC-P102A
19300_034_120410.eps
O M D U O M
120410
F R R G F
DO O M G O A DO O
2012-Apr-20 back to
U M
div. table
U
Circuit Diagrams
R 10.2 B 313912365391 SSB MT5396RR2 LATAM
and
O
PWB Layouts
G
L12M1.1L
A
LA 10. EN
O
58
O M M R
G O O D M R F U O G
R A M
10-2-1 B01 DC-DC
G O O R D M R F U O GR
M A B01 DC-DC
12V/3V3F
U M O G O O R D A B01
O G R CONVERSION
R D A F U M M O
O O M R O
7116
D A F M R
RT8293AHGSP
M U O G D
I154
O O M R
5101 I144 3102 2103
R
2 1
R D A
VIN BOOT
G F G
1R0 5100
O
33R I145 100n F101
M
7 3
O O
10u 16V
+3V3_SW
R
EN SW
M U* A
100K
A
2196
2101
3100
RES
2102
10u
10u
D
2100 I146 10u
F
I136

8 5
4K7 1%
U O G R M
SS FB
3105
RES 2126
RES 2118
2105
O O
2104
22u
22u
22u
22u
R
100n I106
M D A
10 6
R
VIA COMP
O * O
To Be Connected Directly to 1A04/1A05 With 3mm Track.
O G
GND
U O O M F
GND HS
D A M R D
2193
220n
2107
R
3103
4
RES
10R
3n3
F
SS1_GND
U O G O R
1M99
1K5 1%
M
100K
3104
3106
R M
1 F133
M
GND_AL
A
F131
R D G
I118 2 +12V_AL
U O G U
F134
M R
3
A
GND_AL
O
F132
O
SS1_GND
* 4
R D A M R
3107
RES 2108
RES
F
2106
470p

12K
10n
5
U O M
SS1_GND SS1_GND SS1_GND
M O
6
FO
+12VS
M R D AG
7
R F O
8
U O G O
2199
2131
RES
10n
O O D
10u
12V/5V CONVERSION
R D A M M
SS1_GND 2041145-8
F
SS1_GND
FO M U O O M R *
7117
M R
RT8293AHGSP
O G R
O MD U G
I155
U
5103 I147 3109 2113
A
GND_AL
O R
2 1
R
VIN BOOT AMBILIGHT
R D A F
1R0

33R I150 100n 5102 F127
G O M
7 3
10u 16V
EN SW +5V_SW
O O M 100K
2111
2110
3108
RES
2112
R
10u
10u
10u
M U A F
2109 I120 I149 +3V3STBY
O O
8 5
220u 6.3V
F
10K 1%

SS FB 3129
G R
3112
2114
2116
O
2117
RES 2197
2115
U
STANDBY
2136
22u
22u
22u
22u
1n0
O D
100n I122
R
10 6
A
VIA COMP 68R
R D FO
2191
2192
2180
2137
RES
RES
R
10u
10u
1n0
GND
1n0
O O
GND HS
O O M R M G
2194
220n
2120
SS2_GND
RES
3110

4
RES
M D
10R
3n3
F U
+12VS
R U O A G O M R R A
100u 16V
R D G M
I119
RES 2189
RES 2188
100n
RES 2187
100n
1M95
G U O
SS2_GND
O O M R A
15K 1%
1 F113
A M R F O
3111
RES 2121
RES
2119
470p
10n
2 F114
F O
SS2_GND
M
F115
2K2 1%
3
M U O O D
3114

3113
F102
12K
4
R
+12VS
R D A F
F103
O
5
G O M R
6 F118
12V/1V5 CONVERSION
O O D
7 F119
A M M U G
SS2_GND
SS2_GND
F
8 F120

+VSND
A*
SS2_GND
SS2_GND
U O R R
9 F121
M R O M
7118 10 F122
R U G O M
RT8293AHGSP 11 F123 3126 68R BL_ON_OFF
DO G O MD
12 F106 PWM-DIMMING
A F
5105 I156 3127 68R
O R
2166
R
I135 3115
2 1
O
13 F107 RES 3128 68R BACKLIGHT-BOOST-A
A
VIN BOOT
F
14 POWER_OK
M
F108
G
33R
O O
I132 1R0 100n 5104
D
7 3
M
10u 16V
EN SW +1V5_SW
R U A F
2124
2123
M
2125
RES
10u
10u
2122 1-2041145-4
I151
O
3u6
O
I152
100K
3116
8 5
DO G O OR M R
SS FB
3119
2168
RES
2169
RES 2170
RES 2171

10K
22u
22u
22u
22u
D
100n I127
A U
10 6
G
VIA COMP
O O R
GND
M F M R A
GND HS 2133 3127
*
M R D G
SS3_GND
3118
2164
4
RES
10R
3n3
Non TM100 Panel Yes Yes
U O
I159 3163 F128
M
2167
220n
RES
RES 2127
100p
RES 2128
100p
2185
G
2143
100n
2132
100p
2133
100p
2134
100p
2145
2198
100n
TM100 Panel No No
RES
O R
10n
1n0
U F
SENSE_1V5_DDR
M R
0R
OR D MA RO G M O O
*
I134
U O
3120
15K
M R A F O D
SS3_GND
3117
O
RES 2165
2172
470p
RES
8K2
10n
M R
SS3_GND
R U D O G F O O D R U M G
A12V/1V1 CONVERSION
18K 1%
O M A
330K
3121
3122
FO D G R
2174
100n
M M U M
SS3_GND SS3_GND
R U O O M G R O R M A FO O O
U
SS3_GND SS3_GND
D D
3V3/1V2 CONVERSION
O R R A F O R
7110-1
F UM G O M O M
RT8288AZSP
7
D
7113
G
I138 3123 LD1117DT12
A F
VCC

5106 2175 I140
U
1 4
O O A
VIN BOOT F129
R M R
3 2
M R
33R 100n 0R +3V3_SW

IN OUT +1V2_SW
D
2
U M
5107
O G
100K
2179
100n
2178
2177
RES 2176
3170
O
SW 3
22u 6.3V
10u
10u
10u
COM
R
I139 +1V1_SW
DO O
2154
100n
2156
2157
R
5
2155
RES
10n
M
22u
A F
I143
O O
EN I158 2u0
G
6
1
FB
U O
RES 3133
RES 3167
2182
2183
3137
RES 2147
RES 2148
RES

22R
22R
10R
D
22u
22u
22u
22u
R A F M
GND
M R R
GND HS
G M O O M
8
U A O D U G
I157
R F O O A
3146 F130
M R R
2184
2146
RES
RES
1n0
10n
D
SENSE_1V1_MT5396
O M M
1K0 1%
G
0R
O
3162
F DO O M R U A F O
SS4_GND
U G R O
3168
M D
I153
R R A O
39K
M F R
2K2 1%
O O M
RES 3169
G M
3130
3131
U O
33K
G
22
23
24
25
26
D
1X05
U
7110-2 1X02
A F
1M0
R
RT8288AZSP 1X01 1X06 1X03 1X04 REF EMC HOLE REF EMC HOLE
O R R A
REF EMC HOLE REF EMC HOLE EMC HOLE EMC HOLE
M
VIA
O O M
F126
F D G O M
18 10
DO O U A F
19 11
SS4_GND
R R O O
VIA
M
20 VIA 12
M
21 13
M R R U A G F O O O D R VIA
U A G O M D U M G
14
15
16
17
O R M F O O M G R R M A
D O
1 2012-01-20
F DO U A
MT5396 R2 LATAM 2K12
O R R F O
3139 123 6539
M M O
DC-DC
M R U A G F O O D R
R M
19300_002_120402.eps
U G M D O U G
120402
O R A F O O O M R R A
F M D R R U G F O M
DO O M G O A DO O
2012-Apr-20 back to
U M
div. table
R U
O
PWB Layouts
G
L12M1.1L
A
LA 10. EN
O
59
O M M R
MA F M R D A O
10-2-2 B02, Tuner & Demodulator
A G B02 O Tuner & Demodulator
O M M R U O G B02
F U O G R D A
+1V2_SW +3V3_SW +2V5_SW
M R R D A O F O M M
DO A G O F O M M R R U O O
M U O G O O M D R
100n
100n
100n
100n
100n
100n
100n
100n
R R D A F G
2215
100n
O A G O O M M R U A
2207
2208
2209
2210
2211
2213
2214
2216
D M R F U O G O O R M
M
1205
R D A
1 3
R U D O A G O O M M
41M
R F D O O
F
4
2
2200 U O G O R
2201
M 8p0
8p0
A O O M
3200
M R R A
1K0
R D
7210
F M
10
22
28
44
19
32
33
40
CXD2828ER
U O
7
FO M R D AG O
PVDD
XVDD
TAVDD 7220
M R F
CVDD DVDD
O
LD1117S25
O
5 3210 33R DEMOD_TSCLK
U O G
TSCLK
O O D
35 4 3211-2 2 7 22R DEMOD_TSVAL 2

F200
D A M M
XTALI TSVALID
R
3 4
F
3 3211-3 3 6 22R DEMOD_TSSYNC +5V_SW IN OUT +2V5_SW
R
TSSYNC
FO M U O O M
34
M R
XTALO COM
R G
+3V3_SW
10u 16V
U
RES 2248 100n 8 3211-1 1 8 22R DEMOD_TSDATA7
O MD
0
O G
2225
RES 2223
RES 2226
100n
2224
100n
RES 2227
U
22u
10u
3201 +3V3_SW
A
IF1_N 47R 4201 RES 42 9
O R R
XTALSEL 1
D A
3202
R
IF1_P 47R RES 3203 1K0 12
1
F G M
2
O
3226 47R 38 13
O O M
TAINP 3
M R U A F
IF_AGC1 3227 37 TSDATA 14
2K2
2K2
47R
F O O
TAINM 4
2204
2205
O G R
15
U
82p
82p
M
5
O D
+3V3_SW
R
1 16
R D A FO
GPIO0 6
O O R
47 17
M
GPIO1 7
O O M
3212
3213
R
2 7216
M D G
GPIO2 F212
U
LD1117S33
F
20 3231 47R DEMOD_SCL
U O G O R A
SCL 2
R
21 3232 47R DEMOD_SDA
R A M
3206 SDA
D M
3 4
R G
3204
3205
48 +5V_SW
3K3
3K3
IN OUT +3V3_TUN
O
F213
G U
TIFAGC
M R A
50
O O
10K
A M F O
330u 6.3V
22u 6.3V
R
2206 100n 51 COM
F M O
2249
100n
RES 2229
2230
100n
RES 2232
2228
RES 2231
RES
O D
22u
10u
U
TUNER_SCL 46 52
M G O
TTUSCL
R
TUNER_SDA 45 53 1
R D A F O R
TTUSDA
G O M
54
O O M D G
55
A F M U
24 56
U O O M R R A
TESTMODE
M
3228
R
57
22K
R U G O M
58
DO G O O MD R R A F
RES 3207 1K0 25 59
A O
+3V3_SW SLVADR0
F
RES 4202 41 60
G O M O
SLVADR1
M D
61
M R U A F
0R
O
3208 I206 26 VIA 62
O
OSCEN_X
DO G O OR M M R
63
A D U
64
R G
F202
O
DEMOD_RST
O
29 65
M F M R A
RST_X
M R D G
66
U A O M
67
U O G R R F
3209
M
30 68
4K7
D A O M
OSCMODE
R G O O
69
O M U A O D
70
M R R F O O
71
U O O M D M R
72
R D G F O G
73
R U
GND_HS
A O M A
TAVSS
74
FO D R
XVSS
M M U G M
VSS
U O O M R R A O
2246
F O O
6
11
18
23
27
31
43
36
39
49
R D U G O M D
7300-7
A F
47n
O R R
MT5396
O R
3230
F UM G O M O M
DEMOD_IF
A F D U G
22K 3223
O O A
IF_AGC2 U35
R M R
IF_AGC
M R
U34
D M
10K RF_AGC
O R U G O
F DO O M R
DEMOD_RST T34 R34
A F O O
DEMOD_RST PVR_TSCLK
G
DEMOD_TSCLK T32 R32
U O
5200
M D
DEMOD_TSCLK PVR_TSVAL
R A
DEMOD_TSVAL T31 R33
F
+3V3_TUN
R
DEMOD_TSVAL PVR_TSSYNC
M R
DEMOD_TSSYNC T35 P33
G M O O M
4u7 DEMOD_TSSYNC PVR_TSDATA0
O
IF2_N
U G
DEMOD_TSDATA7 T36 P34 3224 100R I207
A
DEMOD_TSDATA0 PVR_TSDATA1
D U
2217
2218
100n
F
U36
O
47u
R A
DEMOD_TSDATA1
M O R R
1201 T33 P35
D
DEMOD_TSDATA2 SPI_CLK
O M M
14
15
SUT-RA214ZN
RES 2247
T30 N37
10p
G O
DEMOD_TSDATA3 SPI_CLK1
F DO U
150R
3222
2244
R
V33 N35
47p
O M A F O
DEMOD_TSDATA4 SPI_CLE
O
1 V32 N34
R
F203
G
A3.3V DEMOD_TSDATA5 SPI_DATA
U M D
2 A209 2239 1u0 5203 1K0 IF1_N V31 N36
O
IF1_P DEMOD_TSDATA6 CI_INT
M R R A
3 A210 2240 1u0 5204 1K0 IF1_P V30
R
IF1_N DEMOD_TSDATA7
M F O O M
4 3229 4K7 IF_AGC1 AT32
G
F211
U O
AGC1 ADCINN_DEMOD
TUNER
D G
IF2_P
U
2234 10n T37 AU32 3225 100R I208
R A F
CI_TSCLK ADCINP_DEMOD
A
R36
O R R
CI_TSVAL
O M O M
7 A204 2219 1u0 5201 1K0 IF2_N R37
G M
IF2_P CI_TSSYNC
D O
2245
F
8 2220 1u0 5202 1K0 IF2_P R35
47p
U
IF2_N A205 CI_TSDATA0
DO O A F
9 F206 3214 4K7 IF_AGC2
R R O O
AGC2
M
10 3217 15R TUNER_SCL
M
F207
D
I2C_SCL
R U G O
11 F208 3218 15R TUNER_SDA
I2C_SDA
A U
47p
47p
22p
16
13
12
2221 22p
A
2233 10n
O R M F O O M G R R M
2222
O
RES
D U
2235
2236
RES
G O D
1 2012-01-20
U
M R A F O R
3139 123 6539
R M
Tuner & Demodulator
R U A G O M D O U G
F O O M R R A
19300_003_120402.eps
O M D U O M
120402
F R R G F
DO O M G O A DO O
2012-Apr-20 back to
U M
div. table
R U
O
PWB Layouts
G
L12M1.1L
A
LA 10. EN
O
60
O M M R
MA F muting UM R D A O
10-2-3 B03, Class-D and muting
R R D O A G O F O M M R
A G B03 O Class-D and
O M M R U O G B03
G R D A F M M
DO A O F O M M
G R R U O
D O SPEAKER_L-
M R R U D O A O F O M R
O G O O M R U A G
+VSND
D A F M G R
47u 35V
47u 35V
M U O M
2474
2475
* *
2465
2432
2433
2434
2435
2436
220n
2437
220n
5404
2438
2439
2440
2441
2466
2442
220n
2443
220n
5405
30R
30R
10u
10u
10u
10u
10u
10u
10u
10u
10u
10u
M M R R U D O A G O M G R * * * * * * * * * *
U O G O O M M R U A
47u 25V
47u 25V
R D A R
2467
3422
2469
3424
F
10K
10K
M U O O M
FO R D AG
** * ** *
M R F
SPEAKER_R-
O
* *
2428 100n
2429 100n
U O G
2463 10u
RES 2464 1u0

2411 1u0
O O D
47u 25V
47u 25V
R D A M M
2468
3423
2470
3425
10K
10K
M F U O O M R
FO
* * * *
M R
3411
* *
R G
* *

+3V3D
U O G O MD U
1R0
O R R A
3412
R D A
+3V3D
F G O M
1R0
O F O M M R U A F O O
I415
R U O A G O R M D
R D FO
2426
R
10n
O O M M R D O O M G
*
U
*
R F U O A G O M R R A
I416 5400 5414
R D G M
SPEAKER_L+
G U O
30R
M R
10u
A O O M R A F O
3418
2413
220n
2414
220n
2417
RES
18R
O
10n
M F U O O M D
15K
3404
* *
R G
+3V3D +3V3D +3V3D
*
D A
RES 3419 15K
*
R F O
I421
13
27
34
35
O M
2
3
G
AVDD
DVDD
O O D
PVDD_AB
PVDD_CD
A M M U G
2412
330p
AOLRCK 20
LRCLK
F U O O M R R A
3401
M
AOBCK 21
10K
SCLK
* * 5410
R
3400
1 SPEAKER_L+
47K
R G M
OUT_A
U O
AOMCLK 15
G O MD
MCLK 30R
DO
4 I410 2408 33n
O R R A F
BST_A
O
AOSDATA0 22 43 I411 2409 33n
A
SDIN BST_B
2416
3
RES
D_RESET
10n
G O M D O
SDA 3402 47R 23 7400 46 SPEAKER_L-
M
SDA TAS5731PHP OUT_B
R U A F
5 SCL 3403 47R 24
**

7401-2
M
I420 SCL RES
O O
PUMH2 39
5401 5406
OUT_C
** F401
M
I417
DO G O OR R
4 14 SPEAKER_L-
M
A_SEL
D
6 42 I412 2410 33n
**
A U
BST_C 10u 30R
2473
220n
D_RESET 25 33 I413 2462 33n 1D01 1D02
R
RESET BST_D RES 5411
Left+ F403
O O
2418
RES 5407
2431
POWER_DOWN 2 1 F411
RES
30R
7401-1 1
10n
10n
M F M R A
PUMH2 19 36 2
* Left- 30R 2
R G
PDN OUT_D
M D
1
* * Right+ 3
** F412 3
U O
3408 2419 RES 5412
M
I414 3407
*
A
11 16 18K2 Right- 4
U O G R
P OSC_RES
F
10 PLL_FLT 2041145-3
R
I422 30R
M
F407 M 18R 330p F404
A O
32 2041145-4
D
SPEAKER_R+
R G M O O
GVDD_OUT
A_STBY 4401 8
U O
2401 3405 PBTL I418 5402 5415 F402
M A
SPEAKER_R+
O M F O D
1407
1406
1408
R
I404 470R 6
R O
47n I405 SSTIMER 10u 30R
2425
RES
M
10n
F409
O D
2422
U O M
2400 4n7 26 5
G
STEST
3409
220n
2423
220n
2424
MUTE 7 RES 3420 22K
18R
**
10n
R D F O U
1402
1403
1404
1405
I407
R
2404 2n2 12 40
RES
O M A
VR_ANA
NC 41 SPEAKER_R-
*
FO D G R
18 44
** *
M M U
VR_DIG I423 2421
I419
45
U O R R A O
31
O M
3406 2402 VREG 330p
3410
F
18R
R G O M O O
50 60 +3V3_SW
U
470R 47n RES
D D
2403 51 61
5403
* * 5408
A F
I406
O R R
52 62 SPEAKER_R-
O
I424
R
53 63
F UM
10u 30R
M
4n7
G O O M
3417
54 64
1R0
D
2405
2420
330p
2427
RES 5409
55 VIA VIA 65
RES
30R
10n
A F
SPDIF
U
56 66
O O A
10u
M
57 67
*
R
I408
PGND_CD
R
1D03
PGND_AB
M R
2406 2460 F413

58 68 2
D
*
GND_HS
M
VCC
U
DVSSO
59 69
O G
I409
AGND
O
DVSS
AVSS
100n 2407 3421 100n F406
R
GND
SPDIF_OUT 1
DO O
VIN
F M R A F O O
100n 33R
G
30
28
17
29
47
48
37
38
49
3
GND
R U A O M D
MT
2461
F
33p
M R R
4 5
U A G O M O O M G
7402
D U
* 4402
F
LD1117DT33
O A
+12VS
R M O R R
GND_PLL
D
*4403 3 2
O M
+VSND
M
+3V3_AUDIO
* * 5413

IN OUT F410
F G O
22u 6.3V
DO
COM
R U
30R
O M A F
2471
100n
2472
G R O O
1

GND_PLL
U M D
2430
10n

F405
M R R A O
**
OUTPUT DIVERSITY
**
M
1D02
F D U G O
2467, 2468, 2469, 2414, 2423, 2426, 2430, 2431, 2470, 2473. 2413, 2416, 2418, 2425, 2422, 2427,
F408 5416
DO O A F
+3V3D +3V3_AUDIO 3422, 3423, 3424, 3425.
R R O O
5410, 5413. 5406, 5408
M
30R
M
ACTIVE 2.1
D
RES 5417 YES NO
U G O
(CURRENT)
R
+3V3_SW
2.0 NO YES
M A F O O R
30R
U A G O R M D U M G
R R A
2474, 2475. 2432, 2433, 2434, 2435, 2438, 2439, 2440, 2441, 2465, 2466.
F
*
M O R
4402 4403
O O M G M
+12VAudio NO YES
D U O
+24VAudio YES NO
G O D
1 2012-01-20
U
M R A F O R
3139 123 6539
R M
Class-D and muting
R U A G O M D O U G
F O O M R R A
19300_004_120402.eps
O M D U O M
120402
F R R G F
DO O M G O A DO O
2012-Apr-20 back to
U M
div. table
R U
O
PWB Layouts
G
L12M1.1L
A
LA 10. EN
O
61
O M M R
MA MTK5396FPower
M R D A O
10-2-4 B04A, MTK5396 Power
A G B04A O O M M R U O G B04A
G R D A F M M
DO A O O M M R R U O O
+1V1_SW
M R F U O G O O M D R 7300-3 +1V5_SW
D A
MT5396
O G R F G
CORE_VCC
100n
100n
100n
100n
100n
100n
100n
O O M
7300-6
A M R U A
25A2
P14 AN8 MT5396
4u7
D
SENSE_1V1_MT5396 VCCK_1 VCCK_25
F
P15 AP7
25A0
25A1
2595
2596
2597
2598
2599
DDR_POWER
G R
VCCK_2 VCCK_26
U O M
P16 AP8
M O O
VCCK_3 VCCK_27
R
P17 AR7 A3 T6
M D A
VCCK_4 VCCK_28 DDRV_1 DDRV_26
R
100n
100n
100n
100n
2506 100n
100n
2508 100n
100n
100n
100n
100n
100n
100n
2515 100n
100n
2517 100n
100n
100n
100n
100n
100n
100n
2524 100n
100n
2526 100n
100n
100n
4u7
P18 AR8 A4 U5

220u 2V0
O O
O G
25AA
U
2500
F
P19 AT7 B3 U6
22u
M
VCCK_30
O
VCCK_6 DDRV_3 DDRV_28
100n
100n
100n
100n
100n
R
R14 AT8 B4 V5

2501
2502
2503
2504
2505
2507
2509
2510
2511
2512
2513
2514
2516
2518
2519
2520
2521
2522
2523
2525
2527
2528
A M D
R D
T14 AU7 C3 V6
F
G O
U14 AU8 C4 AC1
U O R
2580
2581
2582
2583
2584
M
V14 P20 D4 AC2
R M
M D A
W14 P23 D5 AC3
R G
Y14 R24 E5 AC4
U O G U
M R A
AA14 T24 E6 AC5
O O
A M R
AB14 V23 F6 AC6
R D
F M
AC14 W23 F7 A25
M U O O
AC15 Y23 G6 B25
FO D AG
100n
100n
100n
100n
100n
M
AC16 AA23 G7 C25
R F O
AC17 AC20 G15 D25
O
U O G
AC18 AC21 G18 E20
2585
2586
2587
2588
2589
O O D
AC19 AC22 H7 E23
A M M
R D
AD18 AC23 H8 E24
F
AM7 AC24 H10 F20
M U O O M R
FO
AM8 AD23 H13 F23
M R
AN7 AD24 J8
R
F24
U G
O MD
J10 G20
U O G
DDRV_22 DDRV_47
O R A
N7 G23
R
DDRV_23 DDRV_48
100n
100n
100n
100n
100n
A
P7 G24
R D
DDRV_24 DDRV_49
F
+3V3STBY
G M
T5
O
DDRV_25
O O M
2590
2591
2592
2593
2594
R
100n
100n
100n
100n
100n
M U A F
F507 3502
F O O
POWER_DOWN
U O G R M
25A3
25A4
25A5
25A6
25A7

3K3
R R D A O
FO D
3503
15K
BZX384-C3V3
O O M O O M R
6500
RES
F M R D U G
5506
G O A
7501
U O R
+1V2_SW F510
BC847BW
R M R
30R
R D A G M 100n
100n
100n
100n
100n
2534 100n
100n
2536 100n
100n
100n
100n
100n
O
2542 1u0
U
I518
G
3505 6501
M R
2543
A
4u7
7502
O O
+12VS
F O
BC847BW
A M R 2529
2530
2531
2532
2533
2535
2537
2538
2540
2541
1K0 BZX384-C8V2
M R F U O G O M D O
25A8
220n
3504
1K0
D A
+3V3STBY
R F O R
+3V3_SW
G O M
2544 7300-4
O O D
MT5396
A F M M U G
CORE_VSS

4u7
4K7
4K7
4K7
10K
R
7300-1
M U O O M R
5500
MT5396 A18 W19

30R
3506
R
4K7
DVSS_1 DVSS_71
B18 Y4
R G M
AC_POWER
U O
DVSS_2 DVSS_72
C18 Y5
DO G O MD
DVSS_3 DVSS_73
A F
AJ20 D11 Y6 STANDBY
O R R
3508
3509
3510
3512
AVDD10_LDO DVSS_4 DVSS_74
O
D12 Y7
A
DVSS_5 DVSS_75 3
+3V3STBY
F
U24 W30 D18 Y8
G O M O
AVDD12_PCIE11 AVSS12_PCIE11 DVSS_6 DVSS_76 3507
1 I508
100n
100n
100n
D
100n
100n
AA24 AJ21 E7 Y15 7500
M
AVDD12_HDMI_0_RX AVSS12_RGB DVSS_7 DVSS_77
R U A
BC847BW
F
Y24 AJ26 E8 Y16

2545
4u7
M
AVDD12_HDMI_1_RX AVSS12_DEMOD DVSS_8 DVSS_78 10K +3V3_SW +3V3STBY
O O
W24 AL14 E9 Y17
2546
2547
2548
2549
2550
AVDD12_HDMI_2_RX AVSS12_REC DVSS_9 DVSS_79
DO G O OR M R
AB24 AG5 E11 Y18 2
M
AVDD12_HDMI_3_RX AVSS12_LVDS_1 DVSS_10 DVSS_80
D
AD19 AJ5 E12 Y19
U
AVDD12_RGB AVSS12_LVDS_2 DVSS_11 DVSS_81
A G
AL27 AF5 E19 AA5
R
AVDD12_DEMOD AVSS12_VPLL DVSS_12 DVSS_82
O O
AD14 F5 AA7 MUTE
F R
AVDD12_REC DVSS_13 DVSS_83
M M A
AG6 F8 AA15 3
R G
AVDD12_LVDS_1 DVSS_14 DVSS_84

3535
M D
4K7
AJ6 F9 AA16
10K
U O
AVDD12_LVDS_2 DVSS_15 DVSS_85 3511 I509
M
AF6 F12 AA17 7503 1
O G R A
AVDD12_VPLL DVSS_16 DVSS_86 4K7
U
100n
100n
100n
100n
100n
3534
F
F19 AA18 BC847BW
10K
R
DVSS_17 DVSS_87 1K0
A M
N14 N15 G14 AA19 25AB 1n0 7300-12
R D O G M
AVDD33_MEMPLL AVSS33_MEMPLL DVSS_18 DVSS_88
O O
V24 D34 G16 AB5 2 MT5396
RES
3518
3528
U
2551
2552
2553
2554
2555
AVDD33_PCIE11 AVSS33_USB_P1 DVSS_19 DVSS_89

D35 AR13 G17 AB6 3529 4K7
M A
OPTCTRL_TCON
O D
AVDD33_USB_P0P1 AVSS33_USB_P2 DVSS_20 DVSS_90
F
AP13 AB30 G19 AB15
M R O
+3V3STBY AVDD33_USB_P2P3 AVSS33_HDMI_RX_1 DVSS_21 DVSS_91
R O
AB29 AD30 H11 AB16 WOLAN_IRQ 3527 100R AR20
M R
AVDD33_HDMI_0_RX AVSS33_HDMI_RX_2 DVSS_22 DVSS_92 OPCTRL0
O D
AA29 AF31 H19 AB17 POWER_DOWN 3520 100R AN20
U O M
G
5502 30R Y29 AF32 J4 AB18 3519 100R AM19
G
R D F
2556 1u0 AC29 AK17 J5 AB19 AN21
O R U
I517 AVDD33_HDMI_3_RX AVSS33_VGA_STB DVSS_25 DVSS_95 OPCTRL3
A O M A
2557 100n AK18 AJ22 J6 A26 3521 100R AR19
AVDD33_VGA_STB AVSS33_VDAC_BG DVSS_26 DVSS_96 OPCTRL4
FO D R
AD20 AL24 J11 B26 ENABLE_WOLAN 3536 100R AP19
G
AVDD33_VDAC_BG AVSS33_VDAC DVSS_27 DVSS_97 F509 OPCTRL5
M M U
AD21 AM27 J12 C26 RESET_AUDIO POWER_OK 3523 100R AN19
M
+3V3STBY 2560 I501 AVDD33_VDAC AVSS33_PLLGP DVSS_28 DVSS_98 OPCTRL6
AK23 AL25 K7 D26
O
USB_OC_P0 RES 3541 100R AM18
A
3
R
DVSS_99
U O
AVDD33_PLLGP AVSS33_CVBS_1 DVSS_29 OPCTRL7
O M R
AK24 AM26 L7 E21 USB_OC_P1 AP20
100n AVDD33_CVBS_1 AVSS33_CVBS_2 DVSS_30 DVSS_100 OPCTRL8
F
3513 I510
O O
5503 30R AK25 AM28 L8 E22 7504 1 VGA_DETECT AN18
R G M
AVDD33_CVBS_2 AVSS33_DEMOD DVSS_31 DVSS_101 OPCTRL9
U O
2558 1u0 AD22 AH26 M7 E25 BC847BW USB_OC_P2 AT20
D
I502 AVDD33_DEMOD AVSS33_XTAL_STB DVSS_32 DVSS_102 1K0 OPCTRL10
D
2559 100n AK27 AJ28 R1 F21 USB_OC_P3 AU20
O R A F
AVDD33_XTAL_STB AVSS33_AADC DVSS_33 DVSS_103
R
2 OPCTRL11
3514
AL31 AK30 R2 F22
4K7
R
AVDD33_AADC AVSS33_DAC DVSS_34 DVSS_104
F UM
AG30 AE30 R3 F25 3524 100R AM20
G M O
DVSS_105
M
AVDD33_DAC AVSS33_DAC1 DVSS_35 OPWRSB
O D
AF30 AL16 R4 G22
G
AVDD33_DAC1 AVSS33_LD DVSS_36 DVSS_106
AD17 AL15 R5 G25 HDMI_CEC AA32
A F U
AVDD33_LD AVSS33_COM DVSS_37 DVSS_107 HDMI_CEC
O
AD16 AH5 R6 H22 AF33
O
HDMI_0_SDA
A
AVDD33_COM AVSS33_LVDSA DVSS_38 DVSS_108 HDMI_0_SDA
R M
AH7 AE5 R7 J22 HDMI_0_SCL AG33 F27
M R R
AVDD33_LVDSA AVSS33_LVDSB DVSS_39 DVSS_109 HDMI_0_SCL TCON0
25A9
D
3500
3501
5504
AE6 R15 N22 AG32 E27

47R
47R
HDMI_0_HPD
30R
10u
M
AVDD33_LVDSB DVSS_40 DVSS_110 HDMI_0_HPD TCON1
O U
R16 P21 F30
G O
DVSS_41 DVSS_111 3530 TCON2
DO R
E34 R17 P22 AG31 F29
O
OPWR0_5V
R
VCC3IO_A_1 DVSS_42 DVSS_112 HDMI_0_PWR5V TCON3
F
I504
M A F
2567
I503 I505 F33 R18 R20
O
B27
O
10n
VCC3IO_A_2 DVSS_43 DVSS_113 1K0 TCON4
G
G31 R19 R21 HDMI_1_SDA AD33 A27
100n
100n
100n
O
VCC3IO_A_3 DVSS_44 DVSS_114 HDMI_1_SDA TCON5
U D
47u 6.3V
47u 6.3V
M
G32 T7 R22 HDMI_1_SCL AE33 B28
A
VCC3IO_A_4 DVSS_45 DVSS_115 HDMI_1_SCL TCON6
R
2561
2563
2565
H29 T8 R23 HDMI_1_HPD AE32 A28
F
4u7
R
VCC3IO_A_5 DVSS_46 DVSS_116 HDMI_1_HPD TCON7
M R
H30 T15 T20 C28
2562
2564
2566
VCC3IO_A_6 DVSS_117
M
DVSS_47 TCON8
G
3531
O O M
J29 T16 T21 OPWR1_5V AE31 D28
DVSS_118
O
VCC3IO_A_7 DVSS_48 HDMI_1_PWR5V TCON9
U G
J30 T17 T22 E28
A
1K0

VCC3IO_A_8 DVSS_49 DVSS_119 TCON10
D U
AK9 T18 T23 HDMI_2_SDA AB33 F28
R F O A
VCC3IO_B_1 DVSS_50 DVSS_120 HDMI_2_SDA TCON11
O
AK10 T19 U20 HDMI_2_SCL AC33 B29
M R R
VCC3IO_B_2 DVSS_51 DVSS_121 HDMI_2_SCL TCON12
AK11 U7 U21 HDMI_2_HPD AC32
O D M
VCC3IO_B_3 DVSS_52 DVSS_122 HDMI_2_HPD
M
AL9 U15 U22
G O
VCC3IO_B_4 DVSS_53 DVSS_123 3532
U16 U23 AC31
F DO
OPWR2_5V
U
5505 DVSS_54 DVSS_124 HDMI_2_PWR5V
R
+3V3STBY +3V3STBY
O M
U17 V20
A F O
+3V3_SW DVSS_55 DVSS_125 1K0
O
U18 V21 HDMI_3_SDA AH33
R
30R DVSS_56 DVSS_126 HDMI_3_SDA
U G
U19 V22 HDMI_3_SCL AH32
M D
DVSS_57 DVSS_127 HDMI_3_SCL

100n
100n
2571 100n
100n
2573 100n
100n
100n
100n
100n
100n
100n
V15 W20 HDMI_3_HPD AJ32
A O
DVSS_58 DVSS_128 HDMI_3_HPD
R R
2568
M
V16 W21
4u7
DVSS_59 DVSS_129
R
3533
3537
3538
O O
V17 W22 AH31
RES
RES
4K7
4K7
2569
2570
2572
2574
2575
2576
2577
2578
2579
OPWR3_5V
M
DVSS_60 DVSS_130 HDMI_3_PWR5V
U G O
V18 Y20 1K0
DVSS_61 DVSS_131
D U G
V19 Y21 VGA_SDA AR22
A F
DVSS_62 DVSS_132 VGA_SDA
R
W5 Y22 VGA_SCL AP22
A
DVSS_63 DVSS_133 VGA_SCL
O R R
W6 AA20
M
DVSS_64 DVSS_134
O O M
W7 AA21 STBY_SDA RES 3539 100R F511 AR21
M
DVSS_65 DVSS_135 STB_SDA
D G O
STRAPPING OPCTRL5(0) OPCTRL4(0) ASPIF(0) W8 AA22 STBY_SCL RES 3540 100R F512 AT21
F
DVSS_66 DVSS_136 STB_SCL
U
ICE MODE+27M+Serial Boot 0 0 0 W15 AB20
DO O A F
DVSS_67 DVSS_137
ROM Boot+27M 0 0 1 W16 AB21 LED1 AP21
R R O O
DVSS_68 DVSS_138 LED_PWM0
M
ICE MODE+54M+Serial Boot 0 1 0 W17 AB22 LED2 AN22
M
DVSS_69 DVSS_139 LED_PWM1

ROM Boot+54M 0 1 1 W18 AB23
G O D
DVSS_70 DVSS_140
R U R
3525
3526
M A F
10K
10K
R O O
F506
U A G O M D U M G
F D U O
1 2012-01-20
U
M R A F O R
3139 123 6539
R M
MTK5396 Power
R U A G O M D O U G
F O O M R R A
19300_005_120402.eps
O M D U O M
120402
F R R G F
DO O M G O A DO O
2012-Apr-20 back to
U M
div. table
O FO
M O G R R D A O
R U
O
PWB Layouts
G
L12M1.1L
A
LA 10. EN
O
62
O M M R
MA DDR3 F
M R D A O
10-2-5 B04B, DDR3
G M U O
+1V5_SW +1V5_SW +1V5_SW +1V5_SW
B04B O O M R G B04B
M A F U O G O O R D A
R
1% 3632 1K0
1% 3627 1K0
1% 3625 1K0
1% 3634 1K0
100n
100n
100n
100n
G R D A F M M
DO O O M U O O
2651
2649
2655
2653
A M R
7300-5
F R
MT5396JDNJ
U O G D
DDR3
M O O M R
+1V5_SW +1V5_SW
R R D A
ARA(0) F15 K6 BRA(0)
F
ARA0 BRA0
G G
ARA(1) F14 N3 BRA(1)
3633 1K0
3628 1K0
1% 3626 1K0
1% 3635 1K0
ARA1 BRA1
100n
100n
100n
100n
O O M
ARA(2) A14 M1 BRA(2)
R U A
ARA2 BRA2
A M
B13 N2
D
ARA(3) BRA(3)
ARA3 BRA3
F
ARA(4) E13 N6 BRA(4)
O G R
2652
2650
2656
2654
ARA4 BRA4
M U M
ARA(5) F16 K5 BRA(5)
O O
1%
1%
ARA5 BRA5
M R
ARA(6) E14 N4 BRA(6)
R D A
ARA6 BRA6
G7
G7
C1
D9
N1
N9
R1
R9
C1
C9
D2
H2
H9
N1
N9
R1
R9
C9
D2
H2
D9
H9
A8
E9
B2
K2
K8
A1
A8
E9
B2
K2
K8
A1
F1
F1

ARA(7) B15 L3 BRA(7)
O O
ARA7 BRA7
U O G F
ARA(8) D13 L6 BRA(8)
M
VDD VDDQ VDD VDDQ
O
ARA8
O
BRA8
R
ARA(9) E15 M3 BRA(9)
A M D
ARA9 BRA9
R D
ARA(10) F11 P4 BRA(10) ARA(0) 3657-2 2 7 22R N3 ARA(0) 3651-2 2 7 22R N3
F
ARA10 BRA10 0 0
G O
ARA(11) C14 M5 3645-3 3 6 22R P7 3653-3 3 6 22R P7
O
BRA(11) ARA(1)
R
ARA(1)
U
ARA11 BRA11 1 1
M
ARA(12) F13 N5 BRA(12) ARA(2) 3648-4 4 5 22R P3 ARA(2) 3655-4 4 5 22R P3
R M
ARA12 BRA12 2 2
M D A
ARA(13) A15 M4 BRA(13) ARA(3) 3648-3 3 6 22R N2 ARA(3) 3655-3 3 6 22R N2
R G
ARA13 BRA13 3 3
ARA(14) C15 L5 BRA(14) ARA(4) 3646-1 1 8 22R P8 D7 ARDQ(8) ARA(4) 3636-1 1 8 22R P8 D7 ARDQ(24)
U O G U
ARA14 BRA14 4 0 4 0
M R A
ARA(5) 3657-1 1 8 22R P2 C3 ARDQ(9) ARA(5) 3651-1 1 8 22R P2 C3 ARDQ(25)
O O
5 1 5 1
A M R
ARBA(0) A13 N1 BRBA(0) ARA(6) 3645-4 4 5 22R R8 A C8 ARDQ(10) ARA(6) 3653-4 4 5 22R R8 A C8 ARDQ(26)
R D
ARBA0 BRBA0 6 2 6 2
F
ARBA(1) G11 P5 BRBA(1) ARA(7) 3647-4 4 5 22R R2 C2 3652-4 4 5 22R R2 C2
M
ARDQ(11) ARA(7) ARDQ(27)
ARBA1 BRBA1 7 3 7 3
U O
D16 K4 3645-2 2 7 22R T8 DQU A7 3653-2 2 7 22R T8 DQU A7
O
ARBA(2) BRBA(2) ARA(8) ARDQ(12) ARA(8) ARDQ(28)
FO M
ARBA2 BRBA2 8 4 8 4
R D AG
ARA(9) 3647-2 2 7 22R R3 7601 A2 ARDQ(13) ARA(9) 3652-2 2 7 22R R3 A2 ARDQ(29)
M
9 5 9 7602 5
R F
H5TQ2G63BFR-H9C
O
ARCASn E17 H5 BRCASn ARA(10) 3646-4 4 5 22R L7 B8 ARDQ(14) ARA(10) 3636-4 4 5 22R L7 H5TQ2G63BFR-H9C B8 ARDQ(30)
ARCAS BRCAS 10 6 10 6
O G O
ARRASn F17 H4 BRRASn ARA(11) 3645-1 1 8 22R R7 A3 ARDQ(15) 3653-1 1 8 22R R7 A3
U
ARA(11) ARDQ(31)
ARRAS BRRAS 11 7 11 7
O O D
ARCKE F10 P6 BRCKE ARA(12) 3646-2 2 7 22R N7 ARA(12) 3636-2 2 7 22R N7
DDR3#1 DDR3#2
M
ARCKE BRCKE 12 12
R D A M
ARWEn D14 L4 BRWEn ARA(13) 3647-3 3 6 22R T3 C7 ARDQS1 ARA(13) 3652-3 3 6 22R T3 C7 ARDQS3
F
ARWE BRWE 13 DQSU 13 DQSU
ARCSn E16 K3 BRCSn ARA(14) 3631-4 4 5 22R T7 B7 ARDQS1n ARA(14) 3697 22R T7 B7 ARDQS3n
U O R
ARCS BRCS 14 DQSU 14 DQSU
M O M
F18
FO
G5 M7 M7
R
ARCSX BRCSX 15 15
M
F3 ARDQS0 F3 ARDQS2
R G
BC DQSL BC DQSL
U
ARCLK0 A20 F4 BRCLK0 G3 ARDQS0n G3 ARDQS2n
G O MD
BRCLK0
O
ARCLK0 AP DQSL AP DQSL
U
A21 F3
A
ARCLK0n BRCLK0n
O R R
ARCLK0 BRCLK0
ARCLK1 D9 V4 BRCLK1 H1 E3 ARDQ(0) H1 E3 ARDQ(16)
D A
ARCLK1 BRCLK1 VREFDQ 0 VREFDQ 0
R F
ARCLK1n C9 V3 M8 F7 M8 F7

BRCLK1n ARDQ(1) ARDQ(17)
G M
BRCLK1
O
ARCLK1 VREFCA 1 VREFCA 1
F2 ARDQ(2) F2 ARDQ(18)
M
2 2
O O
240R 240R
R
ARDQ(0) C23 A1 BRDQ(0) 3608 L8 F8 3688 L8 F8
U
ARDQ(3) ARDQ(19)
M A F
ARDQ0 BRDQ0 ZQ 3 ZQ 3
O
B17 J1 DQL
O
ARDQ(1) BRDQ(1) H3 ARDQ(4) DQL H3 ARDQ(20)
F
ARDQ1 BRDQ1 4 4
G R
ARDQ(2) D23 B2 BRDQ(2) ARBA(0) 3648-2 2 7 22R M2 H8 ARDQ(5) ARBA(0) 3655-2 2 7 22R M2 H8 ARDQ(21)
U O M
ARDQ2 BRDQ2 BA0 5 BA0 5
O D
ARDQ(3) C17 J2 BRDQ(3) ARBA(1) 3646-3 3 6 22R N8 G2 ARDQ(6) ARBA(1) 3636-3 3 6 22R N8 G2 ARDQ(22)
R
A FO
D24 C2 3657-3 3 6 22R M3 H7 3651-3 3 6 22R M3 H7
D
ARDQ(4) BRDQ(4) ARBA(2) ARDQ(7) ARBA(2) ARDQ(23)
R
R
C16 K1
O
ARDQ(5) BRDQ(5)
O
ARDQ5 BRDQ5
M M
ARDQ(6) C24 A2 BRDQ(6) ARRASn 3631-3 3 6 22R J3 ARRASn 3659-3 3 6 22R J3
O O
ARDQ6 BRDQ6 RAS RAS
M R D G
ARDQ(7) D15 K2 BRDQ(7) ARODT 3631-2 2 7 22R K1 ARODT 3659-2 2 7 22R K1
ARDQ7 BRDQ7 ODT ODT
F U
ARDQ(8) A17 J3 BRDQ(8) ARCASn 3631-1 1 8 22R K3 ARCASn 3659-1 1 8 22R K3
A
ARDQ8 BRDQ8 CAS CAS
U O G O R
ARDQ(9) A23 B1 BRDQ(9) ARCLK0 J7 ARCLK1 J7
ARDQ9 BRDQ9 CK CK
R M R
ARDQ(10) D17 H3 BRDQ(10) K7 J1 K7 J1
A
ARDQ10 BRDQ10 CK CK
R D G M
ARDQ(11) B23 D3 BRDQ(11) K9 J9 K9 J9
ARDQ11 BRDQ11 CKE CKE
U O
100R
100R
G
3656
3650
ARDQ(12) D20 G3 BRDQ(12) L2 NC L1 L2 NC L1
M R
ARDQ12 BRDQ12
A
CS CS
O O
ARDQ(13) D22 C1 BRDQ(13) L3 L9 L3 L9
F O
ARDQ13 BRDQ13 WE WE
A M R
ARDQ(14) D19 G4 BRDQ(14) T2 T2
F O
BRDQ14

ARDQ14 RESET RESET
M
ARDQ(15) C22 D2 BRDQ(15) ARCLK0n ARCLK1n
U O D
ARDQ15 BRDQ15
M O
ARDQ(16) C12 T4 BRDQ(16) E7 E7
R G
ARDQ16 BRDQ16 DML DML
ARDQ(17) D6 AB4 BRDQ(17) ARCKE 3629 22R D3 ARCKE 3658 22R D3
R D A F
BRDQ17 VSSQ VSSQ
O
ARDQ17 DMU VSS DMU VSS
R
ARDQ(18) B12 P2 BRDQ(18) ARCSn 3630 22R ARCSn 3660 22R
G O M
ARDQ18 BRDQ18
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
ARDQ(19) C5 AB3 BRDQ(19)
O O D
ARDQ19 BRDQ19
G
ARDQ(20) C13 P3 BRDQ(20) ARWEn 3648-1 1 8 22R ARWEn 3655-1 1 8 22R
A M M U
ARDQ20 BRDQ20
F
ARDQ(21) A5 AB1 BRDQ(21) ARRESET 3647-1 1 8 22R ARRESET 3652-1 1 8 22R

ARDQ21 BRDQ21
R A
A12 P1
U O
ARDQ(22) BRDQ(22) ARDQM0 ARDQM2
M O M R
ARDQ22 BRDQ22
B5 AB2
R
ARDQ(23) BRDQ(23) ARDQM1 ARDQM3
ARDQ23 BRDQ23
R G M
C6 AA3

ARDQ(24) BRDQ(24)
U O
ARDQ24 BRDQ24
O MD
ARDQ(25) D10 U4 BRDQ(25)
DO G
ARDQ25 BRDQ25
O R A F
ARDQ(26) D7 AA4 BRDQ(26)
R
ARDQ26 BRDQ26 +1V5_SW +1V5_SW
A O
ARDQ(27) C11 T3 BRDQ(27)
ARDQ27 BRDQ27 +1V5_SW +1V5_SW
F G M
ARDQ(28) C7 Y3 BRDQ(28)
O O
ARDQ28 BRDQ28
M D
ARDQ(29) C10 U3 BRDQ(29)
ARDQ29 BRDQ29
M R U A F
ARDQ(30) B7 Y2 BRDQ(30)
1% 3607 1K0
1% 3613 1K0
ARDQ30 BRDQ30
O O
100n
100n
ARDQ(31) B10 U2 BRDQ(31)
1% 3622 1K0
1% 3624 1K0
M
ARDQ31 BRDQ31
G O OR
100n
100n
DO M D R
ARDQM0 C19 G2 BRDQM0
A U
BRDQM0
2609
2613
ARDQM0
G
ARDQM1 D21 D1 BRDQM1
R
BRDQM1
2606
2615
ARDQM1
O O
ARDQM2 A7 Y1 BRDQM2
F M R
ARDQM2 BRDQM2
M A
ARDQM3 E10 U1 BRDQM3
R G
ARDQM3 BRDQM3
M D
+1V5_SW
U O M
ARDQS0 C21 E4 BRDQS0 +1V5_SW
U O G R A
ARDQS0 BRDQS0
F
ARDQS0n B21 E3 BRDQS0n
3678 1K0
3614 1K0
R
ARDQS0 BRDQS0
M
100n
100n
D A O
1% 3621 1K0
1% 3623 1K0
R G M O O
100n
100n
ARDQS1 B20 F1 BRDQS1
U O
ARDQS1 BRDQS1
C20

ARDQS1n F2 BRDQS1n
O M A D
2610
2614
ARDQS1 BRDQS1
M F O
1%
1%
R
2605
2611
R O
ARDQS2 B9 V2 BRDQS2
M R
ARDQS2 BRDQS2
G7
D9
N1
N9
R1
R9
C1
C9
D2
H2
H9
B2
K2
K8
A1
A8
E9
F1
O
A9
D
ARDQS2n V1 BRDQS2n
U O M
ARDQS2 BRDQS2
G7
D9
N1
N9
R1
R9
C1
C9
D2
H2
H9

B2
K2
K8
A1
A8
E9
F1
G G
VDD VDDQ
R D F
ARDQS3 C8 W3 BRDQS3
O U
ARDQS3 BRDQS3 VDD VDDQ
A O M R A
ARDQS3n D8 W4 BRDQS3n BRA(0) 3677-2 2 7 22R N3
ARDQS3 BRDQS3 0
3617-3 3 6 22R P7 3693-2 2 7 22R N3
FO D
BRA(1) BRA(0)
R
1 0
M M U G
ARODT E18 H6 BRODT BRA(2) 3619-4 4 5 22R P3 BRA(1) 3689-3 3 6 22R P7
M
ARODT BRODT 2 1
ARRESET B14 M2 BRRESET BRA(3) 3619-3 3 6 22R N2 BRA(2) 3691-4 4 5 22R P3
A O
ARRESET BRRESET 3 2
U O O M R R
BRA(4) 3618-1 1 8 22R P8 D7 BRDQ(8) BRA(3) 3691-3 3 6 22R N2
4 0 3
F O
P2 C3 P8
O
G21 BRA(5) 3677-1 1 8 22R BRDQ(9) BRA(4) 3690-1 1 8 22R D7 BRDQ(24)
RVREF_A 5 1 4 0
R U G O M
G13 BRA(6) 3617-4 4 5 22R R8 A C8 BRDQ(10) BRA(5) 3693-1 1 8 22R P2 C3 BRDQ(25)
+1V5_SW RVREF_B 6 2 5 1
D D
P13 BRA(7) 3665-4 4 5 22R R2 C2 BRDQ(11) BRA(6) 3689-4 4 5 22R R8 A C8 BRDQ(26)
A F
RVREF_C 7 3 6 2
O R R
V7 BRA(8) 3617-2 2 7 22R T8 DQU A7 BRDQ(12) BRA(7) 3694-4 4 5 22R R2 C2 BRDQ(27)
O
RVREF_D 8 7603 4 7 3
R
BRA(9) 3665-2 2 7 22R R3 A2 BRDQ(13) BRA(8) 3689-2 2 7 22R T8 DQU A7 BRDQ(28)
F UM
9 H5TQ1G63DFR-H9C 5 8 4
G O M O M
BRA(10) 3618-4 4 5 22R L7 B8 BRDQ(14) BRA(9) 3694-2 2 7 22R R3 A2 BRDQ(29)
D
7604
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
10 6 9 5
G
BRA(11) 3617-1 1 8 22R R7 A3 BRDQ(15) BRA(10) 3690-4 4 5 22R L7 H5TQ1G63DFR-H9C B8 BRDQ(30)
A F
11 7 10 6
U
BRA(12) 3618-2 2 7 22R N7 BRA(11) 3689-1 1 8 22R R7 A3 BRDQ(31)
DDR3#3
O O A
12 11 7
C7 BRDQS1 BRA(12) 3690-2 2 7 22R N7
M
DDR3#4
R
269M
269G
R
RES
RES
RES
RES
RES
RES
269C
269D
269H
269E
269K
269F
269L
BC DQSU 12
269J
M R
B7 BRDQS1n C7 BRDQS3
D
AP DQSU BC DQSU
M
B7
U
BRDQS3n
O G
AP DQSU
R O
F3 BRDQS0
DO O
DQSL
F R
G3 BRDQS0n F3 BRDQS2
M A F O O
FOR EMC +1V5_SW DQSL DQSL
G3
G
BRDQS2n

DQSL
O
H1 E3
U
BRDQ(0)
M D
VREFDQ 0
A
M8 F7 BRDQ(1) H1 E3
R
BRDQ(16)
+1V5_SW VREFCA 1 VREFDQ 0
R F
F2 BRDQ(2) M8 F7 BRDQ(17)
R
220R 1%
M
MT5396 DE-CAP 2 VREFCA 1
240R
M
3667 L8 F8 BRDQ(3) F2 BRDQ(18)
G O O M
ZQ 3 2
240R
O
DQL H3 BRDQ(4) 3696 L8 F8 BRDQ(19)
U G
4 ZQ 3
100n
A
BRBA(0) 3619-2 2 7 22R M2 H8 BRDQ(5) DQL H3 BRDQ(20)
D U
100n
100n
100n
100n
100n
100n
100n
BA0 5 4
F O A
47u 6.3V
R
1u0
BRBA(1) 3618-3 3 6 22R N8 G2 BRDQ(6) BRBA(0) 3691-2 2 7 22R M2 H8 BRDQ(21)

4u7
BA1 6 BA0 5
O R
2671
RES
3677-3 3 6 22R M3 H7 3690-3 3 6 22R N8 G2
M
BRBA(2) BRDQ(7) BRBA(1)
R
BRDQ(22)
2617
BA2 7 BA1 6
D
M3 H7
M
3693-3 3 6 22R
O
BRBA(2) BRDQ(23)
M
3600

2661
2663
2664
2665
2666
2667
2668
2669
BA2 7
2662
G
BRRASn 3620-3 3 6 22R J3
O
RAS
F DO U
BRODT 3620-2 2 7 22R K1 J1 BRRASn 3692-3 3 6 22R J3
R
ODT RAS
O M A F O
BRCASn 3620-1 1 8 22R K3 J9 BRODT 3692-2 2 7 22R K1 J1
CAS ODT
R O
BRCLK0 J7 L1 BRCASn 3692-1 1 8 22R K3 J9
U G
CK CAS
M D
K7 L9 J7 L1
220R 1%
BRCLK1

CK NC 22R CK
A O
K9 T7 3620-4 5 4 BRA(14) K7 L9
R R
CKE CK NC
M
100R
3666
L2 M7 K9 T7 3698 22R BRA(14)
F R
CS 22R CKE
O O M
100n
100R
3695
L3 T3 3665-3 6 3 BRA(13) L2 M7
G M
3694-3
O
WE CS
U
T2 L3 T3 6 3 BRA(13)
G
1601 1602 1603 1604 1605

RESET WE
D U
T2
A F
HOOK1 HOOK1 HOOK1 HOOK1 HOOK1 BRCLK0n
R
2618
RESET 22R
E7
A
BRCLK1n
3601
R R
DML
O
BRCKE 3662 22R D3 E7
M
VSSQ
O O M
DMU VSS DML
BRCSn 3663 22R BRCKE 3682 22R D3
G M
DMU VSSQ
D O
VSS
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
3683 22R
F
BRCSn
U
NEAR MT5396
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
DO O
BRWEn 3619-1 1 8 22R
A F
BRRESET 3665-1 1 8 22R BRWEn 3691-1 1 8 22R
M R R O O
BRDQM0 BRRESET 3694-1 1 8 22R
M D
BRDQM1 BRDQM2
R U G O
BRDQM3
M R A F O O R
1606 1607 1608 1609
G M
HOOK1 HOOK1 HOOK1 HOOK1 SENSE_1V5_DDR
R U A F O M D R U A G
M O O M R
+1V5_SW +1V5_SW +1V5_SW +1V5_SW
O G M
DDR#1 Bypass Cap
D U O
DDR#2 Bypass Cap DDR#3 Bypass Cap DDR#4 Bypass Cap
F DO O R R A F O O
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
M M
220u 2.0V
47u 6.3V
47u 6.3V
47u 6.3V
220u 2.0V
330u 6.3V
1u0
1u0
1u0
1u0
4u7
4u7
4u7
4u7
G O D
1 2012-01-20
269B
RES 269A
RES 2670
2646
2634
2682
2635
2693
2647
2616
RES
RES

RES
10u
10u
10u
10u
U
M A F
2636
2638
2639
2640
2641
2642
2643
2644
2645
2672
2674
2675
2676
2677
2678
2679
2680
2681
2683
2685
2686
2687
2688
2689
2690
2691
2692
2694
2696
2697
2698
2699
2602
2601
2608
2612
R O
2637
2673
2684
2695
R
3139 123 6539
R M
DDR3
R U A G O M D O U G
F O O M R R A
19300_006_120402.eps
O M D U O M
120402
F R R G F
DO O M G O A DO O
2012-Apr-20 back to
U M
div. table
R U
O
PWB Layouts
G
L12M1.1L
A
LA 10. EN
O
63
O M M R
MA F & EJTAG UM R D A O
10-2-6 B04C, Flash, Control & EJTAG
G U O
7300-8
Flash, Control
B04C O O M R G B04C
MT5396
A F M R D
GPIO_USB
A
* 3DDR 4DDR
M U O G O O
H32 37AB 10K ---
R
GPIO0
A M M
37AC --- 10K
D
F37
R F
GPIO1

F36
DO G U O
GPIO2
M O
G37
O O R
GPIO3 +3V3_SW +3V3_SW
A M
G36 5701
R
GPIO4
F
+3V3_SW +3V3_SW

G35 +3V3_SW
+3V3_SW
O G D
GPIO5
4K7
4K7
M
G34
O O M R
GPIO6 220R
4K7
4K7
10K
H34
R D A
GPIO7
F
L34
G G
GPIO8
O
L32
O O M
GPIO9
R U A
3718
K33 7700
3716
D A M
12
37
GPIO10
2707
100n
RES 2708
100n
H27U4G8F2D
3756
3757
3758
F
K32

GPIO11
U O G R M
H33 VCC
M
GPIO12
R O O
L35
M A
GPIO13
R D
K36 NAND_PDD(0) 29 1

GPIO14 0
O O
NAND_PDD(1) 30 2
O G
J32
U F
GPIO15 1
O O M
J34 NAND_PDD(2) 31 3
R
2

GPIO16
A M D
NAND_PDD(3) 32 4
R D
K34 7300-13 3
F
GPIO17 MT5396 NAND_PDD(4) 41 IO 5
K35
O G O R
4
U
GPIO18
M
K37 C36 USB_DP_P0 NAND_PDD(5) 42 10
SERIAL_NAND
R
5
M
GPIO19 USB_DP_P0
M
43 11
A
J36 C37 USB_DM_P0 NAND_PDD(6)
R D G
GPIO20 USB_DM_P0 6
J37 D36 USB_DP_P1 SDIO_SPIPDD0 C32 NAND_PDD(0) NAND_PDD(7) 44 14
G U
7
U O
GPIO21 USB_DP_P1
M R
A32 NAND_PDD(1) 15
A
J35 D37 USB_DM_P1
O O
GPIO22 USB_DM_P1 PDD1
B36 B32 NAND_PDD(2) NAND_PCLE 16 20
A M
J33 AT13 USB_DP_P2
D R
SD_CMD PDD2 CLE
R
GPIO23 USB_DP_P2
F
B37 A31 NAND_PALE 17 21

NAND_PDD(3)
M
G33 AU13 USB_DM_P2 SD_CLK PDD3 ALE
GPIO24 USB_DM_P2
U O
A37 B31 NAND_PDD(4) NAND_POCE I725 9 22
O
H35 AT14 USB_DP_P3
M
SD_D0 PDD4 CE_
FO
GPIO25 USB_DP_P3
R D AG
H31 AU14 USB_DM_P3 C35 D30 NAND_PDD(5) NAND_POOE 8 23
M
GPIO26 USB_DM_P3 SD_D1 PDD5 RE
R F O
F34 A36 C30 NAND_PDD(6) NAND_POWE 18 24
SD_D2 PDD6 WE
O
GPIO27
G
NC
O
B35 D29 NAND_PDD(7) I726 19 25
U
E36 AN23 3726 10K SD_D3 PDD7 WP
O
GPIO28 ADIN0_SRV
O D
N33 AN24 3727 10K D33 NAND_POCE 6 26
M
POCE0 SE
A M
GPIO29 ADIN1_SRV
R D
P32 AP23 3728 10K AT11 B34 NAND_PARB 7 27
F
GPIO30 ADIN2_SRV LDM_CS POCE1 R
AMBI_SPI_SDO AM9 D32 NAND_PARB 28
R
+3V3_SW +3V3_SW +3V3_SW M35 AR23 3729 10K
U O
LDM_DO PARB B
M O M
GPIO31 ADIN3_SRV
FO
+3V3_SW M37 AU23 3730 100R AP10 C34 NAND_PALE 33
R
KEYBOARD LDM_DI PAALE
M
GPIO32 ADIN4_SRV AMBI_SPI_SCKO AU11 A34 NAND_PCLE 34
R G
M33 AT23 3731 100R

LIGHT_SENSOR
U
GPIO33 ADIN5_SRV LDM_CLK PACLE
AR10 A35 NAND_POWE 35
O MD
F35 AM24 RES 37A4 100R SRF_IRQ
U O G
GPIO34 ADIN6_SRV LDM_VSYNC POWE
4K7
C33 NAND_POOE 38
O R
4K7
E35 AM23 3733 100R AMBI_TEMP
R
GPIO35 ADIN7_SRV POOE
A
C29 39
D
4K7
4K7
4K7
4K7
E37
R
EMMC_CLK
F
GPIO36
2725
100p
3761
RES
M
40
4K7
O
N32
GPIO37
37AD
45
37AB
M
RES
M34
RES
O
4K7
10K
O R
GPIO38
M U A F
46
37A5
M36
37A6
RES
RES
O O
GPIO39
F
M32 +3V3_SW 47
3719
3720
3714
3715
G R
GPIO40
U O M
L33 48
O D
GPIO41
R
E33
R D A FO
GPIO42
R
LCD_PWR_ON 3701 100R E32 RES
O O
GPIO43 VSS
100K
3762
SYS_EEPROM_WE 3702 100R F32 1C22
O O M M
GPIO44
13
36
R G
A29 1
M D
GPIO45
F U
YPBPR_DETECT 3704 100R D31 2

GPIO46 3763
O G O R A
BL_ON_OFF 3705 C31 LIGHT_SENSOR 3
U
100R GPIO47
R
2709 1n0
R
CVBS_DETECT F736 3706 E30 4
M
100R
A
GPIO48 100R
R D G M
E31 5
GPIO49
O
Temperature Sensor
G U
F737 3708 100R F31 6
M R
GPIO50
O O A
F700
3709 100R E29 RES 7
F O
GPIO51
M
RES
A R
F701
3710 100R AP9 1T71 8
F O
GPIO52 3798

3764
M
ENABLE_3V3_AMBIn 3711 100R AT9 SCL F707 1 RC
U O D
GPIO53
M O
3D_2D_SELECT 3712 100R AR9 F708 2 2710 1n0 2041145-8
R G
GPIO54 100R 100R
3D_LED 3713 100R AU9 F709 3
R D A F O
GPIO55
R
RES 4 3D_LED
G O M
RES +3V3_SW
4K7
5 6 RES
O O D
3799
G
4K7
M U
SDA 1C20 1C21
A M
3765
F
37AC
37AE
37AA
RES 2722
100p
RES 2723
100p
2724
RES
502386-0470 F719 1
10u
10u
4K7
4K7
10K
1u0
100R LED2
A
PANEL
U O R R
RES
2711 1n0 F716

RES SDM
O M
2
M
100R
R
F722 3 3
3724
M
3767
R G
2700
2701
O
RES
U
+3V3STBY F720 4 4
3723
DO G O MD
F717 5 5
A F
6K8
O R R
F723 6 6
O
+3V3STBY
A
KEYBOARD 3768
F721 7 7
F G O M O
2713 100n 37A1 0R3 F724 8
D
10R +5V_SW 8
M
STBY_SCL RES 37A9 47R F740 9
R
9
U A F
+T
M
10 10
O O
+3V3_SW
M
STBY_SDA RES 3759 47R F741 11
G O OR
11
DO M R
F702

SYS_EEPROM_WE 12
D
13 12
3766
A U
LED1 13
G
+3V3STBY
2714
100p
2715
100n
2712 1n0 FH52-11S-0.5SH 14
O O
100R
F R
+3V3_SW
M M A
5700 15
R
+3V3_SW
M D G
30R 16
U O
4K7
4K7
10K
10K
M
SRF_IRQ 17
G A
NEAR TO MTK IC
U O R
37A7
100K
+3V3STBY
RES
18
F
2703 100n
M R
3738 +3V3_SW 19 20
R D A O G M
3742
O O
10K RES
U O
37A8 F742
FH52-18S-0.5SH
M A
4K7
O D
3739
3734
3735
3736
3737
F704
M F O
7705
BAS316
100R F739
R O
2716
2717
6702
3770
3743
3744
RES
RES
RES
RES
RES
M24C64-WDW6
10K
4K7
4K7
4u7
4u7
8
RES
M R
33R
O D
7701
U
7702
O M

BD45292G
G
BC847BW
5
G
RES F705
D
(8K 8)
R F
7 VDD UART_TX_1
O
3745 33R
R U
WC
A O M A
EEPROM I741 1 F725 RES F706
FO D
F745 UART_RX_1
R
SCL 3740 22R 6 1 4 4701 ORESET 3746 33R
G
SCL 0 ER VOUT
M M U M
2
BAS316
ADR 1
37A3
F746
100K
RES
6704
3769
2718
100n
O
SDA
RES
5 3
18K
A
3741 22R
U O R R
SDA 2 +3V3_SW
O M
SUB GND
F O O
4
3
R U G O M
2704
2705
10p
10p
O D R R A F D
4K7
4K7
F UM G O M D O O M R
RES 3783
RES 3784
A F U G
+3V3_SW
O O A
+3V3_SW
F744
R M M R R
VCOM-SCL
D U M
F743
O G O
5 10K
6 10K
7 10K
8 10K
10K
R
VCOM-SDA
DO O
3793
1K0
RES
7300-11
F M R
+3V3_SW
A F O O
+3V3_SW MT5396
U G O
MISC

3794
M D
3 BACKLIGHT-BOOST-A
R A
+3V3STBY
F
AM22 AN12 SCL RES
R
4
3
2
1
M R
4K7
FOR DEBUGGING ORESET OSCL0 RES 1K0
4K7
3791
3775 4K7 I732 D27 AP12 1 7704
M
SDA
3772-4
3772-3
3772-2
3772-1
G O O M
ONLY FSRC_WR OSDA0
3773
3771
2719
G9 AN15 BC847BW
O
1K0
1u0
U G
MEMTN OSCL1 10K
A
G10 AP15 2
D U
RES MEMTP OSDA1
F O
3747
3748
A
V35 DEMOD_SCL
R
1702
4K7
4K7
OSCL2
O R
AP14 V34 DEMOD_SDA
M R
1 JTCK
3788
3787
JTCK OSDA2
D
AR14
O M M
2 JTDO

1701 JTDO 3792
G
UART_TX F711 2 F726 AN14 AR12 F734
O
3749 33R 3 JTRST JTRST BOOST_CONTROL 3785 1R0
JTRST OPWM0
F DO U
3 F727 AM14 AT12 F735
R
4 JTDI JTDI BACKLIGHT_CONTROL 3786 1R0 1R0
O M
JTDI OPWM1
A F O
UART_RX 3750 33R F712 1 5 F728 JTMS JTMS AR15 AU12
O
JTMS OPWM2
R
F729
G
6 JTCK
U
MSJ-035-69A-B-RF-PBT-BRF
M D
7 F730 UART_RX 3778 100R AP18 AU21 RC

BZX384-C6V8
BZX384-C6V8
3774 U0RX OIRI
A O
JTDO
R
8 F731 UART_TX 3779 100R AR18
M R
U0TX
6700
6701
1710
1711
R
9 UART_RX_1 3796 100R RES AU16 AT34
F O O M
33R U1RX XTALI
G M
UART_TX_1 3797 100R RES AT16 AU34
O
10
U
U1TX XTALO
27p
AN30
G
11
D U
LOUTP
A F
RES
RES
3789
3790
13 F732 AP31
R
12
LOUTN
820K
R
1703
3225
O R
2720
M
2
3780
3781
3782
1
O
W37
M
BM11B-SRSS-TBT
O
10K
10K
10K
PCIE11_REFCKP
G M
27M
W36
D O
NC
PCIE11_REFCKN
F U
W35
DO O
+3V3_SW PCIE11_TXP
A F
4K7
4K7
PWM DIMMING
27p
W34
3
4
3795
PCIE11_TXN
M R R O O
Y35

PCIE11_RXP
M
Y34
D
PCIE11_RXN
2721
3754
U O
680R
3752
R
7703
M A F O O R
1R0
R
BC847BW
G M
RES
U G
I744 3755
M D
2706
R A F O R U A
2u2 4K7
M O O M R
BAS316
O G M
3753
RES 6703
1K0
RES
F D U O
DO
3751
A
PWM-DIMMING
O R R F O O
100R
M G O M D
1 2012-01-20
U
M R A F O R
3139 123 6539
R M
Flash, Control & EJTAG
R U A G O M D O U G
F O O M R R A
19300_007_120402.eps
O M D U O M
120402
F R R G F
DO O M G O A DO O
2012-Apr-20 back to
U M
div. table
R U
O
PWB Layouts
G
L12M1.1L
A
LA 10. EN
O
64
O M M R
MA F M R D A O
10-2-7 B04D, LVDS Display
A G B04D O LVDS Display
O M M R U O G B04D
G R D A F M M
DO A O F O
U M O
M
G R R U O
D O RESERVED
M R O O M R
(FOR VCOM ALIGNMENT)
A
LVDS#2
R D F G
+3V3_SW
O G
VCOM-SDA
O O M R
1G50
U A
VCOM-SCL
D A F M
50 51
U O G R M
48 49
M R O O
46 47
M A
100p
100p
R D
FD27 44 45
O O
RES 4D23
RES 4D24
O G
2D20 2D21 3D23
*
U F
42 43 RES
O O M R
41 Non TM100 Panel No No No

2D13
A M D
2D18
2D19
R D
3D_2D_SELECT TM100 Panel Yes Yes Yes
F
40

4D30
U O G O R
RES 39
M
100n RES
R M
38 7D04
M R D A G
PCA9540B 3
37
U O G U
VDD SC0 5
M R
36
O O A
35
R D A M R
SC1 8
F
34
M
7300-10
U O O
33
M
MT5396
FO R D AG
VGA_SCL 1 SCL SD0 4
M
PX1A- FD01 32
LVDS_EPI I2 C
R F
RES
O
31 INP
FD02
PX1A+
* 3D23
O
-BUS
U O G
VGA_SDA 2 SDA FIL SD1 7
PX4A+ AG3 AT2 PX2A+ FD03 30 CTRL
O O D
BE0P AE0P
M
29
A M
AG4 AU2
PX4A- FD04 68R
TO DISPLAY
D
PX2A- PX1B-
R
BE0N AE0N
F
VSS

PX4B+ AG1 AT1 PX2B+ PX1B+ FD05 28
2D20
2D21
BE1P AE1P
U O
100p
100p
RES
RES
6
M O M
AG2 AU1 FD06 27 LVDS#1
FO
PX4B- PX2B-
R
BE1N AE1N
M
PX4C+ AF3 AR1 PX2C+ PX1C- 26
R U G
BE2P AE2P
AF4 AR2 25
* * 1G51
O MD
PX4C- PX2C- PX1C+ FD07
U O G
BE2N AE2N
A
AE1 AN1 24
O R
PX4D+ PX2D+ FD08 FD62
R
BE3P AE3P 60 61
A
AE2 AN2 23
D
PX4D- PX2D- PX1CLK-
R F
BE3N AE3N 58 59
G M
AD1 AM3 22
O
PX4E+ PX2E+ PX1CLK+ FD09
BE4P AE4P PWM-DIMMING 56 57
M
21
O O
PX4E- AD2 AM4 PX2E- FD10
R U A F
BE4N AE4N 2D17 10n 54 55
M
PX4CLK+ 3D11 0R AE3 AP1 3D15 0R PX2CLK+ PX1D- FD11 20
F O O
BECKP AECKP 52 53

3D12 0R AE4 AP2 3D16 0R PX1D+ FD12 19
R
PX4CLK- PX2CLK-
U O G M
BECKN AECKN 4D25 F738 51

18
R O D
50
A
17 FD64
D FO
AL3 AT6
R
PX3A+ BO0P AO0P PX1A+ PX1E-
R
16 FD65 49
O O
PX3A- AL4 AU6 PX1A- PX1E+ FD14
BO0N AO0N 48
O M M
15
O
PX3B+ AL1 AP6 PX1B+ FD15
R G
BO1P AO1P 47
M D
PX3B- AL2 AR6 PX1B- FD16 14 RES 3D21 RES 3D19
F U
BO1N AO1N 13 46
A
AK3 AP5
G O
PX3C+ PX1C+ PX2A- FD17
O R
+3V3_SW +3V3_SW
U
BO2P AO2P 45
12
R
PX3C- AK4 AR5 PX1C- PX2A+ FD18 4K7 4K7
R M
BO2N AO2N 44
A
FD66
D
11
R M
AJ1 AP4
G
PX3D+ PX1D+ FD19 RES 3D22 RES 3D20 4K7
BO3P AO3P 43
O
10
G U
PX3D- AJ2 AR4 PX1D- PX2B-
M R
BO3N AO3N 42
A
OPC_ENABLE
O O
PX3E+ AH3 AP3 PX1E+ PX2B+ FD20 9 4K7
M F O
BO4P AO4P 41
A R
AH4 AR3 8 3D_2D_SELECT
O
PX3E- PX1E- FD21
F
BO4N AO4N
M
7 PX3A- FD36 40
3D13 0R AJ3 AT4 3D17 0R
O D
PX3CLK+ PX1CLK+ PX2C-
U O
BOCKP AOCKP
M
FD37 39

0R 0R 6 PX3A+
G
3D14 AJ4 AU4 3D18 FD22
R
PX3CLK- BOCKN AOCKN PX1CLK- PX2C+ 38
FD38
D A
5 PX3B-
R F
FD23
O R
3D00 FD39 37
O M
4 PX3B+
G
AG7 PX2CLK- FD24
REXT_VPLL FD40 36
O O D
PX2CLK+ FD25 3 PX3C-
M G
24K
A M U
2 PX3C+ FD41 35
F
34
A
1
U O R
PX2D-
M O M R
PX3CLK- FD42 33
R
PX2D+ 32
FD43
M
PX3CLK+
R U G O
20519-041E
31
DO G O MD
PX2E-
A F
30
O R
FD44
R
PX2E+ PX3D-
A O
PX3D+ FD45 29
F G M O
28
O
PX3E- FD46
M D
PX3E+ FD47 27
M R U A F
RES 4D26 26
O O
RES
M
FD13 25
G O OR
2D14 10n
DO M D R
PX4A- FD48 24
A U
23
G
PX4A+ FD49
O O R
PX4B- FD50 22
M F M R A
FD51 21
R
PX4B+
M D G
FD52 20
O
PX4C-
U A M
19
G
FD53
O R
PX4C+
U F
18
D A O M R M
17
R G O
FD54
O
PX4CLK-
U O
PX4CLK+ FD55 16
O M A D
15
M R F O
14
O
FD56
R
PX4D-
M R
13
O
FD57
U D
PX4D+
G O M
PX4E- FD58 12
R D F G
11
O
FD59
U
PX4E+
A O M R A
RES 4D27 10
FO D
+12VS
R
RES 4D28 9
M M U G M
8
A O
7
U O O M R R
6
R G O M F O O
5
U
+VDISP F829 RES 4D29
D D
4
O R A F
4D04
4D05
4D06
R
3
O R
2
F UM G O M D O M
1
100u 16V
2D15
A F
100n
2D16
O O U A
20519-051E
R M D M R R
8 5D00
O U G M
3 7
O
33R
DO O R
2 6 5D01
F M R A F
+VDISP
O O
1 5 33R
G
5D02
U A O M D
3D10
R
RES
33R
1K0
M R F R
7D00
G M O O M
SI4835DDY-GE3
O
3D01
4
U A D U G
(TOP side)
F O
SML-310
R A
47K
M O R R
6D00
O D M M
6D01

RES
F G O
BZX384-C6V8
DO O M R U A F O O
2D11
R
3D02 ID02
U G M D
ID03 FOR DEVELOPMENT USE
A O
47R 1u0
R R
3D03
M
47K
U G O M F O O M R
+3V3STBY
R A F O D R R U A G
O M O M
3D07
G M
15K
D O
ID05
3D06
F U
7D02 6
DO O A F
BC857BW ID07
10K
M R R O O
7D03-1 2 3
M
3D05 BC847BS(COL)
D
ID17 3D09
G O
FD61
R U
1 7D03-2 5 LCD_PWR_ON
10K
M A R
BC847BS(COL)
R F O O
1K0
G M
2D12
3D08
220n
4
1K0
F O M D O O U M G O R M
1 2012-01-20
U
M R A F O R
3139 123 6539
R M
LVDS Display
R U A G O M D O U G
F O O M R R A
19300_008_120402.eps
O M D U O M
120402
F R R G F
DO O M G O A DO O
2012-Apr-20 back to
U M
div. table
R U
O
PWB Layouts
G
L12M1.1L
A
LA 10. EN
O
65
O M M R
MA Digital I/OF- HDMI
M R D A O
10-2-8 B05A, Digital I/O - HDMI
A G B05A O O M M R U O G B05A
G R D A F M M
DO A O F O
U M O
M
G R R U O
D O 7300-9
M R O O M R
MT5396
R D A F
HDMI_ETHERNET
O G O O M R G
RX_0_0
U A
AG35
A M
HDMI_0_RX_0
D
HDMI PORT 1 HDMI PORT 2 RX_0_0B
F
AG34

HDMI_0_RX_0B
U O G R
RX_0_1
M
AG37
M O O
OPWR3_5V OPWR0_5V HDMI_0_RX_1
R
RX_0_1B AG36
M D A
HDMI_0_RX_1B
R
RX_0_2 AF35
O O
HDMI_0_RX_2
U O G F
RX_0_2B AF34
O O M
HDMI_0_RX_2B
R
RX_0_C

AH35
M D
47K
47K
47K
47K
R D A
HDMI_0_RX_C
F
RX_0_CB

AH34
HDMI_0_RX_CB
M R U O G O M R
RX_1_0
M
AE37
D A
RES RES
R G
HDMI_1_RX_0
6B35 6B05 RX_1_0B AE36
U
3B31
3B32
3B01
3B02
O G
HDMI_1_RX_0B
U M R
RX_1_1
A
1B01 IP4281CZ10 1B02 IP4281CZ10 AD35
O O
HDMI_1_RX_1
M
RX_3_2 RX_3_1B RX_3_1 RX_0_2 RX_0_1B RX_0_1 RX_1_1B
A R
1 1 2 1 1 2 AD34
R D
HDMI_1_RX_1B
F
RX_1_2
M
2 3 2 3 AC35 AT18 TXVP_0
O
HDMI_1_RX_2 TXVP_0
M U O
3 RX_3_2B 3 RX_0_2B RX_1_2B AC34 AU18 TXVN_0
FO R D AG
HDMI_1_RX_2B TXVN_0
M
4 RX_3_1 8 4 RX_0_1 8 RX_1_C AE35 AT17 RXVP_1
R F O
HDMI_1_RX_C RXVP_1
5 RX_3_2 5 4 RX_3_2B 5 RX_0_2 5 4 RX_0_2B RX_1_CB AE34 AU17 RXVN_1
U O G O
HDMI_1_RX_CB RXVN_1
6 RX_3_1B 6 RX_0_1B AD15
O O D
REXT IB01
A M M
7 RX_3_0 RX_0_0 RX_2_0 AB35
D
7 AM16 PHYLED0
R
6 7 9 10 6 7 9 10
F
HDMI_2_RX_0 PHYLED0

8 RX_3_2 RX_3_1B 8 RX_0_2 RX_0_1B RX_2_0B AB34 AN16 PHYLED1
U O R
HDMI_2_RX_0B PHYLED1
M O M
RX_3_0B RX_0_0B RX_2_1
FO
9 9 AA35
R
HDMI_2_RX_1
M
10 RX_3_C RX_3_2B RX_3_1 10 RX_0_C RX_0_2B RX_0_1 RX_2_1B AA34
R U G
1%
HDMI_2_RX_1B
3B50
O MD
11 11 RX_2_2 AA37
24K
U O
HDMI_2_RX_2
O R A
RX_3_CB RX_0_CB RX_2_2B
R
12 RES 12 RES AA36
HDMI_2_RX_2B
D A
HDMI_CEC_A HDMI_CEC_A RX_2_C
R
13 FB01 6B36 13 6B06 AC37
F
HDMI_2_RX_C
G O M
14 FB02 HDMI_0_ARC 5B01 30R HDMI_ARC IP4281CZ10 14 IP4281CZ10 RX_2_CB AC36
HDMI_2_RX_CB
O O M
15 FB03 HDMI_3_SCL RX_3_CB 1 2 RX_3_C 15 FB11 HDMI_0_SCL RX_0_CB 1 2 RX_0_C
M R U A F
HDMI_3_SDA HDMI_0_SDA RX_3_0
O O
16 FB04 3 16 FB12 3 AK35
F
HDMI_3_RX_0
G R
RX_3_0B
O
17 17 AK34
U M
FB19 FB23 HDMI_3_RX_0B
O D
RX_3_1
R
18 8 18 8 AJ35
A
OPWR3_5V OPWR0_5V HDMI_3_RX_1
R D FO
19 FB05 RX_3_0 5 4 RX_3_0B 19 FB13 RX_0_0 5 4 RX_0_0B RX_3_1B AJ34
R
RES RES HDMI_3_RX_1B
O O
21 20 3B52 4K7 21 20 3B54 4K7 RX_3_2 AJ37
M M
HDMI_3_RX_2
O O
FB24
3B33
3B03
R
23 22 23 22 RX_3_2B AJ36
G
1K0
1K0
M D
6 7 9 10 6 7 9 10 HDMI_3_RX_2B
FB18
RX_3_0 RX_3_CB RX_0_0 RX_0_CB RX_3_C
F U
AJ33

HDMI_3_RX_C
O G O R A
CDS2C05HDMI2 5.6V
CDS2C05HDMI2 5.6V
CDS2C05HDMI2 5.6V
RX_3_CB
CDS2C05HDMI2 5.6V
CDS2C05HDMI2 5.6V
CDS2C05HDMI2 5.6V
47266-9002 RES 4B31 47266-9002 RES 4B01 AK33
HDMI_3_RX_CB
R M R
RX_3_0B RX_3_C RX_0_0B RX_0_C
G R D A U G O M
3B30 HDMI_3_HPD 3B00 HDMI_0_HPD
O O M R A
+3V3_SW +3V3STBY
F
RES 6B31
RES 6B32
RES 6B33
3B34
100K
RES 6B01
RES 6B02
RES 6B03
3B04
100K
A M R O
1K0 1K0
F M O
7B31 7B01
U O O D
BC847BW
M
BC847BW
R R D A G F
RES
O
3B05
R
RES
1K2
O
7B00
G M
BSH111
A O O M M D U G
2B01 3B09
F
HDMI_ARC ARC
U O R R A
HDMI_CEC
M O M
HDMI_CEC_A 4B00
180R
R
1u0
R U G O M
3B07
100K
3B08
82R
DO A G
D O O
M M R U A F O O M
DO A G
O OR O
M
O D R U G R
U O G O M D M G R
R D A F O O M R U A
HDMI PORT 4 (SIDE)
FO D R
HDMI PORT 3
M
U O M O M R OPWR1_5V
R U A G O M
OPWR2_5V
R D U A G F O M F D O O
47K
47K
47K
O R R O 47K
F UM G O M D O M G R RES RES
A F U
6B15 6B25
O
3B11
3B12
3B21
3B22
O A
1B03 IP4281CZ10 1B04 IP4281CZ10
R M M R R
RX_1_2 RX_1_1B RX_1_1 RX_2_2 RX_2_1B RX_2_1
D
1 1 2 1 1 2
O U M
2 3 2 3
R G O
DO O
3 RX_1_2B 3 RX_2_2B
F M R A F O O
4 RX_1_1 8 4 RX_2_1 8
G
5 RX_1_2 5 4 RX_1_2B 5 RX_2_2 5 4 RX_2_2B
U O M D
RX_1_1B RX_2_1B
A
6 6
R F
RX_1_0 RX_2_0
R
7 7
M R
6 7 9 10 6 7 9 10
M
RX_1_2 RX_1_1B RX_2_2 RX_2_1B
G
8 8
U O O O M G
9 RX_1_0B 9 RX_2_0B
A D U
10 RX_1_C RX_1_2B RX_1_1 10 RX_2_C RX_2_2B RX_2_1
R F O O A
11 11
M R R
RX_1_CB RX_2_CB
D
12 12
O M M
RES RES

13 HDMI_CEC_A 13 HDMI_CEC_A
G
6B16 6B26
F O
DO U
14 IP4281CZ10 14 IP4281CZ10
O M R A F O
15 FB07 HDMI_1_SCL RX_1_CB 1 2 RX_1_C 15 FB15 HDMI_2_SCL RX_2_CB 1 2 RX_2_C
R O
HDMI_1_SDA HDMI_2_SDA
G
16 FB08 3 16 FB16 3
U M D
17 17
O
FB20 FB22
R R A
18 8 18 8
M
OPWR1_5V OPWR2_5V
F R
RX_1_0 RX_1_0B RX_2_0 RX_2_0B
O
19 FB09 5 4 19 FB17 5 4
O M
RES
3B55 RES 4K7
U G O M
21 20 3B53 4K7 21 20
D U G
3B13
3B23
23 22 23 22
1K0
1K0
A F
6 7 9 10 6 7 9 10
R
FB25
FB21
RX_1_0 RX_1_CB RX_2_0 RX_2_CB
O R R A
CDS2C05HDMI2 5.6V
CDS2C05HDMI2 5.6V
CDS2C05HDMI2 5.6V
CDS2C05HDMI2 5.6V
CDS2C05HDMI2 5.6V
CDS2C05HDMI2 5.6V
47266-9002 RES 4B11 105156-1008 RES 4B21
O M O M
RX_1_0B RX_1_C RX_2_0B RX_2_C
F D U G O M
DO O A
3B10 3B20
F
HDMI_1_HPD HDMI_2_HPD
M R R O O
RES 6B11
RES 6B12
RES 6B13
3B14
100K
RES 6B21
RES 6B22
RES 6B23
3B24
100K

1K0 1K0
M D
7B11
G
7B21
R U O
BC847BW BC847BW
F O D U G O M
1 2012-01-20
U
M R A F O R
3139 123 6539
R M
Digital I/O - HDMI
R U A G O M D O U G
F O O M R R A
19300_009_120402.eps
O M D U O M
120402
F R R G F
DO O M G O A DO O
2012-Apr-20 back to
U M
div. table
R U
O
PWB Layouts
G
L12M1.1L
A
LA 10. EN
O
66
O M M R
MA Digital I/OF- USB
M R D A O
10-2-9 B05B, Digital I/O - USB
A G B05B O O M M R U O G B05B
+5V_SW
G R D A F M M
DO M A
R O F O
U M O
M
G R
O R
O M
U O
D R O
R D A F
0R3
G
0R3
O G
RES 3C03
3C01
D A O F O M M R U A
+T
+T
M U O G R M
USB PORT 1 (HDD)
1 3C02-1 8
+5V_USB1
U O O M F
1C01
A M R D
100K
R D F
1 FC33 +5V_USB1
G O
FC50
U O R
2 3C02-2 7
M
2 FC34 USB_DM_P1 USB_OC_P1
M R R D A M G
3 FC35 USB_DP_P1
100K
U O G O O M R U A
4 FC01
A M
3C02-3
R D R
3 6
F
6 5
M U O O M
FO R D AG
100K
M R F O
USB-01-PBT-B-30-CU2-BRF
O
3C02-4
U O G
4 5
R D A O F O M M D R
100K +5V_SW
FO M M R R U O O U M G
R U D O A G 2 (SKYPE) O
F O MD G R O R M A
0R3
3C11
O F O M M
USB PORT
R R U A F O O
U O G M
+T
O D
3C12-1
R
1 8
R D A FO
+5V_USB2
O O R
1C02
100K
O O M M R D M G
1 FC11 +5V_USB2 FC49 3C12-2
F U
FC36 USB_DM_P2 USB_OC_P2 2 7
A
2
U O G O R R
USB_DP_P2
R M
3 FC37
A
100K
R D G M
4 FC42
G M R U O
3 3C12-3 6
O O A
6 5
M A F U M O O R M F D O O
100K
G
R
3C12-4
R D A F O
4 5
A G O O M M D O U M G R 100K +5V_SW
M R F U O O M R R A
G R D U G O M
DO A O OUSBM R R A F O
+T 0R3
F
3C21
M M R U
PORT 3 (SIDE)
A G FO M D O
O O
1 3C22-1 8
DO G O OR M D M R
+5V_USB3
A U
1C03
G
100K
F O O R R
1 FC21
M M A
+5V_USB3 FC48 3C22-2
R G
USB_DM_P3 USB_OC_P3
M D
2 FC38 2 7
U A O M
USB_DP_P3
O G R
FC39
U
3
F
100K
A M R
4 FC43
R D O G M O O
3C22-3
U O
6 5 3 6
O M M R A F O D
100K
R M O R
U O O D M
3C22-4
G
4 5
R D A F O O M R U A G 100K
FO M
U O M O M
D R R U A G O R M RES
F O O
3C05
O
100K
F UM G O M D O M G R
A F
RES
U
+3V3_SW +5V_SW +3V3_WOLAN
O O A
7C01
R M M R R
RT9715GGB
O D R U G O M
FC47
F DO O R
USB_OC_P0
M
3 5
A F O O
FLG VIN +3V3STBY
G
8
O
RES 3C04-1
RES 3C04-2
RES 3C04-3
RES 3C04-4
R U A M D
+T 0R3
+T 0R3
0R
F
0R
0R
0R
3C06
3C31
RES
R
RES
FC45 FC46
M R
1 4 ENABLE_WOLAN
G M O O M
+3V3_WOLAN VOUT EN
U A O G
1
D U
EN
R F USB PORT 4 (WIFI)

O O R A
USB_PWR_P0
M R
2C02
2C03
RES
RES
GND
D
10u
1u0
O M M
RES 2C01
F G O
DO O M R U A F O
2
100n
U G R M D O
USB_PWR_P0
M R R
RES
A F O O O M R
U G O M
1C31 RES
A F D U G
3 1C32 2
R
1 FC32
O R R A
USB_DM_P0
M
2 FC40
O O M G M
4 1
D O
3 FC41 USB_DP_P0
F U
DO O A F
4 FC44
O O
ACM2012
M R R
5
U G O M D
6
R
FC51
M A F R
WOLAN_IRQ
O O
8 7
U A G O R M
502386-0670
D U M G
F D U O
1 2012-01-20
U
M R A F O R
3139 123 6539
R M
Digital I/O - USB
R U A G O M D O U G
F O O M R R A
19300_010_120402.eps
O M D U O M
120402
F R R G F
DO O M G O A DO O
2012-Apr-20 back to
U M
div. table
R U
O
PWB Layouts
G
L12M1.1L
A
LA 10. EN
O
67
O M M R
MA F- Headphone UM R D A O
10-2-10 B06A, Analog I/O - Headphone
A G B06A O Analog I/O
O M M R U O G B06A
G R D A F M M
DO M A
R O F O
U M O
M +3V3STBY
G R
O R
O M
U O
D R O
O G O O R D M A F G
M M R R D
4
A O O O O
U O G O O M F
7801-2
R D A M R D
5 PUMD12
M M R F U O A G O M R
R D G
HEADPHONE
U
3
U O G O O M R A
F809
A M R
A_PLOP
R D M F U O O M
FO M R D AG
A_STBY
R F O
F810 1401
O
HP_LOUT 2
G
LEFT
U O O O D
3
R D A M M
F811
F
6 RIGHT 1
PESD5V0S1BA
FO M R U O O M R
2801
1801
RES
M
1n0
R U G
MSJ-035-12D-B-AG-PBT-BRF
RES
RESET_AUDIO
6800
2
O MD
7801-1
U O G O R R A
PUMD12
R D A F
1
O O M G O M
F804
F U M O G R R U M A F O O
R R D A O
FO D
HP_ROUT
O O M M R D O O M G R
PESD5V0S1BA
F U O G O R U A
2802
1802
RES
1n0
R A M R
6801
D M
RES
G O O R M R U A G F O
M A F U M O O R M D O O
M R R U O O U M G O R M
DO A G
D O O
M M R U A F O O M
DO A G
O OR O
M
O D R U G R
U O G O M D M G R
R D A F O O M R U A
FO M
U O M O M
D R R U A G
FO R
O
M
O
+3V3_SW
A F U
3805
2812
2803
2805
O O
22K
A
1n0
47p
1u0
O R M D U M G R O R M
F DO O M G R R A F O O
7800 1
3807-1
8
U O
TS489IST
R A M D
8
F
33R
R R

M
VDD
U A G
HPOUT_L
O
F807
F
2808
M D O
3811
O I809
U M G
2 AMPLIFIER 1 I811 2806
2
3807-2
7 HP_LOUT
R O O A
1 1
M D R R
10K 33R
M
I810
O
10u IN- 100u 4V
M
F808 2809 3813

HPOUT_R 6
G O
2 VO
F DO O M R U A F O
A_PLOP 10u 3812 10K I812 2807 3807-3 HP_ROUT
R O
5 7 3 6
U G
SHUTDOWN 2
O M D
I808
A
10K 100u 4V 33R
R
2810
M R
3
F O O M R
BYPASS
U G O M G
1u0

3807-4
A F D U
GND 4 5
R R R A
4
M O
33R
F O D O U M G O M
DO R O
U M G R O R M A F
D O O
3806
2813
3814
2804
22K
22K
1n0
47p
F O D U G O M
1 2012-01-20
U
M R A F O R
3139 123 6539
R M
Analog I/O - Headphone
R U A G O M D O U G
F O O M R R A
19300_011_120402.eps
O M D U O M
120402
F R R G F
DO O M G O A DO O
2012-Apr-20 back to
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R U
O
PWB Layouts
G
L12M1.1L
A
LA 10. EN
O
68
O M M R
MA M
F- Component &UComposite R D A O
10-2-11 B06B, Analog I/O - Component & Composite
A G B06B O Analog I/O
O M M R U O G B06B
G R D A F M M
DO A O O M M R R U O O
YPBPR_DETECT
F D
PESD5V0S1BA
M R U O A G O O M R
6919
1927
RES
M R R D A O O
CVBS_AV4 I947 3967 RES
U O G F O O
PESD5V0S1BA
M
1R0
O
F924
O
I910 3922
R
CVBS_AV3
2979 RES
R D A M D
2980
RES 3968
6916
1924
CVBS SIDE
RES
75R
RES
F 47p
15p
PESD5V0S1BA

1R0
G O
AIN1_L
U O R
75R 1%
M
2924
2925
3921
6913
1914
RES
R
RES
M
47p
15p
M A
CVBS
D
AIN1_R
U O G R M R U A G
CVBS_GND
R D A O O M R
5900 1VA4
F
I902 3925
M
SPR0P 5
M U O O
60R 4
FO
18R
M R D AG
3
PESD5V0S1BA
R F O
2906
3902
1922
56R
10p
U O G O 6902
2
O O D
1

2926
M
I911 I945
A M
F925
D
3958 3923
F921
F
MSJ-035-75C-Y-RF-PBT-BRF
U O R
PESD5V0S1BA
O M
30K 10u 1R0
M
CVI1
FO M R
2927
2928
6914
R G
RES
RES

1n0
4n7
O MD U
1915
U O G O R A
1VA1
R
PESD5V0S1BA
A
F927 1
R D F G M
2907
3903
6903
1923
2
O
56R
10p
M
3
O O M R U A F
5901
F900 4
I903
O O
3904
F
SPB0P F923 5
U O G R M
6

18R
O D
60R
R
7
R D A FO
8
R
2929 F919
O O
I912 3959 I946 3924
9
O O M R M
F903 PR0P 10
PESD5V0S1BA
M D G
30K 10u 1R0
11
F U A
2961
2930
6915
1916
G O
12
RES
O R
RES
1n0
4n7
U R
13
R D A M
Y0P 14
M
F904
R G
15
G U O
I952
M R A
SOY0 16
A O O M R F O
17
O
I904 3905
F
5902

F905 PB0P 18
M
SY0P
PC_AUDIO
U O O D
60R F902 19
M
PESD5V0S1BA

18R F928
R G
CVBS_DETECT
1905
20
R D A F O
2908
3906
6904
PESD5V0S1BA
21
R
56R
10p
G O M
22 5 1A02
O O D
F929 4
6917
1925
RES
F901 23
G
I953 I948 I949
A M M U
3907 3970 2984 3971 F930 3
SY0N 24 AIN2_R
F A
25 26
U O R R
30K 1R0
O M
1R0 10u
PESD5V0S1BA
F931 2
2985
2986
1928
Near To SOC Near To Connector
M
49045-0011 1
RES
RES
G
1n0
1n0
U O
6920
O MD
RES
G
MSJ-035-75C-BL-RF-PBT-BRF
DO
3953 2903 3901
A F
AIN0_L
A O R R O
30K 10u 1R0
F M
PESD5V0S1BA
G O D O
RES 6901
1921
2904
2905
M
RES
RES
1n0
1n0
M R U A F O O M
DO A G
O OR M D R U G R I950 2987 I951
O O
AIN2_L 3972 3973
M F M R A
AIN0_R 3952 2900 3900
R G
30K 1R0
M D
10u
PESD5V0S1BA
U O
30K 10u 1R0
2988
2989
1929
A
PESD5V0S1BA
RES
RES
G
1n0
1n0
U O R F
1920
6921
2901
2902
RES
RES
RES
R
1n0
1n0
A M
6900
O R D M O U A G O M DO O
M R F O
RES
U O G R O M D O M G R
R D A F O O M R U A
FO M
U O M O M
D R R U A G
F O R
O
M
O
R D U G O M
7300-2
A F D
MT5396
O R R
RES
O
SOY0 3936 1R0 2944 1n5
R
3974 AUDIO_DAC_ADC
F UM G M
7300-14
O D O M
MT5396 AN28
G
10K MPXP
A F U
VIDEO_IO
O O A
AOBCK 2 3961-2 10R 7 AR11
M
AOBCK
R M R R
HSYNC AN25 AOLRCK 3 3961-3 10R 6 AP11

HSYNC AOLRCK
D M
VSYNC AM25 AOMCLK 4 3961-4 10R 5 AM12
U
VSYNC AOMCLK
O G O
BP 3950 100R 2958 10n AU24 AR27 AOSDATA0 1 3961-1 10R 8 AN9
R
BP SOY0 AOSDATA0
DO O
SOG 3937 1R0 2945 1n5 AT24 AP25 AN10
F R
2962
M
SOG SOY1 AOSDATA1
A F O O
GP 3938 100R 2946 10n AR24 AR29 CVBS_GND_1 CVBS_GND AN11
G
GP SY0 AOSDATA2
RP 3939 100R 2947 10n AR25 AP28 AM11
U O
RP SC0 1u0 AOSDATA3
M D
GN 3940 100R 2948 10n AP24 AP30 AM10
R A
COM CVBS_COM AOSDATA4
F
SPB0P 3941 100R 2949 10n AT28 AN29 2957 47n 3949 100R CVBS_AV3 SPDIF_OUT AR16 AN34
M R R
PB0P CVBS0P ASPDIF0 AL0_ADAC
AR26 AR31 2981 47n 3969 100R CVBS_AV4 ARC Y32 AM34
G M O O M
PB1P CVBS1P ASPDIF1 AL1_ADAC
AR28 AR30 RES RES Y33 AM33
U O G
PR0P CVBS2P ALIN AL2_ADAC 3965
SPR0P 3951 100R 2951 10n AP26 AT30 AM35
A
HPOUT_L
D U
PR1P CVBS3P AL3_ADAC
F O
AP27 AU30 AU35 AN35
A
AIN0_L
R
Y0P VDACX_OUT AIN0_L_AADC AR0_ADAC 20K
O R
AU26 AP29 AIN0_R AU37 AM32
M R
Y1P VDACY_OUT AIN0_R_AADC AR1_ADAC
D
SY0P 3944 100R 2954 10n AU28 AIN1_L AT37 AM37
O M M
COM0 AIN1_L_AADC AR2_ADAC 3966
G
AT26 AIN1_R AT35 AM36 HPOUT_R
O
COM1 AIN1_R_AADC AR3_ADAC
F DO
3960
RES
U
AIN2_L AP34
75R
R
AIN2_L_AADC 20K
O M A F O
SY0N 3946 100R 2955 10n AIN2_R AU36
AIN2_R_AADC
R O
AR37
U G
AIN3_L_AADC
M D
DEB AT36

AIN3_R_AADC
A O
AP32
R R
AIN4_L_AADC
M
AR33
F R
AIN4_R_AADC
O O M
AP37
U G O M
AIN5_L_AADC
AR36
D U G
AIN5_R_AADC
A F
AP36
R
AIN6_L_AADC
A
AR35
R R
AIN6_R_AADC
O
AJ27
O M O M
VMID_AADC
D G O M
100p
100p
100p
100p
100p
100p
F
10n
1u0
DO O M R R U A F O O
RES 2963
RES 2964
RES 2965
RES 2966
2977
2978
RES 2982
RES 2983
R U G O M D
U M G O R M A F D O O M G R RES
F O D U G O M
1 2012-01-20

M R U A F O R
Analog I/O - Component & 3139 123 6539
U G O R M D O U M G
Composite
R A F O O M R R A
19300_012_120402.eps
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F R R G F
DO O M G O A DO O
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O
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G
L12M1.1L
A
LA 10. EN
O
69
O M M R
MA F- VGA M R D A O
10-2-12 B06C, Analog I/O - VGA
A G B06C O Analog I/O
O M M R U O G B06C
G R D A F M M
DO A O F O M M R R U O O
IA01
G D
5A00
M U O O O M R
RP FA01
O G R R D A F G
60R
O O M R U
PESD5V0S1BA
O O
RES
2A07
3A16
6A00
1A00
R
75R
10p
U M O G O O R D M A F O O
R D A F U M O R
G O D R
M M R R D A UM G
R U D O A G O F O
IA02
M M R R A
5A01
M
FA02
U O
GP
FO M M R D AG O
PESD5V0S1BA
R F O
60R
U O G O
SOG
O O M D
2A08
3A15
6A01
1A08
A M
0001
RES
D
75R
R
10p
M F U O O M R
FO M R R G
IA09
U
3A10
U O G O MD
GN
R D A O F G R O R M A 1R0
U O G O M D
IA03
R
5A02
R D A FO
BP
O O M O O M R
PESD5V0S1BA
M R D G
+5V_SW 60R
F U O G O R U A
2A09
3A14
6A02
1A20
0001
RES
75R
R
10p
G R R D A U M G O M
O O M R A F
BAS316
A M R O O
6A07
M R F U O G O M D
R D A F O R
1A01
G O O D O M G
1

6A06
A M M U
FA08 5A06 3A19
F
2
A
IA07
U O R
+5V_DC
M O M R
VGA_DETECT
R
3 FA03 3
PESD5V0S1BA
120R
R G M
60R
U O
BAS316
O MD
4
DO G
IA08 6A08
A F
3A22
O R R
2A14
2A15
6A05
1
RES
O
2u2
1n0
7A01 5
A F G M
BC847BW
O O
6
D
10K
M
BAS316
R U A F
2
M
7
O O
3A23
DO G O OR M R
8
A M D U
FA04 9
G
10K
F O O R R
10
M
IA04
M A
3A24 5A04
M R D G
HSYNC H_SYNC 11
U O G R U A O M
12
PESD5V0S1BA
FA13
F
100R
R
30R
A O M
FA05
R D M
13
U G O O O
2A12
RES 3A17
6A03
1A03
RES

FA06
2K2
14
5p6
O M M R A F O D
FA14 15
U O R M D O R
17
O M
16
R D A G F O O M R U A G
FA07
FO M
U O M O M
D R
IA05
R U A G
F O R
O
M
3A25
O
5A05 MDS-15P-V-11-B-8.2-U4-ZN-PBT-BRF
R M
Y_SYNC
U G O
VSYNC
O D R
+5V_DC
R
+5V_DC
A F O D
100R
R 30R
PESD5V0S1BA
F UM G O M D O M G
2A13
RES 3A18
6A04
1A07
RES
2K2
5p6
O D U G O M
3A20
3A21
R
10K
10K
F DO R O
U M
A G F O R MA F D O O 3A26
M R R
VGA_SDA
U A G O M D O O U M G
100R
CDS2C05HDMI2
R M F O O R R A
2A16
100p
RES
O D M M
6A09
1A09
G
RES
F O
DO R O U M
A G R
O R U
M A F D O O
R A F D U G
3A27
R A
VGA_SCL
F O M D O O M G O R M
100R

CDS2C05HDMI2
DO O R R U A F O O
2A17
100p
RES
M M
6A10
1A10
G D
RES
M G R R U A F O O O M R
F O M D O O U M G O R M
1 2012-01-20
U
M R A F O R
3139 123 6539
R M
Analog I/O - VGA
R U A G O M D O U G
F O O M R R A
19300_013_120402.eps
O M D U O M
120402
F R R G F
DO O M G O A DO O
2012-Apr-20 back to
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O
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G
L12M1.1L
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LA 10. EN
O
70
O M M R
MA Ethernet F
M R D A O
10-2-13 B07, Ethernet
A G B07 O O M M R U O G B07
G R D A F M M
DO M A
R O F O
U M O
M
G R
O R
O M
U O
D R O
O G O O R D M A F G
M M R R D A O O O O
U O G O O M R F
RES
R D A F M D
5F05 FF12
U O G O R
+3V3_SW
M
+3V3AN
M R R D A M G
30R
U O G 2F07
O O M R U A
2F08
2F09
100n
100n
RES
RES
RES
10u
FO U M O A G R
O O R
M
D AG
M
F DO O
R D M F U O O M R
FO U M O A G R
O R
O MD R R U A G
R D F G M
+3V3AN
O O M M R U A F O O O
GND_LAN
R F U O A G O R M D
D FO
2F24
2F25
R
RES
RES
5p6
5p6
O O M R O O M G R ETHERNET CONNECTOR
1 3F01-1 8
5
M D U
3F01-2
3F01-3
3F01-4
F
RES
RES
RES
G O A RES
51R
51R
51R
51R
R R U D O A M G R R M
O
2
4
G U
16 5F06-1
M R
TD+ 1 TX+
A
1F01
A O O M R F O
RD+ RX+ FF10 1
F M O
TCT 15 2 TXCT+
U O D
FF06 2
M R G O
RDTC RXCT FF11 3
R D A F O
1F03 14
R
TD- 3 TX- FF07 4
G O M
4 ACM2012 1
O O D
TXVP_0 RD- E2101 RX- 5
A F M M U G
FF08 6
U O R R A
TXVN_0 3 2
M O M
7
R
RD+ 11 5F06-2 6 RX+ 8
R
O MD U G O M
1F04
DO G
TD+ TX+ 9
O R R A F
RXVP_1 4 ACM2012 1 RDTC 10 7 RXCT+
A F M O
TCT TXCT
G
3-338088-3
M O D O
RXVN_1 3 2 RD- 9 8 RX-
R U A F
FF09
M O O
TD- E2101 TX-
DO G O OR M R
75R
75R
75R
75R
M D U
5F01
5F02
5F03
5F04
A
RES
RES
RES
RES
27n
27n
27n
27n
R G
5
8
7
6
M R F O O M G R A
CDA5C16GTH
CDA5C16GTH
CDA5C16GTH
CDA5C16GTH
M D
GND_LAN
U O 6
2F26
2F27
M
RES
RES
5p6
5p6
O G R A
6F03-3
6F03-4
6F03-1
6F03-2
U F
RES
3F05
3F06
RES
RES
RES
16V
16V
16V
16V
R
0R
0R
M
4
1
2
3
D A O M
2F11
2F12
2F13
2F14
R G
RES
RES
RES
O O
RES
15p
15p
15p
15p
U O
3F18-4
3F18-1
3F18-2
3F18-3
M A
3
2
O M O R R M F D O O D R
R U D G F O O U M G
RES 3F11
RES 2F15
RES 3F12
RES 2F16
RES 3F13
RES 2F17
RES 3F14
RES 2F18
R
15p
15p
15p
15p
A
0R
0R
0R
O M
0R
A
GND_LAN IF05
2F19
2F21
2F22
2F23
100n
100n
FO D
10n
10n
M
U O M R R U A G O R M
O M F
2F20
O O
2KV
1n0
F UM G
PHYLED0
O M D O O M G R
A F U
PHYLED1
O O A
GND_LAN
R M D U M R R M
SML-310
SML-310
O G O
6F02
6F01
RES
RES
F DO O R R
2F28
U M G O MA F D O O 1n0 2KV
M G R R M A F O O M R
2F29
U A O D U G
330R
330R
RES
3F07
3F08
RES
R F O A
1n0 2KV
M D O R R
GND_LAN
Reserved
O M G O M
For Debug Only
M R R U A O M D
F D U G O M
DO R O
U M G R O R M A F
D O O
F O D U G O M
1 2012-01-20
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M R A F O R
3139 123 6539
R M
Ethernet
R U A G O M D O U G
F O O M R R A
19300_014_120402.eps
O M D U O M
120402
F R R G F
DO O M G O A DO O
2012-Apr-20 back to
U M
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R U
O
PWB Layouts
G
L12M1.1L
A
LA 10. EN
O
71
O M M R
MA AmbilightF
M R D A O
10-2-14 B08, Ambilight
A G B08 O O M M R U O G B08
G R D A F M M
DO M A
R O F O
U M O
M
G R
O R
O M
U O
D R O
O G O O R D M A F G
M M R R D A O O O O
M M RESERVED
R U O A G O M R
FO U M O A G R
O O R
M
D AG
M
F DO O
R D F
+3V3_AL +3V3_AL
FO M R U O O M R
+3V3_SW
RES 2G7G
2G7F
M
1u0
1u0
U O G O R
O MD R R U A G
R D A F G O M
RES
3G08
O
RES
O
1A05 1A04
10K
M R U A F O O
1 1 FG70
F U O G R M
2 RES 4G08 RES 5G57 30R 2 FG71 4G06
R O D
IG01
A
3 FG78 RES 3G7C 100R 3 FG72 3G7G 100R AMBI_OUT_SPI_SDO
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4 RES 2G7H 10p 4 2G7M 100p
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7 RES 4G10 7 FG75 3G70 100R AMBI_TEMP
R R D A M G R M
8 8
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9 9
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FH34SRJ-18S-0.5SH(50)
M R U A F O O
GND_AL GND_AL
DO A G O OR M D U M G R
M M R F D O O M G R R A
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A 2G13
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RES
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U A G F O D O O U M G
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DO R O
U M G R O R M A F
D O O
F O D U G O M
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A 1A05 1A04 O F O M M R
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2F22
3F14
F UM G M
2F13 2F14
O D O M
3F06 5F04 F402
2440
2441
2433
2434
A F G
5F03
U
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3F13
O O A
3F18
2F17
M
2F19 3F12
R M R R
2F12
2F16
2F21
D
2F11 3F11
3F05
M
2F20
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U
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O
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M D
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5F05
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2F27
2F26
2F25
2F24
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F202 I406
I405
G
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R
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G
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D
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5201 2219 F724
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2235 2227
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F931 F925
M
F928 I910 F740
F200
F O O M R
2232
U G O M
F741
2924 2231
G
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D U
F742
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F706
A
3921
R F
F739
I947
A
I904
R R
I902
O
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2223
FC50 I952
2224
M
F705
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2229
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2228
I953
G M
F921
D O
FB02 FC33 IA01 IA09
F923 F927 IA02 FA07
F
F901 F902 F905 IA03 IA04

F904
U
FB21 FB09 FB24 FB13
FA04
FA03
FB20
DO O A F
FB18 FB19 FB05
FA01 FA02
FA05
F903
O O
FA08
R R
FB25
M
FA06
U G O M D
FC35 FC34
R
IA07
M A F R
FA14 FA13
R O O
IA08
U A G O M D U M G
F D U O
1 2012-01-20
U
M R A F O R
3139 123 6539
R M
Layout bottom
R U A G O M D O U G
F O O M R R A
19300_017_120403.eps
O M D U O M
120403
F R R G F
DO O M G O A DO O
2012-Apr-20 back to
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div. table
U
Circuit
R 10.3 E 272217190554 - 272217190562
Diagrams and
O
PWB Layouts
G
L12M1.1L
A
LA 10.
O
EN 74
O M M R
G O O R Keyboard ControlDModule M R F U O G
R A M
10-3-1 Keyboard Control Module
G O O R D M R F U O G R
M A E F
Keyboard Control Module
U M O G O O R D A E
G R R D A F M M
DO M A
R O F O
U M O
M
G R
O R
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M
D AG
M
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FO U M O A G R
O R
O MD R R U A G
F U M J1 O +3.3 V
G R M A F O O
R R D A O
FO O O D R
O F O M M R6
R
6.8 k
D U M G
R R U 2 3
D O A G O M G R R M A
M R F 1
U O G O M D
G O O RV D A F
R1 R2
D O5.6 k 18kO 8.2 k M
R3 R5 R4 R
M A
CON3
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U 103O ZD1 O
1.5 k 3.9 k
M R R U A G
R
SS
M
C1
G R D U G O
DO M A
R O F O MRES
U
RES R
G O R M A F
D O O
M A F O O M
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M
O D R U G R
R U D O A G O V
M G R R M A F O O
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SS
R U A F O O O D
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R D A F O O M R U A
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O
M
O
O R D R R U A G V F O M D
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V
D O
V V
O
V V
M G R
A F U
SS SS SS SS SS SS
R M D O O CH+ CH-M SOURCE VOL+ R VOL- RPOWER

M A
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F DO R O
U M
F O D M G O M
DO R O U M
A G R
O R U
M A F DO O
R A F O D R R U A G
F O M D O U M G O M
DO R O
U M G R O R M A F
D O O
F O D U G O M
DO O M R R M A F O O
1.1 2012-02-06
G O D
2722 171 90554, 2722 171 90555,

U
2722 171 90556, 2722 171 90557,
M R A F O M R
2722 171 90561, 2722 171 90562
R U G O R M D O U G
A A
19300_019_120403.eps
O F O O M R R
120403
F M D R R U G F O M
DO O M G O A DO O
2012-Apr-20 back to
U M
div. table
R U
O
PWB Layouts
G
L12M1.1L
A
LA 10. EN
O
75
O M M R
MA F M R D A O
10-3-2 Keyboard Control Module layout
A G O O M M R U O G
G R D A F M M
DO M A
R O F O
U M O
M
G R
O R
O M
U O
D R O
O G O O R D M A F G
M M R R D A O O O O
U O G F
Keyboard control module layout top
R D A O F O M M R D
M M R R U D O A G O M G R
R U D O A G O F O M M R R U A
M U O O M
FO U M O A G R
O O R
M
D AG
M
F DO O
R D M F U O O M R
FO U M O A G R
O R
O MD R R U A G
R R D A O
FO O O D R
O F O M M R D U M G
M R F U O G O M D
M A F M
U O M O M R R U A G
R R U G O M
DO A G
D O O
M M R U A F O O M
DO A G O OR
Keyboard control module layout bottom
O
M
O D R U G R
U O G O M D M G R
R D A F O O M R U A
FO M
U O M O M
D R R U A G
F O R
O
M
O
O D R U G O M
F DO R O
U M
F O D M G O M
DO R O U M
A G R
O R U
M A F D O O
R A F O D R R U A G
F O M D O U M G O M
DO R O
U M G R O R M A F
D O O
F O D U G O M
1.1 2012-02-06
U
2722 171 90554, 2722 171 90555,
M R A F O R
2722 171 90556, 2722 171 90557,
R M
layout
U O
2722 171 90561, 2722 171 90562
R A G O M D U A G
F O O M R R
19300_020_120403.eps
O M D U O M
120403
F R R G F
DO O M G O A DO O
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U M
div. table
R 10.4 J 272217190629 Sensor boardR U
O
Layouts
G
L12M1.1L
A
LA 10.
O
EN 76
O M M R
G O O D M R F U O G
R A M
10-4-1 IR/LED/analogue light sensor
G O O R D M R F U O G R
M A J Sensor Board
F U M O G O O R D A J
G R R D A F M M
DO A O F O M M R R U O O
+3.3V +3.3V
M R U O G O O M D R
O G R D R13 RESA F G
D A J1 O F O M 10kM 10k RES R U A
R14
M M R
CONNECTOR
R U D O G
A SDA-SRF O FO R J2
M
R U D O A G O O M M R D O O
F
R9 RES 1 VSS
U 10RO G O +3.3VR
SDA Keyboard-IRQ-SRF
M M23 SCL VSSR

1
VSS
R D A U
3M
2
G
R U D O 4 A G O O M
R10
MSCL-SRF
R A
FO M F U C4 ORES GR O M
TYCO 2.0- 3pin
M R
10R
R D F O
+5V
U 6 O G +3.3V A O
IR-IRQ-RF4CE
O C50O D
5
R 7D A M 10pF M
C5
M F RES U O M R
FO R O
10pF
M
Keyboard-IRQ-SRF
U 9 LED2
VSS
O G O
100pF
O R D RES
R U
RJ12 option A G
R D A
8 VSS
F M G O M
RES VSS VSS
O F O M
3D-LED
M R VSS
R U A F O VSSO
U O G M
10
R O D Keyboard-IRQ-SRF
LIGHT SENSOR
R D A FO R
11 1
O O M M R D O O M
2
G
F U
FH52-11S-0.5SH
R R U 2.2uF/16V DO100pF 2.2uF/16V

C1 C10 C2
A G O M G R R
3
M
SCL-SRF
A VSS
+3.3V
G U O
4
A O F O M VSS RES VSS M

R R M A F 5
O O
U O D
VSS SDA-SRF
M R R IR D A U1 G F O O O
6
8M
RESETn
R+5V
G
7
A O F O M M D U G
M R R U O 3 OUT O
R1 10R
U M G R O RFH52-08S-0.5SH MA
DO G O+3.3V M D
IR-IRQ-RF4CE
A O R R A F O
1
M M R F U
2
A G F O M D O
O O
VDD
DO A G O ZD2 O R 100R C3 M4 GND

R2
D U M +3.3V GR
M M R
ESD
F5.6VRES 10uF/6.3V D O 1 GND O M G R R A
U O G RES
M VSS G R R U A F O M
D A O
2
O R M U A F O M D O 47R/100R O
R4
U M O R O R M
TSOP75236
D O O RED LEDM R
FO M
U O +5V O M M
D R R U A G
F O R
O
M
O
R U G O M
+5V
D D
D1 D1*
O R R A F
95-21
F UM G O LIGHT SENSOR M D O O M G R RES

A F O O U A
8
O R M G1 TEMT6200FX01
D U M G R O R M
5 R
DO O
U2A
F
3
U1 M R22
G 7O
R M A F D O Q2ORES
R A
1
U2B
U M G
2
O R M F R26
O
LIGHT SENSOR
O M G R BC847
A
470R
R M F O
6
O
100R
D R 2 U
R A
C
D
R3
FO M MC14
LED2 2
G
LM358
O U O Q1
B B
D R19 R O M R LM358
A F O O
4
R
10k
R20 U C12 R2315k AR24 G D5.6V 102
E
M R O
ZD1
M ZD3
R R5
R25F O O M RES
BC857
R U 47k G
A F
VSS
O M D
3.3V
U
RES
G
3
R A
22k 18k
O R
R21
O M O M
0.1u
F O O D U A G FO M
R C13 0.1u OR VSS M O O
100k 100k 10k RES
D R U M VSS VSS VSS G

VSS
D
M A F R
VSS VSS
U A G O R
C110.1u
M D O O M G
R M F O O M R R U A
F O D U G O M
DO O M R R M A F O O
1 2011-12-27
G O D
Sensor Board
U
2722 171 90629
U M G R R M A F D O O M R
R A F O O O M R U A G 19300_023_120404.eps
O R
120404
F M D R R U G F O M
DO O M G O A DO O
2012-Apr-20 back to
U M
div. table
R U
O
Layouts
G
L12M1.1L
A
LA 10. EN
O
77
O M M R
MA F M R D A O
10-4-2 IR/LED/analogue light sensor board layout
A G O O M M R U O G
G R D A F M M
DO M A O
Rboard layout top F O
U M O
M
G R
O R
O M
U O
D R O
O G O O R D M A F G
R U A
Sensor
D M A F U M O G O O R M
U M O G R R D A F O O
R D A O F O M M R D
M MU2 R R U D O C4 AG O M G R
R U D O A G O ZD1 C50 F O M M R R U A
C10
M U O O M ZD3
R5
R3
FO
ZD2
U M O G R R1 R DR9
A G J1 F O Q2 OQ1
R D R22 C13M A O F O J12
M M
R13 D R
F O M R
C3 R2
R U O O U M
C14
G
U R21C12DR25 O R26 AG1 G O M D R10 GR V1.0 OR
C11 R14
A
C2
C1
R O F M
O F O R20 R23 M R24 R19O M R U1 R U J2 C5MAGWA7.820.742-1 F R4 O D1 O
R U A G O D
O O R
M
D M R FO D O O M G R
G O O R D M R U A G O M
DO A G Sensor
O
board control module
F O MD
layout bottom
G R O R M A F
D O O
M M R U A F O O M
DO A G
O OR O
M
O D R U G R
U O G O M D M G R
R D A F O O M R U A
FO M
U O M O M
D R R U AG
F O R
O
M
O
O D R U G O M
F DO R O
U M
F O D M G O M
DO R O U M
A G R
O R U
M A F D O O
R A F O D R R U A G
F O M D O U M G O M
DO R O
U M G R O R M A F
D O O
F O D U G O M
1 2011-12-27
U
Sensor Board
M R A F O R
2722 171 90629
R M
layout
R U A G O M D O U G
F O O M R R A
19300_025_120404.eps
O M D U O M
120404
F R R G F
DO O M G O A DO O
2012-Apr-20 back to
U M
div. table
R 11. Styling Sheets R U O
Styling Sheets
A G
L12M1.1L LA 11.
O
EN 78
O M M R
G O O D M R F U O G
G R R D A F U M O R
A 11.1
O
5000 series 32"
F O M M R R D A G
M R R U D O A G O FO M M
5000G
DO M A styling 32"
R O F O
U M O
M
G R
O R
O M
U O
D R O
O G O O R D M A F G
M M R R D A O O O O
M M R U O A G O M R
FO U M O A G R
O O R
M
D AG
M
F D O O
R D M F U O O M R
FO U M O A G R
O R
O MD R R U A G
R R D A O
FO O O D R
O F O M M R D U M G
M R F U O G O M D
A M M U G
1150 5214
M R F U O O M R R A
G R
O MD U G O M
DO M A
R O F U G R O R M A F
D O O
M A F O O M
DO A G
O OR O
M 5215
O
0040
D R U G R
0012
U O G O M D M
0032
G R
R D A F O O M R U A
FO U OM M O M
D R R U A G
F O R
O
M
O
R M A F O O 1004 M R R U A
O D R U G O M
F DO O
U M G O R A F O O
5215
M R R A F M D R
F G O
DO R O U M
A G R
O R U
M A F D O O
M R F O O M R
Pos No. Description Remarks
R U A G F O M D
1114
U
0004
G
Front cabinet
O R R A
0012 Back cover
F O M D O U M G O
0032
M
IR cover
DO O A F
0040 Mains inlet bracket
M R R O O
1122
M
0260 Stand assembly
R U G O D
1004 Display panel
M G R A F O O M R
1005 Board PSU
U A O M D U G
1085 Remote control Not displayed
R M F O R R A
1114 Keyboard assembly
F O D O U M G O
1122
M
IR assembly
DO R A F 0260 O
1150 Board SSB
O M G
0004
O R M
5214
D
Loudspeaker
O
U
5215 Loudspeaker tweeter
U G
FOR ELECTRICAL PARTS/ASSEMBLIES SEE WIRING DIAGRAM CHAPTER 9
O R A F O O O M R R A
19300_026_120405.eps
F M D U G O M
120405
DO R R A F
O M G O DO O
2012-Apr-20 back to
U M
div. table
R U O
Styling Sheets
A G
L12M1.1L LA 11. EN
O
79
O M M R
MA F M R D A O
11.2 5000/6000 series 42"/47"
A G O O M M R U O G
F R D
5000/6000 42/47"
M R R U D O A G O O M M A
G F
DO M A
R O F O
U M O
M
G R
O R
O M
U O
D R O
O G O O R D M A F G
M M R R D A O O O O
M M R U O A G O M R
FO U M O A G R
O O R
M
D AG
M
F D O O
R D M F U O O M R
FO U M O A G R
O R
O MD R R U A G
M A F
5215
R F U O G O R M D O O
R D A FO
0032
O O M M R D O O M G R
R F U 1150 DO A G O M R R U A
G O O R M R U A G F O M
M A F U M O O R M D O O
DO A G
D O O
M M R U A F O O M
DO G O OR M R
1005
A O O D R U G
M M R F D U M G
5214
O R M A
0012
U O G O M D M 5215 R
R D A F O O M R U A G
F O M M D R U AG O R M
U
R D O O U M G O R M F O O
O
F UM R R A F O D R
A G F O M D O U M G
R M D O O M R R M A
O R U G O
F DO O M G R A F O O
0260
M R R U A FO M D R
F G O
DO R O U M
A G R
O R U
M A F D O O
M R
G M F O O M R
1114
U O
0004 Front cabinet
R A F O D R R U
0012
A G
Back cover
O M O M
0032 IR cover
D G O M
1122
F U
0040 Mains inlet bracket
DO O M R R A F O O
0260 Stand assembly
R U G O M
1004
D
Display panel
M R A F 1004 O O R
1005 Board PSU
U G M D M G
1085 Remote control Not displayed
R M A F O O O M R R U
1114
A
Keyboard assembly
O G M
1122 IR assembly
F D U O
DO A
1150 Board SSB
F
0004
O R R O O
5214 Loudspeaker
M U M G O M 5215
D
Loudspeaker tweeter
U G R R M A F D O O M R
G
19300_028_120405.eps
O M D U O M
120405
F R R G F
DO O M G O A DO O
2012-Apr-20 back to
U M
div. table
R U O
Styling Sheets
A G
L12M1.1L LA 11. EN
O
80
O M M R
MA F M R D A O
11.3 7000 series 42"
A G O O M M R U O G
F R D
7000 Series 42"
G F
DO M A
R O F O
U M O
M
G R
O O MR U O
D R O
O G O O R D M A F G
M M R R D A O0031 O O O
M M R U O A G O M R
FO
1163
U M O G R
O O R D AG F D O O
R D M A F U OM M O M R
FO U M O A G R
O R
O MD R R U A G
R R D A O
FO O O D R
O F O M M R D U M G
R 0085
R U D O A G O M G R R M A
A G O O M M R 1150 RU A F O O O
M R F U O G O M D
R 0008
R U G O M
DO A G
O F O MD G R O R M A 0035
F0032
D O 1163 O
M M R R U A F O O M
D O A G O O M D U G R
M M R F D O O M G R R A
0020
U O G O M R 1005 RU A 5214
F O M
O R D A
M R U A G O M
0040
D O O
U M O O R M F D O O M R
FO U OM M O M
D R R U A G
F O R
O
M
O
A F U
R M D O O 0086
M R R
0007
M A
Top Deco assembly
O R U G O
0008 Left Deco assembly
F DO O M G R A F O O
0009 Right Deco assembly
O
1004
U A M D
0017 Bottom Deco assembly
M G R R M F O O
0020
M R
Rear Cover
U O G
0031 Ambilight Door
R M A F O O D R R U
0032
A
IR Cover
O D M M
0035 Swivel Pom
F G O
DO U
0040 Main inlet bracket
O U M G R R A F
0085
DO O
Left filler assembly
M
1114

0086 Right filler assembly
M G R O R M A F O O O
0253
M R
Wifi Dongle Not displayed
U G
0259 Stand Accessory Not displayed
R A F O D R R U
0260
A
Stand assembly
O M O M
0269 3D Goggle Not displayed
F
1122
D U G O M
DO O
1004 Panel
M R R M A F 1005
O
Board PSU
O
R U G O D
1085 Remote Control Not displayed
M R A F 0009 O O R
U A G O M D 0260
M
1122
U G
IR assembly
R 0017 F R A
1150 SSB panel
O M O O M G R M
1163 Ambilight
F D U O
DO A
5214 Loudspeaker
O M R R F O O
5217 Left Tweeter Loudspeaker Not displayed
M
0017
G O D
0017
U
5218 Right Tweeter Loudspeaker Not displayed
R A FO O O M R U A G
R
19300_044_120417.eps
O M D U O M
120417
F R R G F
DO O M G O A DO O
2012-Apr-20 back to
U M
div. table
R U O
Styling Sheets
A G
L12M1.1L LA 11. EN
O
81
O M M R
MA F M R D A O
11.4 7000 series 47"
A G O O M M R U O G
F R D
7000 Series 47"
G F
DO M A
R O F O
U M O
M
G R
O O MR U O
D R O
O G O O R D M A F G
M
0031
M M R R U D O A G O M G R
R U D O A G O F O M M R0035 R U A
M U O O M
FO U M O G R R D AG F O O
1163
R D A O F O M M D R
FO M M R R U O O U M G
R U D O A G
O F O MD G R O R M A
R U O A G O M D
O O R
M
D M R FO D O O 0020 M G R
R F U O A G O M R R U0032
A
G O O R D M1150 R U A G O M
M R 5217RU O O M G R M
G O MD U O
DO M A
R O F U G R O R 1005 MA F1163
D O O
M A F O O M
DO 0008 MAG O OR O
M
O D R U G R
M R F D U M G O R M A
R U D O A G O M G R R M A 1114
F O O
U O G O M D M G R
R D A F O O M R U A
FO D R
0007
U OM M O M R R U G
A 5214 O M
R D U A G F O M F D O O
O
G

0007 Top Deco assembly
O D R U G O
0008
M
Left Deco assembly
F DO O M R A F O O
0040 0009 Right Deco assembly
R U A G F O M
0017
D
Bottom Deco assembly
M R R
0020 Rear Cover
U G O M O O M G
0031 Ambilight Door
R A F O D U A
0032 IR Cover
O M D O M R R
0035 Swivel Pom
F 5218
G O M
DO U
0040 Main inlet bracket
O U M G R R A F
0085
D O O
Left filler assembly Not displayed
M
1004

0086 Right filler assembly Not displayed
M G R 1122O
R M A F O O O
0253
M R
Wifi Dongle Not displayed
U
0259 Stand accessory Not displayed
R A F O D R U
0260
R A G
Stand assembly
O M O M
0269 3D Goggle Not displayed
F D U G O M
1004 Panel
DO O M R R A F O O
1005 Board PSU
R U G O M
1085
D
Remote Control Not displayed
M R A F O O R
U G M D M G
1122 IR assembly
A O U
0009
R F R A
1150 SSB panel
O M O O M G R M
1163 Ambilight
D U O
0017
F DO A
5214 Loudspeaker
O R R F O O
5217 Left tweeter Loudspeaker
M U M G O M 0260 5218
D
Right tweeter Loudspeaker
U G R R M
0017
A F D O O M R
G
19300_045_120417.eps
O M D U O M
120417
F R R G F
DO O M G O A DO O
2012-Apr-20 back to
U M
div. table

Philips 42PFL7007

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Philips 42PFL7007

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O O R D M A

R R A O R M A 1 - D2+ Data channel j

R U A G F O M 7 - D0+ Data channel j

R R U A F O M D R 9 - D0- Data channel j

R 15 - DDC_SCL DDC clock j

G R R M A Bk - Coaxial 0.4 - 0.6VPP / 75 ohm kq

U M Centre Tap: DC level fixation

O G R D A G algorithm that adapts aspect ratio to

O G R M A means of a predefined TXT page

A GAutomatic Gain Control: algorithm that

G RDigital Multi Standard Decoding

R U O O U M G R O R M A number is written in the NVM.

G R R M A Switch the set to Stand-by.

F U O O M R R A when mains is re-applied, and the error buffer is not cleared.

M R F U A G Optional Power Link/ Mode

R R D A Finding and Repair O O

G O The Blinking LEDM D O M R

DO A G O FO M R R A Texas Instruments Audio Class-D Amplifier

G M R R U A F O M LDM Ambilight series

M R 7.3 RDC-DC converter

A G O M R R M A F M AVDD12_ AVDD33_ AVDD33_ AVDD12_

A O F O M G R O R M A GPIO40 GPIO33 GPIO38 GPIO31 GPIO39 GPIO32 M

RWiring diagram 42" 5000 series RU D O A G O FO M M R

AMBILIGHT MODULE 10 LED

RWiring diagram 47" 5000 series RU D O A G O FO M M R

AMBILIGHT MODULE 12 LED

4 RX_3_1 AJ35 SIDE

102 C201 C202

DRV 7 NXB 1000uF/16V NXB 1000uF/16V

! CY102 68K 68K

OPEN SB560 P=20mm

C121 100F GND1

ZS 22uF/50V Q301 C305

104 +12V TP171

Non TM100 Panel Yes Yes

RES 2464 1u0

100n 2407 3421 100n F406

MT5396 A18 W19

AA24 AJ21 E7 Y15 7500

AVDD12_HDMI_2_RX AVSS12_REC DVSS_9 DVSS_79

AVDD33_PCIE11 AVSS33_USB_P1 DVSS_19 DVSS_89

AE6 R15 N22 AG32 E27

I503 I505 F33 R18 R20

VCC3IO_A_2 DVSS_43 DVSS_113 1K0 TCON4

H29 T8 R23 HDMI_1_HPD AE32 A28

V15 W20 HDMI_3_HPD AJ32

BRBA(1) 3618-3 3 6 22R N8 G2 BRDQ(6) BRBA(0) 3691-2 2 7 22R M2 H8 BRDQ(21)

3677-3 3 6 22R M3 H7 3690-3 3 6 22R N8 G2

L2 M7 K9 T7 3698 22R BRA(14)

3709 100R E29 RES 7

3710 100R AP9 1T71 8

2711 1n0 F716

3774 U0RX OIRI

RX_3_0 RX_3_CB RX_0_0 RX_0_CB RX_3_C

RX_1_0 RX_1_CB RX_2_0 RX_2_CB

47266-9002 RES 4B11 105156-1008 RES 4B21

R F USB PORT 4 (WIFI)

3228 3229 3214

2713 3768 1929

2200 3200 2201

3421 2461 3417 2460

6B36 6B35 6B06 6B05 6B16 6B15

2A13 2A12 2A15

M G1A01 OR 1VA1 MA F 1B01