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A Non-Iterative Optimized Algorithm for Shunt
Active Power Filter under Distorted and
Unbalanced Supply Voltages
Parag Kanjiya, Vinod Khadkikar, Member, IEEE and Hatem H. Zeineldin, Member, IEEE,
AbstractIn this paper, a single-step non-iterative optimized
algorithm for a three-phase four-wire (3P4W) shunt active power
filter (APF) under distorted and unbalanced supply conditions is
proposed. The main objective of the proposed algorithm is to
optimally determine the conductance factors to maximize the
supply side power factor subject to predefined source current
total harmonic distortion (THD) limits and average power
balance constraint. Unlike previous methods, the proposed
algorithm is simple and fast as it does not incorporate complex
iterative optimization techniques (such as, Newton-Raphson and
sequential quadratic programming), hence, making it more
effective under dynamic load conditions. Moreover, separate
limits on odd and even total harmonic distortion have been
considered. A mathematical expression for determining the
optimal conductance factors is derived using the Lagrangian
formulation. The effectiveness of the proposed single-step non-
iterative optimized algorithm is evaluated through comparison
with an iterative optimization based control algorithm (OCA)
and then validated using a real-time hardware in the loop (HIL)
experimental system. The real-time experimental results
demonstrate that the proposed method is capable of providing
load compensation under steady state and dynamic load
conditions and thus making it more effective for practical
applications.
Index Terms Active power filter (APF), harmonic
compensation, unity power factor, power quality, optimized
control.
I. INTRODUCTION
T he increasing demand of the power electronics based non-
linear loads has raised several power quality problems.
The uneven distribution of dynamically changing single phase
loads give rise to the additional problem of excessive neutral
current and current unbalance [1]. The combined effects of the
above in todays power distribution system results in increased
Manuscript received May 31, 2012; revised August 2, 2012 and October
19, 2012; accepted November 29, 2012. Copyright (c) 2009 IEEE. Personal
use of this material is permitted. However, permission to use this material for
any other purposes must be obtained from the IEEE by sending a request to
pubs-permission@ieee.org.
P. Kanjiya, V. Khadkikar and H. H. Zeineldin are with Masdar Institute of
Science and Technology, Abu Dhabi, PO Box 54224, United Arab Emirates
(e-mail: pkanjiya@masdar.ac.ae, vkhadkikar@masdar.ac.ae, hzaineldin
@masdar.ac.ae).
This research work was supported by Masdar Institute of Science and
Technology under MISRG internal grant (Award No. 10PAAA2).
Copyright (c) 2011 IEEE. Personal use is permitted. For any other purposes, permission must be obtained from the IEEE by emailing pubs-permissions@ieee.org.
voltage and current distortion, unbalanced supply voltages,
excessive neutral current, poor power factor, increased losses
and reduced overall efficiency.
Active power filters (APF) are widely used to overcome
such power quality problems [2-5]. There are two main APF
control strategies for load compensation when the supply
voltages are unbalanced and distorted [6-13]: (1) harmonic
free (HF) source currents, and (2) unity power factor (UPF)
source currents. The HF strategy results in sinusoidal source
currents [6], while UPF strategy can achieve minimum root
mean square (rms) source current magnitudes. Additionally,
the UPF strategy can provide effective damping to avoid any
resonance [7-8]. Both HF and UPF control strategies under
sinusoidal and balanced supply will lead to identical
performance. However, when the supply voltages are distorted
and unbalanced, HF and UPF operation cannot be achieved
simultaneously. For this reason, previous literature in the area
of shunt APF under distorted and unbalanced supply
condition, use either HF or UPF control strategy [6-13].
Recently, several approaches have been proposed to combine
the advantages of both control strategies using non-linear
optimization techniques [15-20].
The optimization based papers on the shunt APF control
under distorted and unbalanced voltages can be classified into
two main categories. In the first category, the distorted and
unbalanced supply voltages of each phase are processed
through a set of filters (such as, band pass). The filter gains are
optimized considering both voltage THD and voltage
unbalance limit constraints to achieve the desired
compensated voltages. These compensated voltages are then
multiplied with constant conductance factors to obtain the
desired source currents. In [15], the compensated voltage are
obtained in --0 reference frame, whereas, in [16-18] the
compensated voltage are generated in a-b-c stationary
reference frame to avoid the complex transformation from one
frame to the other. As stated in [16-18], due to the
computational delay, the studied approach is not suitable for
loads that operate dynamically.
In the second category, to reduce the complexity and
dimensionality of the optimization problem, the authors in
[19-20] formulated the optimization problem considering the
conductance factors as variables. The conductance factors for
each harmonic order are optimally determined. These
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conductance factors are then multiplied with a balanced set of
supply voltages to obtain desired source currents. In [19], the
supply voltages are considered as distorted and balanced. In
[20] to enhance the performance of the system under
unbalanced and distorted voltages, the balanced set of voltages
are extracted using instantaneous symmetrical components
along with complex Fourier transform.
One of the main disadvantages of all the above mentioned
optimization based approaches is the use of iterative
techniques for solving the optimization problem. The use of an
iterative technique can result in a computational delay, which
can constraint the applicability of the these control approaches
under dynamic load conditions. As a result, the methods
proposed in [15-20], focused on steady state load
compensation only. In [22], N. Pogaku and T. Green have
considered only one conductance factor to compute the
reference current for distributed generator inverter controller
in a micro-gird application to provide adjustable damping at
harmonic frequencies to mitigate voltage distortion.
To overcome the aforementioned challenges, a single-step
non-iterative optimized control algorithm for shunt APF under
distorted and unbalanced supply conditions is proposed in this
paper. The algorithm is based on direct calculation of
conductance factors without incorporating any iterative
optimization technique. It is shown that there is no need to
compute conductance factors for each harmonic order
separately. Three conductance factors (for the fundamental,
odd and even harmonics) are sufficient to achieve the desired
performance. Since the algorithm is based on direct
calculation of conductance factors (only three) without
incorporating any iterative technique, it can effectively work
under steady state as well as dynamic load conditions. The
Lagrangian formulation is utilized to develop the proposed
single-step non-iterative approach. Moreover, to extract the
balanced set of voltages from unbalanced and distorted supply
voltages, the novel and simple balanced voltage extractor
based on synchronous reference frame theory is proposed. The
performance of proposed single-step algorithm is evaluated
through comparison with the Newton-Raphson based
optimization control approach (OCA). A real-time hardware in
the loop test bed system is developed using OPAL-RT
simulator and a digital signal processor (DSP) DS1103 form
dSPACE to validate the performance of the proposed
algorithm for practical applications. The real-time
experimental results show the compensation effectiveness of
the proposed algorithm, in particularly, under a dynamic load
condition.
II. EXTRACTION OF BALANCED SET OF VOLTAGES FROM
DISTORTED AND UNBALANCED SUPPLY VOLTAGES USING
SYNCHRONOUS REFERENCE FRAME THEORY
One of the main objectives of the four leg shunt APF is to
achieve balanced source currents by compensating unbalanced
load currents. In order to generate the balanced reference
source currents to control shunt APF under distorted and
unbalanced supply condition, the balanced set of voltages
needs to be extracted.
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In [27], a voltage detector approach is given where the sum
of all harmonic components are extracted (by subtracting
fundamental positive sequence voltages from measured
voltages) to control shunt APF for damping the voltage
harmonic propagation in distribution systems. The extracted
voltages by this method contain unbalanced harmonics as it
does not extract individual balanced harmonics and cannot be
used here directly. To optimally compensate the load currents
under unbalanced and distorted supply conditions using shunt
APF, the individual balanced harmonic components are
extracted in [20]. An instantaneous symmetrical component
theory combined with complex Fourier transform is utilized to
extract the balanced set of voltages in [20]. This approach is
complex and the use of fixed frequency moving average
technique to carry out integration into the Fourier transform
may affect the extraction under 1) supply frequency variations
[22] and 2) presence of inter-harmonics into the supply
voltages. A new approach to extract the balanced set of
voltages, utilizing synchronous reference frame (SRF) theory,
is proposed in this paper and discussed below.
Let the three distorted and unbalanced supply voltages at
the point of common coupling (PCC) be represented as follow,
where subscript denotes supply, subscript denotes phase of
the system, denotes harmonic order, denotes the
maximum harmonic order (the choice of will depend on the
maximum harmonic order to be expected in the supply
voltages and it is selected by the user), denotes rms value of
voltage and denotes phase angle. For the harmonic
order, the voltages given in (1) can be converted into the SRF
using Parks transformation as:
where is the fundamental angular frequency of supply
voltages which can be obtained using the phase locked loop
(PLL). , and are the direct and quadrature axis voltage
components of harmonic voltage. With this approach there
is no need to extract positive, negative and zero sequence
components separately.
The components and can be represented as:
where and are the DC components corresponding to
the balanced part of the harmonic voltage present in the
supply voltages, while and are the AC components
corresponding to the unbalanced part of harmonics. The
zero sequence component does not contain any information
about the balanced part of the voltages, hence it is not
considered in (2).
The DC direct and quadrature axis components and
can be obtained after processing and through low pass
filters (LPFs). The use of LPFs over fixed frequency moving
average filters into the proposed SRF theory based extractor
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gives robustness to the extraction against supply frequency
variations and presence of inter-harmonics. The balanced set
of the supply voltages in the stationary reference frame for the
harmonic is then obtained using inverse Parks transform
as follows,
The above procedure is carried out for . current of any phase [19-20]. Since both the extracted voltages
Finally the three phase balanced set of voltages can be
expressed as follows,
Since all the quantities on the right hand side of (5) are
balanced, represents the balanced set of supply voltages
derived from the distorted and unbalanced supply voltages.
III. PROPOSED SINGLE-STEP NON-ITERATIVE OPTIMIZED
ALGORITHM
To achieve UPF operation, under distorted and unbalanced
supply conditions, the following conditions should be
satisfied: (1) the source currents should have the same
harmonic content as the supply voltages, and (2) all the phase
currents should be in-phase with their respective phase
voltages. This suggests that in case of UPF operation, the
source current THD should equate to the source voltage THD
value while maintaining in phase relationship with respect to
the individual phase voltage. Therefore, the source current
THD and unbalance factor may not be within the acceptable
limit. By controlling the harmonic ratios and balancing the
average power equally among the three phases, the THD and
source current unbalance factor can be maintained within the
specified limits. For the source current to meet all the above
constraints while maximizing the power factor, the APF
control algorithm is formulated as an optimization problem
where the main variable is the conductance factor for each
individual harmonic order. Using (5), the desired source
currents can be expressed as follows
where * denotes the reference or desired quantity. and
are the conductance factors for the fundamental and nth
order harmonic components. The values of these conductance
factors can be controlled to maximize the power factor while
satisfying the average power balance and THD constraints.
Since the same conductance factor value will be applied to
each phase to achieve balanced source currents, the
optimization problem can be solved and formulated
considering one phase. The next subsections will highlight the
proposed problem formulation for determining the optimal
conductance factors.
A. Objective function
There are various objectives that can be applied to the shunt
APF problem which include minimization of source currents
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THD, minimization of APF kVA rating or maximization of
source power factor [16], [18]. The most practical objective is
to maximize the source power factor, which consequently
reduces the cost of electricity consumption under power factor
based tariff (the most commonly used electricity tariff plan for
industrial users). Therefore, the objective chosen here is to
maximize the power factor which can be achieved by
minimizing the square of apparent power calculated using the
extracted balanced set of voltage and the desired source
and desired source currents are balanced, the three phase rms
quantities are equal and thus can be represented as follows,
where the rms value of the balanced order harmonic
voltage of any phase can be computed as follows,
Using (7), the objective function , which is the square of
the apparent power of any phase, is given by:
B. Equality Constraint
For the desired source currents to be balanced, the three
source currents should supply the demanded average total
power equally. Therefore, the equality constraint for any phase
can be written as:
where is the demanded average load power, which is
computed using instantaneous three-phase source voltages and
load currents. This instantaneous power is then
processed by an LPF to obtain the . is the average
power required to overcome the losses in the shunt APF and
thus to maintain the DC link voltage.
C. Inequality Constraints
The approach discussed, in [19-20], considers one THD
limit on the source current total harmonic distortion ).
As per the IEEE Std. 519, limits on the current distortion for
individual even harmonics is 25% of the limit on the odd
harmonics. To address this, different THD limits for the
current distortion due to odd and even harmonics is considered
in this paper.
The upper bounds on the source current harmonic distortion
due to odd and even harmonics is denoted as and
, respectively. The inequality constraints on
current distortion due to odd and even harmonics is given by,
and,
where,
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and,

The source side power factor is maximum (UPF) when both

the source voltage and current THDs are equal (UPF
operation). Let and be the user defined By applying the Karush Kuhn Tucker (KKT) optimality
(pre-specified) THD limits on the source current harmonic conditions to (19) [25], the following set of equations can be
distortion due to odd and even harmonics respectively. For derived.
cases where the source voltage THDs due to odd and even
harmonics ( and ) are greater than
and respectively, the source current THDs should
be equal to the pre-specified THD values to achieve maximum
power factor. On the other hand, for cases where and
are less than and respectively,
the source current THDs should be equal to the supply voltage
THDs to maximize the source side power factor. This can be
mathematically represented as follows:

and,

For optimality, the source current THDs will always reach

its upper limit as per (15)-(16) and thus the inequality
constraint given in (11)-(12) can be reformulated as an
equality constraint as follows,

and,
From (21) and (22), it can be deduced that the conductance
factors for all odd harmonics as well as for all even harmonics
will be equal and can be represented as follows,
In the following subsection it will be proven that, by
converting the inequality constraints given in (11)-(12) into an
equality constraints as per (17)-(18) (by selecting
according to the condition given in (15)-(16)), By substituting (26)-(27) into (23), (24) and (25), the
the closed form solution of optimum conductance factors is following equations can be derived.
possible without incorporating any iterative optimization
technique. The identification of the optimum source current
THDs to achieve the maximum power factor significantly
reduces the complexity of the problem and thus a simple
single-step non-iterative solution is achievable.
D. Proposed Single-step Non-iterative Solution where,
The optimization problem presented in the previous
subsections is a constrained non-linear optimization problem
where the main variables are the conductance factors. Using
the Lagrangian function, the problem can be transformed into
an unconstrained optimization problem as follows [25], and,

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From (29) and (30), and can be represented in (34) and (35), the optimal conductance factors are determined.
terms of as follows, The flowchart is an integral part of the overall control block of
the APF which is discussed in the next section.
The non-iterative solution of the optimization problem with
constraint on different power quality factors, such as,
distortion factor and K-factor, is also discussed briefly in
Appendix-III.
Furthermore, by substituting (33) and (34) into (28), an START
expression for can be derived as follows,
Get the RMS values of balanced set of
fundamental and harmonic voltages
( , = , , ,)
Get the demanded total average power
( + )
Equations (33), (34) and (35) present a closed form Specify source current THD limit
( _ and _ )
mathematical formula for determining the optimal values for
the conductance factors. By substituting the value of , Calculate Calculate
and from (33), (34) and (35) into (6), the reference source _ _

currents can be re-written as:

N Check Check N
_ < _ _ < _

_ = _ Y Y _ = _

,_ = _ ,_ = _

Equation (36) suggests that the proposed algorithm may

have superior performance compared to algorithms given in Calculate
+
[19-20] due to the direct calculation of conductance factors =
+ ,__
, and using (33), (34) and (35). The
+,__
distinguishing features of the proposed single-step optimized ,_
_ =
_
approach can be summarized as follows: ,_
a- The proposed approach involves only three conductance _ =
_
factors (one for the fundamental and two other for odd
and even harmonics respectively) as opposed to STOP

conductance factors in [19-20]. This will reduce the Fig. 1. Flowchart to determine the conductance factors , and .
complexity of the problem.
Ls iSa iLa
b- The different conductance factors for the odd and even Three-phase
Ls iSb iLb
harmonics facilitates the selection of separate THD limits Loads/
on odd and even harmonics. Ls iSc iLc Several
Single-phase
iSN iLN Loads
c- Mathematical formulas are derived that can calculate the
optimal conductance factors directly and thus avoiding 3P4W
iShN
iSha
iShb
iShc

AC Supply
the use of iterative techniques. The direct calculation of
, and can greatly reduce the computation Lsh
time and thus achieving faster response time when
S1 S3 S5 S7
compared to other methods [19-20].
d- As opposed to previous approaches in [15-20], since the Cdc
proposed method does not involve an iterative approach,
it can be more effective for dynamic load variations.
S6 S2 S4 S8
The flow chart of the proposed single-step non-iterative Shunt Active Power Filter
solution procedure is shown in Fig. 1. The algorithm will start Fig. 2. Four-leg VSI based shunt APF system configuration.
by measuring the source voltage and extracting the rms value
of each balanced harmonic component. This will be used to IV. OVERALL CONTROL BLOCK OF SHUNT APF
determine and . As mentioned previously in
Fig. 2 represents the system under study which consists of
(15) and (16), and will be compared with
an equivalent grid behind an impedance, combined single
and respectively to determine
phase and three phase loads, and the shunt APF. The four leg
and . For cases where is voltage source inverter (VSI) topology is utilized to realize
less than , will be set equal to . 3P4W APF system. The overall control block diagram of the
Otherwise, the value of will be set equal to proposed single-step non-iterative optimized control algorithm
. Similarly, will be selected by comparing to control shunt APF under distorted and unbalanced supply
with . Using the derived formulas in (33), condition is shown in Fig. 3.

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The inputs to the single-step calculation of , and study is carried out under the MATLAB/SIMULINK
block are the specified source current THD limits environment. The simulated test system data is given in
( and ), demanded average total power Appendix-I. The performance of the proposed single-step non-
( ), and rms values of the balanced set of iterative optimized control algorithm is compared and
harmonic voltages ( ). The demanded validated with an iterative optimization based control
instantaneous load power is calculated as, algorithm (OCA) given in [20]. The simulation studies for
both steady-state and dynamic conditions are performed and
discussed below.
The instantaneous power is then process by an LPF to
A. Case 1: Unbalanced supply voltages distorted with odd
obtain the average power To maintain the dc link
harmonics only - steady state load condition.
capacitor voltage constant at a pre-specified value, a small
amount of active power should be drawn from the grid. To In order to test the proposed approach under distorted and
accomplish this, a discrete proportional-integral (PI) controller unbalanced supply voltage condition, the unbalanced three
is used which can be given as follows, phase supply voltages are expressed in Table I.
Fig. 4 shows the simulated results with the proposed single-
step optimized algorithm under steady-state load condition.
The profiles of the distorted-unbalanced supply voltages and
where, the non-linear distorted-unbalanced load currents are given in
where is the measured instantaneous voltage across Fig. 4 (a) and (b). Table-II gives the rms and THD values of
the DC link capacitor processed through the low pass filter, each phase voltage and load current with the source voltage
is the reference DC link voltage and is the sample and load current unbalance (UB) factors. The value of the
number. and are the proportional and integral gain power factor and the source current UB, with APF
compensation, using the proposed and OCA control
respectively of the PI controller. The rms values of the
algorithms are also presented in Table-II.
balanced set of harmonic voltages are calculated as in (8)
The unbalance factor is calculated as follow,
using the extracted balanced set of harmonic voltages in the
synchronous reference frame. After calculating the
conductance factors , and as shown in Fig. 1, the
three phase reference source currents are calculated as in (36).
The reference source neutral current is set equal to zero. These
reference source currents are compared with the actual Table I: Distorted and unbalanced supply voltages (Case 1)
measured currents using the hysteresis current controller Phase-a Phase-b Phase-c
which determine the switching signals for the VSI.

V. SIMULATION RESULTS
To verify the performance of the proposed single-step non-
iterative optimized control algorithm, a detailed simulation

_ _

LPF
1

Single-step
PI calculation _
of
LPF
, _
and
PLL _
Hysteresis
current
controller

abc dq _
LPF
dq abc To gates of IGBTs
of 4-leg VSI

2
abc dq
LPF
dq abc
=
=3,5

=
h
abc dq
LPF =3,5
dq abc

Fig. 3. The overall control block diagram for the proposed non-iterative optimized control of four-leg VSI based shunt APF.

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The extracted balanced set of voltages using the d-q c). The power factor of all phases is measured to be 0.983
transformation method is depicted in Fig. 4 (e). The lagging with respect to extracted balanced set of voltages.
performance of the proposed optimized control algorithm is Note that the slight increase in the actual source current THD
evaluated for the following three conditions: (1) HF (0 % values (greater than specified 5%) is due to the switching
THD) operation, (2) UPF operation and (3) a specified THD operation of VSI.
limit operation.
Fig. 4 (f) gives the compensated source currents when the
APF is controlled under HF condition using the proposed
optimized control. For this case, the THD limits
and are set equal to 0%. The source currents, after
the compensation, are balanced and sinusoidal. As noticed
from Table-II, the THD of the source currents with HF mode
of operation is around 1.7%. The power factors in the HF
mode, measured with respect to unbalanced supply voltages,
are 0.955 lagging (phase-a), 0.905 lagging (phase-b) and
0.884 lagging (phase-c) while, power factor of all phases
measured with respect to extracted balanced set of voltages is
0.969 lagging.
To test the controller performance, the odd and even THD
limits were specified as 100%. As discussed in previous
sections and shown in the flow chart (refer to Fig. 1), the
proposed algorithm compares the specified THD limits
and of 100% with the balanced set of
source voltage THDs, and which in this case
are 24% and 0% respectively. The specified THD limits of
100% are greater than the balanced set of supply voltage
THDs, and therefore, the control algorithm operates in the
UPF mode to achieve the maximum possible power factor
operation. Fig. 4 (g) illustrates the compensated source
currents when the APF system operates in the UPF operation.
The unity power factor with respect to balanced set of voltages
is achieved in this mode of operation with source current THD
close to 24% (equal to balanced set of supply voltage THD Fig. 4. Simulation results under unbalanced supply voltages distorted with odd
value). The power factors of each phase measured with respect harmonics using proposed single-step optimized control algorithm.
to unbalanced supply voltages are given in Table-II.
Finally, the performance of proposed single-step optimized It can be viewed from the above-discussed three modes that
control algorithm is evaluated considering constraints on the compensated source current profile, in the optimized
source current THD levels while maximizing power factor. mode, is in between sinusoidal (HF operation) and balanced
The THD limits of the source currents are specified as 5%. set of supply voltage (UPF) operations. In all the above
Fig. 4 (h) depicts the simulation results under the optimized operating modes, the fourth leg of the shunt APF effectively
mode of operation. From Table-II, the source current THD is compensates the load neutral current (Fig. 4 (c)), and thus
achieved around 5.6% with the source side power factors, reducing the source side neutral current to zero (shown with
measured with respect to unbalanced supply voltages, as 0.967 cyan color in Figs. 4 (f)-(h)).
lagging (phase-a), 0.912 (phase-b) and 0.900 lagging (phase-

Table-II: Performance indices with proposed optimized and OCA approaches (steady-state condition case-1)

rms (pu) Power factor THD (%) UB (%)

Mode Strategy a b c a b c a b c -
Supply voltages
- - 0.667 0.807 0.537 - - - 27.03 21.06 37.24 19.89
Load currents
- - 0.536 0.932 0.608 0.733 0.713 0.917 25.97 17.07 32.93 22.54
HF Proposed 0.597 0.600 0.602 0.955 0.905 0.884 1.70 1.75 1.80 0.44
OCA 0.598 0.601 0.603 0.955 0.905 0.884 1.77 1.81 1.87 0.44
UPF Proposed 0.581 0.584 0.584 0.983 0.915 0.936 23.54 23.57 23.69 0.34
OCA 0.582 0.584 0.585 0.983 0.915 0.936 23.55 23.52 23.69 0.29
Optimized Proposed 0.593 0.594 0.597 0.967 0.912 0.900 5.57 5.67 5.65 0.28
OCA 0.592 0.597 0.597 0.967 0.912 0.900 5.50 5.64 5.70 0.56

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Fig. 5 gives the simulated results for the system under
consideration, under three operating modes (HF, UPF and
optimized), with an iterative optimization based OCA control
method. The performance indices of the OCA method are also
provided in Table-II. As viewed from Figs. 4-5 and Table-II,
the performance of the proposed single-step optimized
algorithm is identical to the OCA control method since the
supply voltages are distorted with only odd harmonics and the
THD limit in case of OCA was set same as . The
proposed optimized method, however, requires minimum
computational burden compared to the OCA method since the
model relies on only three control variable ( , and )
and direct computation of the variables without any iterative
technique. Table-III gives the comparison between Newton-
Raphson (NR) based OCA and the proposed single-step
optimized control method. The steady state per unit values
used to determine the conductance factors using both methods
are given in Appendix-II.
Fig. 5. Simulation results under unbalanced supply voltages distorted with odd
harmonics using OCA control algorithm.
The CPU used for this study has core i5 processor with 4
GB RAM. For the NR method, the optimization problem with
seven conductance factors is formulated and solved using
MATLAB optimization tool box [19-20]. The optimum value
is found to be 0.088 which was reached in 0.11 seconds or 5.5
cycles (average) utilizing 8 iterations (average) compared to
10 -seconds or almost instantaneous (Inst.) for the proposed
single-step method. For both cases, 0.11 seconds and 10 -
seconds represent the time required to compute the
conductance factors which does not include the time required
for the extraction of balanced set of voltages.
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Table-III: Overall comparison between Iterative Newton-Raphson and
Proposed Non-iterative Single-step Optimized Approaches.
Method Newton-Raphson (NR) Proposed
No. of iteration 8 4 2 1
Time (Second) 0.11 0.07 0.04 1.00E-05
Time (cycles) 5.5 3.5 2 Inst.
Function value 0.088 0.0878 0.0896 0.088
Eq. constraint Satisfied Satisfied Satisfied Satisfied
Ineq. constraint Satisfied Unsatisfied Satisfied Satisfied
Minima Optimum Infeasible Feasible Optimum
This demonstrates that the proposed optimized algorithm
computes the conductance factors almost instantaneously. The
extremely low computational time makes the proposed
method capable of compensating dynamically changing load.
The results by the NR method, with a maximum number of
iterations set equal to 4 and 2 iterations, are shown in Table-
III. It can be noticed that despite the reduction in the
computational time the solution is not optimum. Moreover, it
is worthy to note that the execution time and the number of
iterations taken by the NR method to find the optimum value
is highly dependent on the initial guess of the control variables
and in some cases might not guarantee the global optimal
solution. The NR method was run 50 times with a random
initial guesses for all control variables and it was found that
the maximum number of iteration taken was 11 with an
execution time of 7.5 cycles, while the minimum number of
iterations recorded was 3 with an execution time of 2.5 cycles.
The average number of iterations and average execution time
found for 50 runs of NR method was 8 and 5.5 cycles
respectively. It is important to note that the sampling time of
the controller for the shunt APF with the NR method should
be higher than the maximum optimization execution time.
B. Case 2: Unbalanced supply voltages distorted with odd
harmonics only - dynamic load Condition.
The performance of the proposed control algorithm,
considering the distorted and unbalanced supply voltages
given in Table I, during a sudden load change condition is
illustrated in Fig. 6.
To create the dynamic condition, at time t=0.2 sec, the load
is changed from L1 to L1+L2 (Appendix-I) and again brought
back to L1 at time t=0.3 sec. The change in the load current
profile can be viewed from Fig. 6 (b). The compensated
source current profile is shown in Fig. 6 (c). As noticed, the
APF system with the proposed single-step optimized approach
achieves the new steady-state condition within one cycle and
without affecting the APF compensation capability during
both load increase and decrease. Furthermore, the dc link
controller, as shown in Fig. 6 (d), effectively regulates the dc
bus voltage at the set reference value.
Under the same dynamic condition, the performance of
iterative optimization based OCA method is given in Fig. 7.
As observed from Fig. 7 (a), the compensated source currents
are not optimal. In addition, the dc link voltage, shown in Fig.
7 (b), settles at a new operating point, lower than the set
reference value. This is mainly because of the 10 cycles
computational delay (maximum execution time of 7.5 cycles
plus 2.5 cycles safety margin) in calculating the new
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conductance factors. Therefore, for a duration of 10 cycles, the Table-IV: Performance indices with proposed optimized and OCA approaches
(after load change)
OCA based controller tries to compensate the source currents
based on the previously computed conductance factors and Method Proposed OCA
thus the source currents become more distorted and a 5.57 6.83
unbalanced. Table-IV presents the compensated current b 5.67 14.43
THD (%)
THDs, power factors, rms values and UB factors under the c 5.65 15.41
a 0.967 0.947
new operating condition using the proposed optimized and Power
b 0.912 0.914
OCA algorithms. Thus, this dynamic condition demonstrates factor
c 0.900 0.932
the true capability and enhanced performance of the proposed a 0.593 0.556
single-step optimized algorithm over other optimization based rms (pu) b 0.594 0.628
approaches. c 0.597 0.594
UB (%) - 0.28 6.187

Table-V: Distorted and unbalanced supply voltages (Case 3)

Phase-a Phase-b Phase-c

The source current THD limit in case of OCA algorithm is

set equal to 5% while, the THD limits and
) in case of the proposed algorithm are set equal to
4.85% and 1.21% respectively. is set equal to
to comply with IEEE Std. 519. The above limits
for the proposed algorithm are calculated using (41) to
maintain an overall THD limit ( ) of 5%.

The profiles of the supply voltages and load currents are

Fig. 6. Simulation results for dynamic load condition under unbalanced supply
voltages distorted with odd harmonics using proposed algorithm.
Fig. 7. Simulation results for dynamic load condition under unbalanced supply
voltages distorted with odd harmonics using an iterative optimization method.
C. Case 3: Unbalanced supply voltages distorted with both
odd and even harmonics - steady state load condition.
The superiority of the proposed algorithm over the OCA
algorithm, in terms of computation time, was highlighted in
the previous two cases. To show the advantage of having
different THD limits on odd and even harmonics, the
performance of proposed algorithm is evaluated and compared
with the OCA algorithm under unbalanced supply voltages
distorted with both even and odd harmonics (Table-V).
given in Fig. 8 (a) and (b). The compensated source currents
using the proposed algorithm are shown in Fig. 8(c), while,
Fig. 8(d) depicts the source currents using OCA algorithm.
Note that there is a slight difference in shape of source current
waveforms with proposed and OCA algorithm due to different
odd and even harmonics level in the source currents. The
different performance indices with the proposed algorithm and
OCA algorithm are provided in Table VI. The performance of
the shunt APF with both algorithms is almost identical in
terms of rms value, power factor and THD of the source
currents, the main differences lie in the individual harmonic
distortion (IHD), filters kVA and the K-factor as shown in
Table VI.
The average IHD of three phase source currents for both
algorithms are shown shaded in Table-VI. The IEEE-519
standard recommends that the individual even and odd
harmonics in the source current should be less than 1% and
4%, respectively, for a system with short circuit ratio less than
20. The 2nd and 4th harmonic in source currents are measured
to be 2.88% and 2.62% respectively with OCA algorithm
(shown bold) which are above the individual even harmonics
limit as per IEEE-519. On the other hand, since individual
limits are imposed on odd and even harmonics with the
proposed method, the measured 2nd and 4th harmonic in source
currents are 0.95% and 0.88% respectively (below limit). The
measured odd harmonics (5th and 7th) in source currents are
within the individual odd harmonics limit as per IEEE-519
with both algorithms. The K-factor of the source current is
slightly higher with the proposed algorithm due to higher

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amount of higher order harmonics (5 th and 7th) compared to
the OCA algorithm. It is worthy to note that considering
different THD limits on odd and even harmonics is one step
towards the optimized control of shunt APF taking into
account individual harmonic constraints. As seen from the
results, the proposed approach improves upon existing
methods. Future work would be to implement a non-iterative
approach that considers directly constraints on individual
harmonics.
Fig. 8. Simulation results under unbalanced supply voltages distorted with
both odd and even harmonics using proposed optimized and OCA control
algorithms.
VI. REAL-TIME HARDWARE IN THE LOOP (HIL)
IMPLEMENTATION
A real-time hardware-in-the-loop (HIL) system is built to
validate the feasibility of the proposed single-step optimized
approach for practical applications. Fig. 9 illustrates the
developed laboratory experimental setup. The real-time HIL
system is composed of an OPAL-RT digital simulator and a
rapid prototyping digital signal processing (DSP) board from
dSPACE, DS1103. The OPAL-RT is a real-time simulation
platform based on two Intel Xeon QuadCore 2.40 GHz
processors (total 8 cores or CPUs) working under RT-LAB
software environment. OPAL-RT is equipped with analog
inputs/outputs (16 each) and digital inputs/outputs (32 each).
The DS1103 has 20 analog to digital converter (ADC) ports, 8
digital to analog converter (DAC) ports and 32 digital
inputs/outputs. As shown in Fig. 9, the OPAL-RT represents
the power system where all the power circuit components,
such as, 3P4W unbalanced distorted source, unbalanced load
and shunt APF are implemented. The DS1103, on the other
hand, represents digital controller for the shunt APF. In an
actual practical system, the OPAL-RT will be replaced by the
actual power source, load and inverter, whereas, the digital
controller will remain the same. The necessary seven signals
(3 supply voltages, 3 load currents and the DC bus voltage)
are measured and taken out of OPAL-RT through its DAC
ports. These real-time signals are available in the
MATLAB/SIMULINK platform on the host computer through
ADC ports of DS1103 and are utilized to generate reference
source currents based on the proposed control algorithm
(indirect control). For the neutral current compensation, the
source neutral current is directly considered as zero. These
generated reference source currents (total 4, 3 for phase
currents and 1 for neutral) are taken out of the DSP through
DAC ports. The actual source current signals (total 4, 3 phase
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10
currents and 1 neutral current) are also taken out from the
OPAL-RT. An external analog hysteresis current control
board is developed to perform the pulse width modulation.
The actual and reference source current signals are then
compared and the 8 necessary switching pulses for the shunt
inverter are generated. Finally, these 8 switching/gate pluses
are transferred to OPAL-RT using digital I/O ports and
utilized to control the shunt APF inverter in real-time. It
should be noted that all the signals are normalized on a 5V
scale (5V=1 pu, base values in Appendix-I). The maximum
limit on the input-output signals for OPARL-RT is 16V and
10V for dSPACE. The sampling times for both OPAL-RT
and DS1103 systems were 20 sec each.
The performance of shunt APF real-time HIL system is
evaluated for both steady state and under dynamic conditions.
Fig. 10 gives the real-time test system results. The source
voltage and load current profiles in steady-state are given in
Fig. 10 (a) and (b), respectively. It is worthy to note that
identical system parameters and load conditions are
considered (same as discussed in the simulation section, case
1 and case 2). The real-time experimental results with the
proposed optimized algorithm for three different modes of
operation are given in Fig. 10 (c) to 10 (e). As noticed from
the Fig. 10 (c) for the case of HF operation, the source
currents are achieved as balanced and sinusoidal. The actual
THD values of the source currents are noticed as 3.9%. The
harmonics are mostly due to the sampling time of the OPAL-
RT and switching operation of the inverter. Fig. 10 (d) gives
the source currents when the optimized algorithm is operated
to achieve maximum power factor at 5% THD limit. In this
case, the THD of the source currents are measured to be
5.94%. The harmonic spectrum of phase-a supply voltage,
load current and source current up to 7 th harmonic during 5%
THD limit operation is given in Table-VII. When THD limits
are defined as 100%, the source current profiles are illustrated
in Fig. 10 (e). In this case, the proposed algorithm determines
the maximum THD limits by comparing it with a balanced set
of source voltages ( and ). The
compensated source currents have THD of 24.47%. Note that
the source currents are identical to the extracted distorted-
balanced set of supply voltage profile shown in Fig. 4 (e).
The dynamic performance of proposed non-iterative
optimized control algorithm is shown in Fig. 10 (f) to 10 (i).
Initially, the load on the system is three-phase diode bridge
rectifier with a resistor. Suddenly, an unbalance load is
connected to the system. The load current profile due to this
dynamic load change is shown in the Fig. 10 (f). Prior to the
load change, the controller is working under HF mode. As
seen from the Fig. 10 (g), the shunt APF system together with
proposed algorithm maintains the desired performance.
Additionally, as noticed from the three phase source currents
in Figs. 10 (h) and 10 (i), the dynamic performance can be
achieved in different modes of operation. The load neutral
current compensation during dynamic load change is depicted
in Fig. 11. It can be seen that the source neutral current is
achieved equal to zero by injecting compensating neutral
current opposite to load neutral current through forth leg of the
shunt APF. This study thus validates that the proposed
optimized control algorithm can perform well under dynamic
conditions.
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11

Table VI: Performance indices for the proposed optimized and OCA approaches (steady-state condition case-3)

rms (pu) Power factor THD (%) UB (%) IHD (%) Filters kVA K-factor
Strategy nd th th th
a b c a b c a b c - 2 4 5 7 - -
Supply voltages
- 0.648 0.793 0.511 - - - 11.25 7.98 15.13 21.47 6.09 5.73 5.47 5.20 - -
Load currents
- 0.567 0.936 0.576 0.780 0.693 0.928 21.12 10.25 17.31 18.18 - - - - - -
Source currents
Proposed 0.584 0.586 0.586 0.984 0.922 0.932 5.16 5.24 5.22 0.23 0.95 0.88 3.58 3.27 0.865 1.069
OCA 0.585 0.587 0.588 0.985 0.923 0.933 5.19 5.21 5.23 0.28 2.88 2.62 2.38 2.27 0.894 1.044

Non-linear
Load
DS1103
3P4W System LS h iL (a,b,c) APF Controller
DAC 1-3 ADC 1-3 Implementation
vS (a,b,c)
DAC 4-6 ADC 4-6 on Matlab/
Cdc vd c Simulink
vdc iS (a,b,c,n)
DAC 7 ADC 7
Platform
Actual Reference
DAC 8-11 DAC 1-4
(a,b,c,n) (a,b,c,n) Host PC
Analog
G1 to G8 G1-G8 H.C.
Digital I/O
Opal-RT gate signals H.C.= Hysteresis
dSPACE & PC Interface
Interface
Controller
Fig. 9 Laboratory Real-time Hardware-In-the-Loop (HIL) System Representation.

(a) Source voltages (b) Load currents . (c) Source currents (HF mode)

(d) Source currents (optimized mode) (e) Source currents (UPF mode) (f) Load currents (load change)

(g) Phase-a performance (HF mode- load change) (h) Load currents (HF mode- load change) (i) Source currents (optimized mode- load change)
Fig. 10 Real-time experimental results (scale:- X-axis = 10 m-sec/div, Y-axis = 1 pu/div for all the quantities except for Vdc where Y-axis = 0.2 pu/div

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Table VII: Harmonic spectrum of different quantities during 5% THD limit
operation.
Quantity THD 2nd 3rd 4th 5th
27.03 0.01 0.01 0.01 21.43
25.79 0.01 19.12 0.01 05.68
05.94 0.00 0.01 0.02 04.25
Fig. 11 Real-time experimental results: neutral current compensation
(scale:- X-axis = 10 m-sec/div, Y-axis = 1 pu/div).
VII. CONCLUSION
A single-step non-iterative optimized control algorithm has
been proposed for three-phase four-wire shunt active power
filter to achieve an optimum performance between power
factor and THD. The proposed optimized approach is simple
to implement and does not require complex iterative
optimization techniques to determine the conductance factors.
It is shown mathematically that only three conductance factors
(one for the fundamental and two other for odd and even
harmonics respectively) are sufficient to determine the desired
reference source currents. The proposed algorithm determines
the conductance factors in 10 sec. Because of the smaller
computational time, the proposed algorithm performs
satisfactory under dynamically changing load conditions
(other optimization based approaches are limited to steady-
state condition). The performance of proposed algorithm is
validated by a real-time hardware-in-the-loop experimental
prototype. The satisfactory real-time experimental results for
steady state as well as dynamic condition demonstrate the
feasibility of proposed algorithm for practical implementation.
VIII. APPENDIX-I
The system data for simulation as well as experimental study.
Base voltage (AC) - 415 V (L-L)
System Base voltage (DC) - 750 V
Parameter
Base power - 15 kVA
L1 :- 3-phase diode rectifier with 20
resistive load
L2 :- phase-a: 0.05+j0.15 pu,
phase-b: 0.05+j0.175 pu and,
Loads phase-c: 0.025+j0.125 pu
Steady state condition: L1 + L2
Dynamic condition: load is changed from
L1 to L1 + L2 and again brought back to L1
DC link capacitor = 2000 F; reference DC
APF link voltage = 750 V; filter inductor = 6 mH
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12
IX. APPENDIX-II
The steady state per unit values used to determine the
6th 7th conductance factors:
0.01 15.22
0.02 12.36
0.01 03.10
X. APPENDIX-III
OPTIMIZATION PROBLEM FORMULATION AND ITS SOLUTION
WITH ALTERNATE POWER QUALITY CONSTRAINTS
In the previous discussion the optimization problem aiming
at maximizing the power factor subject to the power balance
and THD constraints was introduced. However, there are
various power quality constraints other than THD such as,
distortion factor and K-Factor that are of technical interest in
certain conditions. This section provides a brief discussion on
how to formulate and solve an optimization problem to
compute optimal conductance factors considering distortion
factor and k-factor.
A. Constraint on Source Current Distortion Factor
The distortion factor (DF) describes how the harmonic
distortion of source current affects the effective source power
factor. The current distortion factor ( ) is defined as the
ratio of the fundamental rms current to the total rms current.
The lower the DF, higher the current distortion, therefore,
the lower bound on the source current DF is considered and
given as,
As discussed before, to achieve maximum power factor the
conductance factors for all the harmonics should be equal and
here it is denoted as . Using fundamental conductance
factor and harmonics conductance factor , the constraint
on source current DF can be rewritten as,
The maximum source side power factor can be achieved
when both the source voltage and current DFs are equal. Let
be the lower bound on DF specified by the user. To
achieve the maximum possible power factor under the
condition where the source voltage DF ( ) is higher than
, the source current DF should equate to . On the
other hand, when is less than , the source current
DF should equate to to achieve maximum possible
power factor satisfying DF constraint. The appropriate value
of can be selected by comparing the with .
With this selected value of , the inequality constraint of
(43) can be reformulated as equality constraint and expressed
as,
From (44), can be represented in terms of as follows,
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13

Let be the user defined maximum limit on K-factor.

By comparing the with the source voltage K-factor
where, ( ) and following the similar procedure discussed in
previous sub-section the inequality constraint of (50) can be
Using and , the power balance constraint given in converted into equality constraints as follows,
(10) can be rewritten as,

By substituting (45) into (47), an expression to compute From (51), can be represented in terms of as follows,
can be derived as follows,

where,
Equations (45) and (48) present closed form mathematical
expressions to compute the optimal conductance factors which The expression for can be derived by substituting
maximize the source side power factor satisfying power from (52) into the power balance constraint of (47).
balance and DF constraints.

Table VIII: Performance indices achieved for optimization problem with DF
constraint. Equations (52) and (54) present closed form mathematical
expressions to compute the optimal conductance factors,
0.0000 0.6259 0.6259 0.9677 0.9677 which maximize the source side power factor satisfying power
0.9800 0.6348 0.4945 0.9677 0.9800 balance and K-factor constraints.
Using the same steady state per unit values of Appendix-II,
the optimization problem with KF constraint is solved and the
Using the steady state per unit values provided in the
results for equal to 10% and 2% are provided in Table-
Appendix-II, the optimization problem with DF constraint is
solved using (45) and (48). The results achieved with different IX.
values of are tabulated in Table-VIII. First is
Table IX: Performance indices achieved for optimization problem with KF
specified equal to 0%. As discussed above, the proposed constraint.
algorithm compares with to determine . As

seen from the Table-VIII, the specified DF limit of 0% is less 10 0.6259 0.6259 3.0482 3.0482
than , and therefore, the control algorithm chose 2 0.6386 0.4387 3.0482 2.0000
equal to . With this value of , the optimum
conductance factors, which ensure source current DF ( )
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Pro. Gener. Transm. Dsitrib., vol. 153, no.3, pp. 350-358, May Cairo, Egypt, in 1999 and 2002,
2006. respectively. In 2006, he received the
[22] M.T. Chen, Z.M. Yu, Determination of frequency variation effect Ph.D. degree in electrical and computer
on DFT-based algorithms for harmonic and flicker measurements, engineering from the University of
Transmission and Distribution Conference and Exposition, 2003. Waterloo, Waterloo, ON, Canada.
[23] IEEE Recommended Practices and Requirements for Harmonic He worked for Smith and Andersen
Control in Electrical Power Systems, IEEE Standard 519-1992, Electrical Engineering Inc. where he
1993. was involved with projects involving
[24] IEEE Standard Definitions for the Measurement of Electric Power distribution system design, protection,
Quantities Under Sinusoidal, Nonsinusoidal, Balanced, or and distributed generation. He then worked as a Visiting Professor at
Unbalanced Conditions, IEEE Standard 1459-2010 (Revision of
the Massachusetts Institute of Technology (MIT), Cambridge. He is
IEEE Standard 1459-2000), March 19 2010.
an associate professor with Masdar Institute of Science and
[25] A. J. Wood, B. Wollenberg, Power Generation Operation and
Control, Second Edition, Wiley Interscience, 1996.
Technology, Abu Dhabi, UAE and currently a faculty member at
[26] F.A.S. Neves, H.E.P. de Souza, M.C. Cavalcanti, F. Bradaschia, Cairo University in Egypt. His research interests include power
E.J. Bueno, Digital Filters for Fast Harmonic Sequence system protection, distributed generation, and deregulation.

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