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MEMSim Floating Gate Memory Simulator

PROtutor MOS Characteristics tutor

The double-gate MOS has been introduced in MICROWIND for the A valuable screen to understand the MOS characteristics, with a user
simulation of non-volatile memories such as EPROM, EEPROM and interface that designers will like. Change the model parameters and
FLASH. The command "UV exposure" erases floating gates and see their effects on Id/Vd, Id/Vg Id(log)/Vg, threshold vs. length. You
removes all electrons. The programming is performed by a very high can also fit the simulations with measurements we made in test-chips
voltage supply on the gate (7V in 0.12m), a 1.2V voltage difference fabricated in 0.35, 0.25 and 0.18m. In the manual, a tutorial on MOS
between drain and source. Some electrons are sufficiently models is given, with details on all parameters. MICROWIND
accelerated to pass through the gate oxide by hot tunneling effect. supports MOS models 1, 3 and BSIM4.
Highlights Highlights
l Simulation of non-volatile memories such as EPROM, EEPROM l Change the model parameters and see their effects on Id/Vd, Id/Vg,
and FLASH using double-gate MOS Id(log)/Vg, threshold vs Length.
l Erasure of floating gates and removal all electrons. l You can also fit the simulations with measurements we made in test-
l Programming can be performed by a very high voltage supply on the chips fabricated in 0.35, 0.25 and 0.18 m
gate l Full length tutorial on MOS models is provided in manual, with
details on all parameters.
l Supports level1, level3 and BSIM4 MOS models.
VirtualFab Cross sectional and 3D Viewer
l Documentation includes several aspects of MOS modeling.

You will never teach deep-sub micron technology like before. As

VirtualFab offers you a facility to analyze and view cross sectional
view of silicon layers and 3D view of circuits. With MICROWIND v3.5
VirtualFab enables to draw real-time images of the layout and
navigate in full-3D on the surface or inside the IC. This command is C

based on OpenGL and offers outstanding picture quality. The user can
modify the viewing position in X,Y,Z and play with light sources to
create illustrative views of the layout.
l 3D fabrication process simulator with cross sectional viewer.
l Step-by-step 3-D visualization of fabrication for any portion of layout.
l See how the contacts and metallizations are created.
l See the self-aligned diffusion after the polysilicon gate is fabricated.
l Check planes of VDD, VSS, and others signals.
l Check the oxide structure, the low dielectric (Low K) and high K
(SiO2) Sandwich, and passivation.
l User can check the gate oxide and the MOS lateral drain diffusion
l Advanced 3D layout view with GEL technology
l 2D cross sectional viewer with strain technology support.

For Support Contact:

Email :

For Sales Contact: PROtutor


World Wide Licensing Distributor:
ni logic Pvt. Ltd. (ni2designs),
21/22, Bandal Dhankude Plaza, Opp. PMT Depot,
Paud Road, Kothrud, Pune - 411 038, India

Email :
Phone : +91 20 25286947 / 48
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ABOUT MICROWIND PROthumb Mix-signal Simulator

nanoLambda Precision CMOS Layout Editor

MICROWIND is truly integrated EDA software encompassing IC No SPICE or external simulator is needed for verification of CMOS MICROWIND possess a precision CMOS layout editor, which supports
designs from concept to completion, enabling chip designers to circuits. Microwind program has in built analog like simulator which technologies right from 1.2 m till 22 nm with unsurpassed illustration
design beyond their imagination. MICROWIND integrates capabilities. With its enhanced editing commands and layout control
supports MOS Level 1, Level 3 or BSIM4 model. With features like
traditionally separated front-end and back-end chip design into an your development times would be shorter than you ever imagined.
integrated flow, accelerating the design cycle and reduced design fast time-domain, voltage and current estimation, very intuitive post
processing, frequency estimation, delay estimation, makes Highlights
PROthumb a time saver. Even power estimation of circuit simulation l Huge technology support till 22 nanometers.
can be checked on-screen. l Sub-micron, deep-submicron, ultra deep-submicron, nanoscale
It tightly integrates mixed-signal implementation with digital
Highlights technology support.
implementation, circuit simulation, transistor-level extraction and
l Design-error-free cell library (Contacts, vias, MOS devices, etc.).
verification providing an innovative education initiative to help l Built-in SPICE-like analog simulator.
individuals to develop the skills needed for design positions in l Advanced macro generator (Capacitor, MOS transistor, matrix, ROM,
l Features fast time-domain, voltage and current estimation, with very pads, inductors, path, etc.)
virtually every domain of IC industry. intuitive post processing: frequency estimation, delay estimation. l Virtual components library (R,L,C, etc) for faster simulation response.
(No external SPICE/ analog Simulator required). l Incredible translator from logic expression into compact design-error
DSCH Schematic Editor and Digital Simulator
l Supports level1, level3 and BSIM4 models for all technologies from free layout.
1.2m till 22 nm. l Powerful automatic compiler from Verilog structure circuit into layout.
l MOS characteristic viewer with access to parameters of main l On-line design rule checker with large rule base.
The DSCH program is a logic editor and simulator. DSCH is used to model. l Built-in extractor which generates a SPICE netlist from layout.
validate the architecture of the logic circuit before the l Ability to label nodes allows intuitive control of the simulation l Extraction of all MOS width and length.
microelectronics design is started. DSCH provides a user-friendly (Supply, clock, pulse, PWL, sinus, maths). l Parasitic capacitance, inductance, crosstalk and resistance extracted
environment for hierarchical logic design, and fast simulation with l Time-domain voltage and current waveforms available at the press for all electrical nodes.
delay analysis, which allows the design and validation of complex of one single button. l Modular design support with insert mask layout facility.
logic structures. l DC/AC characteristics, signal frequency vs. time, eye diagrams. l Import/Export CIF layout from 3rd party layout tools.
DSCH also features the symbols, models and assembly support for Min/Typ/Max analog simulation. l Supports up to 100,000 elementary boxes.
8051 and 16F84 controllers. Designers can create logic circuits for l Convenient Monte-carlo simulation. l Lock & unlock layers to protect some part of the design from any
interfacing with these controllers and verify software programs using l Powerful Fast-Fourier Transform to support radio-frequency circuit changes.
DSCH. simulation. l Support upto 8 metal layers for DSM technologies.
l Eye diagram view for signal output. l Global delay evaluation of circuit with facility to dump RC values.
Highlights l On screen power estimation. l Global cross talk analyzer.
l User-friendly environment for rapid design of logic circuits. l Sophisticated parametric simulation to investigate the effect of l Inversion of diffusions boxes.
l Supports hierarchical logic design. several key parameters on the circuit performances: R,L,C, l Easy label listing.
l Handles both conventional pattern-based logic simulation and temperature, supply voltage, etc. l Enhanced mathematical signal description for advance users.
intuitive on screen mouse-driven simulation. l Huge device simulation model library. l Zoom in navigator.
l Improved built-in extractor which generates a SPICE netlist from the l Inbuilt interconnect analyzer to compute field between ground l Enhanced memory utilization for faster simulation.
schematic diagram (Compatible with PSPICETM and WinSpiceTM). planes and conductor. l Silicon atom viewer with 3D support allows students to understand Si
l Generates a VERILOG description of the schematic for layout l Enhanced memory utilization for faster simulation. atom structure.
conversion. l Onscreen storage of waveforms for result hold-on.
l Immediate access to symbol properties (Delay, fanout). l Forward & backward buttons to move in simulation results.
l Model and assembly support for 8051 and PIC 16F84
l Sub-micron, deep-submicron, nanoscale technology support.
l Supported by huge symbol library.
l Tool for fault analysis at the gate level of digital circuits.