This article has been accepted for publication in a future issue of this journal, but has not been
fully edited. Content may change prior to final publication. Citation information: DOI
10.1109/TIE.2014.2384001, IEEE Transactions on Industrial Electronics
IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS
A Unity Power Factor Bridgeless Isolated-Cuk
Converter Fed Brushless-DC Motor Drive
Vashist Bist, Student Member, IEEE and Bhim Singh, Fellow, IEEE
AbstractThis work presents a power factor correction (PFC)
based bridgeless isolated Cuk converter fed brushless DC
(BLDC) motor drive. A variable DC link voltage of the voltage
source inverter (VSI) feeding BLDC motor is used for its speed
control. This allows the operation of VSI in fundamental
frequency switching (FFS) to achieve an electronic commutation
of BLDC motor for reduced switching losses. A bridgeless
configuration of an isolated Cuk converter is derived for
elimination of front end diode bridge rectifier (DBR) to reduce
conduction losses in it. The proposed PFC based bridgeless
isolated-Cuk converter is designed to operate in discontinuous
inductor current mode (DICM) to achieve an inherent PFC at
AC mains. The proposed drive is controlled using a single voltage
sensor to develop a cost effective solution. The proposed drive is
implemented to achieve a unity power factor at AC mains for a
wide range of speed control and supply voltages. An improved
power quality is achieved at AC mains with power quality indices
within limits of IEC 61000-3-2 standard.
Index Terms BLDC Motor, Bridgeless Isolated Cuk
Converter, Discontinuous Inductor Current Mode, Power Factor
Correction, Power Quality, Voltage Source Inverter.
I. INTRODUCTION
A DVANTAGES such as high efficiency, high
torque/inertia ratio, high power density, wide range of
speed control and low noise and electro-magnetic interference
(EMI) make brushless DC (BLDC) motor an ideal choice in
many applications [1]. Due to these advantages, BLDC motor
finds applications in many household appliances, industrial
tools, medical equipments, precise motion control and
automation and transportation [1-5]. A BLDC motor consists
of a three phase concentrated windings on the stator and
permanent magnets on the rotor [1]. A three-phase voltage
source inverter (VSI) is used for achieving an electronic
commutation of the BLDC motor based on the rotor position
as sensed by Hall-Effect position sensors [6].
A VSI fed BLDC motor drive is generally supplied by a
combination of a diode bridge rectifier (DBR) with a high
value of smoothening DC link capacitor [7]. This combination
Manuscript received April 14, 2014; revised July 3, 2014 and September
12, 2014; accepted September 28, 2014.
Copyright (c) 2014 IEEE. Personal use of this material is permitted.
However, permission to use this material for any other purposes must be
obtained from the IEEE by sending a request to pubs-permissions@ieee.org.
Vashist Bist and Bhim Singh are with the Department of Electrical
Engineering, Indian Institute of Technology Delhi, New Delhi-110016,
INDIA (e-mail: vashist.bist@gmail.com, bsingh@ee.iitd.ac.in).
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of DBR and DC link capacitor draws current only for a small
duration when the instantaneous value of supply voltage is
higher than the DC link voltage [8]. Therefore, a peaky current
is drawn from the AC mains, which has very high value of
harmonic contents [8]. The total harmonic distortion (THD) of
such current is of the order of 60-80 % which leads to a very
poor factor (PF) of the order of 0.6-0.7 at AC mains. Such
power quality indices are not acceptable under the limits of
international power quality standard IEC 61000-3-2 [9].
Extra incurred cost of such drives on sensors is one of the
major issues in the development of BLDC motor drives. These
current sensors are required for achieving the pulse width
modulation (PWM) based current control of BLDC motor for
speed control [6, 7]. Moreover, such BLDC motor drives also
suffer from high losses in VSI due to high switching
frequency. Such losses are reduced by operating the VSI in
low frequency switching by electronically commutating the
BLDC motor. Moreover, the speed of the BLDC motor is
controlled by varying the DC link voltage of the VSI [7]. Such
combination provides a twin benefit of reduced switching
losses in VSI and an elimination of current sensors for PWM
based control of BLDC motor.
Power factor correction (PFC) converters are used to avoid
power quality problems at the AC mains and to meet the
prescribed guidelines of IEC 61000-3-2 [10, 11]. The sensing
requirement of this PFC converter plays major role in deciding
the cost of overall system. The required number of sensors for
a PFC converter is primarily decided by its mode of operation
of the PFC converter. Continuous inductor current mode
(CICM) and discontinuous inductor current mode (DICM) are
two modes of operation of the PFC converter. In CICM, or
continuous conduction mode (CCM), the current in inductor
remains continuous in a switching period, whereas the current
becomes discontinuous in a switching period for a PFC
converter operating in DICM. The PFC converter operating in
CICM uses a current multiplier approach for voltage control
and power factor correction. It has lower current stress on the
PFC converter switch but requires three sensors (2-V, 1-C) for
its operation. However, a single voltage sensor is used for a
PFC converter operating in DICM using voltage follower
approach, but at the cost of high current stress on the PFC
converter switches [12]. Therefore, this mode of operation is
suited for low power applications.
This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI
10.1109/TIE.2014.2384001, IEEE Transactions on Industrial Electronics
IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS

A conventional boost-PFC converter has been widely used TABLE I

COMPARISON OF PROPOSED BRIDGELESS ISOLATED-CUK
for power quality improvements at AC mains [13, 14]. This CONVERTER WITH EXISTING CONFIGURATIONS
converter has also been used at the front-end of a VSI feeding
BLDC motor for power factor correction at AC mains [15-16]. No. of Devices Drv.
Such configuration maintains a constant DC link voltage of Configuration T/2 SB Isol.
S D L C T Cmp.
the VSI and controlling the speed of BLDC motor by using a
BL-Buck [20] 2 4 2 2 10 5 No No Isol.
PWM based switching of VSI. These configurations suffer
BL-Boost * [21] 2 4 1 1 8 5 No No LS
from high switching losses in VSI due to high switching
BL-Buck-Boost [22] 2 4 2 1 9 5 Yes No LS
frequency of PWM signals and high cost associated due to
BL-Cuk T-1 [23] 2 3 3 3 11 7 Yes No LS
large numbers of sensors. An overview of such configurations
BL-Cuk T-2 [23] 2 2 3 4 11 11 Yes No Isol.
has been presented in [17], but these also suffer from high
BL-Cuk T-3 [23, 24] 2 4 4 3 13 7 Yes No LS
switching losses. A variable voltage controlled single ended
BL-Cuk [25] 2 3 2 2 9 7 Yes No H/L
primary inductance converter (SEPIC) has also been presented
BL-Cuk [26] 2 2 3 3 10 7 Yes No Isol.
in [18], but it also uses a PWM based control of BLDC motor.
A review of these PFC topologies for brushless DC motor BL-SEPIC [27] 2 3 2 2 9 7 Yes No H/L
drives has been presented in [19]. BL-Zeta [28] 2 4 4 3 13 7 Yes No LS
BL-CSC [29] 2 4 2 3 11 6 Yes No LS
Bridgeless PFC converters have gained attention due to
BL-Flyback [30] # 2 4 2 1 9 5 Yes Yes Isol.
lower conduction losses in the front end converter by partial or
BL-Flyback [31] # 2 4 2 1 9 5 Yes Yes LS
complete elimination of the front-end DBR [20-33, 36-38].
BL- Flyback [32] # 2 2 1 1 6 5 Yes Yes Isol.
The bridgeless buck and boost PFC converters have been
BL- Isol. Cuk [33] # 4 0 3 3 10 10 Yes Yes Isol.
reported in [20] and [21], but have a limited voltage
BL- Isol. SEPIC [36] # 2 2 3 3 10 7 Yes Yes Isol.
conversion ratio (ratio between output and input voltage) i.e. <
BL- Isol. SEPIC [37] # 4 3 3 3 13 11 Yes Yes Isol.
1 for buck and > 1 for boost converter. Therefore, these
BL- Isol. Zeta [38] # 2 3 2 2 9 7 Yes Yes Isol.
converters cannot be used for wider range of DC link voltage
Proposed # 2 4 6 5 17 9 Yes Yes LS
control. A bridgeless buck-boost converter feeding BLDC
motor drive has been presented in [22], but it doesnt provide S - Switches, D - Diodes, L Magnetic Components (*Coupled Inductors, #

high frequency isolation. A non-isolated configuration of
bridgeless Cuk converter has been presented in [23-26]. These
configurations are derived from the non-isolated Cuk
Converter. Similarly, bridgeless configurations of a SEPIC,
Zeta and canonical switching cell (CSC) converters have been
presented in [27], [28] and [29] respectively for improving the
power quality at AC mains. These configurations present non
isolated converter, which cannot be used in applications
requiring galvanic isolation such as refrigerators.
Bridgeless configurations of a PFC based flyback converter
have been proposed in [30-32]. These converters have low
component count but find applications in very low power
rating, ranging up-to 100-150 W. A bridgeless isolated-Cuk
converter has also been proposed in [33] which is derived
from the isolated Cuk converter [34, 35]. Bridgeless
configurations of SEPIC and Zeta converters with high
frequency isolation have also been presented in [36-37] and
[38] respectively.
Table-I shows a comparison of various bridgeless PFC
converter configurations. This comparison is made on the
basis of number of components, conducting components
during half period of line cycle, suitability to variable voltage
applications, high frequency isolation and complexity of the
gate drivers. Many of these configurations require high-low
side and isolated gate driver circuits. The high low side gate
drivers use bootstrap circuits for gating two solid-state
switches of the PFC converter. Moreover, the isolated gate
drivers use pulse transformers for isolating two gate pulses for
two solid-state switches of the PFC converter. Therefore, these
features increase the cost and the complexity of gate drivers.
High Frequency Transformer), C - Capacitors, T - Total components,
T/2 - Devices conducing in half cycle of supply voltage
SB Suitability to variable voltage applications
Isol. - High frequency isolation (Galvanic isolation)
Drv. Cmp.- Gate Driver Complexity: Isol. - Isolated Gate Driver,
LS - Low Side Gate Driver, H/L- High and Low Side Gate Driver
However, the proposed PFC bridgeless isolated-Cuk converter
uses a low side gate driver which is simple in design and a
single gate driver can also be used to trigger both solid-state
switches of the PFC converter at same instant.
II. PROPOSED PFC BRIDGELESS ISOLATED-CUK CONVERTER
FED BLDC MOTOR DRIVE
Fig. 1 shows the proposed PFC bridgeless isolated-Cuk
converter fed BLDC motor drive. A single-phase supply
followed by a LC-filter is used to feed a bridgeless isolated-
Cuk converter. This maintains the required DC link voltage of
the VSI and provides power factor correction at AC mains.
The proposed PFC converter is designed to operate in DICM
to act as an inherent power factor corrector. The DC link
voltage of the VSI is controlled for adjusting the speed of the
BLDC motor. The VSI feeding the BLDC motor is operated in
a low frequency switching to achieve an electronic
commutation of BLDC motor for reduced switching losses.
The proposed configuration uses a single voltage sensor to
control the DC link voltage for speed control of BLDC motor.
The proposed drive is designed and its performance is
validated on a developed prototype for improved power
quality at AC mains for a wide range of speed control and
supply voltages. Specifications of a BLDC motor selected for
experimental studies are given in Appendix-A.

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This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI
10.1109/TIE.2014.2384001, IEEE Transactions on Industrial Electronics
IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS

Fig. 1. Proposed configuration of a bridgeless isolated Cuk converter feeding BLDC motor drive.

III. OPERATION OF PFC BASED BRIDGELESS ISOLATED-CUK
CONVERTER
The operation of proposed PFC converter is classified into
two different sections for a line cycle and a switching cycle.
Fig. 2 shows six different modes of operation. Moreover, Fig.
3 shows the associated waveforms of the PFC converter
during a complete switching period.
A. Operation during Complete Line Cycle of Supply Voltage
The proposed bridgeless isolated-Cuk converter is designed
such that switches Sw1 and Sw2 conduct for positive and
negative half cycles of supply voltage respectively. During the
positive half cycle of supply voltage, switch Sw1, inductors Li1
and Lo1, intermediate capacitors C11 and C21 and diodes D1 and
Dp are in state of conduction and vice-versa for negative half
cycle of supply voltage as shown in Figs. 2 (a-f). As shown in
these figures, the proposed PFC converter operates in three
different modes during the positive and negative half cycles of
the supply voltage. Moreover, during the DICM operation, the
current of output inductors (Lo1 and Lo2) becomes
discontinuous in a switching period. However, the current
flowing in input and magnetizing inductance of HFT (Li1, Li2,
Lm1 and Lm2) and voltage across the intermediate capacitor
(C11, C12, C21 and C22) remain continuous in a complete
switching period.
B. Operation during Complete Switching Cycle
Figs. 2 (a-c) show three modes of operation of a bridgeless
isolated-Cuk converter in a switching period for positive half
cycle of supply voltage. Fig. 3 shows its associated waveforms
in DICM (Lo) mode of operation as follows.
Mode P-I: In this mode, when switch (Sw1) is turned-on, the
input inductor (Li1), output inductor (Lo1) and magnetizing
inductance of high frequency transformer (HFT) (Lm1) start
charging as shown in Fig. 2 (a). The input side intermediate
capacitor (C11) supplies the energy to the HFT and output side
intermediate capacitor (C21) supplies the required energy to the
DC link capacitor as shown in Fig. 3.
Mode P-II: When switch (Sw1) is turned-off, input inductor
(Li1), output inductor (Lo1) and magnetizing inductance of HFT
(Lm1) start discharging as shown in Fig. 2 (b). The intermediate
capacitors (C11 and C21) charge and the DC link capacitor (Cd)
discharges in this interval as shown in Fig. 3.
Mode P-III: During this interval, the output side inductor
(Lo1) is completely discharged and the input inductor (Li1) and
magnetizing inductance of HFT (Lm1) continue to discharge as
shown in Fig. 2(c). The output side intermediate capacitor
(C21) continues to charge and the DC link capacitor (Cd)
supplies the required energy to BLDCM as shown in Fig. 3.
In a similar way, the operation for the negative half cycle of
the supply voltage is realized.
Initially, the intermediate capacitors (C11, C12, C21 and C22)
are completely discharged and are charged during the
operation of the PFC converter. The voltage across the input
side intermediate capacitors (C11 and C12) depends upon the
instantaneous input voltage; hence, the initial charging of C11
and C12 is zero. However, the output side intermediate
capacitors (C21 and C22) are not completely discharged in a
switching period or a half line cycle of supply voltage due to
the voltage maintained at the DC link capacitor (Cd).
Moreover, during the operation of PFC converter in positive
half cycle; the energy storage components on the primary side
of the HFT (i.e. Li2, C12 and Lm2) remain in non-conducting
state and are completely discharged. However, the energy
storage components on the secondary side of HFT (i.e. C22)
remain charged at its full voltage due to the unavailability of
discharging path and the presence of DC link capacitor (Cd).
IV. DESIGN OF BRIDGELESS ISOLATED-CUK CONVERTER
A bridgeless isolated-Cuk converter is designed to operate
in DICM such that the current flowing in the output inductors

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This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI
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(a) Mode: P-I (d) Mode: N-I

(b) Mode: P-II (e) Mode: N-II

(c) Mode: P-III (f) Mode: N-III

Fig. 2. Different modes of operation of bridgeless isolated Cuk converter during positive (a-c) and negative (d-f) half cycle of supply voltage.

(Lo1 and Lo2) becomes discontinuous in a switching period. A

N2 D
Vdc =
N ( 1 - D ) in
V (3)
PFC converter of 250 W (Pmax) is designed for the selected
BLDC motor (Specifications given in Appendix). For a wide 1
range of speed, the DC link voltage is controlled from 50 V where D represents the duty ratio and (N2 / N1) is the turns
(Vdcmin) to rated voltage of 130 V (Vdcmax) with supply voltage ratio of the HFT which is taken as for this application.
variation from 170 V (Vsmin) to 270 V (Vsmax). The instantaneous value of duty ratio, D(t) depends on the
The input voltage, vs applied to the PFC converter as, input voltage and DC link voltage. Instantaneous duty ratio,
D(t) is obtained by substituting (2) in (3) and as,
( )
vs (t) = Vm Sin 2f Lt = 220 2 Sin ( 314t ) (1)
Vdc Vdc
D(t) = = (4)
where Vm is peak input voltage (i.e. 2VS), fL is line frequency ( N2 N1 ) Vin (t)+Vdc ( N2 N1 ) VmSin ( t ) +Vdc
i.e. 50 Hz.
Now, the instantaneous value of rectified voltage is as, Since the speed of BLDC motor is controlled by varying the
DC link voltage of VSI, therefore the instantaneous power, Pi
Vin (t) = Vm Sin ( t ) = 220 2 Sin ( 314t ) (2) is taken as linear function of Vdc as,

where | | represents the modulus function. Pmax

Pi = Vdc (5)
The output voltage, Vdc of a bridgeless isolated-Cuk
Vdcmax
converter which is a buck-boost configuration is given as [11],

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This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI
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The maximum current ripple in an inductor occurs at the

maximum power and at minimum value of supply voltage (i.e.
Vsmin). Hence the output inductor is calculated at the peak of
supply voltage (i.e. Vin = 2Vsmin).
The critical value of output side inductors is calculated at
the minimum (Loc50) and maximum (Loc130) values of DC link
voltages using (7) as 459.79 H and 811.93 H respectively.
Hence, the critical value of output inductor is selected lower
than minimum value i.e. Loc50 to ensure a discontinuous
conduction even at lower values of DC link voltages [39].
Therefore, the output inductor (Lo1, Lo2) of 70 H is selected
for its operation in discontinuous conduction.
The value of magnetizing inductance of HFT to operate in
CICM is decided by the permitted ripple current () as [11],
V {1 - D(t)} VS
2
1 Vdc
Lm1,2 = dc = (8)
I Lm (t)nf S Pi fS nVin ( t ) +Vdc
The maximum current occurs at maximum DC link voltage
(i.e. Pmax) and the minimum supply voltage (i.e. Vsmin).
Therefore, the value of magnetizing inductance (Lm1, Lm2)
for a permitted ripple current () of 50 % is calculated using
(8) as 6.006 mH and is selected as 6 mH.
The value of input side intermediate capacitors to operate in
CCM with a permitted ripple voltage of % of VC1 is as [11],
Fig. 3. Waveforms of proposed converter in complete switching cycle. Vin n{D ( t )}2
2
C 11,12 =
VC1 ( t ) R L f S {1 - D ( t )}
where Vdcmax represents maximum DC link voltage and Pmax is (9)
the rated power of the PFC converter. nPi
=
Using (5), the minimum power at minimum DC link voltage ( 2V s ) fS (n 2V s + V dc )
of 50 V (Vdcmin) is calculated as 96 W (Pmin).
The input side intermediate capacitors (C11 and C12) are
The value of input inductor to operate in continuous calculated at maximum value of voltage ripple corresponding
conduction is decided by the amount of permitted ripple to maximum supply voltage (Vsmax) and at rated DC link
current () and is given as [12], voltage. Now, for a permitted ripple voltage of 25 %, the value
of C11 and C12 are calculated using (9) as 204 nF and are
Vin (t)D(t) Vs2
1 Vdc
Li1,2 = = (6) selected as 220 nF.
I in (t)f S f S Pi nVin ( t ) +Vdc The value of output side intermediate capacitors to operate
where fs is the switching frequency which is taken as 20 kHz. in CCM with permitted ripple voltage of % of VC2 is as [11],
The maximum inductor ripple current is obtained at the Vdc D ( t ) Pi
C 21,22 = = (10)
rated condition i.e. Vdcmax (Pi = Pmax) for a minimum value of
supply voltage (Vsmin). Hence, the input side inductor is
VC2 ( t ) R L f S (
Vdc f S n 2Vs + Vdc )
designed at peak value of minimum supply voltage (2Vsmin). Now the maximum ripple voltage occurs at rated condition
Using (6), the value of input side inductors (Li1, Li2) is and at maximum value of DC link voltage (Vdcmax). Hence the
calculated as 5.005 mH for a permitted current ripple of 50 % output side intermediate capacitor (Cd) is calculated at
() of input current. Hence the input side inductor of 5 mH is maximum permitted ripple voltage of 10% () of VC21, 22 at
selected for its operation in continuous conduction. maximum (C2c270) and minimum (C2c170) value of supply
The critical value of output side inductor (Loc) to operate at voltage as 2.99 F and 3.84 F respectively. Therefore, the
the boundary of CICM and DICM is as [12], output side intermediate capacitors (C21, C22) are selected
higher than C2c85 of the order of 4.4 F.
Vdc {1 - D(t)} Vdc D(t)
Loc = = The value of DC link capacitor (Cd) is calculated as [11],
2I Lo (t)f S 2I in (t)f S
(7) P
I dc 1
RinVdc D(t) V2 Vdc Vdc Cd = = i (11)
= = S 2V ( t ) f nV ( t ) +V 2Vdc Vdc 2 Vdc ( )
2Vin (t)f S Pi in S in dc

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This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI
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where Vdc represents the permitted ripple in DC link voltage.
The worst case design occurs for the minimum value of DC
link voltage i.e. 50 V. Hence, for a permitted ripple voltage of
3 % (), the value of DC link capacitor is calculated using (11)
as 2038 F and it is selected as 2200 F.
A low pass LC filter is used to avoid the reflection of higher
order harmonics in the supply system. The maximum value of
filter capacitance (Cmax) is given as [40],
C max =
Im
tan() =
( Pmax 2 Vs ) tan()
LVm L 2Vs
where is the displacement angle between fundamental value
of supply voltage and supply current and is taken as 2.
The maximum value of filter capacitor is calculated using
(12) as 574.4 nF and is selected as 330 nF.
The value of filter inductor is designed by considering the
source impedance (Ls) of 4-5% of the base impedance. Hence
the additional value of inductance required is given as,
L f = Lreq + Ls Lreq = L f - Ls
1 1 Vs 2
Lreq = 2 2 - 0.025
4 fc C f L Po
where fc is the cut-off frequency which is selected such that
fL < fc < fS. Therefore fc is taken as fS/10.
Hence the value of filter inductance is calculated using
(13) as 3.77 mH.
V. CONTROL OF PFC BRIDGELESS ISOLATED-CUK
CONVERTER FED BLDC MOTOR DRIVE
The control of proposed BLDC motor drive is divided into
two categories of control of PFC converter for DC link voltage
control and control of three-phase VSI for achieving the
electronic commutation of BLDC motor as follows.
A. Control of Front-End PFC Converter
A voltage follower approach is used for the control of PFC
based bridgeless isolated-Cuk converter operating in DICM.
This control scheme consists of a reference voltage generator,
voltage error generator, voltage controller and a PWM
generator. A Reference Voltage Generator generates a
reference voltage Vdc* by multiplying the reference speed (*)
with the motors voltage constant (kv) as,
Vdc * = kv *
The Voltage Error Generator compares this reference DC
link voltage (Vdc*) with the sensed DC link voltage (Vdc) to
generate an error voltage (Ve) given as,
Ve (k) = Vdc ( k ) * -Vdc ( k )
where k represents the kth sampling instance.
This error voltage, Ve is given to a voltage PI (Proportional-
Integral) controller to generate a controlled output voltage
(Vcc) which is expressed as,
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Vcc ( k ) = Vcc ( k-1) + K p {Ve ( k )-Ve ( k-1)} + KiVe ( k ) (16)
where Kp and Ki are the proportional and integral gains of the
PI controller (values given in Appendix).
Finally the PWM signals for switch Sw1 and Sw2 are
generated by comparing the output of PI controller (Vcc) with
high frequency saw-tooth signal (md) given as,
if md < Vcc then PWM Sw1 = 'ON'
ForVS > 0;
(12)
if md Vcc then PWM Sw1 = 'OFF' (17)
if md < Vcc then PWM Sw2 = 'ON'
ForVS < 0;
if md Vcc then PWM Sw2 = 'OFF'
where PWMSw1 and PWMSw2 represent the gate signals to PFC
converter switches Sw1 and Sw2 respectively.
In this control algorithm, (17) shows the solid-state switches
of the PFC converter operating at half cycles of supply
voltages. However, to avoid the sensing of supply voltage for
zero crossing detection (ZCD), only one PWM signals is
generated to drive both solid-state switches of the PFC
(13) converter i.e. PWMSw1 = PWMSw2. Moreover, the PFC
converter is operating in DCM, therefore, the input current
shaping in phase with the supply voltage is obtained inherently
and a unity power factor is achieved at the AC mains [11].
B. Control of BLDC Motor: Electronic Commutation
An electronic commutation of the BLDC motor includes
proper switching of the VSI in such a way that a symmetrical
DC current is drawn from the DC link capacitor for 120 and
is placed symmetrically at centre of back-EMF of each phase
[22]. A Hall-Effect position sensor is used to sense the rotor
position on a span of 60; which is required for electronic
commutation of the BLDC motor. As shown in Fig. 1, when
two switches of the VSI i.e. S1 and S4 are in conducting states,
a line current iab is drawn from the DC link capacitor which
magnitude depends on the applied DC link voltage (Vdc), back-
EMFs (ean and ebn), resistances (Ra and Rb) and self and
mutual inductance (La, Lb and M) of stator windings [22]. This
current produces an electromagnetic torque (Te) which in-turn
increases the speed of the BLDC motor.
VI. RESULTS AND DISCUSSION
The performance of the proposed BLDC motor drive is
validated on a developed hardware prototype. A digital signal
(14) processor (DSP- Texas Instruments TMS320F2812) is used
for the development of the proposed drive. An opto-isolation
is provided between DSP and gate driver of the VSI and PFC
converter switches. Hall signal filtering and power circuitries
are also developed for Hall Effect position sensors. Moreover,
a DSP based moving average filter (MAF) is also designed for
(15) Hall signal filtering to obtain an improved rotor position
sensing for satisfactory operation of BLDC motor [41]. Test
results of the proposed BLDC motor drive obtained on a
developed prototype are discussed as follows.
This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI
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IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS

Ch.1(Vs): 500V/div.
Vs
Ch.1(Vs): 500V/div. Vs

is
PFC Operation Ch.2(is): 5A/div. i
Li1
Ch.2(i ): 5A/div.
Li1
V Ch.3(V ): 100V/div.
dc dc
ia Ch.3(i ): 5A/div.
Li2
i
Li2 Conduction in alternate period
Ch.4(ia ): 2A/div.

(a) (a)
Ch.1(Vs): 500V/div.

Vs Vs
Zoomed
Ch.1(Vs): 500V/div.

is i
Lo1
PFC Operation Ch.2(is): 2A/div.
Ch.2(i ): 5A/div.
Lo1
V Ch.3(V ): 50V/div.
dc dc

ia i
Lo2 Ch.3(i ): 5A/div.
Ch.4(ia ): 2A/div. Lo2

(b) (b)
Fig. 4. Test results of the proposed drive during its operation at rated loading
condition with DC link voltage as (a) 130 V and (b) 50 V.

Vs
A. Steady State Performance of Proposed Drive Ch.1(Vs): 500V/div.

Figs. 4 (a) and 4 (b) show the test results of the proposed
BLDC motor drive operating at rated load with supply voltage
as 220 V and DC link voltage of 130 V and 50 V respectively. i Ch.2(i ): 2A/div.
HFTp1 HFTp1
As shown in these figures, the DC link voltage is maintained
at desired reference value and different magnitude and
frequency of the stator current demonstrate the operation of
BLDC motor at different speeds. A sinusoidal supply current i Ch.3(i ): 5A/div.
HFTs1 HFTs1
in phase with supply voltage is obtained which shows a near
unity power factor at both values of DC link voltages. The
obtained power quality indices at the AC mains in both the
(c)
mentioned cases are discussed in sub-section C. Fig. 5. Test results of the proposed drive during its operation at rated
B. Performance of PFC Bridgeless Isolated-Cuk Converter condition showing (a) input inductor currents (b) output inductors current and
(c) HFT currents.
Figs. 5 (a), 5 (b) and 5 (c) show the current in input inductors
(iLi1, iLi2), output inductors (iLo1, iLo2) and high frequency
The template of voltage and current of the PFC converter
transformer (iHFT_p and iHFT_s) respectively. A continuous
switch and its enlarged waveform are shown in Figs. 7 (a) and
current in the input inductors and a discontinuous current in
7 (b) respectively. A peak voltage and current stresses of 680
the output inductors are achieved, which confirms the DICM
V and 19 A are observed as shown in Fig. 7 (b); which is
operation of the PFC converter. As shown in these figures,
acceptable for a PFC converter operating in DICM. Moreover,
alternate inductors are conducting in a half line cycle of
as shown in Figs. 7 (a) and 7 (b), the current in the PFC
supply voltage, which confirms the bridgeless operation of the
converter switches flows for a half cycle of supply voltage;
PFC converter. Moreover, the continuous voltage across the
therefore, the rms current flowing in the switch also reduces to
input and output side intermediate capacitors is achieved as
half. This reduces the conduction losses in the individual solid
shown in Figs. 6 (a) and 6 (b) respectively.

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This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI
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IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS
Vs
Ch.1(Vs): 500V/div.
V sw1
C11 Ch.2(V ): 250V/div.
C11
V Ch.3(V ): 250V/div.
C12 C12
(a)
Ch.1(Vs): 500V/div.
Vs
V Ch.2(V ): 100V/div.
C21 C21
V Ch.3(V ): 100V/div.
C22 C22
(b)
Fig. 6. Test results of the proposed drive during its operation at rated
condition showing intermediate capacitors voltages (a) VC11 and VC12 and (b)
VC21 and VC22.
state switch of PFC converter. Hence, the heat dissipation
corresponding to such reduced conduction losses is also very
low which leads to a lower size of heat sink required per
switch. However, two switches are required for the bridgeless
PFC converter which require two heat sinks; hence, the size of
the PFC converter increases. Moreover, single diode (either Dp
or Dn) is conducting in each half line cycle of the supply
voltage, hence the conduction losses as compared to the DBR
are also reduced.
C. PFC and Improved Power Quality at AC Mains
This section deals with the obtained power quality indices
at AC mains for the operation of the proposed BLDC motor
drive at different values of DC link voltages and supply
voltages. A power analyzer (Fluke make) is used for the
measurement of power quality indices at AC mains. Various
power quality indices are obtained from three different types
of recorded waveforms. First set of waveform of four different
cases (Figs. 8 (a), (d), (g), (j)) show the root mean squared
(RMS) value, frequency and the crest factor (CF) of supply
voltage and supply current, respectively. The second set of
waveforms (Figs. 8 (b), (e), (h), (k)) show the active, reactive
and apparent powers, power factor (PF) and displacement
power factor (DPF) at AC mains. Moreover, the third set of
waveforms (Figs. 8 (c), (f), (i), (l)) show the harmonic spectra
and the obtained THD of supply current at AC mains.
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V Ch.1(V ): 500V/div.
sw1 sw1
Ch.2(i ): 20A/div.
i sw1
Ch.3(V ): 500V/div.
sw2
V
sw2
i
sw2 Ch.4(i ): 20A/div.
sw2
(a)
V Ch.1(V ): 200V/div.
sw1 sw1
i Ch.2(i ): 10A/div.
sw1 sw1
(b)
Fig. 7. (a) Test results of the proposed drive during its operation at rated
condition showing (a) voltage and current stress on PFC converter switches
and (b) its enlarged waveforms.
Figs. 8 (a-c) and (d-f) show the performance of proposed
drive at rated supply voltage with a DC link voltage as 130 V
and 50 V respectively. A near unity power factor is achieved
at the AC mains in both the cases as shown in Fig. 8 (b) and
Fig. 8 (e). Moreover, Figs. 8 (g-i) and (j-l) show performances
at rated DC link voltage and rated load on the BLDC motor
with supply voltages as 170 V and 270 V respectively. An
improved power quality is achieved at AC mains satisfying
IEC 61000-3-2 [9].
D. Dynamic Performance of Proposed Drive
Fig. 9 shows the dynamic performance of the proposed
BLDC motor drive at starting, speed control and supply
voltage fluctuations. Fig. 9 (a) shows the performance of
proposed BLDC motor drive during starting at DC link
voltage of 50 V. A limited inrush current within the maximum
current limit of the stator windings is drawn from the DC link
capacitor and the supply system. Fig. 9 (b) shows the dynamic
performance during speed control corresponding to step
change in DC link voltage from 50 V to 100 V. Moreover, the
dynamic behavior of the proposed drive during supply voltage
fluctuations corresponding to step change in supply voltage
from 250 V to 200 V is shown in Fig. 9 (c). A smooth
variation of the DC link voltage with limited stator current is
obtained in all these cases which demonstrate a satisfactory
performance of the proposed BLDC motor drive.
This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI
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IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS

(a) (d) (g) (j)

(b) (e) (h) (k)

(c) (f) (i) (l)

Fig. 8. Performance of the proposed drive at rated condition with (a-c) Vdc = 130 V and vs = 220 V, (output power, Pout = 188 W and effficiency, = 75.8 %)
(d-f) Vdc = 50 V and vs = 220 V, (g-i) Vdc = 130 V and vs = 170 V and (j-l) Vdc = 130 V and vs = 270 V.

E. Comparison of Efficiency of Proposed PFC Converter

with PFC Boost-Flyback Converter
The measured efficiency of the proposed bridgeless
isolated-Cuk converter is evaluated at different values of DC
link voltages, supply voltages and loading conditions.
Moreover, the efficiency of this bridgeless PFC converter is
also compared with the two-stage boost-flyback converter.
The circuit configuration of a boost-flyback converter is
shown in Fig. 10. This converter consists of a PFC boost
converter operating in DCM followed by a flyback DC-DC
converter operating in CCM. Fig. 11 (a) shows the efficiency
of the proposed bridgeless isolated Cuk converter and boost-
flyback converter at different values of DC link voltages with
load resistance kept at a fixed value of 67.6 . Moreover,
Figs. 11 (b) and 11 (c) show the efficiency at two different DC
link voltages of 130 V and 50 V for varying supply voltages
and load. As shown in these figures, the efficiency of a boost-
flyback converter is little higher as compared to the proposed
bridgeless isolated Cuk converter due to low number of
components conducting during a line cycle. However, two
stages in the boost-flyback PFC converter have to be
controlled individually for DC link voltage control and
maintaining the desired unity power factor at the AC mains.
This increases the cost on account of two voltage sensors
required for power factor correction and DC link voltage
control respectively and thus, increasing the overall
complexity of the system.
F. Comparative Analysis of Proposed Drive
This section deals with a comparative study of three
configurations of BLDC motor drive. The proposed
configuration is compared with a conventional DBR fed
BLDC motor drive and a conventional single-switch PFC
converter feeding BLDCM drive via a PWM based switching
of VSI. Fig. 12 (a) shows the losses in different sections of the
conventional schemes and the proposed BLDC motor drive
and Fig. 12 (b) shows the efficiency comparison. The losses in
VSI of the two conventional schemes are higher on account of
its operation at high frequency switching which results in
higher switching losses. However, due to losses in PFC
converter; total losses of the proposed drive are higher as
compared to DBR fed BLDC motor drive. But, power factor
correction and improved power quality operation cannot be
achieved in such BLDC motor drive fed by a DBR and
therefore not a recommended solution. Moreover, both
conventional and proposed scheme with PFC give a good
power quality performance. However, the conventional
scheme has a low efficiency due to high switching losses in
PWM based switching of the VSI feeding BLDC motor.

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This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI
10.1109/TIE.2014.2384001, IEEE Transactions on Industrial Electronics
IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS

Vs Ch.1(Vs): 500V/div.

is
Ch.2(is): 2A/div.
V *dc

Ch.3(V ): 50V/div.
dc
V Fig. 10. Circuit configuration of a two-stage boost-flyback converter.
dc
ia
Ch.4(ia ): 5A/div. TABLE II
COMPARATIVE ANALYSIS OF PROPOSED CONFIGURATION WITH
CONVENTIONAL SCHEMES
(a)
Schemes
Conventional Conventional
Proposed
Attributes (No PFC) (PFC)

Ch.1(Vs): 500V/div. Variable DC Bus - No Yes

Vs
Current Current Electronic
Control
Controlled Controlled Commutation
(BLDC Motor)
Ch.2(is): 2A/div. (Complex) (Complex) (Simple)
is
Voltage Voltage
Control (PFC) -
Follower Follower
V V *dc Sensor 2-Current + 2-Current +
dc Ch.3(V ): 50V/div. 1-Hall
dc (BLDC Motor) 1-Hall 1-Hall
Sensor (PFC) - 1-Voltage 1-Voltage
ia Losses (DBR+ PFC) - Low Medium
Ch.4(ia ): 5A/div. Losses (VSI) High High Low
PFC - Yes Yes
(b) Power Density High High Medium
Cost of PFC
- Medium High
Converter
Cost of Sensors
Ch. 1(VS): 500V/div. High High Medium
VS Step Change in Supply Voltage and DSP

iS
Ch. 2(iS): 5A/div.
Vdc
Ch. 3(Vdc): 100V/div.
ia Ch. 4(ia ): 5A/div.
(c)
Fig. 9. Test results of the proposed drive during (a) starting at DC link voltage
of 50V, (b) speed control corresponding to change in DC link voltage from
50V to 100V and (c) supply voltage fluctuation from 250V to 200V.
Table-II presents a comparative evaluation of the proposed
configuration with the conventional scheme of BLDC motor
drive. This evaluation is based on the control requirements,
sensor requirements and losses in PFC converter and VSI fed
BLDC motor. The proposed configuration requires a single
voltage sensor and a simple control loop for DC link voltage
control; therefore, a low cost processor can be used for the
development purpose. Moreover, the BLDC motor is operated
in electronic commutation; hence, two current sensors
required for current control in the conventional schemes are
also eliminated in the proposed configuration. This further
reduces the overall cost of the BLDC motor drive system.
Moreover, higher efficiency due to lower switching losses
in the VSI, requirement of minimum sensing and a much
simple approach of speed control at reduced cost makes the
proposed drive an ideal choice for low power applications.
VII. CONCLUSION
A new configuration of bridgeless isolated-Cuk converter fed
BLDC motor drive has been proposed for low power
household appliances. The speed control of BLDC motor has
been achieved by controlling the DC link voltage of VSI
feeding BLDC motor. This has facilitated the operation of VSI
in low frequency switching mode for reducing the switching
losses associated with it. This bridgeless isolated-Cuk
converter has been designed for the elimination of diode
bridge rectifier at the front-end for reducing the conduction
losses in the front-end converter. This PFC converter has been
operated in DICM for DC link voltage control and inherent
power factor correction is achieved at the AC mains. A
prototype of proposed drive has been implemented using a
DSP. Satisfactory test results for proposed bridgeless isolated-
Cuk-converter fed BLDC motor has been evaluated for its
operation over complete speed range. Moreover, the
performance of proposed drive is also evaluated for operation

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This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI
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IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS

90
Boost + Flyback Converter 100 Conventional (No PFC)
Bridgeless Isolated Cuk Converter
85 Conventional (PFC)
80 Proposed
Efficiency (%)

80 60

Losses (W)
75 40

70 20

65 0
50 60 70 80 90 100 110 120 130 DBR DBR VSI BLDC TOTAL
PFC
DC Link Voltage (V) + PFC MOTOR

(a) (a)

100 Boost + Flyback Converter (130 V) 80

Conventional (No PFC)
Bridgeless Isolated Cuk Converter (130 V) Conventional (PFC)
95
Boost + Flyback Converter (50 V) 75
Bridgeless Isolated Cuk Converter (50 V) Proposed
90
Efficiency (%)

Efficiency (%)
85 70
80
75 65

70
60
65
60 55
170 180 190 200 210 220 230 240 250 260 270 50 60 70 80 90 100 110 120 130
Supply Voltage (V) DC Link Voltage (V)

(b) (b)

100 Fig. 12.. Comparison of (a) losses at various stages of BLDC motor drive and
Boost + Flyback Converter (130 V)
95 (b) efficiency of the proposed PFC based BLDC motor drive with
Bridgeless Isolated Cuk Converter (130 V) conventional techniques.
90 Boost + Flyback Converter (50 V)
85 B. Controller Gains and Parameters
Efficiency (%)

80
75 Proportional Gain (Kp) = 0.3, Integral Gain (Ki) = 0.001,
70 Gain margin (GM)) = 86 dB, Phase Margin (PM)
( = 42.5 and
65 Band-width (BW) = 3.6 rad/sec.
60
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10.1109/TIE.2014.2384001, IEEE Transactions on Industrial Electronics
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Vashist Bist (S13) received his Diploma and
B.E. in Instrumentation and Control Engineering
from Sant Longowal Institute of Engineering and
Technology (SLIET Longowal), Punjab, India in
2007 and 2010 respectively. He is currently pursuing
his PhD in the Department of Electrical Engineering,
Indian Institute of Technology Delhi. His areas of
interests include power electronics, electrical
machines and drives. He is a student member of
IEEE.
Bhim Singh (SM99, F10) received B.E. in
Electrical Engineering from University of Roorkee,
India, in 1977 and his M.Tech. and Ph.D. from IIT
Delhi, India, in 1979 and 1983. In 1983, he joined
Electrical Engineering Department, University of
Roorkee, as a Lecturer, and became a Reader in
1988. In December 1990, he joined Electrical
Engineering Department, IIT Delhi, as an Assistant
Professor. He became an Associate Professor in
1994 and a Professor in 1997.
His fields of interest include power electronics, electrical machines, electric
drives, power quality and renewable energy.
Prof. Singh is a Fellow of the Indian National Science Academy (FNA), the
Indian National Academy of Engineering (FNAE), The National Academy of
Science, India (FNASc), The Indian Academy of Sciences, India (FASc), The
World Academy of Sciences (FTWAS), The Institutions of Electronics and
Telecommunication Engineers (FIETE), the Institute of Engineering and
Technology (FIET) and the Institution of Engineers (India) (FIE).