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The AFDX standard brings

telecom Ethernet-based
technology to the Airbus A380

© IMAGESTATE

AFDX-Based Flight
Test Computer Concept

ith the introduction of the Airbus A380, the commercial aircraft

Frederic Brajou
W industry was in the process of defining new standards that incorpo-
rate the latest digital information techniques, such as the Avionics
Full-Duplex Switched Ethernet (AFDX) on-board, real-time network.
The AFDX standard, a major innovation in aircraft technology first deployed on the
Airbus A380 (see Figure 1), introduces telecom Ethernet-based technology as well as a
and Philippe Ricco switch connection topology, rather than part-to-part links or buses.
Airbus and Creative Electronic Systems (CES) partnered to develop a general-purpose
building block that allows the simulation, test, or connection of any AFDX-connected
equipment. The system is integrated into different packages, ranging from the small equip-
ment tester or the complete aircraft integration test bench up to the full flight test computer.
Appropriately, the system’s complete name is the AFDX General-Purpose Test Platform.
In the flight test applications, the system provides the interface between the AFDX
avionic world and the commercial Ethernet switches through multiple AFDX inputs to a
twin Ethernet output router. Redundancy and precise time control of the data transmis-
sion are key elements of the specification.
Also of special interest is a very advanced source-synchronized datation system able
to guarantee a perfect time alignment of all data directly at the point of entry in the flight
test computer.
This article describes the different modular elements of the ground and flight
test computers, as well as the hardware and software tuning and performance anal-
ysis tools that have been developed around these computers. All of these elements
are now in operation and have demonstrated the utility of the AFDX tools as real con-
cepts that can be reused for other programs.
The rapid evolution of the computer and technological fields continuously creates oppor-
tunities to develop new services in commercial aviation and to enable lower weight and cost
in aircraft design. The critical safety level, life duration requirements, and certification cycle

This article first appeared in its original form at AUTOTESTCON 2004.

August 2005 IEEE Instrumentation & Measurement Magazine 55


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slow down this technological progress, meaning that it takes Of course, the very high-level security requirement of air-
years for a new technology to be introduced on a commercial craft development necessitates adaptations of the commer-
aircraft. For example, the enhancement of processing capabili- cial components and principles to insure the complete
ties and the now well-known network principles are just being independence of functions and avoid service failure while at
introduced in the latest generation of aircraft, such as the the same time guaranteeing service. These principles were
Airbus A380, through the use of the new integrated modular developed in the ARINC 653 standard, which defines strong
avionics (IMA) and AFDX standards. partitioning rules with protections and independence verifi-
cations and defines communication interfaces between these
AFDX partitions [application executive (APEX)]. Also, the AFDX is
With the impressive processor evolution, on-board aircraft not just a standard Ethernet network; it includes switching
computers can now be safely used for multiple applications technology, deterministic properties, and a specific band-
with the same device. To guarantee the same security level width allocation strategy, with strong separation between
while conducting multiple activities, rather than using sepa- data flows. It also ensures a hardware redundancy, with spe-
rate devices for each function, the IMA principle was intro- cific address management and a protocol stack. The ARINC
duced in the aviation world. With the same spirit, the data 653 rules found direct application in the AFDX specification.
transmission process for network technology is now mature
enough to replace, in most cases, the old specialized avionic CES Modular Test Elements
buses. This is the goal, in particular, of the new ARINC 664 For years, CES developed modular processing units and,
standard, with the development of the AFDX avionic-specif- with the Airbus flight test equipment team, built ground
ic adaptation of the numeric network principles (ARINC and flight test systems based on this modular technology
664–Part 7). The use of these new technologies can improve (see Figure 2). CES was also selected by Airbus as a partner
service capabilities, improve scalability and save weight by in developing a specific, highly versatile AFDX test board
using common resources (multifunction computers and wire suitable for all types of test benches. This board, built on the
concentration), and save costs by using well-developed and CES modular devices, provides a wide range of test applica-
improved components. tions including: raw network traffic analysis, cables and
hardware test benches, traffic generation, both 10- and 100-
Mb/s link speeds, error injection, mono or multiple end-sys-
tem emulation, various data management strategies,
simulation, complete AFDX stack, all addressing modes,
IEEE 802.3 compliance analysis, redundancy management
and separate flow capabilities, switch scheduling emulation,
event generation, triggering, filtering, and detailed statistics.
The AFDX general-purpose test board is based on the
CES PCI mezzanine card (PMC) form-factor multifunction
processor board, called the multifunction computing core
(MFCC). This CES standard PMC is part of the complete
PowerPC-based board family, which includes the VME,
Fig. 1. The Airbus A380. CompactPCI, and PMC form-factor boards. The MFCC pro-
vides an on-board PowerPC CPU and an application-free
field-programmable gate array (FPGA), with both front-end
and PCI line control capabilities. A front-end electrical adap-
tor module completes the MFCC CPU module, with a stan-
dard connector to achieve the PMC format. For the AFDX
test board, an AFDX front-end adaptor (typically called the
“nose;” see Figure 3) was developed with Airbus to provide
the AFDX twin-Ethernet connector on the front-end, com-
plete with various I/Os such as signal dating, external syn-
chronization and triggers, and serial link.
The CES AFDX PMC also provides a 1-µs dating capabili-
ty, with better than 1-ppm precision for all internal events,
such as frame acquisition or trigger detection. The nose
includes a variable oscillator for local time reference source
and a temperature sensor for base timing compensation. The
FPGA also includes a synchronization algorithm to drive its
internal dating source and continuously adapt it to an
Fig. 2. CES modular function units. external timing source (1-Hz signal for synchronization and

56 IEEE Instrumentation & Measurement Magazine August 2005

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a serial-coded date) from the front-end connector or by the The controller functional unit manages the entire IENA
backplane PCI line. system. This RIO3 controls the system configuration and
Based on the same MFCC board, CES has developed the current state of each functional unit in the system,
another front-end adaptor (with its associated FPGA pro- manages the hardware chassis controls (power supply,
gramming) to create a global synchronization PMC. This fans, etc.), and concentrates the IENA formatted data com-
PMC can receive external dating sources with various for- ing from the data acquisition units, including statistics
mats, including IRIG-B and 1-Hz top from a global position- information. The IENA formatted frames are transmitted
ing system (GPS) station. This PMC distributes the to the N4 storage and analysis levels by two parallel 100-
synchronization signals (1 Hz and serial date) through both Mb/s, full-speed redundant links.
front-end and back-end connectors. CES has developed two chassis versions: a ground ver-
CES has developed a complete family of functional units sion with commercial boards and a flight version using
that provides a large compatibility and homogeneous soft- extended versions of the boards without any software modi-
ware communication layer, based on the same modular fication (see Figure 5). The flight chassis is able to embed two
architecture, for a large family of avionic-oriented links complete IENA systems to provide two independent sys-
(MIL-STD 1553, STANAG 3838, ARINC 429, and CANBUS). tems in one computer for acquisition of AFDX data, with up
The MFCC (with its FPGA programmable logic), coupled to 12 redundant or 24 nonredundant AFDX links. The flight
with the electrical front-end adaptor using the same logical chassis also includes a display board for healthy information
modules (such as synchronization) and embedded software presentation, available from the chassis itself.
that may include an OS-independent communication layer Thanks to the modularity of the CES functional units, a
(the CES BP-Net technology), provides a very useful modu- complete IENA chassis is composed of one display, one
lar construction. It constitutes a very easy bridging function- control unit, and two data acquisition units (one RIO3 gateway
ality between the main standard avionic links for various
flight and ground applications.

The IENA System


The Instrumentation d'Essais des Nouveaux Avions (IENA)
concept, translated as test instrumentation for new airplanes,
is an Airbus in-flight data acquisition and analysis system.
The latest generation designed for the Airbus A380 includes
the brand-new AFDX acquisition system based on the AFDX
multipurpose system.
CES has built a complete data acquisition system for the
A380 “level 2” IENA equipment, based on the company’s
modular processing units and chassis experience (see Figure Fig. 3. AFDX PMC: MFCC with “nose.”
4). This system is based on the VME 6U form-factor chassis,
with functional units for data acquisition, frame formatting,
concentration, and transmission to the next level of the IENA
system. Each functional unit is based on a RIO3 VME 64X 6U
(CES processor board) gateway, with up to six PMCs, using
PMC extension boards (PEBs). The IENA architecture
includes four clusters composed of RIO3s, MFCCs, and PEBs.
In the case of the first A380 implementation, the PMCs used
in the data acquisition functional units are AFDX acquisition
boards (i.e., the AFDX multipurpose test PMCs) with a spe-
cific IENA data formatting application on board. This is pos-
Fig. 4. IENA chassis with monitoring applications.
sible due to the modularity of the CES building blocks along
with the CES BP-Net communication layer within homoge-
neous or heterogeneous software environments.
The IENA N2 system developed by CES also includes a
controller functional unit, along with an RIO3 board and a
dating PMC with a backplane distribution of the synchroniza-
tion signals. All of the acquisition boards are synchronized to
the same time base (an IRIG-B and a 1-Hz separated sources),
with 1-µs resolution and better than 1-ppm precision. This
unit also transmits all of the acquired and formatted data of
the chassis on two 100-Mb/s Ethernet links for redundancy. Fig. 5. IENA ground and flight chassis.

August 2005 IEEE Instrumentation & Measurement Magazine 57

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Fig. 6. ATR and ARINC 600 form factors. Fig. 7. CAD-X.

and up to six acquisition PMCs). Also, with the same software modules, ensure the same safety guaranty level as the previ-
object, the configuration can be changed easily. The IENA con- ous generations of equipment.
figuration can be reduced to a minimum configuration with These modular concepts ease the development of testing
just one control unit and one data acquisition unit (one gate- tools for both ground and flight applications, with common
way with one acquisition card). parts and reusable concepts. These extremely versatile mate-
The same principles are applicable with various exten- rials are available for a very broad range of applications.
sions and adaptations to other projects, sharing and re-
using both hardware and software modules. CES is
currently developing flight equipment with reduced form References
factors, in particular ATR and ARINC 600 (see Figure 6). [1] P. Ricco, M. Weymann, F.-H. Worm, “Joint account,” Aerosp. Test.
The software adaptation for certifiability under DO 178B Int., pp. 40–43, Oct. 2003.
(up to level A, applying ARINC 653 rules) is currently with- [2] P. Ricco, M. Weymann, F.-H. Worm, “Merging military aircraft
in the scope of CES developments and projects. and commercial aircraft flight test architecture and
technologies,” in Proc. European Test and Telemetry Conf. (ETTC
Analysis Tools 2003), Toulouse, France, June 2003, pp. 106–112.
The IENA system also permanently provides various run-
ning information, such as acquisition statistics and synchro- Frederic Brajou (frb@ces.ch) earned an M.Sc. degree in aero-
nization status. This information can be displayed in real nautics and holds a postgraduate specialization in aircraft
time with a status viewer graphic tool, directly from a serial propulsion systems from ENSAE, France. As an engineer, he
link in the chassis. Alternatively, it can be recorded in the worked for the French MOD in a test and evaluation system
IENA formatted data frames. center. He then worked in IT consultancy and services.
The same CES boards and software modules are used in Moving to England, he diversified his career in business
the complete AFDX analysis tool CAD-X (see Figure 7). This development for companies in the United Kingdom and the
analyzer uses the same AFDX test card in a gateway piloted United States, working in a pan-European role during the
by a graphic display interactive tool to manage the configu- last decade. For the last few years, he has been working for
ration, the AFDX activity, and the data. It can provide a Creative Electronic Systems (CES). His responsibilities
wide range of functionalities, from raw frame analysis to full encompass business development in the civil aerospace and
AFDX compliance tests, with full bandwidth acquisition and defense markets. He is a member of the Royal Aeronautical
traffic generation, filtering, trigger input and outputs, statis- Society (MRAeS) and also a professional affiliate to the
tics, periodic events, and error injection of all types (from Chartered Institute of Marketing (CIM) in England.
raw protocol violation to high-level addressing errors or
bandwidth allocation violation). Philippe Ricco studied in France and received a master of
applied mathematics degree. He worked ten years for the
Conclusion French CEV (DGA Flight Test Center) on real-time comput-
Airbus has introduced a new generation of technologies for ers for flight test simulators. He then worked for Airbus and
commercial aircraft. It is now possible to share powerful Eurocopter. For the past seven years, he has been with the
resources for the critical safety requirement certification Swiss company Creative Electronic Systems (CES) working
rules of the aircraft. The modular construction and the on its aeronautic systems development, including the AFDX
redundancy, with the friability progress of the component products and DO-178B level A avionic applications.

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