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# Did someone say fully sick ELEC summaries - Josh Pham

Active:

Limiting cases:

Open circuit:

## Be careful! When simplifying resistor networks, if a

component is in parallel with a short, the equivalent
resistance becomes 0 and both components are
replaced with a short.

1.3 Current
Time rate flow of charge, (A)

Convention:
1.7 Voltage division

1.4 Voltage
1.8 Current division
Work done by EMF in moving charge through a circuit
per unit charge, (V) .

Convention

## 1.9 Combining resistances

Series:
1.5 Passive/Active Elements
Parallel:
Passive absorbs electrical energy
Active provides energy
1.10 Power
Independent sources don't rely on other circuit
Time rate transformation of energy, (W)
variables, whilst dependent sources do.
Did someone say fully sick ELEC summaries - Josh Pham
2. Kirchoff's Laws

2.1 Definitions/topology
A branch is a single element ( )
A node is a point of connection ( )
A loop is a closed path. ( )
A mesh is a loop containing no other loops.

2.2 KCL/KVL The trick with mesh currents is that, when forming the
equations using KVL, say for the first mesh, as enters
, it is not the only current travelling through the
resistor. is also travelling through it in the opposite
direction, so the current travelling through when
KCL: Sum of currents in = sum of currents out analysing mesh 1 is .
KVL: Sum of voltage drops = sum of voltage gains around
a loop.
and so on...
2.3 Nodal analysis
Super mesh
1. Name nodes and select reference (usually
bottom one). A super mesh occurs when meshes share a current
2. Assign current/voltage labels (usually - is at source. Created by excluding the current source/any
ground and + is up top). A voltage source in a elements in series. It is not ignored, but rather as the
branch gives you the voltage source of that current "crosses" into the other half, you use the other
branch. current:
3. Apply KCL and express in terms of node voltages.
4. Solve equations simultaneously

Supernode

## A supernode is a voltage source (and any elements

connected in parallel with it) between two non-
reference nodes

Pick

## To solve, circle the supernode and apply KCL (currents

coming in and out of the supernode).

## 2.4 Mesh currents

1. Assign mesh currents, for meshes.
2. Apply KVL to each mesh
3. Solve equations simultaneously
Did someone say fully sick ELEC summaries - Josh Pham
3. Circuit Theorems 3.4 Source transformation (Relationship between
Norton and Thevenin)
3.1 Superposition
Used to determine the responses of a linear circuit by
summing the individual responses of each independent
source (can't disable dependent sources).

## To disable a voltage source, short it.

To disable a current source, open circuit it.

## 1. Turn off all independent sources except the one

whose effect you want to determine.
2. Repeat until you have found all responses for
each source and sum them.

## 3.2 Thevenin's theorem

Any circuit of sources and resistances with an identified
terminal pair can be replaced by an equivalent circuit
consisting of a voltage source in series with a
resistance .

## 1. Find (open circuit voltage at terminals)

2. Disable all independent sources and find
equivalent resistance .
3. Don't disable dependent sources. Instead
disable all independent sources and apply a 1V
source at the terminals and work out . Then you
can find using . Alternatively you can
apply a 1A source and find terminal and then
using .

.

## 3.3 Norton's theorem

Any circuit of sources and resistances with an identified
terminal pair can be replaced by an equivalent circuit
which consists of an ideal current source in parallel
with a resistor .

## 1. Find (the short circuit current across the

terminals)
2. .
Did someone say fully sick ELEC summaries - Josh Pham
4. Capacitors and RC Transients We know,

4.1 Capacitors
A capacitor is a passive element
designed to store energy in its From KVL,
electric field. It consists of two
parallel conducting plates
separated by an insulating
Noting that the capacitor becomes an open circuit, after
medium (dielectric).
a long period of time, when the capacitor becomes an
Capacitance is a the ability to store charge (F): open circuit, .

## 4.3 Combining capacitors

Series:

Parallel:

4.4 RC Transients
First order RC circuits are those containing either one
capacitor or one inductor forming a first order ODE. The
complete response of an RC circuit is made of a transient
(natural) and a steady state (forced) response.

## With each response there are 3 stages.

Hence, to obtain the complete response you must find,
1. Initial conditions
1. Initial capacitor voltage
2. Transient period
2. Final capacitor voltage
3. Final conditions
3. Time constant
The capacitor acts as an open circuit for (switch
and substitute into the above formula.
hasn't been closed) and (as and
Implication
.
1. Voltage cannot change instantaneously
Analysing the transient response,

as as and
Did someone say fully sick ELEC summaries - Josh Pham
5. Inductors and RL Transients We know,

5.1 Inductors
An inductor is a passive element made of coils designed
to resist changes in electric current passing through it From KVL,
(introduce inductance (henries)).

## Energy is stored in a magnetic field in the coil as long as

current flows. When current flows, a time varying
magnetic field induces a voltage in the conductor, where
according to Faraday's law of electromagnetic induction.
According to Lenz's law, the direction of the induced
EMF is always such that it opposes the change in current
that created it. Hence, to obtain the complete response you must find,
Model of an inductor 1. Initial inductor current
2. Final inductor current
3. Time constant

Implication

## 5.2 Combining inductors

Series:

Parallel:
5.3 Energy stored by inductor

5.3 RL Transients
Contain one inductor and one or more resistors. The 5.4 RC and RL Transients
inductor acts as a short circuit for and (as
Apply the implications simultaneously. Find initial and
and . final conditions and substitute into derived formulae.
Did someone say fully sick ELEC summaries - Josh Pham
6. Sinusoids and Phasors Writing a sinusoidal signal as a phasor:

6.1 Sinusoids
To convert from phasor (frequency domain) to time
domain, you need .
= amplitude (V)
= angular frequency (rad/s) 6.3 Phasor relationships for circuit elements
= phase shift
Resistor: in phase
Inductor: lags by 90o
You will be expected to plot the phasors of these
The wave that comes first in time leads the
voltages and currents on a phasor diagram.
other, whilst the other lags.
Impedance is the complex resistance to sinusoidal
current. It has the unit ohms.

## Comparison only valid when . resistance

When attempting to find the phase shift of two reactance
signals (one in cos and one in sin), you need to are the impedances for the capacitor and inductor
convert them all to sin or cos (preferably cos)
respectively. They are purely imaginary.
[and both positive or both negative] using
. Remember that sin and
cos shift polarities every 180 shift.
Remember from graph transformations that THESE ACT AS SHORT CIRCUITS AT DC (low ) AND
causes a shift right, and OPEN CIRCUITS AT HIGH FREQUENCY (high )
causes a shift left. Using this you can find which [IMPORTANT!!!!! WE SEE THIS IN OP AMPS
one lags and which one leads. QUESTIONS).
6.2 Phasors Admittance is the reciprocal of impedance.
All time-varying sinusoidal signals can be It can be represented as,
represented as a non time-variant complex
number in the frequency domain.

susceptance

## When dealing with capacitors, inductors, resistances in

where AC circuit analysis, you must convert all components to
the frequency domain (phasors and impedances) and
Operations:
then conduct analysis.

)
Did someone say fully sick ELEC summaries - Josh Pham
6.5 AC Analysis Complex power

## Use all the previous theorems (Kirchoffs Laws,

Thevenin etc) but now with phasors.
Measured in VA
Kirchoff's AC laws:
Apparent power (VA)
6.6 Power Analysis
Effective value of a periodic signal (RMS)
Power factor
The effective value/RMS of a periodic current
is the dc current that delivers the same
average power to a resistor as the periodic
current. (purely reactive, no average
The effect value of a periodic signal is its power consumed), (purely resistive, all
RMS value. average power consumed).
lagging

Average power

## Only the resistive load absorbs power at all

times. Reactive loads (L or C) absorb zero
average power.

## Maximum power transfer occurs when

i.e, when the load impedance is the
conjugate of the Thevinin impedance.
This maximum power transfer is given by,

Reactive power

## Phantom power in inductors and capacitors.

Measured in VAr.
Did someone say fully sick ELEC summaries - Josh Pham
7. Operational Amplifiers For integrators and differentiators,

## 7.1 Basic info/anatomy

Active elements that perform basic math When dealing with AC circuits convert to
functions (+, -, , ) impedances etc.
For analysis purposes, we ignore that it is
7.3 Key quantities
connected to an external power supply
otherwise KCL will not directly hold. Nearly all OP amps questions will ask for the
transfer function or the open loop gain
The polarity of an input is outputted with (the constant of proportionality which your
opposite polarity if connected to the inverting input signal is subjected to produce an output).
input ( )
The polarity of an input is stays the same if
connected to the non-inverting input ( ).
7.3 Key configurations
The key configurations used to perform basic math
functions presented below. Do not memorise these.
Please see that their analysis uses the exact same ideal
conditions.
7.2 Ideal conditions/equivalent circuit
Non-inverting configuration

Every OP-amps question literally uses the same set of (as no current enters the op amp).
ideal conditions that you need to apply to solve the Since the current through the op amp is 0, .
question. By applying nodal analysis at 1,
Firstly, we assume that and .

## Because , . Thus there is no current

flow and thus no voltage drop meaning that . But
Summary

## High frequencies, capacitors act as short circuits

Low frequencies (DC), capacitors act as open
circuits
Did someone say fully sick ELEC summaries - Josh Pham
Inverting configuration Subtracting/Difference configuration

## Nodal analysis at node a,

Since and
Nodal analysis at node b,

## In the ideal op amp model,

Summing configuration Hence,

## When the inputs are the same, ( should

equal 0 and thus,

## Since (connected to ground),

Also,
The saturation limits how much we can amplify. The
input of the adjacent op amp is the output of the one
Thus,
before it.
Did someone say fully sick ELEC summaries - Josh Pham
Integrating configuration

## No current in the op amp therefore,

therefore,

Differentiating configuration
Did someone say fully sick ELEC summaries - Josh Pham
8. Transformers 7.3 Eliminating ideal transformers from circuits

## 7.1 Fundamental equation The rules for eliminating transformers and:

Transformers are AC equipment used to 1. Reflecting the secondary circuit to the primary side
transfer power from one circuit to another
Divide by
without a change in frequency.
Divide by
Used to convert AC power at a certain voltage
Multiply by
to power at another voltage.
Only works with DC because no alternating flux
means no power transmission meaning the
voltage drop occurs through the primary
resistance which is quite low, burning the
primary coils.
The AC voltage applied to the primary coil
of turns sets up an alternating flux,
inducing an AC voltage in the secondary coil
of turns whose size depends on the turns 2. Reflecting the primary circuit to the secondary side
ratio . Multiply by
Multiply by
Divide by

## 7.4 Important examples

1. A transformer of 2400 and 48 is used
as an impedance matching device. What is the
reflected value of a 3 load connected to the
secondary?
By Faraday's law, and the requirement that ,

## 7.2 Impedance relations 2. A 240/120 V rms power transformer is rated at

10 kVA. Determine
Did someone say fully sick ELEC summaries - Josh Pham
3. A 4800 V rms transmission line feeds a
distribution transformer with 1200 turns on the
primary and 28 turns on the secondary. When a
10 load is connected across the secondary,
find:
a) Secondary voltage
b) Primary and secondary currents
c) Power supplied to the load.

a)

b)

c)

## Since the load is purely resistive,

Sickest digital system summary/10 - Josh

Digital Systems
1. Introduction to Digital and Binary
1.1 Digital and analog signals
Digital systems are a method of signalling.
Whereas analog signals are waveforms, digital signals are streams of bits based on the
binary number systems. Where a bit, is a digit of the binary number system.

## 1.2 Binary number system

Consists of only two numerals.
Works on a base 2 number system.
Every number can be written in binary are long strings of 1s and 0s.

Example

## Convert 11100110 into a regular base 10 numeral

Since there are 8 binary digits, this is an 8 bit system meaning it goes from (right to left)

## 1.3 Truth tables

Works in tandem with the binary number system.
Truth tables are exhaustive descriptions of outputs for all possible inputs.
Possible inputs are dictated by the number of bits which is often influenced by certain
relationships e.g. if , then true etc...

Example

Daniel goes to the mall. The items he shops for are categorised into things he needs and things he
wants. His method of payment are cash/debit.

## If we needs an item, he will buy it with cash/card.

Solution

Define variables:

(predetermined by the other inputs).
Sickest digital system summary/10 - Josh

We form a 5 by 16 (0 15) table. We know we only have 15 possible combinations. This is because
we only really have 4 real variables (P being determined by the previous inputs), , so we go
from .

First we start by writing all the numbers on the sides using binary.

This is the way we determine our (NWCD) [fundamental variables). How we can figure out P.

For the first column, he doesn't need it, doesn't want it. So he won't buy it. If we continue according
to rules we can fill out the P column.
Sickest digital system summary/10 - Josh

## 1.4 Logic gates

Logic gates are devices that perform a local operation on one of more logical inputs to
produce a singular logical output.
Used extensively in digital circuits.

## 1.4.1 AND gates

We have 2 inputs so, we have 22 possible outcomes. "Z is true iff X and Y are true"

1.4.2 OR gates
"Z is true iff X or Y are true"

## 1.4.2 NOT gates

The not gate inverts/negates. (1 input, 21 possible outcomes). Replaces the input with the
complement of the input.

1.4.3 NAND gate (NOT and; the complement of the AND gate)
"Z is true if X or Y are false"
Sickest digital system summary/10 - Josh

## 1.4.4 NOR gate (not OR; the complement of the OR gate)

"Z is true if X and Y are false"

## 1.4.5 XOR gate (Exclusive OR)

"Z is true if X Y"

## 1.4.6 XNOR gate (Exclusive Not OR gate)

"Z is true if X = Y"
Sickest digital system summary/10 - Josh

## 1.5 Boolean Algebra

Practically we must work with a large number of signals. Each signal has a binary choice (yes-
no, on-off, move-stop).
Boolean Algebra provides a method of simplifying and handling these signals.

## Mathematical consequences of logic gates

AND

OR

NAND

NOR

XOR

XNOR

Fundamental theorems

2) (equals iff )
3)
4)
5)
6)
7)
8)

## Commutative laws Associative Laws (brackets don't do much)

Distributive laws

(read A or B and A or C) etc

Absorption laws

1)
2)
3)
4)
De Morgan's theorem

## (complement of A or B) = (complement of A and complement of B)

Sickest digital system summary/10 - Josh

When we have two quantities whose truth tables are matching they are equivalent (can be used to
prove De Morgan's theorem).

## 1.6 Analysis of Digital Circuits 1

Draw a truth table for the digital circuit. Also find a Boolean Expression for .

Solution

We have a NOR and AND and OR GATE. We have 3 inputs A, B, C and one input Z.

We should split up the inputs of the OR gate. One input will be X. The other will be Y.

## And Y will be the resultant of an AND gate between B and C.

Hence,
Sickest digital system summary/10 - Josh

Solution

## To begin, lets draw our inputs A B C and D.

The section is addressed as follows: What we also need to do now is B complement and an and
gate with C. To make B complement, we add a NOT gate and combine it with C using an and gate.

To get the , branch off C and add a not gate. Relate C and D using an AND gate. To get the A . B.
C term, to do that, we need to make an AND gate between A B, C.