DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

NATIONAL INSTITUTE OF TECHNOLOGY, TIRUCHIRAPPALLI-620 015

(M.Tech. VLSI SYSTEM)

Ref: NITT/VLSI Sys/SEM-I/Assessment-1 Date: 06/09/2017

Schedule for Assessment- 1 M.Tech. VLSI SYSTEM- SEM-I (2017-2018)

VENUE: LH-114

COURSE COURSE NAME DATE TIME

CODE
EC653 Basics of VLSI 18-09-2017 09:30 -10:30 FN
MA617 Graph Theory and Discrete Optimization 18-09-2017 02:30 -03:30 AN
EC802 Modeling and synthesis with Verilog HDL 19-09-2017 09:30 -10:30 FN
EC803 Digital Signal processing Structures for VLSI 19-09-2017 02:30 -03:30 AN
EC651 Analog IC Deign 20-09-2017 09:30 -10:30 FN
EC801 Digital System Design 20-09-2017 02:30 -03:30 AN

Class Committee Chairperson Head of the Department