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ASTABLE MULTIVIBRATOR
MONOSTABLE MULTIVIBRATOR
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555 TIMER
PHYSICS (LAB MANUAL)
Introduction
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555 TIMER
PHYSICS (LAB MANUAL)
astable mode to generate a continuous series of pulses, but you can also use the 555 to make
a one-shot or monostable circuit.
The 555 can source or sink 200 mA of output current, and is capable of driving wide range of
output devices. The output can drive TTL (Transistor-Transistor Logic) and has a
temperature stability of 50 parts per million (ppm) per degree Celsius change in temperature,
or equivalently 0.005 %/C.
Applications of 555 timer in monostable mode include timers, missing pulse detection, bounce
free switches, touch switches, frequency divider, capacitance measurement, pulse width
modulation (PWM) etc.
In astable or free running mode, the 555 can operate as an oscillator. The uses include LED
and lamp flashers, logic clocks, security alarms, pulse generation, tone generation, pulse
position modulation, etc. In the bistable mode, the 555 can operate as a flip-flop and is used
to make bounce-free latched switches, etc.
Refer to Figure 1 for the brief description of the pin connections. The pin numbers used refer
to the 8-pin mini DIP and 8-pin metal can packages. The 555 can be used with a supply
voltage (VCC) in the range 5V to 15V (18V absolute maximum).
Pin 1: Ground: All voltages are measured with respect to this terminal.
Pin 2: Trigger: The external trigger pulse is applied to this pin. The output of the timer is low
2
if the voltage at this pin is greater than 3 VCC . If a negative
1
going pulse of amplitude larger than 3 VCC is applied to this pin, the output of
comparator 2 becomes low, which in turn, makes the output of the timer high. The output
remains high as long as the trigger terminal remains at low voltage.
Pin 3: Output: There are two ways a load can be connected to the output terminal either
between pin 3 and ground (pin 1) or between pin 3 and the
supply voltage +VCC (pin 8). When the output is low, the load current flows
through the load connected between pin 3 and pin 8 into the output terminal and is called the
sink current. However, the current through the grounded
load is zero. Therefore, the load between pin 3 and +VCC is called normally
ON load and that connected between pin 3 and ground is called normally OFF load. On the
other hand, when the output is high, the current through
the load connected between pin 3 and +VCC (normally ON load) is zero.
However, the output terminal supplies current to the normally OFF load. This current is
called the source current. The maximum value of sink or source current is 200 mA.
2
voltage 3 VCC , the output of this comparator
becomes high, which in turn, switches the
output of the timer low.
On the other hand, when the output of the timer is low, Q1 is saturated and acts as a short
circuit, shorting C to ground.
Pin 8: +VCC : The supply voltage of +5 V to + 18 V is applied to this pin with respect to
ground (pin 1).
We now discuss the working of 555 timer using its functional block diagram (Refer to Figure
2).
As shown in Figure 2, the 555 timer consists of a voltage divider arrangement, two
comparators, an RS flip-flop, an n-p-n transistor Q1 and a p-n-p transistor Q2. Since the
voltage divider has equal resistors, the comparator 1 has a trip point of
2
UTP = V
3 CC
The voltage at this pin comes from the external components (Refer to Figures 4, 6 and 9).
When this voltage is greater than the UTP, the comparator 2 has a high output. Pin 2 (trigger)
is connected to the comparator 2. The voltage at this pin is the trigger voltage that is used for
the monostable operation of the 555 timer. When the trigger is inactive, the trigger voltage is
high. When the trigger voltage falls to less than the LTP, comparator 2 produces a high output.
In order to understand how a 555 timer works with external components, we need to discuss
the action of RS flip-flop, the block that contains S, R, Q and
Q (Figure 3).
Q
Figure 3: RS Flip-Flop
Figure 3 shows one way to build an RS flip-flop. In a circuit like this, one of the transistors is
saturated, and the other is cut off. For instance, if the right transistor is saturated, its collector
voltage will be approximately zero. As the collector of the right transistor is coupled to the
base of the left transistor through the 100k resistor, this means that there is no base current
in the left
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condition, Q
transistor. As a result, the left transistor is cut
off, producing high collector voltage. This high
collector voltage produces a large base current is low and Q is high. After this transition has
for the right transistor being coupled through occurred, the high R input can be removed
the 100k resistor and keeps the right transistor because it is no longer needed.
in saturation.
Since the circuit is stable in either of the two
states, it is sometimes called a bistable
The RS flip-flop has two outputs, Q and Q (the multivibrator. A bistable multivibrator latches
output of the left and the right in either of the two states. A high S input
forces Q into the high state, and a high R input
transistor respectively). These are two state forces Q to return to the low state. The output
outputs, either low or high voltages. Further, Q remains in a given state until it is triggered
the two outputs are always in opposite states. into the opposite state. The S input is
When Q is sometimes called the set input because it sets
the Q output to high. The R input is called the
reset input because it resets the Q output to
low.
low, Q is high. When Q is high, Q is low. For
this reason Q is called the complement of Q.
will be low. The high S input can then be Discuss the role of an RS flip-flop in the
removed because the saturated left transistor working of 555 timer
will keep the right transistor in cutoff. Explain the basic functioning of 555 timer
Design an astable multivibrator of given
frequency and Duty Cycle
Similarly, we can apply a large positive voltage
to the R input. This will saturate the right
transistor and cutoff the left transistor. For this Design a monostable multivibrator of given
pulse-width.
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555 TIMER PHYSICS (LAB MANUAL)
connecting wires
555 timer
flop, and the output becomes high. The cycle
resistors then repeats. The output voltage and capacitor
voltage waveforms are shown in Figure 5.
capacitors
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PHYSICS (LAB MANUAL) 555 TIMER
V
Figure 4: Circuit diagram for Astable CC
Multivibrator and
V
CC
which
3
3
V
CC
9
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Learning, University of Delhi
555 TIMER
and
1
V
. The time during which the capacitor charges from
1
V
to
2
V
is
CC
CC
3
CC
(1)
where RA and RB are in ohms and C in Farads. Similarly, the time during which
the capacitor discharges from
2
V
CC
to
1
V
CC
t
d
,
0.69 R C
(2)
where RB is in ohms and C in Farads. The total period of the output waveform is (using
Equations (1) and (2))
T tc td 0.69(RA 2RB )C
(3)
fo
1.45
(4)
(RA 2RB )C
The Duty Cycle is defined as the ratio of the time tC for which the output is high to the time
period T. It is generally expressed as a percentage. The % Duty Cycle (using Equations (1)
and (3))
tc
D 100
(5)
R R
A B 100 RA 2RB
According to the above relation, a Duty Cycle of less than 50% cannot be achieved. Also, 50%
Duty Cycle, which corresponds to a square wave, can be achieved only if RA 0 resulting in
terminal 7 being directly connected toVCC
discharges through RB and Q1 , an extra current is supplied to Q1 by VCC through the terminal
7 (now directly connected to VCC ), which may damage Q1 and hence the timer.
and diode
D to approximately
2
V
A
3 CC
RB and
transistor Q1
until the capacitor voltage
equals approximately
1
V
3 CC
t
c
,
0.69R C
(6)
A
t
d
.
0.69 R C
(7)
555 TIMER
T tc td 0.69(RA RB )C
(8)
and the frequency of oscillation is
(9)
fo
1
1.45
(RA RB )C
RA
100 .
(10)
R
A
R
B
If RA RB , the Duty Cycle is 50%. For RA RB , the Duty Cycle is less than 50%.
If we want to design an astable multivibrator of say, 75% Duty Cycle and 1 KHz frequency,
from Equation (5), the Duty Cycle is
RA
RB
0.75
(11)
R
A
2R
B
Solving, we have
R
A
.
2R
(12)
(13)
4RBC
555 TIMER
1.45
R
K
3.6
(14)
4 1000 0.1
6
10
7.2 K.
R
A
(15)
RA RB 7.25 K
and C 0.1 F .
For a Duty
Pre-lab Assessment
Now to know whether you are ready to carry out the experiment in the lab, choose
the correct answer. If you score at least 80%, you are ready, otherwise read the
preceding text again. (Answers are given at the end of this experiment.)
It is a monolithic timing circuit which can operate in monostable as well as astable mode.
two comparators
two transistors and a voltage divider arrangement
a, b and an RS flip-flop
a and b.
An RS flip flop is the same as a/an
monostable multivibrator
one-shot multivibrator
bistable multivibrator
astable multivibrator.
A quasi-stable state is such that the output
zero
less than 50%
50%
greater than 50%. RB
3
CC
To To
common power
To CRO
Connect the circuit as shown in Figure 4 with the Now, connect the other channel of the CRO
between pin 6 and pin 1 to obtain the voltage
calculated values of RA, RB and C for 75% Duty across the capacitor.
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555 TIMER
PHYSICS (LAB MANUAL)
Adjust the positions of the output waveform and the capacitor voltage waveform by suitably
selecting the time/div for both the channels, so as to obtain them simultaneously on the
screen, one below the other.
Trace these waveforms on a tracing paper.
Note time/div for both channels and measure the charging time tc and discharging time td for
the traces. Enter the data in Table 1.
Select a different value of time/div on the CRO and repeat steps 4 to 6.
Calculate the time period, frequency and Duty Cycle for both the observations using Equations
(3), (4) and (5) respectively.
Take the mean for calculated values of frequency and Duty Cycle.
Insert a diode between pins 6 and 7 (which is essential for obtaining a
Figure 6. A laboratory picture of the circuit is shown in Figure 8. Repeat steps 4 to 9 for 50%
and 30% Duty Cycle with the respective calculated values of resistances and capacitances and
enter the data in Tables 2 and 3, respectively.
555 TIMER
Observations
Charging time
Discharging time
tc
td
(sec)
(sec)
Discharging
Time
Duty
Trace
Charging
Trace
time
period
Frequency
cycle
S.
length
Time / div
time
length
Time / div
td
T
f0
D
No.
(cm)
(sec / cm)
tc(sec)
(cm)
(sec / cm)
(sec)
(sec)
(KHz)
(%)
1
Charging time
Discharging time
tc
td
(sec)
(sec)
Discharging
Time
Duty
Trace
Charging
Trace
time
period
Frequency
cycle
S.
length
Time / div
time
length
Time / div
td
T
f0
D
No.
(cm)
(sec / cm)
tc(sec)
(cm)
(sec / cm)
(sec)
(sec)
(KHz)
(%)
1
Charging time
Discharging time
tc
td
(sec)
(sec)
Discharging
Time
Duty
Trace
Charging
Trace
time
period
Frequency
cycle
S.
length
Time / div
time
length
Time / div
td
T
f0
D
No.
(cm)
(sec / cm)
tc(sec)
(cm)
(sec / cm)
(sec)
(sec)
(KHz)
(%)
1
2
Mean experimental frequency, f0 = KHz.
Mean experimental Duty Cycle, D = %.
Result
966 KHz
none of the above.
The Duty Cycle of the approximately RA = RB = 2k
waveform generated 67% if
RA = RB = 3k
by an astable RA = RB = 1k (a), (b) or (c).
multivibrator is
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PHYSICS (LAB MANUAL) 555 TIMER
c
An external trigger is required to change the
True
state of the output of an astable multivibrator.
False
(True/False)
Institute of Lifelong
PHYSICS (LAB MANUAL)
555 TIMER
SECTION B
another important duration of the output pulse is determined by
application of 555 timer, the RC network connected externally to the 555
that is, 555 timer as a timer. The stable state output is approximately
monostable zero or at logic-low level. An external trigger
MONOST multivibrator. A pulse forces the output to become high
ABLE monostable multivibrator or approximatelyVCC . After a
is a pulse-generating
MULTIVI circuit having one stable
predetermined length of
time, the output
BRATOR and one quasi-stable
state. Since there is only
one stable state, the automatically switches back to the stable state
circuit is known as and remains low until a trigger pulse is again
monostable applied. The cycle then repeats. That is, each
We now time a trigger pulse is applied, the circuit
multivibrator. The
discuss
produces a Theory through R
single pulse.
Hence, it is A 555 timer connected . When the voltage across the capacitor equals
also called for monostable operation 2
one-shot is shown in Figure 9. The V
multivibrator. circuit has an external
resistor and capacitor. , the output
The voltage across the
Apparatus capacitor is used for the
threshold to pin 6. When A
CRO (cathode the trigger arrives at pin
ray 2, the circuit produces
3
oscilloscope) output pulse at pin 3.
CC
power supply Initially, if the output of
(+5V to +18V) the timer is low, that is,
the circuit is in a stable
555 timer state, transistor Q1 is on
and the external
resistors capacitor C is shorted to
ground. Upon application
of a negative trigger
capacitors
pulse to pin 2, transistor
connecting Q1 is turned off, which
wires releases the short circuit
across the capacitor and
as a result, the of comparator 1 switches from low to high,
connecting
leads for CRO which in turn, makes the output low via the
output becomes high. output of the flip-flop. Also, the output of the
The capacitor now starts flip-flop turns transistor Q on and hence the
bread board 1
charging up towards
capacitor rapidly discharges through the
VCC transistor. The output of the monostable
multivibrator remains low until a
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PHYSICS (LAB MANUAL) 555 TIMER
3
F
Similarly, for a pulse-width of 5 ms, taking C 0.5 F , Equation (16) gives RA as 9.1 K.
Pre-lab Assessment
Now to know whether you are ready to carry out the experiment in the lab, choose
the correct answer. If you score at least 80%, you are ready, otherwise read the
preceding text again. (Answers are given at the end of this experiment.)
square.
A multivibrator circuit having one stable state and other quasi-stable state is known as
monostable multivibrator
bistable multivibrator
astable multivibrator
free-running multivibrator.
each time a trigger pulse is applied, the circuit produces a single pulse.
a and c
The output of a monostable multivibrator remains low
while the external capacitor is charging
When a 555 timer is connected in monostable mode, the voltage across the external capacitor
is used for the threshold to pin 6. (True/False)
Once the circuit is triggered and the output becomes high, it remains so for the time interval t p
and will not change even if an input trigger is applied during this time interval. (True / False)
Is it possible to achieve a stable state output within the time interval tp using a reset terminal?
(Yes / No)
Procedure (cm)
(sec / cm)
Connect the circuit as shown in Figure 9 with
the calculated values of R and C .
One channel of the CRO is connected between
pin 3 and pin 1 to see the (rectangular) output
waveform.
C = 0.5F, RA = 1.82 K
C = 0.5F, RA = 9.1 K
Trace length
Time / div
Pulse width
S. No.
tp
Trace length
Time / div
Pulse width
S. No.
1
tp
(cm)
(sec / cm)
2
(ms)
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Result
Glossary Astable: A mode in which a 555 timer has no
A monostable stable state and produces a rectangular wave
multivibrator for two 555 timer: It is a of predetermined frequency.
different given pulse- monolithic timing
widths is designed. A circuit that Bistable: A mode in which 555 timer has two
comparison of the basically operates stable output states and the output is latched
experimental pulse- in monostable in either of the two states.
widths with the given (one-shot) or
ones is mentioned astable (free- Comparator: It is an application of op-amp
below: running) mode. It and is described as a circuit that compares two
can also work as a analog voltages, an input voltage and a
bistable reference voltage also called the trip point. The
Theoretical multivibrator output is either a low or a high voltage.
Experimental which is the same
S. No. as an RS flip-flop. Control voltage: An external voltage which
value 555 timer is called may be applied to change the threshold as well
value so because three as the trigger voltage and hence also the pulse-
1 5 K resistors width of the output waveform.
were used in the
voltage divider DIP: It is an acronym for Dual-Inline Package
2 arrangement and refers to a type of integrated circuit
within the packaging that has two rows of external
integrated circuit connecting terminals.
earlier.
Duty Cycle: It is the ratio of the time tc for
which the output of chip design or an two-state circuit with zero, one or two stable
an astable integrated circuit, output states
multivibrator is high in which the base
to the time period T material depending on whether it is connected in
of the output (semiconductor astable, monostable or bistable
waveform. It is substrate)
generally expressed contains the mode.
as a percentage. pathways as well One-shot: Same as monostable.
as the active
Integrated Circuit: elements that RS flip-flop: The most fundamental latch or an
A miniaturized take part in its electronic circuit with two stable output states,
electronic circuit operation. either high or low, always opposite to each
consisting mainly of other and controlled by the inputs R and S
semiconductor Monostable: A which stand for reset and set, respectively. It is
devices, as well as mode in which a basically a kind of bistable multivibrator.
passive components, 555 timer
that has been produces a Threshold voltage: The voltage given at the
manufactured in the rectangular output non-inverting input terminal of the op-amp
surface of a thin pulse of known used as the comparator 1 in the block diagram
substrate of pulse-width. It is of 555 timer. Transistor: An active three-
semiconductor also called one- terminal semiconductor device that can be used
material Monolithic: shot. either as an amplifier or as a switch. The two
The common form of Multivibrator: A basic types are bipolar junction
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PHYSICS (LAB MANUAL) 555 TIMER
7.48 s
transistors (BJTs) and field effect transistors
(FETs). A BJT can be either npn or pnp. none of the above.
For the proper functioning of a monostable multivibrator, the trigger pulse must be a negative-
2
going input signal with an amplitude larger than 3 VCC . (True/False)
What is the time for which the output remains high?
c
a
a
a
c
True
True
Yes
a
b
d
a
c
True
False
t p 1.1 RAC