A series RLC Filter Design

By Jeff Anderson

The objective of this design was to create an RLC filter circuit that would produce a gain greater
than eighty percent at 10 kHz while also achieving a gain less than twenty percent at 25 kHz. The DC gain
at low frequency should also be unity, and the maximum overshoot could not exceed twenty percent for
a stepped response.

Design Calculations and Parameters

The basic circuit to be used for achieving the design specifications was a series configuration
similar to figure 1 to eliminate any parallel resistance for the inductor:

Figure 1: Series RLC Filter

The input Vin is the input from the function generator and was calculated to add an additional 45
ohms of resistance to the series Rtot.

The governing network function was calculated to be:

H(s) = (1/LC)/(s^2 + (R/L)*s + 1/(LC))

Inputting s=0 for DC gain:

H(0) = (1/LC)/(0+0+(1/LC)) = 1

Being limited by the inductor choice to 1 mH, 10 mH, or 82 mH, a value of capacitor was chosen
to give a fo near 10 kHz to begin the transition from unity gain to no gain.

Given %overshoot/(step) = exp(-/sqrt(4Q^2-1))

Choosing a 15% overshoot to ensure the circuit acts within limits

.15/1= exp(-/sqrt(4Q^2-1)) => Q is going to be around .967

 Using the 10 mH inductor by default choice and the .027 uF capacitor due its availability:

Q=1/Rtot*sqrt(L/C) => .967 = 1/Rtot * sqrt(10 mH / .027 uF) => Rtot = 629 ohms

o = 1/sqrt(LC) = 1/sqrt(10 mH * .027 uF) = 60858 rad/s => fo = 9685 Hz

The parameters are summarized in the table below, figure 2:

Variable or Target Value Measured Value

Component
Rtot 629 ohms 628 ohms
Rgen 45 ohms 45 ohms
RL 22 ohms 22 ohms
L 10 mH N/A
C .027 uF N/A
Q .967 .969
0 60858 rad/s ~61000 rad/s
fo 9685 Hz ~9700 Hz
% Overshoot About 15% About 10%
Figure 2: Calculated Values

PSpice Simulations

The circuit was then simulated in Pspice to prove that the magnitude met the specifications at
the desired frequencies and prove the overshoot was less than twenty percent. The results from those
simulations can be seen below in figure 3:
 Figure 3: Magnitude Response of the RLC Filter

In figure 3, the circuit was driven with a 1V source. The initial conditions for the inductor and
capacitor were both set to 0. It is clear the circuit at 10 kHz the gain is nearly 90%. Conversely, the gain
at 25 KHz was about 17%. The next figure shows the circuits response to a step DC input:
 Figure 4: Step Response of the RLC Circuit

In figure 4, the circuit is shown to overshoot by about 16%, nearly the exact value that was
calculated in the setup. This proves the simulated circuit acts as designed and within the given
parameters.

In Lab Experiment and Real World Testing

The circuit in figure 1 was breadboarded as a series RLC circuit. The function generator with a 1V
AC sine wave drove the input. Frequency was varied over the range of 1 Hz to 30 kHz and data was
taken for the magnitude of gain for this range. The data for the experiment is shown below in figure 5:

Frequency (Hz) Mag Vi (volts) Mag Vo (volts) Mag H (Vo/Vi)

1 1.72 1.70 .988

1000 2.08 2.10 .990
3000 2.06 2.14 1.04
4000 2.05 2.21 1.08
 5000 2.04 2.26 1.11
8000 1.98 2.24 1.13
10000 1.94 1.94 1
14000 1.98 1.14 .57
20000 2.04 .58 .28
25000 2.08 .38 .182
30000 2.13 .29 .136
Figure 5: RLC Filter Circuit Output Magnitude Experimental Data

The data in figure 5 was then plotted in Matlab against the network function from the beginning
calculations. The graph is shown below in figure 6:

Figure 6: Magnitude vs Frequency for the Series RLC Circuit

Clearly, the data taken from the lab is nearly identical the design network function when plotted
on the same graph in Matlab validating the design. The blue line is the network function and the orange
line is the data taken from the lab. Next the percent overshoot was found by driving the circuit with a
square wave from the function generator. The results can be seen in figure 7 below:
 Figure 7: Step Response of the RLC Circuit

Figure 7 shows the step response the RLC filter circuit. Using the cursors on the o-scope and
measuring from the bottom of the step to the peak of the overshoot, the delta shows a change of 1.1V
meaning the overshoot is only 10%.

In conclusion, the experimental data lines up with the design simulations nearly perfectly with
little difference between the real world data and the expected points from the math and PSpice. It is
clear that the equations from class govern the circuits operations and characteristics.