10/4/2017

Electronic Devices and Circuit Theory Voltage Divider Bias

Boylestad This is a very stable bias circuit.

The currents and

DC Biasing - BJTs voltages are nearly
independent of any
Chapter 4 variations in .

Electronic Devices and Circuit Theory 2013 by Pearson Higher Education, Inc
Boylestad Upper Saddle River, New Jersey 07458 All Rights Reserved

Two Methods
Exact Analysis
Can be applied to any voltage-divider configurations

Approximate Analysis
Can be applied only if specified conditions are
Exact Analysis
satisfied

Electronic Devices and Circuit Theory 2013 by Pearson Higher Education, Inc Electronic Devices and Circuit Theory 2013 by Pearson Higher Education, Inc
Boylestad Upper Saddle River, New Jersey 07458 All Rights Reserved Boylestad Upper Saddle River, New Jersey 07458 All Rights Reserved

1
 10/4/2017

Determine the dc bias voltage VCE and the current IC for the voltage divider configuration

Electronic Devices and Circuit Theory 2013 by Pearson Higher Education, Inc Electronic Devices and Circuit Theory 2013 by Pearson Higher Education, Inc
Boylestad Upper Saddle River, New Jersey 07458 All Rights Reserved Boylestad Upper Saddle River, New Jersey 07458 All Rights Reserved

Approximate Analysis

Electronic Devices and Circuit Theory 2013 by Pearson Higher Education, Inc Electronic Devices and Circuit Theory 2013 by Pearson Higher Education, Inc
Boylestad Upper Saddle River, New Jersey 07458 All Rights Reserved Boylestad Upper Saddle River, New Jersey 07458 All Rights Reserved

2
 10/4/2017

Determine the dc bias voltage VCE and the current IC for the voltage divider
configuration using the approximate analysis.

Electronic Devices and Circuit Theory 2013 by Pearson Higher Education, Inc Electronic Devices and Circuit Theory 2013 by Pearson Higher Education, Inc
Boylestad Upper Saddle River, New Jersey 07458 All Rights Reserved Boylestad Upper Saddle River, New Jersey 07458 All Rights Reserved

Determine the levels of ICQ and VCEQ

Electronic Devices and Circuit Theory 2013 by Pearson Higher Education, Inc Electronic Devices and Circuit Theory 2013 by Pearson Higher Education, Inc
Boylestad Upper Saddle River, New Jersey 07458 All Rights Reserved Boylestad Upper Saddle River, New Jersey 07458 All Rights Reserved

3
 10/4/2017

Ch.4 Summary

Voltage Divider Bias Analysis

Transistor Saturation Level
V CC
I Csat = ICmax =
RC + RE

Load Line Analysis

Cutoff: Saturation:
V
VCE = VCC I = CC
C R +R
C E
IC = 0 mA
VCE = 0 V

Electronic Devices and Circuit Theory 2013 by Pearson Higher Education, Inc Electronic Devices and Circuit Theory 2013 by Pearson Higher Education, Inc
Boylestad Upper Saddle River, New Jersey 07458 All Rights Reserved Boylestad Upper Saddle River, New Jersey 07458 All Rights Reserved

Ch.4 Summary Ch.4 Summary

DC Bias With Voltage Feedback Base-Emitter Loop

From Kirchhoffs voltage law:
Another way to improve
VCC IC RC I B RF VBE I E RE = 0
the stability of a bias
circuit is to add a
feedback path from Where IB << IC: I'C = IC + IB IC
collector to base.
Knowing IC = IB and IE IC, the
In this bias circuit the loop equation becomes:
Q-point is only slightly VCC I B RC I B RF VBE I B RE = 0
dependent on the
transistor beta, . IB =
VCC VBE
Solving for IB: RF + (RC + RE )

Electronic Devices and Circuit Theory 2013 by Pearson Higher Education, Inc Electronic Devices and Circuit Theory 2013 by Pearson Higher Education, Inc
Boylestad Upper Saddle River, New Jersey 07458 All Rights Reserved Boylestad Upper Saddle River, New Jersey 07458 All Rights Reserved

4
 10/4/2017

Ch.4 Summary Determine ICQ and VCEQ

Collector-Emitter Loop

Solving for VCE:

VCE = VCC IC(RC + RE)

Electronic Devices and Circuit Theory 2013 by Pearson Higher Education, Inc Electronic Devices and Circuit Theory 2013 by Pearson Higher Education, Inc
Boylestad Upper Saddle River, New Jersey 07458 All Rights Reserved Boylestad Upper Saddle River, New Jersey 07458 All Rights Reserved

Determine the dc level of IB and VC

Electronic Devices and Circuit Theory 2013 by Pearson Higher Education, Inc Electronic Devices and Circuit Theory 2013 by Pearson Higher Education, Inc
Boylestad Upper Saddle River, New Jersey 07458 All Rights Reserved Boylestad Upper Saddle River, New Jersey 07458 All Rights Reserved

5
 10/4/2017

Assignment. 1 whole

Electronic Devices and Circuit Theory 2013 by Pearson Higher Education, Inc Electronic Devices and Circuit Theory 2013 by Pearson Higher Education, Inc
Boylestad Upper Saddle River, New Jersey 07458 All Rights Reserved Boylestad Upper Saddle River, New Jersey 07458 All Rights Reserved

Ch.4 Summary

Base-Emitter Bias Analysis

Transistor Saturation Level

V CC
I Csat = ICmax =
RC + RE

Load Line Analysis

Cutoff Saturation
V
VCE = VCC I = CC
C R +R
C E
IC = 0 mA
VCE = 0 V

Electronic Devices and Circuit Theory 2013 by Pearson Higher Education, Inc
Boylestad Upper Saddle River, New Jersey 07458 All Rights Reserved