Beruflich Dokumente
Kultur Dokumente
DEPARTMENT OF
ELECTRONICS AND COMMUNICATION ENGINEERING
QUESTION BANK
Regulation 2013
Prepared by
QUESTION BANK
SUBJECT : VL7013 VLSI FOR WIRELESS COMMUNICATION
SEM / YEAR: II / I
Integrated inductors, resistors, MOSFET and BJT AMPLIFIER DESIGN: Low Noise Amplifier Design - Wideband LNA
- Design Narrowband LNA - Impedance Matching - Automatic Gain Control Amplifiers Power Amplifiers.
PART A
BT
Q.No Questions Competence
Level
2. Predict the common methods for fabricating integrated resistors. BTL 2 Understanding
6. Inspect the issues which should be consider while designing wideband BTL 4 Analyzing
amplifier.
7. Differentiate BJT and CMOS. BTL 2 Understanding
8. Show the features of CMOS inter connecting reverse scaling. BTL 1 Remembering
17. Determine the importance of automatic gain control amplifier. BTL 5 Evaluating
PART B
3. Estimate the CS stage for a voltage gain of 5,an input impedance of BTL 5 Evaluating
50Kohm,and a power budget of 5Mw.Assume
uNCox=100uA/v^2,Vth=0.5v,lemada=0,and V DD=1.8v.Also assume a
voltage drop of 400mV across Rs. (15)
4. Formulate in detail about the impedance matching with illustrations. (15) BTL 6 Creating
UNIT II MIXERS
Balancing Mixer - Qualitative Description of the Gilbert Mixer - Conversion Gain Distortion - Low Frequency
Case: Analysis of Gilbert Mixer Distortion - High-Frequency Case Noise - A Complete Active Mixer.
Switching Mixer - Distortion in Unbalanced Switching Mixer - Conversion Gain in Unbalanced Switching Mixer
- Noise in Unbalanced Switching Mixer - A Practical Unbalanced Switching Mixer. Sampling Mixer - Conversion
Gain in Single Ended Sampling Mixer - Distortion in Single Ended Sampling Mixer - Intrinsic Noise in Single
Ended Sampling Mixer - Extrinsic Noise in Single Ended Sampling Mixer.
PART A
BT
Q.No Questions Competence
Level
5. List the two levels of subscript and superscript distinctions. BTL 1 Remembering
11. Examine G1 from the first order term id. BTL 4 Analyzing
15. Outline the block diagram of an unbalanced mixer for noise calculation. BTL 2 Understanding
16. Choose the two scenarios which is used in analysis of noise in unbalanced BTL 3 Applying
mixer.
17. Compare linearity and nonlinearity. BTL 2 Understanding
18. Distinguish between low frequency and high frequency mixers. BTL 4 Analyzing
19. Relate intrinsic noise and extrinsic noise in mixers. BTL 2 Understanding
20. Compile the assumptions which will consider during intermodulation BTL 6 Creating
distortion switching mixer?
PART B
6. Develop the theory of linear periodic LPTV system. (13) BTL 3 Applying
7. Calculate the noise in unbalanced mixer in the scenario of V lo not switching BTL 3 Applying
case and Vlo switching case and calculate the following.
(a) Sn2 (2)
(b) HLTI (5)
(c) NF (6)
8. Conclude a detailed note on special Vlo switching case mixers. (13) BTL 5 Evaluating
11. (a) List the assumptions made on model for distortion in unbalanced
switching mixer. (4)
(b) Show the distortion in unbalanced switching mixer in the condition BTL 1 Remembering
of low frequency case. (9)
12. Measure the conversion gain in unbalanced switching mixer with diagrams. BTL 6 Creating
(13)
13. Derive the Intrinsic noise in single ended sampling mixer. (13) BTL 4 Analyzing
14. Compare Sample & hold circuit and Sampling mixer with necessary BTL 2 Understanding
diagrams. (13)
PART C
1. Estimate the equivalent input-referred voltage and current noise sources at BTL 6 Creating
the input with feedback Vi 2 * Ii 2 in terms of the equivalent input referred
voltage and current noise sources without feedback V i Ii. (15)
2. Compare the different LNA architectures according to their gain, NF and BTL 5 Evaluating
matching performances. (15)
3. With the help of Gilbert / Quad mixer assume that M-M6 all have a W/L of BTL 6 Creating
50m/0.6m and make Vgs1 Vt = 0.387V, assuming that k = 7.5uA/V 2.
Then k=6250uA/V2 and gm1=k(VGS-Vt) = 2.4m-1. Design for a
conversion gain of 10dB. Assume that a Gilbert mixer operates under the
following conditions. VGS1 Vt = 0.387 V Arf = Ainterference = 0.316 V or 0dB.
Assume that the LO is not switching. Find the mixers distortion behavior
HD3, IM3 and IIP3.The mixer is assigned as IIP3 of -10dBm. Design this
mixer with some safety margin. Consider the specification arbitrarily. (15)
4. Evaluate Gc.IM3 and NF of both a 100MHZ IF single-ended sampling mixer BTL 5 Evaluating
and a 1.9GHz RF single-ended sampling mixer in a DECT application for the
following architecture shown in figure. (15)
BT
Q.No Questions Competence
Level
17. Predict the role of analog phase detector circuit. BTL 2 Understanding
19. Report the participation of frequency divider in frequency synthesizer BTL 2 Understanding
circuit.
20. Select the applications of DECT. BTL 3 Applying
PART B
1. (a) Write the design and function of phase locked loop with example. BTL 1 Remembering
(10)
3. (a) Examine the digital phase detector circuit with example. BTL 1 Remembering
(9)
(b) Tell about the charge pump. (4)
4. (a) Summarize the design procedure of LC oscillator with example. BTL 2 Understanding
(10)
(b) Outline on Tuning Kvco. (3)
5. (a) Conclude the design model of PLL circuit with example. (6) BTL 5 Evaluating
6. How the ring oscillator operates and explain it with an example circuit. (13) BTL 1 Remembering
7. (a) Construct the frequency divider circuit with examples. (7) BTL 3 Applying
(b) Identify the features of digital equalizers. (6)
8. Demonstrate the digital phase detector circuit with example. (13) BTL 3 Applying
9. Analyze the operation of analog phase detector circuit. (13) BTL 4 Analyzing
10. Create a complete design of synthesizer with DECT application. (13) BTL 6 Creating
14. Illustrate the procedure of Ring oscillator with example. (13) BTL 2 Understanding
PART C
1. (a) Design the phase detector based on D-FF. (7) BTL 6 Creating
(b) Plot the waveforms at the internal nodes of this phase detector. (8)
2. Determine the following DECT applications. BTL 5 Evaluating
(a) Cordless PBXs (8)
(b) Interworking of cordless equipment with the ISDN. (7)
3. Construct the architecture of DECT with relevant diagrams. (15) BTL 6 Creating
20. Compare DAC for Baseband and DAC for Passband. BTL 4 Analyzing
PART B
8. (a) Write the implementation of LMS algorithm using VHDL. BTL 1 Remembering
(10)
(b) Draw the RTL schematic for LMS algorithm. (3)
9. Inspect the general form of Adaptive FIR Algorithms. (13) BTL 4 Analyzing
10. (a) Predict the requirements for Minimum Data Converter. BTL 6 Creating
(10)
(b) Discuss the performance Limitations of Minimum Data
Converter. (3)
11. Analyze the various applications of adaptive filter in detail. (13) BTL 4 Analyzing
12. (a) Summarize the problem in Adaptive filtering. (7) BTL 2 Understanding
(b) Outline the diagram and explain the filter structures. (6)
13. Examine the following BTL 4 Analyzing
PART C
1. BTL 5 Evaluating
UNIT V IMPLEMENTATIONS
VLSI architecture for Multitier Wireless System - Hardware Design Issues for a Next generation CDMA System
PART A
3. List out the objectives of Hardware Software Co-design in multi- BTL 1 Remembering
tier system.
4. Construct the turbo decoding architecture. BTL 3 Applying
9. Conclude the cascaded systems for noise figure computation. BTL 5 Evaluating
10. Explain multitier network interface card. BTL 5 Evaluating
11. Illustrate the Enhance robustness and capacity via cognitive relays. BTL 3 Applying
12. Build the architecture of Reconfigurable Baseband modulator for BTL 3 Applying
software defined radio.
13. Examine the operation of Virtual Antennas. BTL 1 Remembering
19. Elaborate the Key Time Scales for System Design. BTL 6 Creating
20. Estimate the Power Efficiency of multi-tier wireless system. BTL 2 Understanding
PART B
1. Evaluate Random Access and Scheduling in CDMA technique. BTL 5 Evaluating
(13)
2. (a) Define the performance issue of CDMA technique. (4) BTL 1 Remembering
(b) Describe the Multiuser Channel Capacity in CDMA
technique. (9)
5. (a) Illustrate the Adaptive Resource Allocation for Wireless BTL 2 Understanding
Ad-Hoc Networks. (10)
(b) Summarize the merits and demerits of Adaptive
Resource Allocation. (3)
PART C
1. Design a Home/Desk Area WLAN using VLSI Architectures for BTL 6 Creating
Multitier Wireless Systems. (15)
2. (a) Judge the following statement: CDMA is not suitable for 4G BTL 5 Evaluating
system. Justify with relevant diagrams. (7)
(b) Explain the CDMA-Based 2G and 3G Systems with real time
applications and draw the necessary diagrams. (8)
3 Elaborate the BTL 6 Creating
(a) Multiuser Capacity for wireless systems with neat diagrams. (8)
(b) Opportunistic Communication. (7)
4 Conclude the following with diagrams BTL 5 Evaluating
(a) Spatial multiplexing. (8)
(b) Multiplexing architectures MIMO system. (7)