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Elektor Post

Project No. 30

Mini Noise Generator

Check that frequency response

A
A
No. 30 Mini Noise Generator Check that frequency response A To make a noise generator using

To make a noise generator using digital tech- nology you can start with a long shift register made up of a chain of D-type flip flops. The logic value of the last flip flop in the reg- ister together with some selected flip flops along the chain (taps) are then logically gated together to produce the (feedback) signal which forms the input to the shift register. Figure 1 shows the basic configuration of a typical Linear Feedback Shift Register (LFSR) using XOR logic gates to generate the feed- back logic signal.

A simple audio-band noise gener- ator is a useful tool for testing amplifiers. In days gone by, you would use a diode or the base-emitter junction of a transis- tor as the (analog) noise source, in the age of the binary digit there are other solutions…

noise generator based on this principle was

described in an old Elektor article [2]. It used

a 16-bit long shift register with XNOR gates

to generate the feedback signal using a poly- nomial of 1+V2+V3+V5+V16. Testing this design it was apparent that the noise charac- teristics across the audio spectrum were not very linear; with audible rumbles and chirps. In an effort to improve the characteristics two versions of the LFSR named after the Ital- ian mathematician Leonardo Fibonacci were implemented.

A Linear Feedback Shift RegisterItal- ian mathematician Leonardo Fibonacci were implemented. The register’s output waveform looks like a random

The register’s output waveform looks like a random sequence of ones and zeroes, but in truth (since there is no truly chaotic behav- ior like the noise generated in a base-emit- ter junction) the sequence is deterministic. The bit sequence generator also has uses as a pseudo-random number generator or for encrypted stream ciphers. The bit sequence is made up of many discrete frequencies which extend to one half of the clock fre- quency. When a chain of n =8 cells is used with a primitive feedback polynomial (here 1+V8+V6+V5+V4), it generates a total of 2 8 -1 different frequencies. A large value of n is important for noise generator applications because it creates a flat noise characteristic across the spectrum. More information on the theory and math behind this technique can be found at [1].

16 bit Fibonacci-LFSR : feedback 1 + V11 + V13 + V14 + V16 with XOR and

24 bit Fibonacci-LFSR: feedback 1 + V20 + V21 + V23 + V24 with XOR.

Both of these examples were shown to gen- erate a consistently flat output across the audio spectrum.

A Controller and Filter

The LFSR can of course be built using a ded- icated shift register IC such as a 74HCT174 plus some additional logic [2] but all those naked digital gates look so 20 th century. Surely a more elegant and contemporary solu- tion is to use a small 8-pin Atmel ATtiny13 microcontroller and emulate the feedback register function in an (Assembler) program (Figure 2). Jumper JP3 shown on the cir-

By

Wilfried Wätzig

(Germany)

elektor

program ( Figure 2 ). Jumper JP3 shown on the cir- By Wilfried Wätzig (Germany) elektor

post | Project No. 30 | 1

Elektor Post

Project No. 30

+5V C3 JP1 1 R1 R5 C1 IC1 820p C4 8 ATTINY13-20PU 100n VCC R2
+5V
C3
JP1
1
R1
R5
C1
IC1
820p
C4
8
ATTINY13-20PU
100n
VCC
R2
R3
100n
5
3
PB0/PCINT0/AIN0/OC0A/MOSI
10k
10k
R4
8
6
1
IC2a
5 C5
PB1/PCINT1/AIN1/OC0B/INT0/MISO
47k
7
2
7
PB2/PCINT2/SCK/ADC1/T0
6 IC2b
2
PB3/PCINT3/CLKI/ADC3
47u
3
16V
4
PB4/PCINT4/ADC2
JP4
1
PROGRAM
1
PB5/PCINT5/RESET/ADC0/DW
+5V
JP3
1
1
2
GND
3
4
C2
IC2 = TS912
R6
R7
5
6
4
820p
JP2
130312-11
10k
10k
10k
1k

+5V

OUT

cuit connects to the controller pin PB4 and allows the register length to be changed from 16 memory cells (jumper fitted) to 24 cells (jumper removed).

The microcontroller is clocked at 9.6 MHz by its built-in clock generator and produces a new value in the LFSR every 10 µs (100 kHz). The distance between the generated frequen- cies is either 100 kHz/2 16 –1 ≈ 15.5 Hz or 100 kHz/2 24 –1 ≈ 0.006 Hz, the upper fre- quency limit is f Clk /2 = 50 kHz. The output signal from V1 (the shift register output) is at pin PD0 of the ATtiny microcontroller. In 24-cell mode the sequence takes almost 3 minutes!

The assembler program for this project can be downloaded from [3]. The Atmel AVR-Studio 6 was used for program development. Fuses should be set to HIGH 0xFF and LOW 0x7A. The circuit diagram shows the connection of a standard-layout ISP connector for program- ming but if a ready-programmed controller is used [3] J2 can be left out.

IC2A is configured as a simple Sallen-Key low- pass filter with a cut off frequency of 19.4 kHz [4], all frequency components above the audio band (including the 100 KHz clock frequency) will be attenuated by its 12 dB/Octave char- acteristic. The signal is then simply buffered by IC2B and because the opamp is powered from a single +5 V supply any DC compo- nent in the signal is decoupled by C5 and the resulting output signal taken to JP4. IC2 is a dual opamp type TS912 with rail-to-rail capability. The complete circuit is so small it fits neatly onto a small square of breadboard.

(130312)

Web Links

[1] http://en.wikipedia.org/wiki/ Linear_feedback_shift_register

[2] Noise Generator, Elektor December 2002, ref. no. 014118

[3] www.elektor-magazine.com/130312

[4] https://en.wikipedia.org/wiki/

Sallen%E2%80%93Key_topology

Figure 1. The noise generator uses an ATtiny to produce the LFSR function in software.

Figure 2. The 8-memory element Fibonacci linear feedback shift register.

CLK

D Q D Q D Q D Q D Q D Q D Q D
D
Q
D
Q
D
Q
D
Q
D
Q
D
Q
D
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D
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Y
1
2 3
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7 8
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8 + X 6 + X 5 + X 4 + 1
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