1st Power Electronic & Drive Systems & Technologies Conference
Voltage Flicker Mitigation with Dynamic
Voltage Restorer
Arash Khoshkbar Sadigh, Seyed Hossein Hosseini, Mehdi Farasat, Ehsan Mokhtarpour
Faculty of Electrical and Computer Engineering, University of Tabriz, Tabriz, Iran
a.khoshkbar.sadigh@gmail.com , hosseini@tabrizu.ac.ir , mehdi.farasat.ee@gmail.com , ehsan.mokhtarpour@gmail.com
Abstract--This paper is concerned with a pre-flicker
compensation strategy adopted by a dynamic voltage restorer
(DVR) to mitigate voltage flicker in a power system. The DVR
configuration based on flying capacitor multicell (FCM)
converter is proposed to mitigate the voltage flicker because of
taking the FCM converter advantages such as transformer-less
operation and natural self-balancing of flying capacitors
voltages. The proposed DVR consists of a series converter on
the source-side and a shunt rectifier on the load-side. Choosing
this configuration for DVR makes it possible that the shunt
rectifier can maintain dc link voltage at a desired value which
results in the proper performance of the DVR. Furthermore,
the DVR reference voltages calculation method and also, the
pre-flicker compensation strategy, which are based on
synchronous reference frame (SRF), are adopted as the control
strategy. Simulation results, which are provided by
PSCAD/EMTDC software, verify that the proposed detection
and determination methods are able to detect the voltage
flickers and determine the three single-phase reference voltages
of DVR as fast as the DVR mitigates the voltage flickers.
Index Terms--Dynamic Voltage Restorer, Voltage Flicker,
Flying Capacitor Multicell Converter, Pre-Flicker
Compensation Strategy
I. Introduction
Modern end-use equipment is very sensitive to voltage
fluctuation and flicker. In many cases, mitigating the voltage
flicker helps to prevent equipment malfunction. Flicker
mitigation techniques depend on injecting a certain amount
of reactive power defined by the difference between the
reference value and the measured voltage. In literature, two
compensation strategies to mitigate the flicker phenomenon
can be found [1]. One strategy forces the active
compensators to supply the load with the oscillating part of
the instantaneous imaginary power absorbed by it [1]. The
other strategy forces the active compensators to supply the
load with the oscillating parts of both the instantaneous
imaginary power and the instantaneous real power absorbed
by it. The use of a DVR is one of the most effective
solutions for “restoring” the quality of voltage at its load-
side terminals when the quality of voltage at its source-side
terminals is disturbed [2]-[4].
The FCM converter [5], [6], has many attractive
properties for medium voltage applications including, in
particular, the advantage of transformer-less operation and
the ability to naturally maintain the flying capacitors
voltages at their target operating levels [7]. Because of
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mentioned properties, this paper deals with the configuration
of DVR based on a 7-level FCM converter. It should be
noted that FCM converter based DVR configuration for
voltage flicker mitigation has not been proposed yet.
In this paper, a configuration of DVR based on a 7-level
FCM converter is proposed to mitigate voltage flicker in a
power system. The pre-flicker compensation strategy is
applied to DVR to compensate the voltage flickers and a
method based on synchronous reference frame (SRF) is
proposed to detect the voltage flicker and determine the
three single-phase reference voltages of DVR which results
in a good dynamic response time of the DVR. The proposed
system configuration consists of a series converter on the
source-side and a shunt rectifier on the load-side. This
system configuration allows the use of an extremely small
dc capacitor because the dc capacitor does not play any role
in feeding electric energy to the series converter during
voltage flicker compensation, but takes role in smoothing
the common dc-link voltage [2], [8].
Simulation results are presented to validate the
effectiveness and advantages of the novel configuration of
DVR and its proposed detection and determination methods.
II. Proposed FCM Converter Based DVR for Voltage
Flicker Mitigation
A traditional DVR mainly consists of series and shunt
converters connected back-to-back and a common dc
capacitor used as an energy-storage element. Fig. 1 shows
two different types of DVR configurations. Each consists of
a set of shunt and series converters connected back-to-back
and a common dc capacitor.
The series converter consists of a three-phase voltage-
source converter or three single-phase voltage-source
converters. It starts to inject three-phase compensating
voltages in series into the power line as soon as voltage
flicker occurs. It is noted that in Fig. 1(a), the shunt
converter is installed at the source-side [9], [10], whereas in
Fig. 1(b), it is installed at the load-side [2], [8]. In both
systems, the shunt converter uses a three-phase diode
rectifier that charges the dc capacitor in normal conditions.
There exists a significant operational difference between the
shunt converters in Figs. 1(a) and 1(b) during the occurrence
of voltage flickers. Suppose a voltage drop occurs at the
source-side or at the ac terminals of the shunt converter. In
388
 Fig. 1(a), the shunt converter loses its rectification capability
when the maximal source voltage becomes lower than the
dc-link voltage. Therefore, the series converter requires a
large dc capacitor as an energy-storage element intended for
feeding active power to it. On the other hand, in Fig. 1(b),
no voltage drop appears at the load-side or at the ac
terminals of the shunt converter when a voltage flicker
occurs at the source-side because the series converter
compensates the voltage flicker. This makes it possible to
keep the shunt converter active in regulating the dc link
voltage, even for long-duration voltage flickers. In this case,
the active power required for voltage flicker compensation is
injected from the shunt converter to the series converter. In
other words, the dc capacitor does not play any role in
feeding active power required for compensation to the series
converter. This system configuration allows the use of an
extremely small dc capacitor intended for smoothing the
common dc-link voltage. Thus, the DVR in Fig. 1(b) can
operate properly independent of duration (long or short) of
voltage flickers.
Fig. 1. DVR configuration by installing the shunt converter at the: (a)
In this paper, the configuration of DVR based on the source-side; (b) load-side.
FCM converter is proposed to increase the number of output
voltage levels and as a results, reduce the output voltage
THD. A 7-level FCM converter is shown in Fig. 2. In
addition to transformer-less operation and the natural self-
balancing ability of FCM converter, redundancy in the
number of combinations required to obtain a desired voltage
level and reduction in the semiconductor losses are the other
advantages of this converter [2], [7], [11]. Because of
mentioned properties, in this paper a 7-level FCM converter,
as shown in Fig. 4, is adopted for use in DVR. As shown in Fig. 2. Configuration of 7-level flying capacitor multicell converter.
Fig. 2, there are two dc capacitors for dc link of each single
phase FCM converter, therefore for three single-phase FCM
converters, six dc capacitors are required. While, as shown Generally, an output RLC filter (balance booster circuit)
in Fig. 4, in this configuration only one dc link is used for is needed to accelerate the self-balancing process. This filter,
three single-phase FCM converters. As a result, the required which consists of a resistance, inductance and a capacitance
dc capacitors for dc link are decreased from six to two. connected in series, accelerates the self balancing process
and is connected in parallel with the load. The output RLC
For producing 7-level output voltage with the cascade filter is tuned to the switching frequency as follows:
multicell (CM) converter and only one dc link capacitor,
which is obtained from shunt rectifier, it is essential to use 1
L⋅C = (2)
three CM converters for each phase. Also, because of 2 ⋅ π ⋅ f SW
existence of only one dc link capacitor, it is required to use where, fSW is the switching frequency, L and C are
three isolation transformers for each phase. While in the inductance and capacitance of the output RLC filter.
same conditions, using an FCM converter causes to reduce
the number of isolation transformers for each phase from
three to one. As a result, the cost and size of the DVR is
decreased.
III. Control Strategies
a) Flying Capacitor Multicell Converter Control Strategy
Self-balancing of the flying capacitors voltages occurs
naturally without any feedback control. A necessary
condition for self-balancing is that the average flying Fig. 3. Phase shifted sinusoidal pulse width modulation for 7-level flying
capacitors currents must be zero. As a result, each cell must capacitor multicell converter.
be controlled with the same duty cycle and a regular Phase
Shifted Sinusoidal Pulse Width Modulation (PS-SPWM) in b) Voltage flickers Compensation Strategy
which the phase shift between the carriers of each cell is: To avoid tripping of the load, the amplitude and phase
ϕ = 2π / n (1) angle of the load voltage has to be restored by the DVR.
Different strategies can be used to achieve this goal. Three
where, n is the number of cells. The PS-SPWM for the 7-
basic strategies are the pre-flicker compensation [2], [12],
level FCM converter is shown in Fig. 3 in which the M
in-phase compensation [2], [13] and the energy-optimized
symbol dedicates the modulation index. compensation strategies [14], [15], [16].

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 Fig. 4. Power circuit of the proposed DVR based on 7-level flying capacitor multicell converter for voltage flicker mitigation.
The standard solution for compensating voltage
disturbances is to restore the load exact voltage before the
disturbance. Therefore, the amplitude and the phase angle of
the voltage before the flicker have to be exactly restored [2],
[12]. The phasor diagram of the pre-flicker compensation
strategy is shown in Fig. 5. In this figure, the dashed
′ , Vload
quantities ( V grid ′ , Vdvr′ and I load
′ ) indicate variables
after the flicker. The phasors prior to the flicker are
represented by Vgrid , Vload and I load . This compensation
strategy leads to the lowest distortions at the load-side,
because the amplitude and phase angle of the voltage at the
load-side is not changed during the flicker. For this strategy,
a phase-locked loop (PLL) is synchronized with the load
voltage. As soon as a failure occurs, the PLL is locked and
therefore, the phase angle can be restored.
Fig. 5. Phasor diagram of the pre-flicker compensation strategy.
Depending on the phase angle of the grid voltage during
the flicker, the DVR has to inject higher voltage amplitude
to restore the correct voltage magnitude, because the phase
jump of the grid has also to be compensated by the DVR,
therefore, the system has to be designed for the highest
possible voltage possible voltage. This strategy is able to
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compensate any kind of voltage flickers with or without any
phase-variations in each grid phase voltages.
In this paper, the pre-flicker compensation strategy is
applied to DVR; the main reasons are its mentioned
advantages, excellent performance particularly in the case of
phase jumps in the grid voltage and the ability of
compensation for any kind of voltage flickers.
IV. Proposed Method for Determination of DVR Reference
Series Injected Voltage
In this paper, the SRF is proposed to detect the voltage
flickers and also to determine the three single-phase
reference voltages of DVR. As the first step, the line-neutral
grid voltages in the pre-flicker state are transferred from abc
coordinate system to SRF as follows:
⎡V grid ,d ⎤
⎢ ⎥
⎢V grid ,q ⎥ =
⎢V grid ,0 ⎥
⎣ ⎦
⎡ ⎤
⎢cos(ωt ) cos(ωt − 120) cos(ωt + 120) ⎥ ⎡Vgrid ,a ⎤
2⎢ ⎢ ⎥
sin(ωt ) sin(ωt − 120) sin(ωt + 120) ⎥ ⋅ ⎢V grid ,b ⎥ (3)
3 ⎢ ⎥
⎢ 1 1 1 ⎢ ⎥
⎥ ⎣ grid ,c ⎦
V
⎣⎢ 2 2 2 ⎦⎥
where, Vgrid ,a , V grid ,b , V grid ,c are the measured line-
neutral grid voltages of phases a, b and c, respectively and
V grid ,d , V grid ,q , Vgrid ,0 are the d-component, q-component
and zero-component of grid voltages in the SRF,
respectively.
Then, the phase angle of phase a voltage in the pre-
flicker state (healthy state) which results in nil value for
zero-component of dq0 is stored as the reference phase as
 follows: there are no voltage fluctuations in load three-phase voltage.
Moreover, the DVR is capable of mitigating voltage flickers
⎛ Vgrid ,d ⎞ with ±66% p.u magnitude because the maximum magnitude
θ ref = arctan⎜⎜ dc ⎟
⎟⎟ (4) of DVR reference voltage is almost 0.25 p.u. while it can be
⎜ V grid ,q
⎝ dc ⎠ increases to 1 p.u., as shown in Fig. 6(d). Fig. 7 depicts the
where, V grid ,d and V grid ,q are dc values of d and q- internal flying capacitors voltages of the 7-level FCM
dc dc converter based DVR. As it can be seen, the flying
components of grid voltages in the SRF, respectively. capacitors voltages are maintained at a pre-fixed desired
Next, the reference rms value of line-neutral grid voltages value without the need to implement any feedback control.
ref
( Vrms ) and the obtained reference phase ( θ ref ) are used to
determine the values of reference grid voltages in the SRF VI. Conclusion
as follows This paper has presented the pre-flicker compensation
ref
Vgrid ,d = 2 ref
⋅ Vrms ( )
⋅ sin θ ref
(5)
strategy for the control of a dynamic voltage restorer
intended to mitigate the voltage flicker phenomenon in a
ref
Vgrid ref
,q = 2 ⋅ Vrms ⋅ cos(θ ) ref
(6) power system. Because the multicell converters are very
interesting for high-power/medium-voltage applications, and
ref ref
where, V grid ,d and V grid ,q are the reference d and q-
also considerably improve the output voltage frequency
spectrum, in this paper an FCM converter based DVR has
components of grid voltages in the SRF, respectively.
been proposed to improve the quality of DVR output
An online comparison between the dq0 values of line- voltages as well as to mitigate the voltage flicker.
neutral grid voltages and the dq0 values of reference line-
Also, new methods based on the SRF have been proposed
neutral grid voltages is performed. If differences exist
to detect the voltage flicker and determine the reference
between them, it is obvious that the voltage flicker is
series injected voltage of DVR. As depicted in simulation
occurred. So, the differences are taken into account as dq0
results, the pre-flicker compensation strategy and the
values of DVR desired injected voltages
proposed SRF based determination and detection methods
ref ref show excellent performance and good dynamic response
Vdvr ,d = V grid ,d − V grid ,d (7)
time. Also, the mentioned advantages of shunt rectifier,
ref ref
Vdvr ,q = V grid ,q − V grid ,q (8) installed at the load-side, were taken into account.
ref I. References
Vdvr ,0 = −V grid ,0 (9)
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Fig. 6. Simulation results before and after the voltage flicker: (a) grid voltage (Volt); (b) DVR injected voltage (Volt); (c) load voltage (Volt); (d)
DVR reference voltage.

Fig. 7. Internal flying capacitors voltages of the 7-level flying capacitor multicell converter based DVR (Volt): (a) phase a converter; (b) phase b
converter; (c) phase c converter.

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