Code: 13A04303

SS
B.Tech II Year I Semester (R13) Supplementary Examinations June 2015
SWITCHING THEORY & LOGIC DESIGN
(Computer Science and Engineering)
Time: 3 hours Max. Marks: 70
PART - A
(Compulsory Question)
*****
1 Answer the following: (10 X 02 = 20 Marks)
(a) Given 1610 = 100b, what is the values of b?
(b) Convert the binary 1001 to Gray code.
(c) ____________is called ALL or Nothing gate. Draw its logic.
(d) What are Universal gates draw its logic and truth table?
(e) Reduce the expression f=AB+AB+AB.
(f) Define false minterms and false prime implicants (FPI).
(g) What is a Flip Flop?
(h) List applications of shift registers.
(i) Expand A+B to Minterms.
(j) Divide 32 by 5 in binary.

PART - B
(Answer all five units, 5 X 10 = 50 Marks)
UNIT - I
2 (a) Add-75 to +26 using 2s complement method.
(b) Reduce the expression f = A+B[AC+(B+C)D]
(OR)
3 (a) Add Hexadecimal numbers A0FC+B75F.
(b) State and explain Demorgans theorem.
UNIT - II
4 (a) Reduce the expression using K-map method:

(b) Using an example write the procedure to expand an SOP expression into POS form.
(OR)
5 (a) Reduce the expression using K-map method and implement using any universal gate:

(b) Obtain the minimal expression for using tabular method.

UNIT - III
6 (a) With the help of truth table and logic diagram explain the Half adder.
(b) Draw a neat figure and explain the function of a Magnitude comparator.
(OR)
7 (a) With an example explain the function of a binary multiplier.
(b) Explain the operation of a Multiplexer.

UNIT - IV
8 (a) Explain the circuit diagram and truth table of a SR flip flop.
(b) Explain 4-bit shift register.
(OR)
9 (a) Draw a ring counter using JK flip flop and explain its function.
(b) Explain D-flip flop and obtain the state equation, the state diagram, state table and
excitation table of the same.
UNIT - V
10 (a) Draw the architecture and explain ROM.
(b) Explain PAL with a neat figure.
(OR)
11 (a) With an example explain Error detection and correction.
(b) Distinguish between PLA and PAL.
*****