Lahore University of Management Sciences

EE/CS-320 Computer Organization and Assembly

Language
Fall Semester 2017-18

Course Catalog Description

Modern computer technology requires professionals of every computing specialty to understand both hardware (HW) and software (SW). The
interaction between HW and SW also offers a framework for understanding the fundamentals of computing. This course will have HW focus in the
class and students will study topics such as Instruction Set Architecture, Basic Assembly Instructions, Addressing Modes, Computer Performance
evaluation, Floating Point Data, Data Path Design for Single Cycle and Multiple Cycle Computers, Pipelined Data Path Basics, Hazards in Pipelining,
Memory hierarchy design, storage and I/O. The Lab will have focus on MIPS Assembly Level Programming and some HW experiments. The course
will have one comprehensive design project in which students will design and implement an 8-bit MIPS architecture based processor using HW
components.

Course Details
Credit Hours Total 4 (Theory: 3; Lab: 1)
Core Core for CS Majors of SSE
Elective Elective for EE Majors of SSE or for students from other majors who fulfill the Pre-Requisite requirement
Open for Student Category BSc. students
Closed for Student Category

Course Prerequisite(s)/Co-Requisite(s)
Pre-requisites
EE/CS-220 Digital Logic Circuits, and
CS-200 Introduction to Programming
Talk to the instructor if you are unsure about the background needed to take this course.

Co-requisites: None

Course Offering Details

Lecture(s)
Recitation (per week)
Lab (if any ) per week
Tutorial (per week)
Nbr of Lec(s) Per Week 2 Duration 75 min Timings
and Venue
Nbr of Rec (s) Per x Duration
Week
Nbr of lec(s) Per Week 1 Duration 180 min
Nbr of Tut(s) Per x Duration
Week

Instructor Jahangir Ikram

Room No. 9-317A
Office Hours TBA
Email jikram@lums.edu.pk
Telephone 042-35608201
Secretary/TA
TA Office Hours
Course URL (if any) Learning Management System (LMS)
 Lahore University of Management Sciences

Course Learning Outcomes

EE320: The students should be able to:

CLO1: Demonstrate a fundamental knowledge of basic hardware building blocks in a computer System

CLO2: Demonstrate a knowledge of methods, steps and techniques to build a complete working processor, instruction decoder, etc

LAB related

CLO3: Develop an ability to conduct experiments (plan experimental work, construct circuits, connect instruments, operate the
Instruments, take measurements, as well as analyze and interpret data and report the results.

CLO4: Use Modern analysis and simulation software to design and test a complete 32-bit processor.

CLO5: Demonstrate the ability to work in a team through a group project involving processor design.

CLO6: Through Lab based tasks and project develop skills of leadership and project management.

Relation to EE Program Outcomes

EE-320 CLOs Related PLOs Levels of Learning Teaching Methods CLO Attainment checked in
CLO1 PLO1 Cog-1,2 Instruction, Tutorial, Assignments Assignments, Quizzes,
Midterm, Final
CLO2 PLO3 Cog-1,2,3 Instruction, Tutorial, Assignments Assignments, Quizzes,
Midterm, Final
CLO3 PLO2 Cog-1,2,3,4 Instruction, Tutorial, Assignments Assignments, Quizzes,
Midterm, Final
CLO4 PLO5 Cog-1,2,3,4 Instruction, Tutorial, Assignments Assignments, Quizzes, Final
CLO5 PLO6 Cog-1,2,3,4 Instruction, Tutorial, Assignments Assignments, Quizzes, Final
CLO6 PLO9 Cog-1,2,3 Instruction, Tutorial, Assignments Assignments, Quizzes, Final

Grading Breakup and Policy

Quiz(s): 15%
Assignment(s): 3%
Lab(s): 12% (Lab Quiz(s): 2%, Lab Attendance and Task Completion: 10%)
Project: 15%
Midterm Exam: 25%
Final Exam: 30%

COURSE OVERVIEW
Module Topics Sessions Recommended Objectives/ Application
Readings
1 Introduction 2 CH-1 TB Basic introduction of the
 Lahore University of Management Sciences
.History and System Level View
.Some important design considerations
2 Language of the Computer
.Operation and Operands of HW
.Signed and unsigned Numbers
.Representing Instructions in the Computer
. Logic Operations
.Instructions for making Decisions
.Supporting Procedures in HW (Stack)
.Addressing Modes
.Intro to Compilers
. A sort procedure and its assembly
.Pointers versus Arrays
3 Arithmetic for Computers
.Addition and Subtraction (ALU Design)
. Multiplication and division
. Floating Point Arithmetic
4 CPU Performance Factors
5 The Processor (Single Cycle)
. Building a Data path
. Simple Implementation Scheme (Control)
Mid Term Examination
6 The Processor (Pipelined)
. Pipelined Datapath and Control
. Introduction to Stalling and Forwarding
. Data Hazards and Control Hazards
. Exceptions
7 Memory Hierarchy Design
. A Top Level View
. Cache Memory
. Main Memory
. Virtual Memory
8 Storage, Input / Output and OS Support
. Storage Devices
. I / O Topics
. Introduction to OS Support
(Module-8 is subject to availability of time)
Textbook(s)/Supplementary Readings
6 CH-2 TB
3 CH-3 TB
Topic C.5 TB
1 Sec. 1.4 TB
2 CH-4 TB
5 CH-4 TB
CH-8 RB2
CH-5 TB
5 CH-4,5 RB1
4 CH-6 TB
CH-6 to 8 RB1
Final Examination
course
To learn the basics of the MIPS
Assembly Language and Practice
its programming
To learn the hardware used by
computers to perform integer
Arithmetic and the basics of
Floating Point Arithmetic
CPU Performance Factors
To build a basic MIPS 5-Stage
Single Cycle Processor by using
the HW tools learnt already and
which fulfills the Instruction Set
requirements of Module-2
To incorporate Pipelining into the
Processor designed
in Module-5. To learn the various
issues that arise due to pipelining
and techniques that resolves
these issues.
To understand the concepts of
Cache Memory, Main Memory,
Virtual Memory and to introduce
the design of memory hierarchy.
To learn about various
Storage Devices and topics
pertaining to I/O (Input/Output)
 Lahore University of Management Sciences
Textbook (TB):

Computer Organization and Design: The Hardware / Software Interface by David A. Patterson and John L. Hennessy

(4th Edition)
Reference Books (RB):
1. Computer Organization and Architecture by William Stallings (8 th Edition)
2. Computer Organization by Carl Hamacher, Zvonko Vranesic and Safwat Zaky (5 th Edition)
3. MIPS Assembly Language Programming by Robert L. Britton

Programming Environments:
1. PCSPIM MIPS Assembly Language Simulator
2. Visual MIPS Simulator

Examination Detail

Yes/No: Yes
Midterm Combine Separate: Combine
Exam Duration: 180 minutes
Preferred Date: At the beginning of Mid-Term Exam period
Exam Specifications: Close-Book/Close-Notes/Calculator Allowed

Yes/No: Yes
Final Exam Combine Separate: Combine
Duration: 180 minutes
Exam Specifications: Close-Book/Close-Notes/Calculator Allowed

Prepared by: Muhammad Jahangir Ikram

Date: 15 August 2017