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AD707
FEATURES CONNECTION DIAGRAMS
Very High DC Precision TO-99 (H) Package
15 mV max Offset Voltage
NULL
0.1 mV/8C max Offset Voltage Drift
0.35 mV p-p max Voltage Noise (0.1 Hz to 10 Hz} NULL 1
8
7 +VS
8 V/mV min Open-Loop Gain
130 dB min CMRR IN 2 6 OUTPUT
120 dB min PSRR
1 nA max Input Bias Current AD707
+IN 3 5 NC
4
AC Performance VS
0.3 V/ms Slew Rate NC = NO CONNECT
NOTE: PIN 4 CONNECTED
0.9 MHz Closed-Loop Bandwidth TO CASE
Dual Version: AD708
Available in Tape and Reel in Accordance with Plastic (N) and
EIA-481A Standard Cerdip (Q) Packages SOIC (R) Package
REV. B
Information furnished by Analog Devices is believed to be accurate and Analog Devices, Inc., 1995
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
otherwise under any patent or patent rights of Analog Devices. Tel: 617/329-4700 Fax: 617/326-8703
2 REV. B
AD707
ABSOLUTE MAXIMUM RATINGS 1 ORDERING GUIDE
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 V
Temperature Package Package
Internal Power Dissipation2 . . . . . . . . . . . . . . . . . . . . 500 mW
Model Range Description Option
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VS
Output Short Circuit Duration . . . . . . . . . . . . . . . . Indefinite AD707AH 40C to +85C 8-Pin Metal Can H-08A
Differential Input Voltage . . . . . . . . . . . . . . . . . +VS and VS AD707AQ 40C to +85C 8-Pin Ceramic DIP Q-8
Storage Temperature Range (Q, H) . . . . . . 65C to +150C AD707AR 40C to +85C 8-Pin Plastic SOIC SO-8
Storage Temperature Range (N, R) . . . . . . . 65C to +125C AD707AR-REEL 40C to +85C 8-Pin Plastic SOIC SO-8
Lead Temperature Range (Soldering 60 sec) . . . . . . . +300C AD707AR-REEL7 40C to +85C 8-Pin Plastic SOIC SO-8
NOTES AD707BQ 40C to +85C 8-Pin Ceramic DIP Q-8
1
Stresses above those listed under Absolute Maximum Ratings may cause AD707JN 0C to +70C 8-Pin Plastic DIP N-8
permanent damage to the device. Exposure to absolute maximum rating condi- AD707JR 0C to +70C 8-Pin Plastic SOIC SO-8
tions for extended periods may affect device reliability.
2
8-pin plastic package: JA = 165C/Watt; 8-pin cerdip package: JA = 110C/Watt;
AD707JR-REEL 0C to +70C 8-Pin Plastic SOIC SO-8
8-pin small outline package: JA = 155C/Watt; 8-pin header package: JA = AD707JR-REEL7 0C to +70C 8-Pin Plastic SOIC SO-8
200C/Watt. AD707KN 0C to +70C 8-Pin Plastic DIP N-8
AD707KR 0C to +70C 8-Pin Plastic SOIC SO-8
AD707KR-REEL 0C to +70C 8-Pin Plastic SOIC SO-8
AD707KR-REEL7 0C to +70C 8-Pin Plastic SOIC SO-8
METALIZATION PHOTOGRAPH
Dimensions shown in inches and (mm).
Contact factory for latest dimensions.
NULL +VS
8 7
6
VOUT
0.059
(1.51)
4
VS
1 2 3
NULL IN +IN
0.110 (2.79)
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. WARNING!
Although the AD707 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
ESD SENSITIVE DEVICE
precautions are recommended to avoid performance degradation or loss of functionality.
REV. B 3
AD707Typical Characteristics
+VS +VS 35
COMMOM-MODE VOLTAGE LIMIT V
(REFERRED TO SUPPLY VOLTAGES)
OUTPUT VOLTAGE V p -p
25
1.5 1.5
R L = 2k 20
@ +25C 15V SUPPLIES
15
+1.5 +1.5
10
+1.0 +1.0
VOUT
V
+0.5 +0.5 5
VS VS 0
0 5 10 15 20 25 0 5 10 15 20 25 10 100 1k 10k
SUPPLY VOLTAGE V SUPPLY VOLTAGE V LOAD RESISTANCE
Figure 1. Input Common-Mode Figure 2. Output Voltage Swing Figure 3. Output Voltage Swing
Range vs. Supply Voltage vs. Supply Voltage vs. Load Resistance
4 100 100
OUTPUT IMPEDANCE
3 55C TO +125C
70
NUMBER OF UNITS
1
60 AV = +1000
2 50 0.1
DUAL-IN-LINE PACKAGE 40 AV = +1
PLASTIC (N) or CERDIP (Q) 0.01
30
1
METAL CAN (H) PACKAGE 20
0.001
10
0 0 0.0001
0 1 2 3 4 0.4 0.3 0.2 0.1 0 0.1 0.2 0.3 0.4 0.1 1 10 100 1k 10k 100k
TIME AFTER POWER ON Minutes OFFSET VOLTAGE DRIFT V/C FREQUENCY Hz
Figure 4. Offset Voltage Warm-Up Figure 5. Typical Distribution of Figure 6. Output Impedance vs.
Drift Offset Voltage Drift Frequency
40 45
NONINVERTING INPUT CURRENT mA
40
INPUT VOLTAGE NOISE nV/Hz
35
VOLTAGE NOISE 100nV/Div
30
100
30
INVERTING OR
90
25
20 I/F CORNER
0.7Hz
20
15
10
10
10 0%
0 0 TIME 1sec/Div
0 1 10 100 0.01 0.1 1 10 100
DIFFERENTIAL VOLTAGE V FREQUENCY Hz
Figure 7. Input Current vs. Figure 8. Input Noise Spectral Figure 9. 0.1 Hz to 10 Hz Voltage
Differential Input Voltage Density Noise
4 REV. B
AD707
16 16 140 0
14 14 120 RL = 2k 30
CL = 1000pF
PHASE Degrees
OPEN-LOOP GAIN V/V
12 12 100 60
RL = 1k RLOAD = 1k
10 10 80 90
VOUT = 10V
PHASE
8 8 60 MARGIN 120
=58
6 6 40 150
GAIN
4 4 20 180
2 2 10
0 0 0
60 40 20 0 20 40 60 80 100 120 140 0 5 10 15 20 25 0.01 0.1 1 10 100 1k 10k 100k 1M 10M
TEMPERATURE C FREQUENCY Hz
SUPPLY VOLTAGE V
Figure 10. Open-Loop Gain vs. Figure 11. Open-Loop Gain vs. Figure 12. Open-Loop Gain and
Temperature Supply Voltage Phase vs. Frequency
160 35 160
FMAX = 3kHz
140 RL = 2k
COMMON-MODE REJECTION dB
20 5 20
0 0 0
0.1 1 10 100 1k 10k 100k 1M 1k 10k 100k 1M 0.001 0.01 0.1 1 10 100 1k 10k 100k
FREQUENCY Hz FREQUENCY Hz FREQUENCY Hz
Figure 13. Common-Mode Figure 14. Large Signal Frequency Figure 15. Power Supply Rejection
Rejection vs. Frequency Response vs. Frequency
20mV/DIV
20mV/DIV
SUPPLY CURRENT mA
3
+125C
2 55C
+25C
CH1
1 CH1
TIME 2s/DIV
TIME 2s/DIV
0
0 3 6 9 12 15 18 21 24
SUPPLY VOLTAGE V
Figure 16. Supply Current vs. Figure 17. Small Signal Transient Figure 18. Small Signal Transient
Supply Voltage Response; A V = +1, RL = 2 k, Response; A V = +1, RL = 2 k,
CL = 50 pF CL = 1000 pF
REV. B 5
AD707
OFFSET NULLING OPERATION WITH A GAIN OF 100
The input offset voltage of the AD707 is the lowest available in Demonstrating the outstanding dc precision of the AD707 in
a bipolar op amp, but if additional nulling is required, the practical applications, Table I shows an error budget calculation
circuit shown in Figure 19 offers a null range of 200 V. For for the gain of 100 configuration shown in Figure 21.
wider null capability, omit R1 and substitute a 20 k potenti-
ometer for R2. Table I. Error Budget
+VS
Maximum Error Contribution
R1
0.1F 10k Av = 100 (C Grade)
OFFSET
ADJUST Error Source (Full Scale: VOUT = 10 V, VIN = 100 mV)
7
1
R2
2k VOS 15 V/100 mV = 150 ppm
2
IOS (100 )(1 nA)/100 mV = 1 ppm
(100 V/8 106)100 mV
8
AD707 6
Gain (2 k Load) = 13 ppm
Noise 0.35 V/100 mV = 4 ppm
3
4 0.1F VOS Drift (0.1 V/C)/100 mV = 1 ppm/C
= 168 ppm
VS
+1 ppm/C
Figure 19. External Offset Nulling and Power Supply Total Unadjusted Error
Bypassing
@ +25C = 168 ppm > 12 Bits
GAIN LINEARITY INTO A 1 k LOAD @ 55C to +125C = 268 ppm > 11 Bits
The gain and gain linearity of the AD707 are the highest With Offset Calibrated Out
available among monolithic bipolar amplifiers. Unlike other dc @ +25C = 17 ppm > 15 Bits
precision amplifiers, the AD707 shows no degradation in gain or @ 55C to +125C = 117 ppm > 13 Bits
gain linearity when driving loads in excess of 1 k over a 10 V
output swing. This means high gain accuracy is assured over the 10k
output range. Figure 20 shows the gain of the AD707, OP07, and
+VS 0.1F
the OP77 amplifiers when driving a 1 k load.
The AD707 will drive 10 mA of output current with no signifi- VIN
100
2
7
cant effect on its gain or linearity.
AD707 6 VOUT
3 0.1F
4
CHANGE IN OFFSET VOLTAGE 10V/Div
AD707
99
VS
6 REV. B
AD707
18-BIT SETTLING TIME 140 dB CMRR INSTRUMENTATION AMPLIFIER
Figure 22 shows the AD707 settling to within 80 V of its final The extremely tight dc specifications of the AD707 enable the
value for a 20 V output step in less than 100 s (in the test con- designer to build very high performance, high gain instrumenta-
figuration shown in Figure 23). To achieve settling to 18 bits, tion amplifiers without having to select matched op amps for the
any amplifier specified to have a gain of 4 V/V would appear to crucial first stage. For the second stage, the lowest grade AD707
be good enough, however, this is not the case. In order to truly is ideally suited. The CMRR is typically the same as the high
achieve 18-bit accuracy, the gain linearity must be better than grade parts, but does not exact a premium for drift performance
4 ppm. (which is less critical in the second stage). Figure 24 shows an
The gain nonlinearity of the AD707 does not contribute to the example of the classic instrumentation amp. Figure 25 shows
error, and the gain itself only contributes 0.1 ppm. The gain that the circuit has at least 140 dB of common-mode rejection
error, along with the VOS and VOS drift errors do not comprise for a 10 V common-mode input at a gain of 1001 (RG = 20 ).
1 LSB of error in an 18-bit system over the military temperature 20,000
range. If calibration is used to null offset errors, the AD707 CIRCUIT GAIN = + 1
RG
AD707
resolves up to 20 bits at +25C. IN 3
R4
A1 6 10k
2
R2
10k 10k AD707
REFERENCE 2
SIGNAL
10V/Div RG A3 6
10k
3
R1
D.U.T. AD707 10k
OUTPUT 2
9.9k
ERROR 6
50V/Div A2 RCM R2
+IN 3 200
OUTPUT:
10V/Div
10F 0.1F
INPUT
COMMON-MODE CH1
10F 0.1F SIGNAL: 10V/Div
VS +VS
2k 2k
1.9k
FLAT-TOP
PULSE 100
GENERATOR VIN COMMON-MODE
2k
2 ERROR REFERRED
DATA CH2
TO INPUT: 5V/Div
DYNAMICS D.U.T. 6
5109 AD707
OR 3 7 TIME 2 sec/Div
EQUIVALENT 4
10F 0.1F
Figure 25. Instrumentation Amplifier
10F 0.1F Common-Mode Rejection
VS +VS
REV. B 7
AD707
PRECISION CURRENT TRANSMITTER The performance and accuracy of this circuit will depend almost
The AD707s excellent dc performance, especially the low offset entirely on the tolerance and selection of the resistors. The scale
voltage, low offset voltage drift and high CMRR, makes it resistor (RSCALE) and the four feedback resistors directly affect
possible to make a high precision voltage-controlled current the accuracy of the load current and should be chosen carefully
transmitter using a variation of the Howland Current Source or trimmed.
circuit (Figure 26). This circuit provides a bidirectional load
As an example of the accuracy achievable, assume IL must be
current which is derived from a differential input voltage.
C1164a212/95
10 mA, and the available VIN is only 10 mV.
R3
100k
R4
100k
RSCALE = 10 mV/10 mA = 1
IERROR due to the AD707C:
+VS 0.1F
Maximum IERROR = 2(VOS)/RSCALE + 2(VOS Drift)/R SCALE +
2 7 IOS (100 k/RSCALE )
VIN AD707 6 = 2 (15 V)/l +2 (0.1 V/C)/l
3 4 0.1F
+ 1 nA (100 k)/l (1.5 nA @ 125C)
= 30 A + 0.2 A/C + 100 A
RSCALE
VS
R1 R2
(150 A @ 125C)
100k 100k
= 130 A/10 mA = 1.3% @ 25C
VIN RL = 180 A/10 mA = 1.8% @ 125C
t L =
RSCALE
R2
(
R1 ) IL Low drift, high accuracy resistors are required to achieve high
precision.
Figure 26. Precision Current Source/Sink
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
8 REV. B