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A Stable Design of PI Control for DCDC Converters with II. MAIN RESULTS
an RHS Zero
The duty-ratio-to-output-voltage transfer function G(s) for the boost
Jose Alvarez-Ramirez, Ilse Cervantes, Gerardo Espinosa-Perez, and buckboost converters is equivalent to a second-order filter with a
Paul Maya, and America Morales high quality factor Q and an RHS zero [2]. The quality factor can be
reduced by a suitable selection of the current gain. However, the RHS
zero will remain at the same position despite the inner current loop. The
AbstractThe stability of boost and buckboost dcdc power converters RHS zero z imposes a limit on the attainable closed-loop bandwidth of
under proportional plus integral (PI) control is discussed in this paper. A the controlled converter [4]. It turns out that this limitation is indepen-
novel PI control configuration is proposed, which reveals the effect that dent of a particular inner current loop design. In the following analysis,
the right-hand -side zero has on PI control stability. Tuning rules in terms
of the converter parameters are derived and illustrated via numerical and we will derive a novel gain parameterization of classical PI control to
experimental simulations. provide insight into the inherent limitation induced by the RHS zero.
To this end, we will proceed along the following steps:
Index TermsDCDC power conversion, proportional plus integral con-
trol, tuning rules. 1) The dynamics related to the RHS zero are taken as uncertain and
included into an I/O modeling error function.
2) A reduced-order observer is proposed to get an estimate of the
I. INTRODUCTION modeling error signal.
Switch-mode pulsewidth-modulation (PWM) dcdc converters pro- 3) This estimated signal is used into a feedback function to cancel
vide a constant output voltage. The two general approaches to control to some extent, the effects of the I/O modeling errors, including
switching regulators are: 1) voltage-mode control and 2) current-mode both parametric and dynamical uncertainties.
control. The first scheme employs a loop that senses the output voltage 4) The stability of the voltage-control loop is studied via root locus
for feedback. The second scheme employs in addition, an inner cur- tools.
rent loop that senses the inductor current for feedback purposes. Cur-
rent-mode control is becoming widely used in the power-supply in- For the boost and buckboost converters, G(s) can be written as
dustry because of several advantages over voltage-mode control. Ba- follows [2]:
sically, it is a multiloop approach. In the first step of the design, the
current gain is calculated to provide more damping by adjusting the def v 1 z 01 s
0
G(s) = =c 2 (1)
quality factor. The advantage of using this inner current loop becomes d s + a1 s + a0
evident when an unacceptable right-hand-side (RHS) zero is present,
as in the cases of boost and buckbucboost converters [1][3]. Sev- where v = V 0 V and d = D 0 D are the output-voltage and the
eral design criteria for the current gain have been reported (see [3] for duty-ratio deviations respectively. The symbol 3 denotes nominal
instance). Recently, a design criterion with simple expressions for the value. The gain c > 0, the RHS zero z > 0 and the second-order
current gain to obtain a quality factor value of 0:7 was proposed [2]. In filter parameters fa1 > 0; a0 > 0g depend on the converter pa-
the second step of the feedback circuit design, a proportional plus inte- rameters fR; L; C g and on the operating conditions fI; V ; E; Dg;
gral (PI) controller is used for the outer voltage loop. The basic idea of where E is the nominal line voltage and I is the nominal current. In
using a controller with integral action is to induce robust output-voltage current-mode control, the current gain directly affectsa1 , thus modi-
regulation in the face of converter-parameter uncertainties (e.g., load fying the quality factor Q [2]. Let us write the transfer function G(s) as
changes) and external disturbances (e.g., line-voltage changes) [4]. the composition of a minimum-phase function Gm (s) with an all-pass
The aim of this paper is to design stable PI control for the outer filter Ga (s), namely, G(s) = Gm (s)Ga (s); where
voltage control loop in the presence of a RHS zero. Our results apply
to both voltage-mode and current-mode control. The essence of the 01
1+z s 0s + z :
paper is to investigate the effect of the RHS zero on the stability of the Gm (s) = c 2 and Ga (s) = (2)
controlled power converter. Instability results are derived from standard s + a1 s + a0 s+z
root-locus analysis. Our contribution can be summarized as follows:
Take Gm (s) as the nominal plant and take Ga (s) as unmodeled dy-
development of a novel gain parameterization for classical PI namics acting in the input channel. Furthermore, if we assume that the
control which enables clarification of the instability effects of the actual circuit parameters are uncertain, then we have parametric uncer-
RHS zero; tainties in addition. Let vr = V 0 Vr be a desired output voltage and
e = v 0 vr = V 0 Vr be the regulation error. A state-space realization
derivation of easy-to-use tuning guidelines that take into account,
the position of the RHS zero. of the system (1) in terms of the nominal transfer function Gm (s) and
the all-pass filter Ga (s) can be the described by [5]
Manuscript received March 29, 1999; revised January 6, 2000 and July 3, e_ = 0 o01(e + vr ) + q 0 hGa (s) d
2000. This paper was recommended by Associate Editor A. Ioinovici. q_ = 0 a0 (e + vr ) + cGa (s) d
The authors are with the Departamento de Ingenieria de Procesos e
where o = a0
Hidraulica, Universidad Autonoma Metropolitana-Iztapalapa, Mexico City, 1
1 is the time-constant of the open circuit, q is an in-
ternal state, and h = cz 01 is the high-frequency gain. Let o and h
09340 Mexico (e-mail: jjar@xanum.uam.mx).
Publisher Item Identifier S 1057-7122(01)00644-4.
all the parametric uncertainties and all-pass filters of the system. In this
way, we can write the system dynamics as follows: This model-based parameterization of the classical PI controller has the
advantage of revealing the inherent voltag- control limitations induced
_ = 0 01e + (y; q; d) 0 h d
e o by the RHS zero. In fact, the dynamics of the estimation error " 0 =
q_ = 0 a0 v + cG (s) d: a (3) can be written as [6]
Suppose that the controlled behavior is specified via the stable linear _ = 0 01 G (s)" + L(e; q; ")
" e a (8)
model e 0c01 e, where c > is the desired closed-loop time-con-
_= 0 where = h=h and L(e; q; ") is a linear function of its arguments.
stant. The ideal duty-ratio control input can be obtained by equating the
e-dynamics in (3) with the desired controlled dynamics e
0
0c01e; _= The estimation dynamics, and consequently the PI-controlled con-
verter, is stable if the linear dynamics "_ = 0 01 G (s)" are stable
= [ +( 0 0
0h 0 o 0 c e . Unfortunately, this con-
1 1 1
)] [6]. Since G (s) = (0s + z )=(s + z ), and recalling that s = d=dt, the
e a
namely, d
trol function is not practical because the modeling error signal t () system "_ = 0 01 G (s)" is equivalent to the following second-order
a
( ( ) ( ) ( ))
y t ; q t ; d t is not available for feedback. Our idea is to use an
e a
observer to get an estimate of the signal t . In this way, the equiv- () differential equation:
alent computed duty ratio becomes + ( z 0 )_" +
e " e z" = 0:
d = 0h
01 0 + ( 01 0 01)e o c : (4) Hence, to guarantee the stability of the estimation dynamics (i.e., !
= e_ + 01e 0 hd, the signal can be obtained via as t ( )=
! 1), the characteristic polynomial P2 s; e es2 e z 0 +(
By noting that o
Fig. 3. Time evolution of the output voltage for (a) = 0:2 s, (b) = 0:095 0
Fig. 4. Time evolution of the output voltage under a 20% step change in the
s, and (c) = 0:055 s. 0
resistance at t = 1:5 s and a 20% step change at in the line voltage at t = 3:5
s, for (a) = 0:08 s, (b) = 0:04 s, and (c) = 0:03 s.
These tuning guidelines can be used as a departing point for practical (y; q; d) = 01a1 e 0 0:017v + q 0 27272:7
02s d:
s + 57:47
r
tuning of the voltage PI control loop in power converters with an RHS
zero. That is, the unknown signal (t) satisfies the differential relationship
,C = 220
F andL = A. Numerical Simulations
43 5
: mH. The resistance may have variations of about 630%. More-
over, E= 15 V610%. The converter is operated in the range 25
Numerical simulations were carried out using SIMNON [8]. The ini-
tial conditions V = 15 V and I =0
Vr 35 = 05 = (10 ) : 2 03 s,
= 2 2 10 A were considered. Fig. 2 shows
= 57 47
V. For D : , o D 2 R=L
: s01 and the high-frequency gain h : V 1 s01 .
= 27272 7 the time evolution of the output voltage for overdamped (e = 0 06
: s),
z
0
Notice that z o , so that the RHS zero has strong effects on the
underdamped (e = 0 0175
: s) and unstable (e = 0 0163
: s) cases with
1
Fig. 5. Experimental time evolution of the output voltage for (a) = 0:06 s, Fig. 6. Experimental time evolution of the output voltage for (a) = 0:12 s,
(b) = 0:03 s, and (c) = 0:023 s. (b) = 0:09 s, and (c) = 0:07 s.
agree with the numerical simulations. The mismatch may be due to un-
modeled parasitic resistances and realistic switching devices. Finally,
Fig. 6 shows the output-voltage behavior for the PI settings as in Fig. 3.
As predicted, the convergence to the set point is faster as e is smaller.
IV. CONCLUSIONS
We presented some stability/instability results of PI control for the
outer voltage loop in dcdc power converters. The analysis of the ef-
fects of the RHS zero on certain estimation dynamics related to the