Srinivasan Engineering College

First year-- M.E..VLSI DESIGN

Attendance

S.no Name 4.9.14 5.9.14 8.9.14 9.9.14 10.9.14 11.9.14 12.9.14 15.9.14 16.9.14 17.9.14
1 DHIVYA M
2 NANDHINI V
3 NARMATHA M
4 POORANI K
5 ROSHAN LOBO
6 SARITHA M
7 SATHYA M
8 UMA MAHESWARI V

CLASS IN CHARGE

Srinivasan Engineering College

First year-- M.E..VLSI DESIGN
Attendance
S.no Name 18.9.14 19.9.14 22.9.14 23.9.14 24.9.14 25.9.14 26.9.14 29.9.14 30.9.14 1.10.14
1 DHIVYA M
2 NANDHINI V
3 NARMATHA M
4 POORANI K
5 PROSHAN LOBO
6 SARITHA M
7 SATHYA M
8 UMA MAHESWARI V

CLASS IN CHARGE

HOD
 Srinivasan Engineering College
First year-- M.E..VLSI DESIGN
Attendance
S.no Name 4.9.14 5.9.14 8.9.14 9.9.14 10.9.14 11.9.14 12.9.14 15.9.14 16.9.14 17.9.14
1 AYESHA S
2 DHIVYA M
3 NANDHINI V
4 NARMATHA M
5 POORANI K
6 SARITHA M
7 SATHYA M
8 UMA MAHESWARI V

Srinivasan Engineering College

First year-- M.E..VLSI DESIGN
Attendance
S.no Name 18.9.14 19.9.14 22.9.14 23.9.14 24.9.14 25.9.14 26.9.14 29.9.14 30.9.14 1.10.14
1 AYESHA S
2 DHIVYA M
3 NANDHINI V
4 NARMATHA M
5 POORANI K
6 SARITHA M
7 SATHYA M
8 UMA MAHESWARI V
 SRINIVASAN ENGINEERING COLLEGE,PERAMBALUR
M.E VLSI DESIGN
FIRST YEAR ATTENDANCE
SPELL -1
MA7157/AMEE VL7101/VSP VL7102/VDT VL7103/SSDM AP7202/ASIC
S.no Name TOTAL ATTD TOTAL ATTD TOTAL ATTD TOTAL ATTD TOTAL ATTD
1 DHIVYA M 26 22 24 22 24 22 24 22 24 22
2 NANDHINI V 26 25 24 22 24 22 24 22 24 22
3 NARMATHA M 26 25 24 22 24 22 24 22 24 22
4 POORANI K 26 25 24 22 24 22 24 22 24 22
5 ROSHAN LOBO 26 22 24 22 24 22 24 22 24 22
6 SARITHA M 26 25 24 22 24 22 24 22 24 22
7 SATHYA M 26 25 24 22 24 22 24 22 24 22
8 UMA MAHESWARI V 26 25 24 22 24 22 24 22 24 22

HOD PRINCIPAL
 VL7002/SS
TOTAL ATTD
24 22
24 22
24 22
24 22
24 22
24 22
24 22
24 22
 SRINIVASAN ENGINEERING COLLEGE,PERAMBALUR
M.E VLSI DESIGN
FIRST YEAR ATTENDANCE
SPELL -2 (27.09.2014 30.10.2014)
MA7157/AMEE VL7101/VSP VL7102/VDT VL7103/SSDM AP7202/ASIC VL7002/SS
S.no Name TOTAL ATTD TOTAL ATTD TOTAL ATTD TOTAL ATTD TOTAL ATTD TOTAL ATTD
1 DHIVYA M 18 18 15 15 15 15 15 15 15 14 15 15
2 NANDHINI V 18 17 15 14 15 14 15 14 15 14 15 14
3 NARMATHA M 18 17 15 14 15 14 15 14 15 14 15 14
4 POORANI K 18 18 15 15 15 15 15 14 15 14 15 15
5 ROSHAN LOBO 18 18 15 15 15 15 15 15 15 14 15 15
6 SARITHA M 18 16 15 13 15 13 15 13 15 13 15 13
7 SATHYA M 18 17 15 14 15 14 15 14 15 14 15 14
8 UMA MAHESWARI V 18 18 15 15 15 15 15 15 15 15 15 15

HOD PRINCIPAL
 SRINIVASAN ENGINEERING COLLEGE
FIRST YEAR M.E VLSI DESIGN
CYCLE TEST -1 MARK SHEET

AMEE VSP VDT SSDM ASIC SS

S.no Name MA7157 VL7101 VL7102 VL7103 AP7202 VL7002
1 DHIVYA M 82 83 85 84 81 87
2 NANDHINI V 85 83 87 82 83 82
3 NARMATHA M 84 84 82 83 81 85
4 POORANI K 87 85 86 84 83 82
5 ROSHAN LOBO 81 82 81 83 81 82
6 SARITHA M 79 78 80 79 80 78
7 SATHYA M 84 85 86 87 82 83
8 UMA MAHESWARI V 84 87 86 85 83 82

HOD PRINCIPAL
 SRINIVASAN ENGINEERING COLLEGE,PERAMBALUR
M.E VLSI DESIGN
FIRST YEAR ATTENDANCE
SPELL -3 (31.10.2014 28.11.2014)
MA7157/AMEE VL7101/VSP VL7102/VDT VL7103/SSDM
S.no Name TOTAL ATTD TOTAL ATTD TOTAL ATTD TOTAL ATTD
1 DHIVYA M 18 18 15 15 15 15 15 15
2 NANDHINI V 18 17 15 14 15 14 15 14
3 NARMATHA M 18 17 15 14 15 14 15 14
4 POORANI K 18 18 15 15 15 15 15 14
5 ROSHAN LOBO 18 18 15 15 15 15 15 15
6 SARITHA M 18 16 15 13 15 13 15 13
7 SATHYA M 18 17 15 14 15 14 15 14
8 UMA MAHESWARI V 18 18 15 15 15 15 15 15

HOD PRINCIPAL
 AP7202/ASIC VL7002/SS
TOTAL ATTD TOTAL ATTD
15 14 15 15
15 14 15 14
15 14 15 14
15 14 15 15
15 14 15 15
15 13 15 13
15 14 15 14
15 15 15 15

PRINCIPAL
 SRINIVASAN ENGINEERING COLLEGE
FIRST YEAR M.E VLSI DESIGN
CYCLE TEST -2 MARK SHEET

AMEE VSP VDT SSDM ASIC SS

S.no Name MA7157 VL7101 VL7102 VL7103 AP7202 VL7002
1 DHIVYA M 92 89 91 95 92 93
2 NANDHINI V 90 92 93 91 89 90
3 NARMATHA M 91 89 92 90 90 93
4 POORANI K 93 88 91 95 91 90
5 ROSHAN LOBO 89 88 90 91 90 92
6 SARITHA M 86 87 88 89 90 89
7 SATHYA M 92 93 92 95 88 92
8 UMA MAHESWARI V 90 89 90 93 92 91

HOD PRINCIPAL
 SRINIVASAN ENGINEERING COLLEGE,PERAMBALUR
M.E VLSI DESIGN
FIRST YEAR ATTENDANCE
SPELL -4 (29.11.2014 31.12.2014)
MA7157/AMEE VL7101/VSP VL7102/VDT VL7103/SSDM
S.no Name TOTAL ATTD TOTAL ATTD TOTAL ATTD TOTAL ATTD
1 DHIVYA M 18 18 15 15 15 15 15 15
2 NANDHINI V 18 17 15 14 15 14 15 14
3 NARMATHA M 18 17 15 14 15 14 15 14
4 POORANI K 18 18 15 15 15 15 15 14
5 ROSHAN LOBO 18 18 15 15 15 15 15 15
6 SARITHA M 18 16 15 13 15 13 15 13
7 SATHYA M 18 17 15 14 15 14 15 14
8 UMA MAHESWARI V 18 18 15 15 15 15 15 15

HOD PRINCIPAL
 AP7202/ASIC VL7002/SS
TOTAL ATTD TOTAL ATTD
15 14 15 15
15 14 15 14
15 14 15 14
15 14 15 15
15 14 15 15
15 13 15 13
15 14 15 14
15 15 15 15

PRINCIPAL
 SRINIVASAN ENGINEERING COLLEGE
FIRST YEAR M.E VLSI DESIGN
MODEL EXAM- MARK SHEET

AMEE VSP VDT SSDM ASIC SS

S.no Name MA7157 VL7101 VL7102 VL7103 AP7202 VL7002
1 DHIVYA M 92 89 91 95 92 93
2 NANDHINI 90 92 93 91 89 90
3 NARMATH 91 89 92 90 90 93
4 POORANI K 93 88 91 95 91 90
5 ROSHAN L 89 88 90 91 90 92
6 SARITHA M 86 87 88 89 90 89
7 SATHYA M 92 93 92 95 88 92
8 UMA MAHE 90 89 90 93 92 91

HOD PRINCIPAL