Beruflich Dokumente
Kultur Dokumente
AFFILIATED INSTITUTIONS
M.E. VLSI DESIGN
REGULATIONS 2017
CHOICE BASED CREDIT SYSTEM
CURRICULA AND SYLLABI
5. Modern tool usage: Create, select, and apply appropriate techniques, resources, and modern
engineering and IT tools including prediction and modeling to complex engineering activities with
an understanding of the limitations.
6. The engineer and society: Apply reasoning informed by the contextual knowledge to assess
societal, health, safety, legal and cultural issues and the consequent responsibilities relevant to
the professional engineering practice.
8. Ethics: Apply ethical principles and commit to professional ethics and responsibilities and norms
of the engineering practice.
9. Individual and team work: Function effectively as an individual, and as a member or leader
in diverse teams, and in multidisciplinary settings.
10. Communication: Communicate effectively on complex engineering activities with the engineering
community and with society at large, such as, being able to comprehend and write effective reports
and design documentation, make effective presentations, and give and receive clear instructions.
11. Project management and finance: Demonstrate knowledge and understanding of the engineering
and management principles and apply these to ones own work, as a member and
leader in a team, to manage projects and in multidisciplinary environments.
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12. Life-long learning: Recognize the need for, and have the preparation and ability to engage in
independent and life-long learning in the broadest context of technological change.
1. To design and develop VLSI circuits to optimise power and area requirements, free from faults
and dependencies by modelling, simulation and testing.
2. To develop VLSI systems by learning advanced algorithms, architectures and software
hardware co design.
3. To communicate engineering concepts effectively by exhibiting high standards of technical
presentations and scientific documentations.
A broad relation between the Programme Educational Objectives (PEO) and the Program Outcomes
(PO) is given in the following table.
PROGRAMME OUTCOMES
PROGRAMME
EDUCATIONAL
OBJECTIVES A B C D E F G H I J K L
PEO1 3
1 1 1 1 1 3 3 3 2 3 2
PEO2 2 1
1 2 2 3 1 1 1 2 1 2
PEO3 2
2 2 2 2 3 3 3 3 1 3 1
2
SEMESTER COURSE WISE PO MAPPING
1 2 2 2 2 3 3 3 3 3 3 3
Design
DSP Integrated
1 1 2 2 2 3 3 3 3 3 3 3
Circuits
CAD for VLSI
1 1 2 2 1 3 2 3 3 3 3 2
Circuits
Analog IC Design 1 1 2 2 1 3 3 3 3 3 3 3
VLSI Design
1 1 1 1 1 3 3 3 2 2 2 2
Lab I
YEAR I
Testing of VLSI
1 2 2 2 1 3 2 3 3 3 3 3
Circuits
VLSI Signal
1 1 1 1 2 3 3 3 3 3 3 3
Processing
Low Power VLSI
1 1 1 1 2 3 1 1 2 3 1 2
Design
Professional
SEM II
Elective I
Professional
Elective II
Professional
Elective III
VLSI Design Lab II 1 1 1 1 1 3 3 3 2 2 2 2
Term Paper Writing
1 3 3 2 3 3 3 3 1 1 1 2
and Seminar
Analog to Digital
1 2 2 2 1 3 3 3 2 3 2 3
Interfaces
Professional
SEM III
Elective IV
Professional
YEAR II
Elective V
Project Work
1 1 1 1 1 3 3 3 3 3 2 2
Phase-I
SEM IV
Project Work
1 1 1 1 1 3 3 3 3 3 2 2
Phase-II
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ELECTIVES
Device Modeling - I 1 2 2 2 1 3 3 3 3 3 3 3
ELECTIVE I
SEM II
RF IC Design 1 2 1 1 1 3 2 3 3 3 2 3
Design of Analog
Filters and Signal 1 2 1 1 2 3 3 3 3 3 2 3
Conditioning Circuits
Nano Scale Devices 1 3 3 3 2 3 3 3 3 3 3 3
ELECTIVE II
DSP Architectures
1 2 2 3 3 3 3 3 3 3 3 3
SEM II
and Programming
Networks on Chip 1 3 3 3 1 3 2 3 2 3 2 3
Signal Integrity for
1 1 2 2 1 3 2 3 3 3 3 3
High Speed Design
Digital Control
Engineering
Embedded System
1 2 2 2 2 3 3 3 3 3 3 3
Design
Soft Computing and
ELECTIVE III
Optimization 1 1 1 1 1 3 3 3 3 3 3 3
SEM II
Techniques
Reconfigurable
1 2 2 2 2 2 3 3 3 3 3 3
Architectures
Advanced
Microprocessors and 1 2 2 2 2 2 3 3 3 3 3 3
Architectures
Selected Topics in
2 2 2 2 2 3 3 3 3 3 3 3
ASIC Design
ELECTIVE IV
of Computer 1 2 2 2 2 3 3 3 3 3 3 3
Algorithms
Device Modeling - II 1 2 2 2 1 3 3 3 3 3 3 3
Digital Image
2 2 2 2 2 2 3 3 3 3 3 3
Processing
Scripting Languages
SEM III
1 1 1 1 1 3 3 3 3 3 3 3
for VLSI
Hardware Software
1 1 1 1 1 3 2 3 2 3 2 3
Co-design
Selected Topics in IC
Design
4
ANNA UNIVERSITY, CHENNAI
AFFILIATED INSTITUTIONS
M.E. VLSI DESIGN
REGULATIONS 2017
CHOICE BASED CREDIT SYSTEM
CURRICULA AND SYLLABI
SEMESTER I
SEMESTER II
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SEMESTER III
SL. COURSE COURSE TITLE CATEGORY CONTACT L T P C
NO CODE PERIODS
THEORY
1. VL5301 Analog to Digital
PC 3 3 0 0 3
Interfaces
2. Professional Elective IV PE 3 3 0 0 3
3. Professional Elective V PE 3 3 0 0 3
PRACTICALS
4. VL5311 Project Work Phase-I EEC 12 0 0 12 6
TOTAL 21 9 0 12 15
SEMESTER IV
SL. COURSE COURSE TITLE CATEGORY CONTACT L T P C
NO CODE PERIODS
PRACTICALS
1. VL5411 Project Work Phase-II
EEC 24 0 0 24 12
TOTAL 24 0 0 24 12
TOTAL NO. OF CREDITS:70
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EMPLOYABILITY ENHANCEMENT COURSE (EEC)
SL. COURSE COURSE TITLE CATEGORY CONTACT L T P C
NO CODE PERIODS
1. CP5281 Term Paper Writing
EEC 2 0 0 2 1
and Seminar
2. VL5311 Project Work
EEC 12 0 0 12 6
Phase I
3. VL5411 Project Work
EEC 24 0 0 24 12
Phase II
SEMESTER II
ELECTIVE II
SL. COURSE COURSE TITLE CATEGORY CONTACT L T P C
NO CODE PERIODS
1. AP5072 DSP Architectures and
PE 3 3 0 0 3
Programming
2. VL5005 Networks on Chip PE 3 3 0 0 3
3. AP5094 Signal Integrity for High Speed
PE 3 3 0 0 3
Design
4. AP5091 Digital Control Engineering PE 3 3 0 0 3
SEMESTER II
ELECTIVE III
SL. COURSE CONTACT
COURSE TITLE CATEGORY L T P C
NO CODE PERIODS
1. AP5191 Embedded System Design PE 3 3 0 0 3
2. AP5251 Soft Computing and
PE 3 3 0 0 3
Optimization Techniques
3. VL5006 Reconfigurable Architectures PE 3 3 0 0 3
4. VL5007 Advanced Microprocessors
PE 3 3 0 0 3
and Architectures
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SEMESTER III
ELECTIVE IV
SL. COURSE CONTACT
COURSE TITLE CATEGORY L T P C
NO CODE PERIODS
1. VL5008 Selected Topics in ASIC
PE 3 3 0 0 3
Design
2. VL5009 Design and Analysis of
PE 3 3 0 0 3
Computer Algorithms
3. VL5010 Device Modeling- II PE 3 3 0 0 3
4. AP5292 Digital Image Processing PE 3 3 0 0 3
SEMESTER III
ELECTIVE V
SL. COURSE CONTACT
COURSE TITLE CATEGORY L T P C
NO CODE PERIODS
1. VL5091 MEMS and NEMS PE 3 3 0 0 3
2. VL5011 Scripting Languages for
PE 3 3 0 0 3
VLSI
3. AP5291 Hardware Software
PE 3 3 0 0 3
Co-Design
4. VL5012 Selected Topics in IC Design PE 3 3 0 0 3