Lecture 1

Course Overview and

The 8051 Architecture
 MCUniversity Program Lectures (selection)
8051 architecture
8051 instruction set

Analog to digital convertor

Timer operations and programming

Serial communication

Digital to analog convertor

Interrupts

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 Course Goals
At the end of this course, you should be able to:
Understand the architecture of one of the most popular
microcontroller (MCU) families
Use an integrated development environment (IDE) to program and
debug an MCU
Program an MCU using Assembly language
Understand and use peripherals integrated into an MCU
Interface an MCU to simple external components
Understand and use interrupts
Use timers in various modes
Communicate using a serial interface
Understand and use analog to digital converters (ADC), digital to
analog converters (DAC) and comparators

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 Course Prerequisites
A course in Electric Circuits that includes understanding
basic electronic components such as resistors, capacitors,
diodes and transistors

A course in basic digital logic design that includes logic

gates and Boolean algebra

Ability to program in a high-level programming language

such as C or C++

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 The 8051 Architecture

Microprocessors and microcontrollers

Block diagram of the original 8051

Harvard and von Neumann architectures

Memory organization

Special function registers

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 Microprocessors and Microcontrollers
Microprocessor: general-purpose CPU
Emphasis is on flexibility and performance
Generic user-interface such as keyboard, mouse, large display, etc.
Used in PCs, server systems, cell phones, etc.

Microcontroller: microprocessor + memory [+ other

peripherals] on a single chip
Emphasis is on size and cost reduction
The user interface is tailored to the application, such as the buttons
on a TV remote control
Used in a digital watch, TV remote control, car and many common
day-to-day appliances

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 Microcontroller Architectures
Microcontroller architecture refers to the internal hardware
organization of a microcontroller

Each hardware architecture has its own set of software

instructions called assembly language that allows
programming of the microcontroller

Some of the popular microcontroller architectures

Intel 8051
Atmel AVR
Microchip PIC
ARM

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 Harvard and von Neumann Architectures
Harvard Architecturea type of computer architecture
where the instructions (program code) and data are stored
in separate memory spaces
Example: Intel 8051 architecture

von Neumann Architectureanother type of computer

architecture where the instructions and data are stored in
the same memory space
Example: Intel x86 architecture (Intel Pentium, AMD Athlon, etc.)

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 Example System: RC Car
Antenna Antenna

Front Electric
Forward RF
Microcontroller RF Receiver Microcontroller Motor (Left/Right)
Transmitter
Reverse

Rear Electric Motor

Left Power Power (Fwd/Reverse)
Voltage Regulator Voltage Regulator
Right
Car lights (LEDs)
Batteries
Controls Batteries

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 Block Diagram of the Original 8051

/INT0 /INT1 T0 T1

Other
interrupts

128 bytes Timer/Counter

4K byte Program
Data Memory (Timer 0 &
Memory (ROM)
(RAM) Timer 1)

8051 CPU

64 K Bus I/O ports Serial Port

Oscillator Expansion Control
&Timing

From Crystal
Oscillator or RC ALE /PSEN P3 P2 P1 P0 TxD RxD
network (Address/data)

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 Block Diagram of the Silicon Labs 8051

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 Memory Organization of the SiLabs 8051
The memory
organization of
C8051F040 is
similar to that of
a standard 8051

Program and
data memory
share the same
address space
but are
accessed via
different
instruction types

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 Program Memory of the SiLabs 8051
FLASH memory
Can be reprogrammed in-circuit
Provides non-volatile data storage
Allows field upgrades of the 8051
firmware

The C8051F040s program memory

consists of 64 kB of FLASH

512 bytes from addresses 0xFE00

to 0xFFFF are reserved for factory
use

128 bytes at address 0x10000 to

0x1007F (scratchpad memory) can
be used as non-volatile storage of
program constants
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 8051 Data Memory (RAM)
Internal Data Memory space is divided
into three sections
Lower 128
Upper 128
Special function register (SFR)

There are 384 bytes of memory space

physically, though the Upper 128 and
SFRs share the same addresses from
location 80H to FFH.

The special function registers (SFR) are accessed when the direct addressing mode is
used to access the upper 128 bytes of memory locations from 0x80 to 0xFF
The general purpose RAM are accessed when indirect addressing is used to access the
upper 128 bytes
The first 32 bytes of the internal data memory are addressable as four banks of 8 general
purpose registers
The next 16 bytes are bit-addressable or byte-addressable

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 Lower 128Register Banks and RAM

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 Program Status Word - PSW

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 Special Function Registers (SFRs)

SFRs provide control and data exchange with the microcontrollers resources
and peripherals

Registers which have their byte addresses ending with 0H or 8H are byte- as
well as bit- addressable

Some registers are not bit-addressable. These include the stack pointer (SP)
and data pointer register (DPTR)

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 Summary of 8051 SFRs
Accumulator (ACC) and B register
ACC (also referred to as A) is used implicitly by several instructions
B is used implicitly in multiply and divide operations
These registers are the input/output of the arithmetic and logic unit (ALU)

Program status wordPSW

Shows the status of arithmetic and logical operations using multiple bits such as Carry
Selects the Register Bank (Bank 0 - Bank 3)

Stack pointerSP
Data pointerDPTR (DPH and DPL)
16-bit register used to access external code or data memory

Timer RegistersTH0, TL0, TH1, TL1, TMOD, TCON

Used for timing intervals or counting events

Parallel I/O Port RegistersP0, P1, P2 and P3

Serial Communication RegistersSBUF and SCON
Interrupt Management RegistersIP and IE
Power Control RegisterPCON
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 C8051F040 Special Function Registers
SFRs provide control and data exchange with the
microcontrollers resources and peripherals

The C8051F040 duplicates the SFRs found in a typical 8051

implementation
The C8051F040 implements additional SFRs which are used to
configure and access the sub-systems unique to the microcontroller
The C8051F040 implements 256 SFR pages selectable using the
SFRPAGE register
Some SFRs (including the SFRs in the typical 8051 architecture) are
accessible on several pages
This allows the addition of new
functionalities, while retaining
compatibility with the MCS-51
instruction set

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www.silabs.com/MCU