3rd ISSE National Conference on Complex Engineering Systems of National
Importance:Current Trends & Future Perspective (INAC-03),October 12-13, 2017
Impact of Metal Electrodes on
AM-0002
MFIS Structure Performance for Next-Generation
FeRAM Applications
Robin Khosla, and Satinder K. Sharma*
School of Computing and Electrical Engineering (SCEE), Indian Institute of Technology (IIT)-Mandi, Mandi,
Himachal Pradesh, 175005, India
E-Mail: satinder@iitmandi.ac.in
Abstract The Metal-Ferroelectric-Insulator-
Semiconductor (MFIS) Capacitors with thin PZT and ultrathin
high- TiOxNy films on p-Siare fabricated with Au and Al
metal electrodes. The impact of top metal electrodes (Au and
Al) on electrical characteristics of MFIS structure was
investigated to study the non-volatility of Ferroelectric
Random Access Memory (FeRAM) devices. The experimental
results show that MFIS devices with Au electrodes exhibit
higher memory window of ~1.05 V as compared to ~0.5 V in
MFIS devices with Al electrodes at 5 V sweep voltage.
Moreover, MFIS devices with Au electrodes exhibited lower
leakage current density of ~5.5 A/cm2, as compared to 636
A/cm2 in MFIS devices with Al electrodes at +5 V. After
programming at 5 V, the high and low capacitance states for
both devices remain distinguishable for 5000 sec at room
temperature. However, exponential decay in Al electrodes
based MFIS devices is much fast as compared to Au electrodes
based MFIS devices due to their high leakage current density.
The poor performance of MFIS devices with Al electrodes may
be due to the presence of dead layer at the Al-PZT interface.
Thus, Metal/PZT/TiOxNy/Si, MFIS structure with Au metal
electrode is suitable for next generation 1T-FeRAM device
applications.
I. INTRODUCTION
N on-Volatile memories retain their information state
even when power is turned off. They range from low-
density applications such as RFID's which require Kb's of
storage to high-density applications such as HDD's [1]. The
scaling of charge storage memories such as (NAND Flash
and NOR Flash) is limited due to lower number of stored
electrons that are predicted to be close to the statistical
fluctuation limit. Thus, a small change in the number of
stored electrons will cause a significant shift in threshold
voltage (Vth) of the charge storage based memory devices
[2][4]. The emerging memories with alternate storage
mechanism such as ferroelectric (FeRAM)[5], magnetic
(MRAM)[6], phase change (PCRAM)[7] and resistive
(ReRAM)[8] are expected to scale further. Among the
emerging memories, Ferroelectric Random Access
Memories (FeRAM) have attracted considerable attention
due to their fast access time, low power consumption, high
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security, excellent retention & endurance time and radiation
tolerance [9][11]. Thus, they are suitable for portable low
voltage, long lifetime embedded (RFID's, smart cards) and
space applications. In fact, FeRAM is the best radiation
hardened non-volatile memory for near and deep space
applications where other semiconductor non-volatile
memories are unsuitable. Moreover, the ferroelectric process
module does not degrade the radiation hardness of
underlying CMOS circuitry.
The commercially available 1T-1C structure of FRAM
offers destructive readout operation similar to DRAM and
occupies more area due to separate switching and storage
element. While the 1T Metal-Ferroelectric-Insulator-
Semiconductor (MFIS) structure of FeRAM (also called
FeFET) has attracted the attention of memory community
due to non-destructive readout and excellent scalability.
Here, the extra buffer/insulator layer prevents the
interdiffusion and interfacial reactions between silicon and
ferroelectric material, thus, improves the device reliability
[12].
In literature, plenty of investigations are done on MFIS
structure of FeRAM with various ferroelectric and buffer
materials [13][25]. Although, there is lack of information
on the effect of metal electrode material especially on the
performance of MFIS structure of FeRAM. Further, there
are plenty of reports on the effect of metal/ferroelectric
interface and most of them state that this interface plays a
crucial role especially at lower ferroelectric thicknesses due
to the dominant depolarizing field. The depolarization field
is expected to arise due to the formation of the non-
ferroelectric layer at the metal/ferroelectric interface often
called dead-layer [26]. For ultrathin ferroelectric layers as
those required for ultra-scaled next-generation ferroelectric
memories, the charge on electrode may be insufficient to
screen the polarization, and a large depolarization field may
be present [27], [28]. Additionally, for ferroelectric thin
films the imprint performance, endurance/fatigue, and
leakage current strongly depend on the electrode material
[29][32]. Therefore, it is imperative to investigate the
performance of MFIS structure of FeRAM with different
metal electrodes.
3rd ISSE National Conference on Complex Engineering Systems of National
Importance:Current Trends & Future Perspective (INAC-03),October 12-13, 2017
In our previous works, the performance and reliability of
Au/PZT/TiOxNy/Si, MFIS FeRAM devices is reported with
the effect of constant voltage stress and thermal stress [33]
[35]. But there is lack of information on metal electrode
interface in MFIS structure of FeRAM especially with the
CMOS industry compatible Au and Al top electrode
materials. In particular, the effect of top electrode material
on the FeRAM device performance. Therefore, in this work,
the Metal/PZT/TiOxNy/Si, MFIS structure is investigated
with variation in metal electrodes Au and Al. The memory
window, retention analysis, and leakage current density of
fabricated devices were scrutinized by capacitance-voltage
(C-V), capacitance-time (C-T) and current-voltage (I-V)
characteristics, respectively.
II. EXPERIMENTAL
Fig. 1 shows the process flow to fabricate the Au or Al
/PZT/TiOxNy/Si, MFIS structure of FeRAM. The MFIS
capacitors were fabricated on 2-inch p-type <100> oriented
silicon wafers (1-10 W cm). After standard RCA cleaning,
deposition of TiOxNy films were carried out by radio
frequency (R.F) magnetron sputtering at R.F power 90 W,
3.910-2 torr, pressure of Ar/N2 (60:19 sccm) and
temperature of 300 K. These ultrathin films of TiO xNy
deposited Si wafers were annealed at 873 K for 30 min in N2
ambient. Subsequently, the deposition of PZT
(PbZr0.52Ti0.48O3) thin films were followed by R.F
Fig. 1. Process flow to fabricate Au or Al /PZT/TiOxNy/Si, MFIS
devices.
magnetron sputtering at R.F power 120 W, 1.8 10 -2 torr
pressure of Ar and temperature of 300 K. The PZT
deposited samples were annealed at 973 K for 60 min in
inert ambient. For metal electrodes, ~100 nm Au and Al thin
films were deposited by RF Magnetron Sputtering and
thermal evaporation, respectively. The thickness of
deposited TiOxNy (~6 nm) and PZT (~20 nm) thin films
were measured by Accurion EP3 imaging ellipsometer. The
C-V, C-T and I-V characteristics were carried out at room
temperature using KEITHLY 4200 SCS system.
III. RESULTS & DISCUSSIONS
Fig. 2 shows the cyclic C-V characteristics of
Metal/PZT/TiOxNy /Si, MFIS structure of FeRAM with Al
and Au metal electrodes. The flatband voltage (Vfb), the
threshold voltage (Vth) of FeRAM devices is measured to be
~0.55, ~1.39 V and ~ -1.78, ~ -1.08 V for Au and Al metal
electrodes, respectively. The left-shifted or negative
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Fig. 2. C-V characteristics of Au or Al/PZT/TiOxNy/Si, MFIS
structure of FeRAM.
threshold voltage in Al based MFIS devices may be due to
imprint induced in ferroelectric PZT layer caused by, (i)
stress induced by lattice mismatch between PZT and Al, or
(ii) formation of non-ferroelectric dead layer at the
Al/PZT interface [36]. Here, the memory window is defined
by the shift in the flatband voltage of FeRAM devices
during forward (accumulation to inversion) and reverse
(inversion to accumulation) gate voltage sweep. The
memory window observed for MFIS devices with Au and Al
gate electrodes is estimated to be ~0.5 V and ~1.05 V,
respectively. The lower memory window in
Al/PZT/TiOxNy/Si, MFIS devices signifies the stress
induced by top Al metal electrode in thin film of PZT that
deteriorates the ferroelectric polarization. Theoretically, the
memory window (W) can be expressed as [24]:
DW = 2d f Ec - DV fb ,ci (1)
where df, Ec and Vfb,ci is the thickness of ferroelectric,
coercive electric field of ferroelectric and flatband voltage
shift due to charge injection, respectively. Further, the
voltage drop across each layer in MFIS structure of FeRAM
is expressed as [24]:
e it f
Vf = (2)
(e f ti + e i t f )Vg
e f ti
Vi = (3)
(e f ti + e i t f )Vg
where Vf, tf, f and Vi, ti, i are the voltage, thickness,
dielectric constant of ferroelectric (PZT) and buffer layer
(TiON), respectively. Vg is the applied gate voltage.
Fig. 3 (a) shows the data retention (C-T) characteristics of
Metal/PZT/TiOxNy/Si, MFIS structure of FeRAM with Al
and Au gate electrodes. The retention characteristics are
taken by programming the devices in accumulation and
inversion region after a write pulse of -5 V and +5 V,
respectively, with 100 ms duration, followed by a read
voltage nearly equal to flatband voltage (Vfb) of the
corresponding device. The high (CH) and low (CL)
capacitance states are observed to decay exponentially and
3rd ISSE National Conference on Complex Engineering Systems of National
Importance:Current Trends & Future Perspective (INAC-03),October 12-13, 2017
remain distinguishable for 5000 sec. However, the decay in
Au/PZT/TiOxNy/Si, MFIS structure is much slower
indicating its impressive retention characteristics.
Fig. 3. The data retention (C-T) characteristics of Au or Al
/PZT/TiOxNy/Si, MFIS structure of FeRAM, (a) the measured data
and (b) extrapolation to 15 years
Here, the exponential decay of capacitance is also observed
in other high- based MIS capacitors reported in literature
[37], [38]. Additionally, on standard extrapolation to 15
years by keeping time axis on log scale as shown in Figure 3
(b), the retention time of MFIS devices with Al electrodes
ceases to ~38000 sec. Though for MFIS devices with Au
electrodes the retention saturates and satisfies the 15 years
requirement of ITRS for next-generation FRAM technology
node [1]. Additionally, the extrapolated retention time of
~15 years for Au/PZT/TiON/Si, MFIS structure is
confirmed by a mathematical linear extrapolation method
reported elsewhere [34]. Further, to confirm the retention
characteristics of MFIS devices, the J-V characteristics need
to be considered because retention time is directly
proportional to the leakage current density [4].
Fig. 4 shows the J-V characteristics of fabricated
Metal/PZT/TiOxNy/Si, MFIS structure of FeRAM with Au
and Al metal electrodes. The leakage current density for
fabricated MFIS devices with Au and Al gate metal
electrodes is observed to be ~5.5 A/cm2 and ~636 A/cm2
respectively at +5 V gate voltage. The lower leakage current
density in Au/PZT/TiOxNy/Si, MFIS devices supports their
excellent retention characteristics. However, the high
leakage current density in Al/PZT/TiOxNy/Si, MFIS devices
confirms the unfortunate performance of Al metal electrode
based MFIS devices. Thus, Au is a strong contender as a
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Fig. 4. The current density - voltage (J-V) characteristics of Au or Al
/PZT/TiOxNy/Si, MFIS structure of FeRAM.
metal electrode for next generation FeRAM device
applications.
IV. CONCLUSION
In summary, the impact of top metal electrodes Au and Al
is investigated on electrical characteristics of MFIS structure
of FeRAM. The experimental results show that MFIS
devices with Au electrodes exhibit higher memory window
of ~1.05 V as compared to ~0.5 V in MFIS devices with Al
electrodes at 5 V sweep voltage. Moreover, MFIS devices
with Au electrodes exhibited lower leakage current density
of 5.57 A/cm2 as compared to 636 A/cm2 in MFIS
devices with Al electrodes at +5 V. After programming at
5 V, the high and low capacitances for both devices remain
distinguishable for 5000 sec at room temperature. However,
exponential decay in Al electrodes based MFIS devices is
much fast as compared to Au electrodes based MFIS devices
due to their lower leakage current density. The unfortunate
performance of MFIS devices with Al electrodes may be
attributable to the presence of dead layer at the Al/PZT
interface or due to stress induced by top Al metal electrode.
Thus, Metal/PZT/TiOxNy/Si, MFIS structure with Au metal
electrode is suitable for next generation 1T-FeRAM device
applications.
ACKNOWLEDGMENT
The authors are grateful to Professor Ashutosh Sharma,
for the use of samples preparation facility at Thematic Unit
of Excellence, Department of Chemical Engineering, Indian
Institute of Technology (IIT) - Kanpur, India.
REFERENCES
[1] International Technology Roadmap for Semiconductors, 2013.
[Online]. Available: http://public.itrs.net/limks/2013ITRS/Summary/
2013.html.
[2] S. Lee, Scaling Challenges in NAND Flash Device toward 10nm
Technology, in 4th IEEE International Memory Workshop, Milan,
2012, pp. 14.
[3] P. Pavan, R. Bez, P. Olivo, and E. Zanoni, Flash memory cells-an
overview, Proc. IEEE, vol. 85, no. 8, pp. 12481271, 1997.
[4] R. Khosla, E. G. Rolseth, P. Kumar, S. S. Vadakupudhupalayam, S.
K. Sharma, and J. Schulze, Charge Trapping Analysis of
Metal/Al2O3/SiO2/Si, Gate Stack for Emerging Embedded
Memories, IEEE Transactions on Device and Materials Reliability,
vol. 17, no. 1. p. 80, 2017.
[5] Y. Arimoto and H. Ishiwara, Current Status of Ferroelectric
3rd ISSE National Conference on Complex Engineering Systems of National
Importance:Current Trends & Future Perspective (INAC-03),October 12-13, 2017
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Random-Access Memory, MRS Bull., vol. 29, no. 11, pp. 823828, Polarization switching and fatigue in Pb(Zr0.52Ti0.48)O3 films
2004. sandwiched by oxide electrodes with different carrier types, Appl.
[6] A. D. Kent and D. C. Worledge, A new spin on magnetic memories, Phys. Lett., vol. 90, no. 19, p. 192907, 2007.
Nat. Nanotechnol., vol. 10, pp. 187191, 2015. [31] P. J. Schorn et al., Fatigue effect in ferroelectric PbZr1xTixO3 thin
[7] R. E. Simpson et al., Interfacial phase-change memory, Nat. films, J. Appl. Phys., vol. 99, no. 11, p. 114104, 2006.
Nanotechnol., vol. 6, pp. 501505, 2011. [32] C. H. Choi, J. Lee, B. H. Park, and T. W. Noh, Asymmetric
[8] J. J. Yang, D. B. Strukov, and D. R. Stewart, Memristive devices for switching and imprint in (La,Sr)CoO3/Pb(Zr,Ti)O3/(La,Sr)CoO3
computing., Nat. Nanotechnol., vol. 8, no. 1, pp. 1324, 2013. heterostructures, Integr. Ferroelectr., vol. 18, no. 14, p. 39, 1997.
[9] J. F. Scott and C. A. P. de Araujo, Ferroelectric Memories, Science, [33] D. K. Sharma, R. Khosla, and S. K. Sharma, Multilevel
vol. 246, pp. 14001405, 1989. metal/Pb(Zr0.52Ti0.48)O3/TiOxNy/Si for next generation FeRAM
[10] J. Li, B. Nagaraj, H. Liang, W. Cao, C. H. Lee, and R. Ramesh, technology node, Solid. State. Electron., vol. 111, pp. 4246, Sep.
Ultrafast polarization switching in thin-film ferroelectrics, Appl. 2015.
Phys. Lett., vol. 84, no. 7, pp. 11741176, 2004. [34] R. Khosla, D. K. Sharma, K. Mondal, and S. K. Sharma, Effect of
[11] M. H. Kryder and C. S. Kim, After Hard Drives - What Comes electrical stress on Au/Pb (Zr0.52Ti0.48) O3/TiOxNy/Si gate stack
Next?, IEEE Trans. Magn., vol. 45, no. 10, pp. 34063413, 2009. for reliability analysis of ferroelectric field effect transistors, Appl.
[12] H. Ishiwara, Current status of ferroelectric-gate Si transistors and Phys. Lett., vol. 105, p. 152907, 2014.
challenge to ferroelectric-gate CNT transistors, Curr. Appl. Phys., [35] D. K. Sharma, R. Khosla, and S. K. Sharma, High performance
vol. 9, pp. S2S6, 2009. Au/PZT/TiOxNy/Si MFIS structure for next generation ferroelectric
[13] K. H. Kim, J. P. Han, S. W. Jung, and T. P. Ma, Ferroelectric DRAM memory applications, in AIP Conference Proceedings, 2015, vol.
(FEDRAM) FET with metal/SrBi2Ta2O9/SiN/Si gate structure, 1661, p. 60007.
IEEE Electron Device Lett., vol. 23, no. 2, pp. 8284, 2002. [36] Y. Zhou, H. K. Chan, C. H. Lam, and F. G. Shin, Mechanisms of
[14] E. Yurchuk et al., Impact of Scaling on the Performance of HfO2- imprint effect on ferroelectric thin films, J. Appl. Phys., vol. 98, no.
Based Ferroelectric Field Effect Transistors, IEEE Trans. Electron 2, p. 24111, 2005.
Devices, vol. 61, no. 11, pp. 36993706, 2014. [37] P. Kumar, R. Khosla, and S. K. Sharma, Nanoscale investigations:
[15] A. Chin, M. Y. Yang, C. L. Sun, and S. Y. Chen, Stack gate Surface potential of rare-earth oxide (Re2O3) thin films by kelvin
PZT/Al2O3 one transistor ferroelectric memory, IEEE Electron probe force microscopy for next generation CMOS technology,
Device Lett., vol. 22, no. 7, pp. 336338, 2001. Surfaces and Interfaces, vol. 4, pp. 6976, Oct. 2016.
[16] X. B. Lu, H. Ishiwara, and K. Maruyama, Fabrication and [38] R. Khosla, P. Kumar, and S. K. Sharma, Charge Trapping and Decay
characterization of metal-ferroelectric-insulator-Si diodes and Mechanism in Post Deposition Annealed Er2O3 MOS Capacitors by
transistors with different HfSiON buffer layer thickness, J. Mater. Nanoscopic and Macroscopic Characterization, IEEE Transactions
Res., vol. 23, no. 10, pp. 27272732, 2008. on Device and Materials Reliability, vol. 15, no. 4. pp. 610616,
[17] M. Noda, K. Kodama, S. Kitai, M. Takahashi, T. Kanashima, and M. 2015.
Okuyama, Basic characteristics of metal-ferroelectric-insulator-
semiconductor structure using a high-k PrOx insulator layer, J. Appl.
Phys., vol. 93, no. 7, pp. 41374143, 2003.
[18] C.-Y. Chang, T. P. Juan, and J. Y. Lee, Fabrication and
characterization of metal-ferroelectric (PbZr0.53Ti0.47O3)-Insulator
(Dy2O3)-semiconductor field effect transistors for nonvolatile
memory applications, Appl Phys Lett, vol. 88, p. 72917, 2006.
[19] W.-C. Shih, P.-C. Juan, and J. Y. Lee, Fabrication and
characterization of metal-ferroelectric (PbZr0.53Ti0.47O3)-Insulator
(Y2O3)-semiconductor field effect transistors for nonvolatile memory
applications, J. Appl. Phys., vol. 103, no. 9, p. 94110, 2008.
[20] H. S. Choi, E. H. Kim, I.-H. Choi, Y. T. Kim, J. H. Choi, and J. Y.
Lee, The effect of ZrO2 buffer layer on electrical properties in
Pt/SrBi2Ta2O9/ZrO2/Si ferroelectric gate oxide structure, Thin Solid
Films, vol. 388, pp. 226230, 2001.
[21] M. Takahashi and S. Sakai, Self-Aligned-Gate
Metal/Ferroelectric/Insulator/Semiconductor Field-Effect Transistors
with Long Memory Retention, Jpn. J. Appl. Phys., vol. 44, no. 6L, p.
L800, 2005.
[22] B. E. Park and H. Ishiwara, Electrical properties of LaAlO3/Si and
Sr0.8Bi2.2Ta2O9/LaAlO3/Si structures, Appl. Phys. Lett., vol. 79,
no. 6, pp. 806808, 2001.
[23] M. H. Tang, Z. H. Sun, Y. C. Zhou, Y. Sugiyama, and H. Ishiwara,
Capacitance-voltage and retention characteristics of
Pt/SrBi2Ta2O9/HfO2/Si structures with various buffer layer
thickness, Appl. Phys. Lett., vol. 94, p. 212907, 2009.
[24] T. P.-C. Juan et al., Fabrication and characterization of metal-
ferroelectric (PbZr0.6Ti0.4O3)-insulator (La2O3)-semiconductor
capacitors for nonvolatile memory applications, J. Appl. Phys., vol.
105, p. 61625, 2009.
[25] J. H. Park and S. K. Joo, A Novel Metal-Ferroelectric-Insulator-
Silicon FET with Selectively Nucleated Lateral Crystallized
Pb(Zr,Ti)O3 and ZrTiO4 Buffer for Long Retention and Good
Fatigue, IEEE Electron Device Lett., vol. 36, no. 10, pp. 10331036,
2015.
[26] W. Knzig, Space Charge Layer Near the Surface of a Ferroelectric,
Phys. Rev., vol. 98, no. 2, p. 549, Apr. 1955.
[27] G. Gerra, A. K. Tagantsev, and N. Setter, Ferroelectricity in
Asymmetric Metal-Ferroelectric-Metal Heterostructures: A Combined
First-Principles-Phenomenological Approach, Phys. Rev. Lett., vol.
98, no. 20, p. 207601, May 2007.
[28] H. Kohlstedt, N. A. Pertsev, J. Rodr\iguez Contreras, and R. Waser,
Theoretical current-voltage characteristics of ferroelectric tunnel
junctions, Phys. Rev. B, vol. 72, no. 12, p. 125341, Sep. 2005.
[29] J. Lee, C. H. Choi, B. H. Park, T. W. Noh, and J. K. Lee, Built-in
voltages and asymmetric polarization switching in Pb(Zr,Ti)O3 thin
film capacitors, Appl. Phys. Lett., vol. 72, no. 25, p. 3380, 1998.
[30] F. Chen, Q. Z. Liu, H. F. Wang, F. H. Zhang, and W. Wu,

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