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CoolMOS Power Transistor Product Summary
Features
V DS @ T j,max 650 V
New revolutionary high voltage technology
R DS(on),max 0.1
Ultra low gate charge
ID 34.6 A
Periodic avalanche rated
T C=100 C 21.9
I D=34.6 A,
Drain source voltage slope dv /dt 50 V/ns
V DS=480 V, T j=125 C
V GS AC (f >1 Hz) 30
Thermal characteristics
Static characteristics
V DS=600 V, V GS=0 V,
Zero gate voltage drain current I DSS - 0.1 1 A
T j=25 C
V DS=600 V, V GS=0 V,
- - 100
T j=150 C
V GS=10 V, I D=21.9 A,
Drain-source on-state resistance R DS(on) - 0.081 0.1
T j=25 C
V GS=10 V, I D=21.9 A,
- 0.2 -
T j=150 C
Dynamic characteristics
Fall time tf - 10 -
1)
Pulse width limited by maximum temperature T j,max only
2)
Repetitive avalanche causes additional power losses that can be calculated as P AV=E AR*f.
3)
C o(er) is a fixed capacitance that gives the same stored energy as C oss while V DS is rising from 0 to 80% V DSS.
4)
C o(tr) is a fixed capacitance that gives the same charging time as C oss while V DS is rising from 0 to 80% V DSS.
6)
ISD<=ID, di/dt<=200A/us, VDClink=400V, Vpeak<VBR, DSS, Tj<Tj,max.
Identical low-side and high-side switch.
Reverse Diode
V GS=0 V, I F=34.6 A,
Diode forward voltage V SD - 0.95 1.2 V
T j=25 C
typ. typ.
C th6 4.45)
5)
C th6 models the additional heat capacitance of the package in case of non-ideal cooling. It is not needed if
R thCA=0 K/W.
400 103
limited by on-state
resistance
1 s
300 102
10 s
100 s
P tot [W]
I D [A]
200 101
DC 1 ms
10 ms
100 100
0 10-1
0 40 80 120 160 100 101 102 103
T C [C] V DS [V]
100 100
7V
20 V 6.5 V
0.5 80
6V
10-1
0.2
60
Z thJC [K/W]
0.1
I D [A]
5.5 V
0.05
40
-2 0.02
10
5V
0.01
single pulse
20
4.5 V
4V
10-3 0
10-6 10-5 10-4 10-3 10-2 10-1 100 0 5 10 15 20
t p [s] V DS [V]
60 0.8
20 V
6V
7V 5.5 V
0.7
50
6.5 V
5.5 V
0.6 4V 4.5 V 5V
40
0.5
R DS(on) []
5V
I D [A]
30 0.4
6V
0.3
20 4.5 V
20 V
0.2
10 4V
0.1
0 0
0 5 10 15 20 0 10 20 30 40 50 60
V DS [V] I D [A]
0.3 100
25 C
0.25
80
0.2
60
R DS(on) []
150 C
I D [A]
0.15
98 % 40
0.1
typ
20
0.05
0 0
-60 -20 20 60 100 140 180 0 2 4 6 8 10
T j [C] V GS [V]
12 103
10
25 C 25 C, 98%
102 150 C, 98%
8 120 V
480 V
150 C
V GS [V]
I F [A]
6 101
100
0 10-1
0 50 100 150 200 0 0.5 1 1.5 2 2.5
Q gate [nC] V SD [V]
40 1600
30 1200
E AS [mJ]
I AV [A]
20 800
125 C 25 C
10 400
0 0
-3 -2 -1 0 1 2 3 20 60 100 140 180
10 10 10 10 10 10 10
t AR [s] T j [C]
700 105
660 104
Ciss
V BR(DSS) [V]
C [pF]
620 103
Coss
580 102
Crss
540 101
-60 -20 20 60 100 140 180 0 100 200 300 400 500
T j [C] V DS [V]
30
25
20
E oss [J]
15
10
0
0 100 200 300 400 500 600
V DS [V]
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81726 Munich, Germany
2008 Infineon Technologies AG
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