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8086/8088 Machine language

Instruction format, Addressing


Modes, Data addressing,
Program memory & stack
addressing mode
Software
The sequence of commands used to tell a
microcomputer what to do is called a program,
Each command in a program is called an instruction
8088 understands and performs operations for 117
basic instructions
The native language of the IBM PC is the machine
language of the 8088
A program written in machine language is referred
to as machine code
In 8088 assembly language, each of the operations is
described by alphanumeric symbols instead of 0-1s.
ADD AX, BX

(Opcode) (Destination operand) (Source


operand )
Instructions
LABEL: INSTRUCTION ; COMMENT
Address identifier Does not generate any machine
code
Ex. START: MOV AX, BX ; copy BX into
AX
There is a one-to-one relationship between
assembly and machine language instructions
A compiled machine code implementation of a
program written in a high-level language results
in inefficient code
More machine language instructions than an
assembled version of an equivalent handwritten
assembly language program
Two key benefits of assembly language
programming
It takes up less memory
It executes much faster
Applications
One of the most beneficial uses of
assembly language programming is
real-time applications.
Real time means the task required by the application must be
completed before any other input to the program that will
alter its operation can occur
For example the device service routine which controls the
operation of the floppy disk drive is a good example that is
usually written in assembly language
Assembly language not only good for
controlling hardware devices but also
performing pure software operations
Searching through a large table of data for a special string of
characters
Code translation from ASCII to EBCDIC
Table sort routines
Mathematical routines
Assembly language: perform real-time operations
High-level languages: used to write those parts
that are not time critical
Converting Assembly Language Instructions to
Machine Code

An instruction can be coded with 1 to 6 bytes


Byte 1 contains three kinds of information
Opcode field (6 bits) specifies the operation (add, subtract, move)
Register Direction Bit (D bit) Tells the register operand in REG field in byte 2
is source or destination operand
1: destination 0: source
-Data Size Bit (W bit) Specifies whether the operation will be performed on
8-bit or 16-bit data
0: 8 bits 1: 16 bits
15 ------- 10 9 8 7 ---- 6 5 ---- 3 2 ---- 0
Byte 2 has three fields
Mode field (MOD)
Register field (REG) used to identify the register for the first operand
Register/memory field (R/M field)
2-bit MOD field and 3-bit
Mode Field encoding
R/M field together specify the
second operand

Register/memory (R/M) Field Encoding


Examples
MOV BL,AL (88C316)
Opcode for MOV = 100010
D = 0 (AL source operand)
W bit = 0 (8-bits)
Therefore byte 1 is 100010002=8816
MOD = 11 (register mode)
REG = 000 (code for AL)
R/M = 011 (destination is BL)
Therefore Byte 2 is 110000112=C316
Examples:
MOV BL, AL = 10001000 11000011 = 88 C3h
ADD AX, [SI] = 00000011 00000100 = 03 04 h
ADD [BX] [DI] + 1234h, AX = 00000001 10000001 __ __ h =
01 81 34 12 h
Addressing Modes and
Formats
Addressing Modes
Immediate
Direct
Indirect
Register
Register Indirect
Displacement (Indexed)
Stack
Immediate Addressing
Operand is part of instruction
Operand = address field
e.g. ADD 5
Add 5 to contents of accumulator
5 is operand
No memory reference to fetch data
Fast
Limited range
Immediate Addressing Diagram
Instruction

Opcode Operand
Direct Addressing
Address field contains address of operand
Effective address (EA) = address field (A)
e.g. ADD A
Add contents of cell A to accumulator
Look in memory at address A for operand
Single memory reference to access data
No additional calculations to work out
effective address
Limited address space
Direct Addressing Diagram
Instruction

Opcode Address A
Memory

Operand
Indirect Addressing (1)
Memory cell pointed to by address field
contains the address of (pointer to) the
operand
EA = (A)
Look in A, find address (A) and look there for
operand
e.g. ADD (A)
Add contents of cell pointed to by contents
of A to accumulator
Indirect Addressing (2)
Large address space
2n where n = word length
May be nested, multilevel, cascaded
e.g. EA = (((A)))
Draw the diagram yourself
Multiple memory accesses to find
operand
Hence slower
Indirect Addressing Diagram
Instruction

Opcode Address A
Memory

Pointer to operand

Operand
Register Addressing (1)
Operand is held in register named in
address filed
EA = R
Limited number of registers
Very small address field needed
Shorter instructions
Faster instruction fetch
Register Addressing (2)
No memory access
Very fast execution
Very limited address space
Multiple registers helps performance
Requires good assembly programming or
compiler writing
N.B. C programming
register int a;
c.f. Direct addressing
Register Addressing Diagram
Instruction

Opcode Register Address R


Registers

Operand
Register Indirect Addressing

C.f. indirect addressing


EA = (R)
Operand is in memory cell pointed to by
contents of register R
Large address space (2n)
One fewer memory access than indirect
addressing
Register Indirect Addressing Diagram

Instruction

Opcode Register Address R


Memory

Registers

Pointer to Operand Operand


Displacement Addressing
EA = A + (R)
Address field hold two values
A = base value
R = register that holds displacement
or vice versa
Displacement Addressing Diagram

Instruction

Opcode Register R Address A


Memory

Registers

Pointer to Operand + Operand


Relative Addressing
A version of displacement addressing
R = Program counter, PC
EA = A + (PC)
i.e. get operand from A cells from current
location pointed to by PC
c.f locality of reference & cache usage
Base-Register Addressing
A holds displacement
R holds pointer to base address
R may be explicit or implicit
e.g. segment registers in 80x86
Indexed Addressing
A = base
R = displacement
EA = A + R
Good for accessing arrays
EA = A + R
R++
Combinations
Postindex
EA = (A) + (R)

Preindex
EA = (A+(R))

(Draw the diagrams)


Stack Addressing
Operand is (implicitly) on top of stack
e.g.
ADD Pop top two items from stack
and add
x86 Addressing Modes
Virtual or effective address is offset into segment
Starting address plus offset gives linear address
This goes through page translation if paging enabled
12 addressing modes available
Immediate
Register operand
Displacement
Base
Base with displacement
Scaled index with displacement
Base with index and displacement
Base scaled index with displacement
Relative
x86 Addressing Mode Calculation
ARM Addressing Modes
Load/Store
Only instructions that reference memory
Indirectly through base register plus offset
Offset
Offset added to or subtracted from base register contents to form the
memory address
Preindex
Memory address is formed as for offset addressing
Memory address also written back to base register
So base register value incremented or decremented by offset value
Postindex
Memory address is base register value
Offset added or subtracted
Result written back to base register
Base register acts as index register for preindex and postindex
addressing
Offset either immediate value in instruction or another register
If register scaled register addressing available
Offset register value scaled by shift operator
ARM
Indexing
Methods
ARM Data Processing Instruction Addressing
& Branch Instructions

Data Processing
Register addressing
Value in register operands may be scaled using a
shift operator
Or mixture of register and immediate
addressing
Branch
Immediate
Instruction contains 24 bit value
Shifted 2 bits left
On word boundary
ARM Load/Store Multiple
Addressing
Load/store subset of general-purpose
registers
16-bit instruction field specifies list of
registers
Sequential range of memory addresses
Increment after, increment before,
decrement after, and decrement before
Base register specifies main memory
address
Incrementing or decrementing starts
ARM Load/Store Multiple Addressing Diagram
Instruction Formats
Layout of bits in an instruction
Includes opcode
Includes (implicit or explicit) operand(s)
Usually more than one instruction format
in an instruction set
Instruction Length
Affected by and affects:
Memory size
Memory organization
Bus structure
CPU complexity
CPU speed
Trade off between powerful instruction
repertoire and saving space
Allocation of Bits
Number of addressing modes
Number of operands
Register versus memory
Number of register sets
Address range
Address granularity
PDP-8 Instruction Format
PDP-10 Instruction Format
PDP-11 Instruction Format
VAX Instruction Examples
x86 Instruction Format

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