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Article history: Fault resistance is a critical component of electric power systems operation due to its stochastic nature. If
Received 18 April 2009 not considered, this parameter may interfere in fault analysis studies. This paper presents an iterative
Received in revised form 7 February 2011 fault analysis algorithm for unbalanced three-phase distribution systems that considers a fault resistance
Accepted 1 June 2011
estimate. The proposed algorithm is composed by two sub-routines, namely the fault resistance and the
Available online 5 July 2011
bus impedance. The fault resistance sub-routine, based on local fault records, estimates the fault resis-
tance. The bus impedance sub-routine, based on the previously estimated fault resistance, estimates
Keywords:
the system voltages and currents. Numeric simulations on the IEEE 37-bus distribution system demon-
Bus impedance matrix
Power distribution systems
strate the algorithms robustness and potential for ofine applications, providing additional fault infor-
Fault analysis mation to Distribution Operation Centers and enhancing the system restoration process.
Fault resistance 2011 Elsevier Ltd. All rights reserved.
Power systems protection
0142-0615/$ - see front matter 2011 Elsevier Ltd. All rights reserved.
doi:10.1016/j.ijepes.2011.06.010
A.D. Filomena et al. / Electrical Power and Energy Systems 33 (2011) 13261335 1327
with equally transposed lines. The usage of articial intelligence V Sfp V Fp x zpa ISfa zpb ISfb zpc ISfc 2
has also been recently proposed in order to overcome the fault
resistance effects in classical power system protection [13] and where
fault location [14] applications. V Fp Z F IFp 3
Considering the above mentioned limitations of state-of-the-art
fault analysis methods, this paper proposes an iterative fault anal- whereas ZF is the fault impedance between line-to-ground, the sub-
ysis algorithm that considers typical distribution systems charac- script p represents the faulted phase, and IFp is the phase p fault
teristics, and a fault resistance estimate. The proposed fault current.
analysis algorithm is composed by two sub-routines, namely the Considering the fault impedance strictly resistive and constant,
fault resistance and the bus impedance sub-routines. The fault (2) may be expanded into its real and imaginary parts:
resistance sub-routine is based on an iterative formulation exe- " # " #
cuted to estimate the fault resistance through one-terminal fault V Sfpr M 1p IF pr x
4
records. The bus impedance sub-routine considers the estimated V Sfpi M 2p IF pi RF
fault resistance values, and uses a bus impedance matrix based for-
mulation to estimate the fault system voltages and currents. where the subscripts r and i represent the real and imaginary com-
In order to validate the proposed fault analysis algorithm, the ponents, RF is the fault resistance, and:
formulation was implemented in MATLAB [15] and had its perfor- X
mance evaluated using a modied IEEE 37 Node Test Feeder [16], M 1p zpkr ISfkr zpki ISfki 5
kfa;b;cg
simulated under BPAs ATP/EMTP software [17]. X
The remaining of this paper is organized as follows. The second M 2p zpkr ISfki zpki ISfkr 6
section presents the fault resistance sub-routine. Section 3 de- kfa;b;cg
IF ISf IL 10
2 3 2 3 2 3 2 3
V Fa V Sfa zaa zab zac ISfa (I) Three different power ow analyses, such as described in
6 7 6 7 6 7 6 7 [20], are executed. In each one of the PFA, consider different
4 V F b 5 4 V Sfb 5 x 4 zba zbb zbc 5 4 ISfb 5 11
V Fc V Sfc zca zcb zcc ISfc voltage conditions at the substation, in order to obtain dif-
ferent operating points of the system. The system loading
(V) An equivalent admittance matrix between the load and the must be held constant in the three PFA. The different operat-
line impedance between the fault location and the receiv- ing points are given by the different voltage conditions at the
ing-end is calculated by (12): substation terminals. Initially is considered a balanced volt-
Y L L x Z Z L 1 12 age condition at the substation terminals, as given by (16):
where [Z] is the line impedance matrix per unit length, [ZL] is V S jV S j\0 jV S j\ 120 jV S j\120 T 16
the load impedance matrix, and L is the line length.
(VI) The three-phase load current vector is updated using the The rst PFA considers the balanced voltage condition, as given by
equivalent admittance matrix obtained by (12) and the fault (16). The other two PFA are executed considering slightly different
location voltages: voltage conditions, which should be unbalanced in order to avoid
IL Y L V F 13 linearly dependent results. The voltage conditions considered in
the subsequent PFA can be described by (17):
(VI) The algorithm veries if the fault resistance and distance
have converged, using (14) and (15): V Sk jV S j 1 bk 17
jRF n RF n 1j < d1 14
where bk is a voltage deviation per unit value, which can be either a
jxn xn 1j < d2 15 positive or a negative value. Its value should be small, such as
0.01 p.u., and different for each phase k. This avoids convergence
where n is the iteration number and d1,2 are the error toler-
problems in the power ow algorithm. The voltage angles, however,
ances, which are previously dened according to the accuracy
are kept constant.
and computational time desired. In this work, d1 and d2 have
(II) Calculate the equivalent impedances for each phase, from
been considered equal to 1 107 and 1 104, respectively.
each node p to its adjacent nodes q, using (18):
(VI) If the fault resistance and distance have converged, stop the 2 3 2 31 2 3
iterative procedure, otherwise return to step II. Z ta I a1 I b1 I c1 V t1
From the iterative formulation presented in this section, 6 7 6 I c2 7 6 7
Z t pq 4 Z tb 5 4 I a2 I b2 5 4 V t2 5 18
fault resistance and distance can be considered as outputs. Z tc I a3 I b3 I c3 V t3 p
pq pq
Thus, the fault distance can also be used as a fault location
estimate. However, as typical impedance-based fault loca- for t = {a, b, c}, where the subscripts {1, 2, 3} represent the index of
tion techniques, for higher fault resistance values the fault the three different PFA; and p, q is the adjacent nodes; Zmn the
distance estimate may be inaccurate [19]. An additive error impedance between phases m and n; V the resulting voltage from
in the fault current estimate provides a much higher nega- PFA; I is the resulting current from PFA.
tive effect in the fault distance estimate than in the fault (II) Determine a three-phase equivalent matrix, [Zeq]pq, for each
resistance one [19]. lateral that starts with a section connecting the adjacent
nodes p and q, using the vectors dened on (18), applied in
2.3. Distribution systems laterals (19):
Z eq pq Z a pq Z b pq Z c pq T 19
Power distribution feeders are typically radial networks com-
posed by a main feeder, laterals, and sub-laterals. The faulted The algorithm considers initially the voltages and currents mea-
branch identication is a research eld still under development, sured at the substation terminal. With the previously known infor-
which exceeds the scope of this paper. The proposed fault analysis mation of the faulted section and the equivalent laterals, it is
algorithm considers the faulted lateral to be previously known possible to calculate the voltages and currents at all nodes up-
data. The extension of the proposed fault resistance sub-routine stream to the faulted section.
for systems with laterals, however, is still necessary. To obtain such Since voltages and currents are measured only at the substation
extension, the proposed method obtains equivalent networks asso- terminals, voltages and currents at the downstream bus (k + 1) are
ciated with each one of the systems laterals. estimated by (20) and (21), respectively:
In this work, each system lateral is replaced by an equivalent
V k1 V k Z k Ik 20
network that is represented as a three-phase constant impedance
X n
matrix. Thus, each system lateral can be represented by a tapped Ik1 Ikm ILk 21
off equivalent network. Considering a distribution system with n m1
laterals, n different equivalent networks are obtained, one for each mk1
where
X
M3 zpkr zqkr ISfkr zpki zqki ISfki 24
kfa;b;cg
X
M4 zpkr zqkr ISfki zpki zqki ISfkr 25
kfa;b;cg
2 3 2 31 2 3
x M 1p IF pr 0 IF pr IF qr V Sfpr Finally, from (9), (23), (26), and (27) it is possible to estimate all
6 RF 7 6 M2 IF pi IF qi 7 6 7
6 p 7 6 p IF pi 0 7 6 V Sfpi 7 26
fault resistances for any fault type. Based on these estimated val-
6 76 7 6 7 ues, the bus impedance sub-routine can be developed, as presented
4 RF q 5 4 M 1q 0 IF qr IF pr IF qr 5 4 V Sfqr 5
in the following.
RF pq M 2q 0 IF qi IF pi IF qi V Sfqi
where M1 and M2 are given by (5) and (6). 3. Bus impedance sub-routine
2.4.3. Three-phase fault Power distribution systems are typically unbalanced, with
For the three-phase fault (3PH), which is illustrated in Fig. 4, the untransposed feeders and single-phase loads. In these conditions,
expressions for the fault distance and the three fault resistances the bus impedance matrix technique is the most suitable choice
are given by (27): available for fault system voltages and currents state estimation.
Using this method it is possible to analyze any fault type by mod-
2 3 2 31 2 3
x M 1a IF ar 0 0 V Sfar ifying the phase coordinate base-case impedance matrix, consider-
6 R 7 6 M2 IF ai 0 0 7 6 V Sf 7 ing the systems asymmetries. The bus impedance sub-routine,
6 Fa 7 6 a 7 6 ai 7 27
6 76 7 6 7 which was initially proposed in [7], is described in the following
4 RFb 5 4 M1b 0 IF br 0 5 4 V Sfbr 5
subsections.
RF c M 1c 0 0 IF cr V Sfci
3.1. Bus impedance matrix
where M1 and M2 are given by (5) and (6).
From (28) and (29), 3n 3n three-phase admittance and Adding the superimposed voltages to each pre-fault bus voltage
impedance matrices are built, as presented in (30) and (31), (VPF), the fault period bus voltages (VF) are estimated through (36):
respectively.
V F i V PF i DV i 36
2 3
Y abc 1;1 Y abc 1;2 Y abc 1;n
6 Y Finally, from the three-phase bus voltages and the admittance ma-
6 abc 2;1 Y abc 2;2 Y abc 2;n 7
7 trix, it is possible to calculate the three-phase currents during the
6 7
Y bus 6 .. .. .. 7 30 fault period at each feeder (Igh):
6 . . . 7
4 5
Y abc n;1 Y abc n;2 Y abc n;n Igh Y abc g;h V Fg V Fh 37
V Fr or
IFr 32 X
Z new r; r DV i Z new i; j IFj 43
j1
where VFr is the node r pre-fault voltage, and
where i, j = 1 ? (3n + 3) represent the node indexes.
Z new r; r Z bus r; r RF 33
From the superimposed and pre-fault voltages, the three-phase
where RF is the fault resistance, estimated by (9). voltages and currents at each feeder can also be calculated through
The superimposed voltages at each bus due to the injected fault (36) and (37), respectively.
current (IFr) may be calculated using the impedance matrix Znew:
2 3.3.3. Double line-to-ground fault
DV 1 3 2
0
3
Considering a DLG fault, as illustrated in Fig. 3, the Zbus matrix
6 .. 7 6 .. 7 must be modied to include in the two faulted nodes (r and s)
6 . 7 6 . 7
6 7 6 7 the three fault resistances of the fault model. Following the same
6 7 6 7
6 DV r 7 Z new 6 IFr 7 34 procedure as presented previously:
6 7 6 7
6 .. 7 6 .. 7
4 . 5 4 . 5
Z new r; r Z bus r; r RF r 0:5RF rs 44
DV n 0 Z new s; s Z bus s; s RF s 0:5RF rs 45
where (34) can also be rewritten as: where RFR, RFs, and RFrs are the fault resistances estimates obtained
DV i Z new i; r IFr 35 from (26).
Using the modied three-phase impedance matrix Znew, the
whereas i = 1 ? (3n + 3) represents the node index. fault currents (IFr and IFs) are calculated through (46):
A.D. Filomena et al. / Electrical Power and Energy Systems 33 (2011) 13261335 1331
1
IF r Z new r; r Z new r; s V PF r All loads modeled as constant impedance Y-connected with
46 neutral grounding.
IF s Z new s; r Z new s; s V PF s
where VPFr, VPFs, are the pre-fault voltages on the faulted nodes r and The modied test system, composed by 36 buses and illustrated
s, respectively. by Fig. 5, was simulated using BPAs ATP/EMTP [17]. The fault anal-
From the fault currents estimated through (46), the superim- ysis algorithm was implemented in MATLAB [15]. A modied
posed voltages are calculated using (47): Fourier lter [22] was also implemented in MATLAB to remove
2 3 2 3 the decaying DC component and estimate the voltages and cur-
DV 1 0
6 . 7 6 .. 7 rents fundamental components measured at the substation termi-
6 .. 7 6 . 7 nal. The simulations were executed considering the following fault
6 7 6 7
6 7 6 7
6 DV r 7 6 I 7 conditions:
6 7 Z new 6 Fr 7 47
6 DV 7 6 IFs 7
6 s 7 6 7
6 . 7 6 . 7 103 different fault locations (covering all system laterals and
6 . 7 6 . 7
4 . 5 4 . 5 sections).
DV n 0 Five different fault resistances: 0, 10, 20, 50, and 100 X.
10 fault types: A-g, B-g, C-g, AB, BC, AC, AB-g, BC-g, AC-g, and
From the superimposed voltages, the fault period bus voltages ABC-g.
and currents can be obtained through (36) and (37), respectively. Total: 5150 faults.
3.3.4. Three-phase fault The simulation set was divided in two different case tests,
Three-phase fault is the most severe fault type, and is normally which are summarized in the following scenarios:
used for rotating machines fault analysis. However, this fault type
represents only 5% of the fault events on transmission lines [1]. For Set I:
three-phase faults the bus impedance matrix must be modied to 103 fault locations.
include the phases a, b, and c fault resistances, whose estimates are Five fault resistances.
obtained from (27):
Z new r; r Z bus r; r RF a 48 10 fault types.
Z new s; s Z bus s; s RF b 49 Total: 5150 fault cases.
Z new t; t Z bus t; t RF c 50
Set II:
where r, s, and t are the fault nodes indexes.
Two fault locations (K1 = 2.063 km, K2 = 1.649 km).
From the modied three-phase bus impedance (Znew), the fault
Five fault resistances.
currents are calculated using (51):
10 fault types.
2 3 2 31 2 3 Total: 100 fault cases.
IF r Z new r; r Z new r; s Z new r; t V PF r
6 7 6 7 6 7 51
4 IF s 5 4 Z new s; r Z new s; s Z new s; t 5 4 V PF s 5
IF t Z new t; r Z new t; s Z new t; t V PF t
where VPFr, VPFs, VPFt are the pre-fault voltages on the faulted nodes
r, s, and t, respectively.
From the fault currents calculated through (51), the bus super-
imposed voltages are obtained by (52):
2 3 2 3
DV 1 0
6 . 7 .
6 . 7
6 .. 7 6 . 7
6 7 6 7
6 7 6 I 7
6 DV r 7 6 Fr 7
6 7 6 7
6 7
6 DV s 7 Z new 6 7
6 IFs 7 52
6 7 6 I 7
6 DV t 7 6 Ft 7
6 7 6 7
6 . 7 6 .. 7
6 . 7 4 . 5
4 . 5
DV n 0
4. Case study
The errors in the fault resistances estimates were calculated scenario. The fault resistance effect in the proposed algorithm
considering the absolute difference between estimated and simu- may be explained by the erroneous estimation of the fault current
lated fault resistances, as given by (53): for high fault resistances values [16], also associated to the so-
called reactance error [23]. As given in (10), the proposed formula-
e jRF calc RF real j 53
tion is fault period load current estimate dependent. For faults with
where RFcalc and RFreal are the estimated and the real fault resis- small fault resistances values, the current divider circuit of the
tances values, respectively. faulted system is composed by the load impedance and a negligible
fault resistance. In this scenario, the source current will mainly
feed the fault and the fault current will be close to the rst. There-
5. Results fore, small variation on the calculated fault current does not affect
the fault resistance estimate. As illustrated by Tables 1 and 2, as the
In the following subsections, the obtained results from the pro- fault resistance increases, this effect became more signicant.
posed fault analysis algorithm are presented and discussed. Ini- However, even to the most critical analyzed fault scenario, the
tially, the effects of different fault resistance and distance values maximum error obtained was 2.30%.
on the fault resistance estimate are veried. After, the buses volt-
ages and fault currents estimates are also compared to the BPAs 5.1.2. Fault distance effect
ATP/EMTP simulations. To analyze the fault distance effect on the fault resistance esti-
mate, the obtained results from Set I were used. Figs. 6 and 7 illus-
5.1. Fault resistance estimation trate the fault resistance estimates over each one of the 103
simulated fault locations for single line-to-ground and line-to-line
Set I test results were used to analyze the fault analysis algo- faults, respectively.
rithm performance. The results are analyzed over two aspects: The fault resistance estimates demonstrate that the proposed
fault resistance and distance effects. algorithm efciency is fault location independent. As provided by
Tables 1 and 2, on faults up to 100-X, a small difference between
5.1.1. Fault resistance effects maximum and average errors can be observed for the four fault
Table 1 presents the results for single line-to-ground and line- types. Also, as illustrated by Figs. 6 and 7, a small variation over
to-line faults for ve simulated fault resistances. The results show the 103 fault points can only be visually observed for the most crit-
that the errors associated to the fault resistances estimates slightly ical simulated fault condition. However, as discussed previously,
increase for higher fault resistances values. The algorithm yielded a these differences can be neglected.
highest average error equal to 1.13 X for SLG faults and 0.19 X for
LL faults. Still, the maximum errors produced by the algorithm 5.2. System voltages and currents estimation
were 1.66 X and 1.13 X for single line-to-ground and line-to-line
faults, respectively. Considering Set test II, the proposed fault analysis algorithm
Table 2 shows the fault resistances estimate results for double performance is discussed over two aspects: fault current at the
line-to-ground and three-phase faults. The comparison between faulty bus and bus voltages during the disturbance. In this section
the calculated and the simulated fault resistances values also dem- two different fault locations have been analyzed. The investigated
onstrate negligible errors on both fault types. In double line-to- fault points K1 and K2, which are coincident to buses 707 and 737,
ground faults, the average and maximum errors obtained were, are located 2063 and 1649 meters from the substation, as illus-
respectively, 0.97 X and 1.43 X, both occurred on the 100-X fault trated in Fig. 5. The results discussed in this section represents
scenario. The algorithm provided for three-phase faults a maxi- not only the inaccuracy associated to the Zbus analysis technique,
mum error equal to 2.30 X, for a 100-X fault. Also for this fault but the hole fault analysis method proposed in this paper, includ-
type, the highest average errors for 50-X and 100-X fault resis- ing the errors introduced by the fault resistance estimates.
tances were 0.22 X and 1.05 X, respectively.
The results presented in Table 2 show slight differences be- 5.2.1. Fault current
tween the estimated fault resistances in each faulted phase, re- Fault analysis performance was rst evaluated considering the
sulted by system unbalances and the fundamental components fault current at faulty buses K1 and K2. Tables 3 and 4 show the
determination process, due to different fault inception angles. fault current errors, demonstrating the inaccuracies of absolute
However, as described in Table 2, these inaccuracies provide small and angular components between calculated fault current and
differences which will not affect the proposed fault analysis meth- BPAs ATP/EMTP simulations.
od performance. The obtained results for single line-to-ground and line-to-line
As expected from an impedance-based formulation, the highest faults at K1 and K2 are presented in Table 3. During SLG faults with-
errors were obtained during the most critical fault resistance test out fault resistance, the method provided maximum errors to this
Table 1
Fault resistance estimates for single line-to-ground and line-to-line faults.
Fault type Simulated RF (X) Maximum error (X) Minimum error (X) Average error (X)
A-g 0 0 0 0
A-g 10 0.02 0 0.01
A-g 20 0.06 0.01 0.03
A-g 50 0.35 0.03 0.21
A-g 100 1.66 0.11 1.13
BC 0 0 0 0
BC 10 0.01 0 0
BC 20 0.03 0 0
BC 50 0.11 0 0.03
BC 100 1.13 0 0.19
A.D. Filomena et al. / Electrical Power and Energy Systems 33 (2011) 13261335 1333
Table 2
Fault resistances estimates for double line-to-ground and three-phase faults.
Fault type Simulated RF (X) Maximum error (X) Minimum error (X) Average error (X)
RFa RFb RFc RFa RFb RFc RFa RFb RFc RFa RFb RFc
AC-g 0 0 0 0 0 0 0 0
AC-g 10 10 0.01 0.01 0 0 0.01 0
AC-g 20 20 0.04 0.04 0.01 0 0.03 0.02
AC-g 50 50 0.29 0.27 0.03 0.01 0.18 0.12
AC-g 100 100 1.43 1.03 0.11 0.04 0.97 0.66
ABC-g 0 0 0 0 0 0.01 0 0 0 0 0 0
ABC-g 10 10 10 0.02 0.02 0.01 0 0 0 0.01 0 0.01
ABC-g 20 20 20 0.06 0.05 0.05 0.01 0 0.01 0.03 0.02 0.02
ABC-g 50 50 50 0.42 0.62 0.49 0.03 0 0.02 0.22 0.13 0.19
ABC-g 100 100 100 1.53 2.30 2.25 0.10 0.01 0.06 1.05 0.48 0.92
Table 4
Fault current errors at K1 for double line-to-ground and three-phase faults.
Table 5
Bus voltages errors for faults at K1.
5.2.2. Bus voltages technique has been developed to be suitable for generic unbalanced
The fault analysis algorithm performance was also evaluated power distribution systems with ramications, and only requires
through comparisons between BPAs ATP/EMTP simulations and the disturbance sending-end voltages and currents.
the estimated voltages in four different buses: 702, 709, 720, and Test results demonstrate an accurate and robust fault analysis
734. Table 5 presents the maximum absolute and angular errors method. The fault resistance estimate algorithm provided accurate
for all analyzed faults at K1. Considering the bus voltages estimated results to all analyzed cases, for faults up to 100 X, with a small
from the calculated fault current and pre-fault voltages, this sec- dependence with the fault resistance value. Besides, the fault resis-
tion discusses the inaccuracies introduced by three different pro- tance sub-routine is invariant to the fault location. The proposed
cesses: fault resistance, fault current and three-phase load ow. fault analysis algorithm performance is also independent to fault
The estimated bus voltages accuracy is demonstrated by Table 5 resistance values and fault location. The obtained results demon-
results: the highest absolute error was 0.82%, which represents an strate the technique accuracy to all analyzed conditions, showing
error equal to 113 Volts and it is associated to bus 720. A maximum that the discussed aspects do not affect the proposed fault analysis
error of 0.72 has also been obtained at bus 734. As consequence performance.
from the already discussed fault current estimate accuracy, the re- In this work the fault impedance was modeled as a constant
sults provided by Table 5 also demonstrate the bus voltage esti- resistance and the distribution system considered radial. It is ex-
mate invariance to different fault resistances values. Besides, pected that the proposed method performance decreases when
these results demonstrate that the main error source is the pre- fault impedance is not strictly resistive and constant or when dis-
fault bus voltages, which were estimated in this paper through a tributed generation are connected to network buses. Parameter
three-phase load ow based on the ladder technique [21]. There- identication is a research topic of great interest of the power sys-
fore, the bus voltage estimates are dependent to the bus and also tems community. In this work however this issue was not ad-
the fault location, resulting in different error levels (absolute and dressed. The proposed formulation considers known accurate
angular) to each analyzed bus. However, even the highest obtained system data. It is expected that the proposed method performance
error may be neglected due its small value. decreases with data inaccuracy.
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[18] Horowitz S, Phadke A. Power system relaying. Tauton (USA): Research Studies Arturo Suman Bretas was born in Bauru, So Paulo, Brazil, on July 5, 1972. He
Press; 1995. received the B.Sc. and M.Sc. degrees in Electrical Engineering from the University of
[19] Filomena AD, Salim RH, Resener M, Bretas AS. Ground distance relaying with So Paulo, Brazil, in 1995 and 1998 respectively. In 2001 he received the Ph.D.
fault resistance compensation for unbalanced systems. IEEE Trans Power Deliv degree in electrical engineering from Virginia Tech, Blacksburg, VA. Currently, he is
2008;23(3):131926. an Associate Professor of the Federal University of Rio Grande do Sul (UFRGS), Porto
[20] Nagpal M, Xu W, Sawada J. Harmonic impedance measurement using three- Alegre, Brazil. His research interests include power system protection, analysis and
phase transients. IEEE Trans Power Deliv 1998;13(1):2727. restoration.