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National Institute of Techr;ology, Kurukshetra

Thcory End Semester Examination_ Dec. 2016

Programme: B. Tech ECE

Subject Code: ECT-307 Semester: i,r
Subject Name: Linear Integrated Circuits and Applicatrons
J'irne: Three Hours
In structions:
Max. Marks. 50

I
Q' No lis compulsory. Attempt five questions in alselecting
iour from the remaining six
2 All parts of a questior-r must be dor.re at one place.
) Unless stated otherwise, the symbols have their
usual meanings in context with the Subject
4 Assume suitable data if required.
5 You are trained to be an Engineer not a story writer
so answer

(a) Define and explain tt.,e sig"ifii

(b) characteristics exhibited by an ideal op_amp.
(c) ,Y:1,: l:::."1rl.s.lx,el3ctrica]
In the circuit given in figure 1 , find, V,.

r+lsv
{- i

1.*^..--*r -.- tV
*tv**1ff*.'i i
a.
.-

-,
!
i
t
i -l5Y I
I
V,
i t
l i
:i"rr.....,,,i* ^- .

R,
. Fig. i
Fis.2
(d) Finci the output voitage I,', in figure 2. Assume op_amp as ideal.
.)

(a) Draw the circuit diagram for dual input unbalanced

output diff'erential amplifier. Draw its AC equivalenr
circuit and derive the expression for voltige gain,
differential input resistance, output resistance.
(b) For the'figure 3, vo :
-2v, -:tzr, nina trre value of R assuming op-amp as an idear op-amp.

-t
d)!
\ j--
r__+=--
-*-

Fig.3

(a) Name the different types of.feedback configurations.

Derive the expression for voltage gain and input
resistance for voltage series feedback.
(b) Draw the circuit diagram for op-amp which
ca, be used as a current to voltage converter and explain its
working.
(c) Difrerentiare between input olfset voltage
and output ofrset voltage.
t:
(a) Define input bias current. How it
effects the outpr.rt offbet voltage. Explain with the help
how'the effbct of i,put bias current can be eliminaied of a circuit diagram,
(or reduced] in inverting type op-amp.
(b) Derive the expression which relates slew rate
to the f.equency of input signal. For the 74lC op-amp,
SR=0'5vipis' if a 28V (peak to peak) sinusoidal input 1+ ).
signal is appri"o, than calculare the maximum tiequency
of input signal at which the ourput will be clistorted.
 i. Notch filter
ii. All pass filter
(b) Draw the circuit diagram of RC phase shift oscillator and prove that the frequency
of oscillation is f, =
o uut
und sain is 29.

(a) Draw the block diagram of PLL and explain the function of each block. Name
two applications of PLL
tr/, of the figure 4 is 0 Volts.
it i Catcutate the value of R for rvhich the output

-
V1=tV

Y1=E

vs4

Fig. 4
cut-off frequency' i0
For the circuit shown in Fig. 5, derive the elpression for damping factor and

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