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ELECTRONIC CIRCUITS AND PULSE CIRCUITS LAB

List of experiments to be verified practically with hardware

II. Hardware Lab Experiments

S.No. Name of the Experiment Page No.


1 Class-A Power Amplifier (With Transformer
Load)
2 Class C Power Amplifier

3 Single Tuned Amplifier

4 Hartley & Colpitts Oscillators

5 Darlington pair

6 MOS Common Source Amplifier

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1.CLASS A POWER AMPLIFIER (WITH TRANSFORMER LOAD)


AIM : To observe the characteristics of Class-A amplifier and to find its Efficiency (Transformer
coupling).
APPARATUS :
EQUIPMENT:
1. Function Generator
2. CRO
3. RPS
4. Decade Resistance Box(1K)
5. Bread Board

COMPONENTS:
1. Transistor (SL 100)
2. Resistors(15,2.2K,5.4K,49K)
3. Capacitors(10uF..2, 100uF)
4. Driver transformer (2:1)
CIRCUIT DIAGRAM:

VCC
XSC1
12V
T1
Ext T rig
+
R4 R6 _
39k 8.2 A B
+ _ + _
TS_AUDIO_10_TO_1

R3
10k
XMM1

Q1
R5 C1 XMM2

2.2k 10F
V1 BC107BP
0.5 Vpk
1kHz
0
R1 R2 C2
2.7k 15 10F

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MODEL GRAPH: Amplitude 2 Vcc


V

VCC = VCEQ

THEORY: A power amplifier is one that is designed to deliver a large amount of power to a load.
And this amplifier is often used at output stage of an amplifier system.

Power amplifier is required to produce large voltage and current variations in a load, it is
designed that at least one of its semiconductor components, typically a power transistor can be
operated over substantially the entire range of its output characteristics, from saturation to cutoff.
This mode of operation is called large signal operation.

In class-A amplifier the transistor is so biased that output current flows for the full cycle of the
input signal (360). In other words the transistor remains forward biased throughout the input cycle.
Hence its conduction angle is 360. In this amplifier the transistor operates over the linear portion of
its load line, the output waveform is exactly similar to the input waveform. Hence class-A
amplifiers are a characterized by a high fidelity(uniform frequency ) of the output. They are used
where linearity or freedom from distortion is the prime requisite. Its operation is restricted only over
a small central region of the load line, this amplifier is meant only for amplifying input signals of
small amplitude. Large signals will shift the Q-point into non-linear regions near saturation or cutoff
and produce distortion. Due to this limitation of the input signal, ac output power in active device
i.e., transistor is small.

The above circuit shows the transformer coupled class-A amplifier. The main reason for the poor
efficiency of a direct-coupled class-A amplifier is the large amount of dc power that the resistive
load in collector must dissipate. This problem can be solved by using a suitable transformer for
coupling the load to the amplifier stage. Since the load is not directly connected to the collector
terminal, the dc collector current does not pass through it. In an ideal transformer, primary winding
resistance is zero. Hence dc power loss in load is zero. In practice, however, there is a small dc
resistance of the primary much less than a direct-coupled load. In short, what the transformer does is

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to substitute ac load in place of ohmic or dc load. The secondary load R L when referred to primary
becomes

RL = RL / K2 where K = voltage transformation ratio = N2/ N1


In ideal transformer, there is no primary drop, hence VCC = VCEQ.
All the power supplied by VCC is delivered to the transistor. Hence, the overall and collector
efficiencies become equal and it is equal to 50%.

Total input DC power PDC = Vcc.ICQ

Whole of this power is given to the transistor.

Rms output voltage = Vm/2 (Vcc= Vm )


Rms output current = ICQ /2

Output ac power PAC = Vm/2 . ICQ /2 or V2rms/RL


=1/2 . Vcc.ICQ
= half the input ac power.

= PAC / PDC
= (1/2 . Vcc.ICQ )/ Vcc.ICQ
= 1/2
= 50%
PROCEDURE:

1. Connect the circuit as per the circuit diagram.


2. Apply bias supply voltage of 12 V from the RPS
3. Measure the Voltage VCE (collector-emitter voltage) and Collector Current IDC.
4. Then calculate the input dc Power PDC = VCE . IDC.
5. Now feed an ac signal of amplitude 0.5 VP-P and with 1KHZ frequency, at the input
terminals of the amplifier.

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6. Connect load resistance (1K) at the output terminals of the amplifier (i.e. Secondary
winding of the transformer).
7. Increase the frequency of the input signal until we get maximum output amplitude
across the load resistance on the CRO(the frequency should be
within the audio range i.e. 20 HZ 20KHZ).
8. Then calculate the ac power delivered to the load by using the below formula
AC power delivered to the load PAC = V2rms/RL
9. Now calculate the percentage efficiency of the amplifier by the formula

% efficiency = PAC . 100


PDC
PRECAUTIONS:

1. Connections should be made carefully as per the circuit diagram.


2. Before making connections identify the type and terminals of the given components
(transistor, transformer)
3. The biasing voltages should not exceed the ratings of the components.

RESULT: The efficiency of the class-A amplifier is practically observed and it is equal to
.. %.
DISCUSSION QUESTIONS :
1.What are the applications of Power amplifeir ?
Ans.Power amplifier find their applications in the public address systems,radio receivers,driving
servometer in industrial control systems,tape players,T.V receivers,cathode ray tube etc.
2. For Class A amplifier How do you bring operating point of amplifier at center of supply voltage
Ans. By adjusting the value of resistor used from base to supply. If Vc < Vcc/2 base resistor is
increased and if Vc > Vcc/2 it is decreased.
3.What are the transistors used in complementary push pull experiment give type number
Ans. A matched pair of NPN (CL100 or SL100) and PNP (CK100 or SK100) used. Matching can be
done by testing above in diode position of DMM for same drop and HFE sockets of NPN, PNP for
.
4.How do you determine AC power output in class A amplifier i.e., do you measure current or
voltage and how?
Ans. P-P voltage is measured using CRO since AC current cannot be measured.

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5.How do you adjust the input signal for class AB operations


Ans.Input is adjusted for initially no distortion. Gradually it increased such that there is flattening on
top or bottom.
6. What are the transistors used in complementary push pull experiment give type number
Ans. A matched pair of NPN (CL100 or SL100) and PNP (CK100 or SK100) used. Matching can be
done by testing above in diode position of DMM for same drop and HFE sockets of NPN, PNP for
.
7.What is the position of Q-point for Class-A amplifer?
Ans. Position of Q-point is approximately at the midpoint of the load line.
8.What are the disadvantages of Class-A series fed amplifier?
Ans. 1.Power dissipation is more
2.Efficiency is very poor.
9.What is the maximun efficiency of Transformer coupled Class-A amplifier ?
Ans. Efficiency for transformer coupled Class-A amplifier is 50%
10.What are the advantages of Transformer Coupled Class-A amplifier ?
Ans.1.Efficiency is high than directly coupled amplifier.
2.Impedance matching required for maximum power transfer is possible .

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2.CLASS C POWER AMPLIFIER

AIM: To find the efficiency of the Class-C Power amplifier.

APPARATUS:

EQUIPMENT: 1. Function Generator


2. CRO
3.Bread Board
4.Regulated Power Supply

COMPONENTS:
1. Transistor (BF 194)
2. Capacitors 0.1uF ..2., 1.5nF1 or DCB
3. Inductor (1 mH) or DIB
4. Resistors 5, 50ohm, 10K, 400K or DRB

CIRCUITDIAGRAM:

VCC
12V

XSC1
10k R3 L1 C3 Ext Trig
1mH 1.5nF +
_
A B
C2 + _ + _

Q2
R1 C1 10nF
R4
V1 51 10nF 430k
2N4124
3 Vpk R5
129kHz 10k R2
0 5.1

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MODEL GRAPH: Amplitude 2 Vcc

VCC = VCEQ

VCEsat
0
Time

THEORY : Class C amplifier means current flows for less than 180. With out any signal at the
input terminals, no collector current flows because the emitter diode is unbiased. Therefore the Q
point is at cutoff. In the above circuit the input coupling capacitor, the 10K ohm resistor and emitter
diode form a negative clamper. The positive cycles turn on the emitter diode and charge the
capacitor. On the negative half cycles, the only discharge path is through the resistor. As long as the
time period T of the input signal is much smaller than the RC discharging time constant, the
capacitor looses only a small amount of its charge. Therefore the capacitor voltage approximately
equals the peak voltage of the input signal. This produces the familiar negatively clamped waveform
at the base terminal.

The brief turn on of the emitter diode at each positive peak produces narrow pulses of collector
current. With these pulses we can calculate the Duty Cycle by using the formula:
Width of the pulse
Duty Cycle = total time period of the pulse

= W/T(100)%

the duty cycle affects transistor power dissipation> each pulse appears when the transistor is
conducting. Between pulses the transistor is off. The smaller the duty cycle, the less the average
power dissipation of the transistor.

The narrow current pulses at the collector terminal drives a resonant circuit. These pulses
produce an almost perfect sine wave of voltage if they passed through a resonant circuit. To get sine
wave with the fundamental frequency, the resonant frequency has to equal the fundamental
frequency of the pulsed waveform. And the second one is the tuned circuit must have a high Q
(greater than 10) to get an almost perfect sine wave of voltage.

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POWER RELATIONS:

OUTPUT POWER:- In this amplifier, the quiescent or no-signal collector voltage is


VCEQ = VCC

When a signal is present it forces the total collector voltage to swing above and below this voltage.
The collector voltage can drop no lower than VCE(sat) . This is the maximum output voltage of
a tuned class c amplifier. The output voltage has peak-to-peak value of approximately 2 VCC,
equivalent to peak value of VCC.

Therefore the maximum ac output power is Pac = (Vrms)2/ rc

= [ VCC. (0.7)]2/ rc

= VCC /2 rc
(where rc is the parallel combination of the load resistance and parallel resistance in tuned circuit)

POWER DISSIPATION:- The average power dissipation of the transistor depends on the duty
cycle and the signal swing. It can be shown that a peak-to-peak output voltage of 2 VCC results in

PD = 0.5 VCE(sat) VCC / rc

This is the dissipation for maximum output signal; this low dissipation appears only when entire ac
load line is used and when the duty cycle is less than 10%. To take advantage of high efficiency of
class c amplifier we have to use most of the load line. Then we can approach the best case
dissipation.
The ratio of the best case dissipation to the maximum ac output power is useful.

PD / Pac = VCE(sat)/ VCC

PD = Pac VCE(sat)/ VCC

INPUT POWER:- The dc input power is PDC = Pac+ PD

Therefore efficiency of class c amplifier is = Pac / Pac+ PD

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PROCEDURE:

1. Connect the circuit as per the circuit diagram


2. Feed a sine wave of 3V peak-to-peak amplitude at the input terminals of the amplifier
3. Calculate the theoretical frequency of the tuned circuit by using the formula
f = 1/2 LC
4. Now vary the input signal frequency until it should equal to the resonance frequency of the
tank circuit to get maximum amplitude and undistorted output signal across the load
resistance.
5. Then measure the output signal on CRO or AC milli voltmeter
6. Calculate the output ac power by using the formula Pac = (Vrms)2/ rc
(where rc is the parallel combination of the load resistance and parallel resistance in tuned
circuit)
7. Take VCE(sat ) equal to 0.3V and calculate the power dissipation in the transistor by using the
formula
PD = 0.5 VCE(sat) VP / rc
8. The total dc power delivered to the circuit can calculate from the sum of output ac power and
total power dissipation.
PDC = Pac+ PD
9. Then calculate the efficiency of the circuit by using the formula.
Efficiency = Pac / Pac+ PD

PRECAUTIONS:

1. Connections should be made carefully as per the circuit diagram


2. Before giving the connections identify the type and terminals of the transistor
3. Vary the input signal frequency slowly when the frequency goes nearer to the resonance
frequency.

RESULT: The efficiency of the class c amplifier is..%


DISCUSSION QUESTIONS :
1.What is meant by tuned amplifiers?
Ans.Tuned amplifiers are amplifiers that are designed to reject a certain range of frequencies below
a lower cut off frequency L and above a upper cut off frequency H and allows only a narrow band
of frequencies.
2. Classify tuned amplifiers.
Ans. 1.Single tuned amplifier. 2.Double tuned amplifier.
3.Synchronously tuned amplifier. 4.Stagger tuned amplifier.
3.What is Class C amplifier .
Ans. In Class- C amplifier the transistor conducts for an interval less than the half cycle,Hence the
conduction angle is less than 180 degree.

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4.What are the advantages of Class-c amplifier ?


Ans. 1.High efficiency.
2.Excellent in RF applications.
3.Lowest physical size for a given power output.
5.What are the disadvantage of Class- c Amplifier ?
Ans.1. Lowest linearity.
2.Not suitable in audio applications.
3.Creates a lot of RF interference.
4.It is difficult to obtain ideal inductors and coupling transformers.
5.Reduced dynamic range.
6. What are the applications of Class-C amplifier ?
Ans.1. RF oscillators.
2.RF amplifier.
3.FM transmitters.
4.Booster amplifiers.
5.High frequency repeaters.
6.Tuned amplifiers etc.
7.Define duty cycle?
Ans.It is defined as ratio of Width of pulse to Total Time period of pulse.

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3.SINGLE TUNED VOLTAGE AMPLIFIER


Aim:- To Demonstrate the single tuned voltage amplifier and Calculate Cut off frequency of the
Circuit

Equipments and Components:-

I. Equipment

1. CRO (Dual channel)DC-20 MHz 1 No


2. Bread Board - 1 No. .
3. Regulated power supply- 0-30v 1 A, 1 No.
5. Function generator 20 MHz 1 No.

II. Components

1. 100 k Resistor 1 No.


2. 56 k Resistor 1 No.
3. 470 Resistor 1 No
4. 33 k Resistor 1 No
5. 10mH Inductor -- 1 No -
6. 10 F/ 16 V Electrolytic Capacitor 1 No.
7. 0.1 F/16 V Electrolytic Capacitor 1 No
8. Transistors BC107/BC547 1 No.

Circuit Diagram:-

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Procedure:-

1. Connect circuit as per circuit diagram.

2. Set the Vi= 1V (sine wave), using the Function generator and then connect at the input
Terminals.

3. Connect the C.R.O at output terminals i.e. (Vo).

4. keeping the input voltage constant, vary the frequency from 100 Hz to 100 KHz in regular steps
and note down the corresponding output voltage.

5. Calculate the gain magnitude of the amplifier using the formula


Cut-off frequency (fo) =1/2LC
Max voltage Gain = Vo/Vi
Gain in dB= 20 log (Vo / Vi )
6. Plot the graph: frequency (Hz) versus gain (dB) of the amplifier. Sample Frequency response
Graph is as shown in fig. Below

7. Calculate the bandwidth from the graph.

Observations:
V input = mV

S. NO FREQUENCY (Hz) Vo (V) AV = Vo/Vi Gain dB = 20 log (Vo/Vi)

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Wave Forms:

Precautions:
1. Loose connections should be avoided
2. Switch ON the power supply after thorough verification of connections
3. Reading should be taken without parallax error.

Result:-

Discussion Questions:-

1.What is the purpose of tuned amplifier?


Ans. A tuned amplifier is an electronic amplifierwhich includes bandpass filtering components
within the amplifier circuitry.
2.What is Quality factor?
Ans. The quality factor or 'Q' of an inductor or tuned circuit is often used to give an indication of its
performance in an RF or other circuit.
3. What are the various types of tuned amplifiers?
Ans.(1) Smallsignal tuned amplifiers
a. Single tuned amplifiers (i) Capacitivecoupled (ii) Inductively coupled (or) Transformer coupled b.
b.Double tuned amplifiers c. Stagger tuned amplifiers
(2) Large signal tuned amplifiers

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4. What is the response of tuned amplifiers?


Ans.The response of tuned amplifier is maximum at resonant frequency and it falls sharply for
frequencies below and above the resonant frequency.
5.What is Neutralization?
Ans.The technique used for the elimination of potential oscillations is called neutralization. (OR)
The effect of collector to base capacitance of the transistor is neutralized by introducing a signal that
cancels the signal coupled through collector base capacitance. This process is called neutralization.
6.What is dissipation factor?
Ans . (1) It is defined as 1/Q.
(2) It can be referred to as the total loss within a component.
7.Define unloaded and loaded Q of tuned circuit.
Ans. (1) The unloaded Q or QU is the ratio of stored energy to dissipated energy in a reactor or
resonator.
(2)The loaded Q or QL of a resonator is determined by how tightly the resonator is coupled to
its terminations.
8.How single tuned amplifiers are classified?
Ans.1. Capacitance coupled single tuned amplifier.
2. Transformer coupled or inductively coupled single tuned amplifier..
9.What are stagger tuned amplifiers?
Ans.Stagger tuned amplifiers use a number of single tuned stages in cascade, the successive tuned
circuits being tuned to slightly different frequencies.
10.What is the effect of cascading single tuned amplifiers on bandwidth?
Ans.Bandwidth reduces due to cascading single tuned amplifiers.

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4. HARTELY & COLPITTS OSCILLATOR


HARTELY OSCILLATOR

Aim:- To demonstrate the Hartley oscillator using transistor and to calculate its operating
Frequency
Equipments and Components:-

I. Equipment

1. CRO - 1 No
2. Bread Board - 1 No
3. Regulated power supply- 0-30V, 3 A - 1 No

II. Components

1. 47 k Resistor 1 No
2. 10 k Resistor 1 No
3. 1k Resistor 1 No
4. 5 mH , or 10mH Inductor - 2 Nos
5. 0.22 F Capacitor 2 Nos
6. 0.1 F Capacitor 1 No
7. Transistors BC107 1 No.

Circuit Diagram:-

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Procedure:-
1. Connect circuit as per the circuit diagram.
2. Switch on the power supply and connect the output to the CRO
3. Observe the output on the CRO i.e (sine wave).
4. Note down the practical frequency and compare with its theoretical frequency.
5. Plot the graph: Time period versus voltage.

Calculations:-

Theoretical Frequency Practical Output Voltage


F= 1/2LC Frequency (V)
S.No L1 L2 C (Where L= L1+L2) F= 1/T

Wave Forms:-

Precautions:
1. Loose connections should be avoided
2. Switch ON the power supply after thorough verification of connections
3. Reading should be taken without parallax error

Result:-

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Discussion Questions:-

1.What is an oscillator?
Ans.An oscillator is a circuit which basically acts as a generator, generating the output signal which
oscillates with constant amplitude and constant desired frequency.
2.State the Barkhausen criterion for an oscillator.
Ans.1. The total phase shift around a loop, as the signal proceeds from input through amplifier,
feedback network back to input again, completing a loop, is precisely 0 0 or 3600 .
2.The magnitude of the product of the open loop gain of the amplifier (A) and the feedback factor
is unity. i.e., A = 1.
3. Why in practice A is kept greater than unity.
Ans.To amplify small noise voltage present, so that oscillations can start, A is kept initially greater
than unity
4.How to obtain Hartley oscillator from the basic form of LC oscillator
Ans. Using X1 and X2 as inductors and X3 as capacitor, Hartley oscillator from basic form of LC
oscillator is obtained
5.Write down the advantages, disadvantages and applications of Hartley oscillator.
Ans. Advantages: a) It is easy to tune
b) It can operate over a wide frequency typically from few Hz and several MHz.
c) It is easy to change the frequency by means of a variable capacitor.
6. Write down the disadvantages of Hartley oscillator
Ans.Disadvantages: a) Poor frequency stability.
7.Write down the applications of Hartley oscillator
Ans.Applications: a) it is used as local oscillator in radio and TV receivers.
b) In the function generator. c) In RF sources
8.Explain the concept of positive feedback.
Ans.The feedback is a property which allows to feedback the part of the output, to the same circuit
as its input. Such a feedback is said to be positive whenever the part tf the output that is fed back to
the amplifier as its input, is in phase with the original input signal applied to the amplifier.
9.Give the over all classification of oscillators?
Ans. a. Waveform type (sinusoidal, square, triangular,etc.,)
b. Circuit components (LC, RC,etc.,)
c. Range of frequency A.F (audio), R.F (radio)
d. Type of feedback (RC phase shift, Wein bridge are feedback used, UJT relaxation oscillators
uses no feedback)
10.What are the frequency sensitive arms?
Ans.The arms which decide the frequency of oscillations i.e., R1-C1 and R2-C2 are the frequency
sensitive arms.

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COLPITTS OSCILLATOR
Aim:- To design construct the given oscillator at the operating frequency using transistor

Equipment s and Components:-

I. Equipment
1. CRO (Dual channel)DC-30 MHz - 1 No
2. Bread Board - 1 No. .
3. Regulated power supply- 0-30v 3 A, - 1 No.

II. Components
1. 47 k Resistor 1 No
2. 10 k Resistor 1 No
3. 1k Resistor 1 No
4. 5 mH Inductor - 1 No
5. 0.22 F Capacitor 2 No
6. 0.1 F Capacitor 2 No
7. Transistors BC107 1 No.

Circuit Diagram:-

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Procedure:-

1. Connect circuit as per the circuit diagram.


2. Switch on the power supply and connect the output to the CRO
3. Observe the output on the CRO i.e (sine wave).
4. Note down the practical frequency and compare with its theoretical frequency.
5. Plot the graph: Time period versus voltage.
Calculations:-

Theoretical Frequency Practical Output Voltage


F= 1/2LC Frequency (V)
S.No C1 C2 L (where C= C1| | C2 = F= 1/T
C1C2/C1+C2)

Wave Form:-

Precautions:
1. Loose connections should be avoided
2. Switch ON the power supply after thorough verification of connections
3. Reading should be taken without parallax error
Result:-

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Discussion Questions:-

1.How to obtained colpitts oscillator form basic form of LC oscillator?


Ans.Using X1 and X2 as capacitors and X3 as inductors, colpitts oscillator from basic form of LC
oscillator is obtained.
2.Write down the advantages of RC phase shift oscillator.
Ans. a) Simplicity of the circuit. b) Useful for frequencies in the audio range. c) A sine wave output
can be obtained
3.Write down the advantages colpitts oscillator.
Ans. Advantages:
a) Simple construction.
b) It is possible to obtain oscillations at very high frequencies.
4. Write down the disadvantages of colpitts oscillator
Ans.Disadvantages: a) It is difficult to adjust the feedback as it demands change in capacitor values.
b) Poor frequency stability.
5.Write applications of colpitts oscillator.
Ans.Application: a) As a high frequency generator
6.Write down the advantages, disadvantages and applications of crystal oscillator.
Ans. Advantages: a) Very high frequency stability.
b) Very low frequency drift due to change in temperature and other parameters.
c) It is possible to obtain very high, precise and stable frequency of oscillations.
d) The Q is very high.
7. Write down the disadvantages of crystal oscillator.
Ans. Disadvantages: a) These are suitable for high frequency applications.
b) Crystals of low fundamental frequencies are not easily available
8. Write down the applications of crystal oscillator.
Ans. Applications: a) As a crystal clock in microprocessors.
b) In the frequency synthesizers.
c) In the radio and TV transmitters.
d) In special types of receivers.
9. Write down the general applications of oscillators.
Ans . a) As a local oscillator in radio receivers.
b) In T.V receivers.
c) In signal generators.
d) As clock generation for logic circuits. e) AM and FM transmitters.
f) In phase lock loops.
10. From where starting voltage for the oscillator is derived?
Ans. Every resistance has some free electrons. Under the influence of room temperature, these free
electrons move randomly in various directions. In such a movement of the free electrons generate a
voltage called noise voltage, across the resistance. Such noise voltage provides the starting voltage
for the oscillator.

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5. DARLINGTON PAIR

Aim:- To Demonstrate frequency response of a Darlington Pair using a given transistor


and to measure the gain and bandwidth of the amplifier.

Equipments and Components Required:-

i. Equipment

1. CRO (Dual channel) - 1 No


2. Bread Board - 1 No. .
3. Regulated power supply- 0-30v 3 A, - 1 No.
4. Function generator 20 MHz - 1 No.

ii. Components
1. 47 k Resistor 1 No.
2. 10 k Resistor 1 No.
3. 470 Resistor 1 No
4. 1 k Resistor 1No
5. 10 F, 100 F / 16 V Electrolytic Capacitor 2 No.
6. Transistors BC107/BC547 1 No.

Circuit Diagram:-

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Procedure:-
1. Connect circuit as per circuit diagram.
2. Set the Vi= 30 mv (sine wave), using the Function generator and then connect
at the input terminals.
3. Connect the C.R.O at output terminals i.e (Vo).
4. keeping the input voltage constant, vary the frequency from 100 Hz to 1 MHz
in regular steps and note down the corresponding output voltage.
5. Calculate the gain magnitude of the amplifier using the formula
Voltage Gain = Vo/Vi
Gain in dB= 20 log (Vo / Vi )
6. Plot the graph: frequency (Hz) versus gain (dB) of the amplifier. Sample
Frequency response graph is as shown in fig. Below

7. Calculate the bandwidth from the graph.

Tabular Column
Vin= mV

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Wave Forms & Frequency Response Graph:-

Precautions:
1. Loose connections should be avoided
2. Switch ON the power supply after thorough verification of connections
3. Reading should be taken without parallax error

Result:-

1) Maximum voltage gain =

2) Lower cut-off frequency =

3) Upper cut-off frequency =

4) Band width =

Discussion Questions:-
1.What is Darlington connection?
Ans. If two transistors are connected as shown above then it is Darlington connection.
2.What are the benefits of Darlington connection ?
Ans. Benefits (i) High Input Impedance (ii) High current gain (iii) Less space to integrate in Ics
3.What is meant by cascade connection?
Ans. In a multistage amplifier circuit, the output of one stage is connected to the input of the next
stage. Mostly similar type of stages are cascaded.
4.What is meant by cascode connection?
Ans.The cascode is a two-stage amplifier composed of a common source amplifier followed by
common gate amplifier. The cascode improves input-output isolation (or reverse transmission) as
there is no direct coupling from the output to input. This eliminates the Miller effect and thus
contributes to a much higher bandwidth. Compared to a single amplifier stage, it also provides
higher input impedance, high output impedance, higher gain or higher bandwidth.

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5.What does bootstrapping mean?


Ans. The name bootstrap arises from the fact that, if one end of the resistor changes in voltage, the
other end of the resistor moves through potential difference, it is as if resistor is pulling itself by
bootstrap.
6.Mention two advantages which are specific to Darlington connection.
Ans. The input impedance can be improved with the help of Darlington connection( cascaded
connection of two emitter followers) Current gain of the circuit can be improved by ten times.
7.Why capacitive coupling is used to connect a signal source to an amplifier?
Ans.The input capacitor couples the signal to the base of the transistor. It blocks any d.c. component
present in the signal and passes only a.c. signal for amplification. Because of this input capacitor,
biasing conditions are maintained constant.
8.What is meant by unity gain frequency?
Ans.The frequency at which the gain approaches unity is known as unity gain frequency.
9.Define Millers Theorem
Ans. Millers theorem states that, if an impedance Z is connected between the input and output
terminals of a network which provides a voltage gain Av, an equivalent circuit that gives the same
effect can be drawn by removing Z and connecting an impedance Zi = / (1v) and
Zo= /(v1) .
10.What is the coupling schemes used in multistage amplifiers?
Ans. There are three coupling schemes commonly used in multistage amplifiers.
i. Resistance Capacitance (RC) Coupling ii. Transformer coupling iii. Direct coupling

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6. MOS COMMON SOURCE AMPLIFIER

Aim :- To study the frequency response of MOS amplifier.

Apparatus:-

Transistor TSC7000K-1 No.

Capacitors 10F - 2 Nos

100F - 1 No

Resistors 100k, -2 Nos

47k, 220k, 10k -1 No.

100 -2 Nos

CRO(Dual Channel ) (0-20 MHz)

Function generator ( 1Hz to 1 MHz)

Regulated power supply (0-30V)

Connecting Wires

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CIRCUIT DIAGRAM:-

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THEORY:-
MOSFET belongs to the family of FET. Its abbreviation is Metal Oxide Semiconductor Field
Effect Transistor. The control terminal is called the gate. Remember that the base terminal of a bipolar
transistor passes a small amount of current. The gate on the FET passes virtually no current when driven
with D.C. When driving the gate with high frequency pulsed D.C. or A.C. there may be a small amount
of current flow. The transistor's "turn on" ( threshold) voltage varies from one FET to another but is
approximately 3.3 volts with respect to the source. When FETs are used in the audio output section of an
amplifier, the VGS (voltage from gate to source) is rarely higher than 3.5 volts. When FETs are used in
switching power supplies, the VGS is usually much higher (10 to 15 volts). When the gate voltage is
above approximately 5 volts, it becomes more efficient (which means less voltage drop across the FET
and therefore less power dissipation).
MOSFETs are commonly used in electronics circuitry because they are easier to drive in high current
applications (such as the switching power supplies found in car audio amplifiers). If a bipolar transistor is
used, a fraction of the collector/emitter current must flow through the base junction. In high current
situations where there is significant collector/emitter current, the base current may be significant. FETs
can be driven by very little current (compared to the bipolar transistors). The only current that flows from
the drive circuit is the current that flows due to the capacitance. As you already know, when DC is
applied to a capacitor, there is an initial surge then the current flow stops. When the gate of an FET is
driven with a high frequency signal, the drive circuit essentially sees only a small value capacitor. For
low to intermediate frequencies, the drive circuit has to deliver little current. At very high frequencies or
when many FETs are being driven, the drive circuit must be able to deliver more current.
Note:
The gate of a MOSFET has some capacitance which means that it will hold a charge (retain voltage). If
the gate voltage is not discharged, the FET will continue to conduct current. This doesn't mean you can
charge it and expect the FET to continue to conduct indefinitely but it will continue to conduct until the
voltage on the gate is below the threshold voltage. You can make sure it turns off if you connect a pull
down resistor between the gate and source.
High Current Terminals:-
The 'controlled' terminals are called the source and the drain. These are the terminals responsible for
conducting the current through the transistor.

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PROCEDURE:-
1. Connections are to be made as per the circuit diagram on the breadboard.
2. A signal of 1 KHz frequency and 50mV peak-to-peak is applied at the
input of amplifier.
3. Output is taken at drain and gain is calculated by using the expression,
Av=V0/Vi
4. Voltage gain in dB is calculated by using the expression,
Av=20log 10(V0/Vi)
5. Repeat the above steps for various input frequencies from 10 Hz to 1MHz in semilog scale steps.
6. Plot Av vs. Frequency
7. The Bandwidth of the amplifier is calculated from the graph using the expression,
Bandwidth BW=f2-f1
Where f1 is lower 3 dB frequency
f2 is upper 3 dB frequency
WAVEFORMS:

INPUT WAVEFORMS:

OUTPUTWAVE FORM:

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FREQUENCY RESPONSE:-

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OBSERVATIONS:-

Input voltage: 50mV


S No Frequency Output Voltage Voltage Gain Voltage Gain in
(Vo) Av=Vo/Vi dB (20 log Vo/Vi)
10
50
100
500
1K
5K
10K
50K
100K
500K
1M

RESULT: The voltage gain and frequency response of the MOS amplifier are obtained. Also
bandwidth of the amplifier is calculated.
DISCUSSION QUESTIONS :-
1.Mention the operating modes of MOSFET.
Ans. 1. Enhancement mode. 2. Depletion mode.
2.Draw the symbol for i) P-channel JFET, ii) N-channel JFET iii) P-channel depletion MOSFET iv)
N-channel depletion MOSFET (v) P-channel enhancement MOSFET vi) N-channel enhancement
MOSFET
Ans.

3.How FET devices are classified?


Ans.

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4.Why FET is called as voltage controlled device?


Ans. FET's conductivity is controlled by a voltage applied to a terminal (the gate) which is insulated
from the device.
5.Mention the applications of MOSFET
Ans. ) i) Amplifiers, ii) Digital and iii) Analog switches
6.Why do you call FET as field effect transistor?
Ans. The name field effect is derived from the fact that the current is controlled by an electric field
set up in the device by an external voltage, applied across gate and source terminals, which reverse
bias the junctions.
7.What is a FET?
Ans. A field effect (FET) is a three terminal semiconductor device in which current conduction takes
place by only one type of carriers (either holes or electron) and is controlled by an electric field
8.Why FET is called an unipolar device?
Ans. The operation of FET depends upon the flow of majority carriers only (either holes or
electrons) so the FET is said to be an unipolar device.
9.Define pinch off voltage?
Ans. It is the voltage at which the channel is pinched off, i.e. all the free charge from the channel get
removed. At Pinch-off voltage VP the drain current becomes constant.
10.Define drain resistance?
Ans.Drain resistance (rd) is defined as the ratio of small change in drain to source voltage (Vds) to
the corresponding change in drain current (Id) at constant gate to source voltage (Vgs). rd = Vds /
Id at constant gate to source voltage (Vgs).

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II. SIMULATION SOFTWARE

S.No. Name of the Experiment Page No.


1 Common Emitter Amplifier

2 Common Source Amplifier

3 Two Stage RC Coupled Amplifier

4 Current Shunt and Voltage Series Feedback


Amplifier
5 Cascode Amplifier

6 Wien Bridge Oscillator using Transistors

7 RC Phase Shift Oscillator usingTransistors

8 Class A power Amplifier (Transformer Less)

9 Class-B Complementary Symmetry Amplifier

10 Common Base (BJT)/Common Gate (JFET)


Amplifier

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1. COMMON EMITTER AMPLIFIER

Aim:- To Design Common Emitter Amplifier with the given Parameters and obtain the
frequency response of the amplifier

Software Required:

1. Multisim
2. A P.C with windows

Circuit Diagram:-
VCC XSC1
12V XBP1
Ext T rig
+

R1 Rc _
IN OUT
B
55k 2.18k +
A
_ + _
Cc

Q1 10F
Rs Cb

1k 10F
BC107BP
30mVpk
1kHz
R2 Re Ce
0 18.6k 0.996k 10F
V1

Design Procedure :-

Given Data:

VCC = 12V , IC = 2.2mA , VCE = 5V , VE = 2.2V , = 250 , S = 15

Design formulae:

IC = IB

VE = IERE(IE IC)

VCC = ICRC+VCE+VE

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VBB = VCC R2 / (R1+R2)

RB = R1 //R2

S = 1+ (RB / RE)

VBB = IBRB + VBE + VE

Procedure:-

1. Open Multisim schematic window by clicking Multisim icon on the start menu.

2. Select new file and place the required components from the library(ctl+w) and connect as
per circuit diagram

3. Apply a Sinusoidal signal from the Signal generator and the observe the maximum signal
handling capability of the amplifier (where the distortion starts in the output signal that
corresponding amplitude of the input signal is known as maximum signal handling capacity)
at constant input signal of 1KHZ.

4. Go for AC analysis and observe the output magnitude Vs frequency graph.

Observations:-

maximum signal handling capacity = mV


Mid band Voltage Gain =
3 dB Gain =
Lower Half power frequency f1 =
Upper Half power frequency f2 =
Band width =

Waveforms:

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Frequency Response Graph:-

Result:-

Discussion Questions:-

1.What are the advantages and disadvantages of fixed bias circuit?


Ans. Advantages of fixed bias circuit are as follows
This is a simple circuit which uses very few components
The operating point can be fixed anywhere in the active region of the
characteristics by simply changing the value of RB.
Thus it provides flexibility in design.
Disadvantages of fixed bias circuit are as follows
This circuit does not provide any check on the collector current which
Increases with the rise in temperature i.e. thermal stability is not provided by this circuit.
Since IC and and IB is already fixed;
IC depends on which changes unit to
unit and shifts the operating points.
2. State the advantages and disadvantages of collector to base bias.
Ans .Advantages of collector to base bias circuit are as follows
The biasing arrangements are simple since only one resistor RB is used.
The value of base resistance RB can be easily calculated
Disadvantages of collector to base bias circuit are as follows

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Does not provide good stabilization


The negative feedback of resistance RB reduces the gain of the amplifier.

3. What is the process of instability?


Ans. The transistor amplifier fails to provide faithful amplification and drives to instability state
due to Change in collector current IC due to temperature changes
Thermal runaway
Replacement of transistor of another equivalent transistor.
4. What is the use of compensation technique in electronic circuits?
Ans. Compensation technique is the use of temperature sensitive devices such as diodes,
thermistors, sensistors etc., to stabilize the operating point instead of d.c. biasing circuits.
5. What do you understand by dc load line?
Ans. It is the line on the output characteristics of a transistor circuit which gives the values of IC and
VCC corresponding to zero signal.
6.What are the methods to avoid thermal runaway?
Ans. It can be avoided by keeping the collector side large to dissipate heat.
By using heat sink
By using proper biasing circuit to provide circuit stable.

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2.COMMON SOURCE AMPLIFIER


Aim:- To Design Common Source Amplifier with the given Parameters and obtain the
Frequency response of the amplifier

Software Required:-

1. Multisim
2. A P.C with windows

Circuit Diagram:-

Common source amplifier

Design Procedure:-

Given Data:

VDD = 12 V, ID = 0.625 mA , VDS = 2.8 V, VGS = - 2.672V , VS = 2.94V,Ri=100k

RG = 1 M, CD=CS =CG =10 F.

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Design Formulae:

V DD=I DR D+V DS+I SR S

I GR G+V GS+I S R S = 0

I S =I G+I D

Procedure:-

1. Open Multisim schematic window by clicking Multisim icon on the start menu.

2. Select new file and place the required components from the library(ctl+w) and connect as
per circuit diagram

3. Select Ri = 100K , RG = 1M , CD=CS =CG =10 F.

4. Apply a Sinusoidal signal from the Signal generator and the observe the maximum handling
capability of the amplifier (where the distortion starts in the output signal that corresponding
amplitude of the input signal is known as maximum signal handling capacity) at constant
input signal of 1Khz.

5. For constant input amplitude by varying the frequency from 100 Hz to 1 Mhz, note down
that corresponding output amplitude.

6. Go for AC analysis and observe the output magnitude Vs frequency graph

Observations:-

Maximum signal handling capacity = mV

Mid band Voltage Gain =


3 dB Gain =
Lower Half power frequency f1 =
Upper Half power frequency f2 =
Band width =

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Waveforms:-

Frequency Response Graph:-

Result :-

Discussion Questions:-
1.Why is the input impedance of FET more than that of BJT?
Ans. Input impedance of FET is more than that of BJT because the input circuit of FET is reverse
bias whereas the input circuit of BJT is forward bias.
2.Why FET is called an unipolar device?
Ans.The operation of FET depends upon the flow of majority carriers only (either holes or
electrons) so the FET is said to be an unipolar device.
3.Define pinch off voltage?
Ans. It is the voltage at which the channel is pinched off, i.e. all the free charge from the channel
get removed. At Pinch-off voltage VP the drain current becomes constant.

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4.Mention the applications of FET.


Ans. FET is used as a buffer in measuring instruments, receivers since it has high i/p
o impedance and low o/p impedance.
o FETS are used in RF amplifiers in FM tuners and communication equipment for the
low noise level.
o Since the device is voltage controlled, it is used as a voltage variable resistor in op-
amps and tone controls.
o Used as phase shift oscillator because frequency drifts is low.
5.What are the operating regions of a JFET?
Ans. 1. Ohmic region 2. Pinch-off region 3. Breakdown region

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3. TWO STAGE RC COUPLED AMPLIFIER

Aim:- To Design a Two Stage RC Coupled Amplifier with the given Parameters and to btain the
Frequency response of the amplifier

Software Required:-

1. Multisim
2. A P.C with windows

Circuit Diagram:-
VCC
XSC1
14V
XBP1
Ext T rig
+
R11 Rc1 R12 Rc2 _
51.6k 1.66k 51.6k 1.66k A B IN OUT
+ _ + _
Cc C2

Q1 10F Q2 10F
Rs C1
BC107BP
1k 10F
BC107BP
V1

30mVpk
1kHz R21 Re1 Ce R22 Re2
0 19.06k .99k 10F 19.6k .99k

Design Procedure:-

Given Data:

VCC = 14V , IC = 3 mA , VCE = 6V ,VE = 3 V , = 200 , S = 15

C1 = C2 = Ce = Cc=10 F.

Design Formulae:

IC = IB

VE = IERE (IE IC)

VCC = ICRC + VCE+VE

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VBB = VCC R2 / ( R1+R2 )

RB = R1 // R2

S = 1+ ( RB / RE )

VBB = IBRB + VBE + VE

Procedure:-

1. Open Multisim schematic window by clicking Multisim icon on the start menu.

2. Select new file and place the required components from the library(ctl+w) and connect as
per circuit diagram

3. Apply a Sinusoidal signal from the Signal generator and the observe the maximum handling
capability of the amplifier (where the distortion starts in the output signal that corresponding
amplitude of the input signal is known as maximum signal handling capacity) at constant
input signal of 1Khz.

4. For constant input amplitude by varying the frequency from 100 Hz to 1 Mhz, note down
that corresponding output amplitude.

5. Verify the relation Av = Av1.Av2 where these are the voltage gain of cascade of two stage ,
first stage and second stage of the cascade respectively.

6. Go for AC analysis and observe the output magnitude Vs frequency graph.

Observations:-

Maximum signal handling capacity = mV


Mid band Voltage Gain =
3 dB Gain =
Lower half power frequency f1 =
Upper Half power frequency f2 =
Band width =

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Wave Forms:-

Frequency Response Graph:-

Result:-

Discussion Questions:-

1.Why emitter is always forward biased with respect to base?


Ans. To supply majority charge carrier to the base.
2.Why collector is always reverse biased with respect to base?
Ans. To remove the charge carriers away from the collector-base junction.
3.Why CE configuration is most popular in amplifier circuits?
Ans. Because its current, voltage and power gains are quite high and the ratio of output
impedance and input impedance are quite moderate.
4.Why is CC configuration seldom used?
Ans.Because its voltage gain is always less than unity.

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4.CURRENT SHUNT AND VOLTAGE SERIES FEED BACK AMPLIFIER


Aim:- To Design Current Shunt Feedback Amplifier with the given Parameters, and obtain the
Frequency response of the amplifier

Software Required:-

1. Multisim
2. A P.C with windows

Circuit Diagram:-
VCC
XSC1
14V
XBP1
Ext T rig
+
_
R11 RC1 R12 RC2 A B IN OUT
69.45k 3.5k 69.45k 3.5k + _ + _

Cc C2

C1 Q1 10F Q2 10F
Rs
1k 10F
BC107BP BC107BP
V1
0.5 Vpk
1kHz R21 Re1 Ce R22 Re2
0 17.44k 1k 10F 17.44k 1k

Rf Cf

1k 10F
Current Shunt Feed Back Amplifier
Design Procedure:-

Given Data:

VCC = 14V , IC = 2 mA , VCE = 5V VE = 2 V , = 250 , S = 15 , Rf = 1K

C1 = C2 = Ce = CC = 10 F.

Design Formulae:

IC = IB

VE = IERE (IE IC)

VCC = ICRC + VCE+VE

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VBB = VCC R2 / ( R1+R2 )

RB = R1 // R2

S = 1+ ( RB / RE )

VBB = IBRB + VBE + VE

Circuit Diagram:-

Voltage Series Feed Back Amplifier


Procedure:-

1. Open Multisim schematic window by clicking Multisim icon on the start menu.

2. Select new file and place the required components from the library(ctl+w) and connect as per
circuit diagram

3. Apply a Sinusoidal signal from the Signal generator and the observe the maximum handling
capability of the amplifier (where the distortion starts in the output signal that corresponding
amplitude of the input signal is known as maximum signal handling capacity) at constant
input signal of 1Khz.

4. For constant input amplitude by varying the frequency from 100 Hz to 1 Mhz, note down that
corresponding output amplitude.

5. Go for AC analysis and observe the output magnitude vs frequency graph.

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Observations:-

Maximum signal handling capacity = mV


Mid band Voltage Gain =
3 dB Gain =
Lower half power frequency f1 =
Upper half power frequency f2 =
Band width ( f2 f1 )

Wave Forms:-

Frequency Response Graph:-

Current Shunt Voltage Series


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Result:-

Discussion Questions:-
1.What is meant by feedback?
Ans.The process of combining a fraction or part of output energy back to the input is known as
feedback
2.What are the types of feedback?
Ans.The different types of feedback are: 1. Positive feedback. 2. Negative feedback.
3.What is meant by positive feedback?
Ans.If feedback signal applied is in phase with the input signal and thus increases the input, it is
called as positive feedback. it is also known as regenerative feedback.
4.What is meant by negative feedback?
Ans. If the feedback signal applied to the input is out of phase with the input signal and thus signal
decrease, it is called negative feedback. It is also known as degenerative feedback.

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5.CASCODE AMPLIFIER

Aim :- To simulate the Wien Bridge Oscillator and to calculate its frequency of oscillation.

Software Required:-

1. Multisim

2. A P.C with windows

Circuit Diagram:-

Design:-

VCC = 15V, IC = 2.2 mA , VCE = 5V

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VE = 2.2 V , = 250 , S = 15

Procedure:-

1. Open Multisim schematic window by clicking Multisim icon on the start menu.

2. Select new file and place the required components from the library(ctl+w) and connect as per
circuit diagram

3. Apply a Sinusoidal signal from the Signal generator and the observe the maximum handling
capability of the amplifier (where the distortion starts in the output signal that corresponding
amplitude of the input signal is known as maximum signal handling capacity) at constant
input signal of 1Khz.

4. For constant input amplitude by varying the frequency from 100 Hz to 1 Mhz, note down that
corresponding output amplitude.

5. Go for AC analysis and observe the output magnitude vs frequency graph.

Observations:-

Maximum signal handling capacity = mV


Mid band Voltage Gain =
3 dB Gain =
Lower half power frequency f1 =
Upper half power frequency f2 =
Band width ( f2 f1 )

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Wave Forms:-

Frequency Response Graph:-

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Result:-

Discussion Question :-
1. What is a cascade amplifier?
Ans. To increases the voltage gain of the amplifier, multiple amplifiers are connected in cascade.
The output of one amplifier is the input to another stage. In this way, the overall voltage gain can be
increased, when numbers of amplifier stages are used in succession. It is called a multistage
amplifier or cascade amplifier.
2.What does bootstrapping mean?
Ans. The name bootstrap arises from the fact that, if one end of the resistor changes in voltage, the
other end of the resistor moves through potential difference, it is as if resistor is pulling itself by
bootstrap. The effective load on the bootstrap emitter follower can be given as
RLeff = R1 R2 RE

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6.WIEN BRIDGE OSCILLATOR

Aim :- To simulate the Wien Bridge Oscillator and to calculate its frequency of oscillation.

Software Required:-

3. Multisim

4. A P.C with windows

Circuit Diagram:-

VCC
XSC1
15V
Ext T rig
+

R5 R1 R11 Rc1 R12 Rc2 _


B
2.5k 10k 33k 2.2k 33k 2.2k +
A
_ + _

Cc Cc2

C1
0.01F 10F 10F
R9 Q2 Q1
1k
BC107BP BC107BP

R6 R10 C2 R21 R22 Re Ce


1k 10k 0.01F 10k 1k 100F
10k

Design:-

VCC = 15V, IC = 2.2 mA , VCE = 5V

VE = 2.2 V , = 250 , S = 15

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Procedure:-

1. Open Multisim schematic window by clicking Multisim icon on the start menu.

2. Select new file and place the required components from the library(ctl+w) and connect as per
circuit diagram

3. Observe the output wave forms from at collector .

4. Calculate Theoretical & Practical frequencies and compare the values.

Observations:-

Theoretical Frequency = 1/2R1R2C1C2

Practical Frequency =

Wave Forms:-

Result:-

Discussion Questions:-
1.What is Oscillator circuit?
Ans. A circuit with an active device is used to produce an alternating current is called an oscillator
circuit.

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2. What are the types of feedback oscillators?


Ans. * RC-Phase shift Oscillator
*Wien Bridge Oscialltor
* LC-Oscillators
i. Tuned collector Oscillator ii. Tuned emitter Oscillator
iii. Tuned collector base Oscillator iv. Hartley Oscillator
v. Colpits Oscillator vi. Clap Oscillator
3. What are the conditions for oscillation?
Ans.The total phase shift of an oscillator should be 360 o. For feedback oscillator it should satisfies
Barhausen criterion.
4.Define Piezoelectric effect.
Ans.When applying mechanical energy to some type of crystals called piezoelectric crystals the
mechanical energy is converted into electrical energy is called piezoelectric effect.
5.What is Miller crystal oscillator? Explain its operation.
Ans. It is nothing but a Hartley oscillator its feedback Network is replaced by a crystal. Crystal
normally generate higher frequency reactance due to the miller capacitance are in effect between the
transistor terminal.

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7.RC PHASE SHIFT OSCILLATOR

Aim:- To compare Theoretical & Practical frequencies of the RC phase shift oscillator and
Observe the phase shift between various nodes

Software Required:-

1. Multisim
2. A P.C with windows

Circuit Diagram:-

VCC
12V
XSC1

Ext T rig
+

RC _
R1 2.18k A B

55k + _ + _

C2 C3 C4

0.01F 0.01F 0.01F


Q1

BC547BP R4 R5 R6
2k 2k 2k
R2
18.6k

RE C1
1k 10F

Design:-

VCC = 12V, IC = 2.2 mA , VCE = 5V

VE = 2.2 V , = 250 , S = 15

Procedure:-

1. Open Multisim schematic window by clicking Multisim icon on the start menu.

2. Select new file and place the required components from the library(ctl+w) and connect as per
circuit diagram

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3. Observe the output wave forms from at collector , base. Node A , Node B and Node C and
note down the frequency.

4. Calculate Theoretical & Practical frequencies and compare the values.

Observations:-

Theoretical Frequency = 1/2RC(6+4K) where K=RC //R

Practical Frequency =

Wave Forms:-

Result:-

Discussion Questions:-
1. Define feedback?
Ans. A portion of the output signal is taken from the output of the amplifier and is combined with
the normal input signal. This is known as feedback.
2.What is Oscillator circuit?
Ans. A circuit with an active device is used to produce an alternating current is called an oscillator
circuit.
3.Explain the concept of positive feedback.
Ans.The feedback is a property which allows to feedback the part of the output, to the same circuit
as its input. Such a feedback is said to be positive whenever the part tf the output that is fed back to
the amplifier as its input, is in phase with the original input signal applied to the amplifier.
4.What are the frequency sensitive arms?
Ans. The arms which decide the frequency of oscillations i.e., R1-C1 and R2-C2 are the frequency
sensitive arms

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8.CLASS-A POWER AMPLIFIER (Transformer Less)

Aim:- To Design Class-A Power Amplifier using the given parameters and to calculate the
Efficiency of the Transformer.

Software Required:-

1. Multisim

2. A P.C with windows

Circuit Diagram:-
VCC
XSC1
12V
Ext T rig
+
_
Rc A B
Rb 1.5k + _ + _

466.9k C2

47F
Q1
Rs C1

1k 47F
V2 BD135

50mVpk
1kHz
0

Design:-

VCC = 12V , IC = 4 mA , VCE = 6V, VE = 2 V , = 165

Find RC and RB

VCC = ICRC + VCE

VCC = IBRB + VBE

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Procedure:-
1. Open Multisim schematic window by clicking Multisim icon on the start menu.

2. Select new file and place the required components from the library(ctl+w) and connect as per
circuit diagram

3. Apply a Sinusoidal signal from the Signal generator and the observe the maximum handling
capability of the amplifier (where the distortion starts in the output signal that corresponding
amplitude of the input signal is known as maximum signal handling capacity) at constant
input signal of 1Khz.

4. For constant input amplitude by varying the frequency from 100 Hz to 1 Mhz, note down that
corresponding output amplitude.

5. Calculate the efficiency () of amplifier

Observations:-

IDC = mA Vi = V, Vm = V

Wave Forms:-

Formulas:-

PDC = VCC * IDC

PAC = VM2 / 2RC

= Pac / Pdc *100 %


Result:-

1.What are the applications of Power amplifeir ?


Ans.Power amplifier find their applications in the public address systems,radio receivers,driving
servometer in industrial control systems,tape players,T.V receivers,cathode ray tube etc.
2. For Class A amplifier How do you bring operating point of amplifier at center of supply voltage

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Ans. By adjusting the value of resistor used from base to supply. If Vc < Vcc/2 base resistor is
increased and if Vc > Vcc/2 it is decreased.
3.What are the transistors used in complementary push pull experiment give type number
Ans. A matched pair of NPN (CL100 or SL100) and PNP (CK100 or SK100) used. Matching can be
done by testing above in diode position of DMM for same drop and HFE sockets of NPN, PNP for
.
4.How do you determine AC power output in class A amplifier i.e., do you measure current or
voltage and how?
Ans. P-P voltage is measured using CRO since AC current cannot be measured.

5.How do you adjust the input signal for class AB operations


Ans.Input is adjusted for initially no distortion. Gradually it increased such that there is flattening on
top or bottom.
6. What are the transistors used in complementary push pull experiment give type number
Ans. A matched pair of NPN (CL100 or SL100) and PNP (CK100 or SK100) used. Matching can be
done by testing above in diode position of DMM for same drop and HFE sockets of NPN, PNP for
.
7.What is the position of Q-point for Class-A amplifer?
Ans. Position of Q-point is approximately at the midpoint of the load line.
8.What are the disadvantages of Class-A series fed amplifier?
Ans. 1.Power dissipation is more
2.Efficiency is very poor.
9.What is the maximun efficiency of Transformer coupled Class-A amplifier ?
Ans. Efficiency for transformer coupled Class-A amplifier is 50%
10.What are the advantages of Transformer Coupled Class-A amplifier ?
Ans.1.Efficiency is high than directly coupled amplifier.
2.Impedance matching required for maximum power transfer is possible .

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9.CLASS B COMPLEMENTARY SYMMETRY POWER


AMPLIFIER
Aim:- To simulate the Class B Complementary Symmetry power amplifier in Multisim
Software required :-
1. Multisim

2. A P.C with windows

Circuit diagram :

Procedure:-

1. Open Multisim schematic window by clicking Multisim icon on the start menu.

2. Select new file and place the required components from the library(ctl+w) and connect as per
circuit diagram

3. Apply a Sinusoidal signal from the Signal generator and the observe the maximum handling
capability of the amplifier (where the distortion starts in the output signal that corresponding

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amplitude of the input signal is known as maximum signal handling capacity) at constant
input signal of 1Khz.

4. For constant input amplitude by varying the frequency from 100 Hz to 1 Mhz, note down that
corresponding output amplitude.

5. Calculate the efficiency () of amplifier

Wave Forms:-

Formulae :-

= Pac / Pdc *100 %

Result:-

Discussion Questions :-
1.What is conversion efficiency in a power amplifier?
Ans.It is the ratio of the ac power delivered to the load to the dc input power applied is referred to
as conversion efficiency.
2.Why class A amplifier must not be operated under no signal conditions?
Ans. When there is no signal in class A amplifier, there will be maximum power dissipation.
= 0 [when = 0 ] ( ) = The entire d.c. power input is dissipated
as the heat. Thus power dissipation is maximum under no signal condition. This may increase the
transistor junction temperature beyond safe value, which may lead to transistor damage. To avoid
this, class A amplifier must not be operated under no signal condition.
3.What is class AB operation?
Ans.The power amplifier is said to be class AB amplifier if the Q-point and the input signal are
selected such that, the output signal is obtained for more than 180 but less than 360 for a full input
cycle.

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4. Define class C operation of power amplifier


Ans.The power amplifiers is said to be class C amplifier, if the Q-point and the input signal are
selected such that, the output signal is obtained for less than a half cycle for a full input cycle.
5.What is the drawback of class B amplifier? How it is minimized?
Ans. The drawback of class B amplifier is cross-over distortion. To overcome this cross over
distortion, a small forward bias is kept applied to the transistors, so that when input is zero, this
additional forward bias can make the transistor ON immediately, eliminating cross-over distortion.

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10.COMMON BASE AMPLIFIER

Aim :
1. To simulate the Common Base amplifier in Multisim and study the transient and
frequency response.

2. To determine the maximum gain, 3dB gain, lower and upper cutoff frequencies
and bandwidth of CB amplifier by performing the AC analysis.
Software required :-
1. Multisim

2. A P.C with windows

Circuit diagram:-

VEE VCC
12 V 12V

RE RC
20k 10k
C1 C2

Q1
10F BC 107 10F
Vin
50mV RL
1kHz 10k
0

Procedure:-

1. Open Multisim Software to design Common Base amplifier circuit

2. Select on New editor window and place the required component on the circuit window.

3. Make the connections using wire and set oscillator (FG) frequency & amplitude.

4. Check the connections and the specification of components value properly.

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5. Go for simulation using Run Key observe the output waveforms on CRO

6. Indicate the node names and go for AC Analysis with the output node

7. Observe the Ac Analysis and draw the magnitude response curve

8. Calculate the bandwidth of the amplifier

Frequency Response :-

Result:-

1. From the transient analysis the phase relationship between input and output voltage signals is
___________ degrees.

2. From the frequency response curve the following results are calculated:

Discussion Questions :-
1.What are the characteristics of common emitter amplifier?
Ans. Common emitter amplifier has
Large current gain
Large voltage gain
Large power gain
Voltage phase shift is about 180
Moderate input and output impedance
2. What are the characteristics of common collector amplifier?
Ans. Common collector amplifier has
High current gain

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Unity voltage gain


Large power gain
No phase difference between input and output
High input impedance
Low output impedance
3.What are the characteristics of common base amplifier?
Ans. Common collector amplifier has
Low current gain
High voltage gain
High power gain
No phase difference between input and output
Low input impedance
High output impedance

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10. COMMON GATE AMPLIFIER

Aim: -

1. Plot the frequency response of a FET amplifier in common gate mode.


2. Calculate gain.
3. Calculate bandwidth.

Software required :-
1. Multisim

2. A P.C with windows

Circuit diagram:-

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Procedure:-
1. Open Multisim Software to design FET common source amplifier circuit

2. Select on New editor window and place the required component CS amplifier on the circuit
window.

3. Make the connections using wire and check the connections and oscillator.

4. Go for simulation and using Run Key observe the output waveforms on CRO

5. Indicate the node names and go for AC Analysis with the output node

6. Observe the Transient response , Ac Analysis and draw the magnitude response curve

7. Calculate the bandwidth of the amplifier


Observations:-

Maximum signal handling capacity = mV


Mid band Voltage Gain =
3 dB Gain =
Lower Half power frequency f1 =
Upper Half power frequency f2 =
Band width =

Result :-

Discussion Questions :-
1.Write the expressions of small signal voltage gain and output resistance of the common gate
circuit?
Ans.

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2. State the general advantage of using JEFET rather than BJT?


Ans. i. FETs require less space than that for BJTs, hence they are preferred in integrated circuits.
iii. FETs have higher input impedance than BJT they are preferred in amplifiers where high
input impedance is required.
3.What is meant by unity gain frequency?
Ans.The frequency at which the gain approaches unity is known as unity gain frequency.
4.Define Millers Theorem
Ans. Millers theorem states that, if an impedance Z is connected between the input and output
terminals of a network which provides a voltage gain Av, an equivalent circuit that gives the same
effect can be drawn by removing Z and connecting an impedance Zi = / (1v) and
Zo= /(v1) .

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