Sie sind auf Seite 1von 42

Processes

Dr DC Hendry

Processes

Relationship
to Concurrent
Statements Processes
Wait
Statement
wait on
sensitivity list
wait until Dr DC Hendry
boolean
expression
wait for time
expression

Assert and
Report
Statements
February 17, 2006
Assert
Statement
Report
Statement
Processes

Dr DC Hendry
1 Processes
Processes

Relationship
to Concurrent
2 Relationship to Concurrent Statements
Statements

Wait
Statement
3 Wait Statement
wait on
sensitivity list wait on sensitivity list
wait until
boolean
expression
wait until boolean expression
wait for time
expression
wait for time expression
Assert and
Report
Statements 4 Assert and Report Statements
Assert
Statement Assert Statement
Report
Statement Report Statement
Processes

Processes

Dr DC Hendry

Processes 1 The VHDL process is perhaps the most important


Relationship modeling construct in the language - you must understand
to Concurrent
Statements it.
Wait
Statement
wait on
sensitivity list
wait until
boolean
expression
wait for time
expression

Assert and
Report
Statements
Assert
Statement
Report
Statement
Processes

Processes

Dr DC Hendry

Processes 1 The VHDL process is perhaps the most important


Relationship modeling construct in the language - you must understand
to Concurrent
Statements it.
Wait
Statement
2 The process statement is a concurrent statement that
wait on
sensitivity list appears within an architecture body.
wait until
boolean
expression
wait for time
expression

Assert and
Report
Statements
Assert
Statement
Report
Statement
Processes

Processes

Dr DC Hendry

Processes 1 The VHDL process is perhaps the most important


Relationship modeling construct in the language - you must understand
to Concurrent
Statements it.
Wait
Statement
2 The process statement is a concurrent statement that
wait on
sensitivity list appears within an architecture body.
wait until
boolean
expression
3 Internally however, the process includes a number of
wait for time
expression sequential statements to be used to model a particular
Assert and
Report
component.
Statements
Assert
Statement
Report
Statement
Processes

Processes

Dr DC Hendry

Processes 1 The VHDL process is perhaps the most important


Relationship modeling construct in the language - you must understand
to Concurrent
Statements it.
Wait
Statement
2 The process statement is a concurrent statement that
wait on
sensitivity list appears within an architecture body.
wait until
boolean
expression
3 Internally however, the process includes a number of
wait for time
expression sequential statements to be used to model a particular
Assert and
Report
component.
Statements
Assert
4 Processes come in two flavours, those with a sensitivity
Statement
Report list, and those without.
Statement
A Simple Process

Processes

Dr DC Hendry

Processes

Relationship architecture rtl of mydesign is


to Concurrent
Statements
begin
Wait
Statement HalfAdder : process(a, b)
wait on
sensitivity list begin
wait until
boolean carry <= a and b;
expression
wait for time sum <= a or b;
expression
end process HalfAdder;
Assert and
Report
Statements
Assert end rtl;
Statement
Report
Statement
A Simple Process

Processes

Dr DC Hendry
1 Describes a half adder.
Processes

Relationship architecture rtl of mydesign is


to Concurrent
Statements
begin
Wait
Statement HalfAdder : process(a, b)
wait on
sensitivity list begin
wait until
boolean carry <= a and b;
expression
wait for time sum <= a or b;
expression
end process HalfAdder;
Assert and
Report
Statements
Assert end rtl;
Statement
Report
Statement
A Simple Process

Processes

Dr DC Hendry
1 Describes a half adder.
Processes

Relationship architecture rtl of mydesign is 2 Every process should be


to Concurrent
Statements
begin named, in this case the
Wait name is HalfAdder.
Statement HalfAdder : process(a, b)
wait on
sensitivity list begin
wait until
boolean carry <= a and b;
expression
wait for time sum <= a or b;
expression
end process HalfAdder;
Assert and
Report
Statements
Assert end rtl;
Statement
Report
Statement
A Simple Process

Processes

Dr DC Hendry
1 Describes a half adder.
Processes

Relationship architecture rtl of mydesign is 2 Every process should be


to Concurrent
Statements
begin named, in this case the
Wait name is HalfAdder.
Statement HalfAdder : process(a, b)
wait on
sensitivity list begin 3 It is sensitive to the signals
wait until
boolean carry <= a and b; a and b.
expression
wait for time sum <= a or b;
expression
end process HalfAdder;
Assert and
Report
Statements
Assert end rtl;
Statement
Report
Statement
A Simple Process

Processes

Dr DC Hendry
1 Describes a half adder.
Processes

Relationship architecture rtl of mydesign is 2 Every process should be


to Concurrent
Statements
begin named, in this case the
Wait name is HalfAdder.
Statement HalfAdder : process(a, b)
wait on
sensitivity list begin 3 It is sensitive to the signals
wait until
boolean carry <= a and b; a and b.
expression
wait for time sum <= a or b; 4 Whenever a or b changes
expression
end process HalfAdder; value, the process
Assert and
Report
Statements executes.
Assert end rtl;
Statement
Report
Statement
A Simple Process

Processes

Dr DC Hendry
1 Describes a half adder.
Processes

Relationship architecture rtl of mydesign is 2 Every process should be


to Concurrent
Statements
begin named, in this case the
Wait name is HalfAdder.
Statement HalfAdder : process(a, b)
wait on
sensitivity list begin 3 It is sensitive to the signals
wait until
boolean carry <= a and b; a and b.
expression
wait for time sum <= a or b; 4 Whenever a or b changes
expression
end process HalfAdder; value, the process
Assert and
Report
Statements executes.
Assert end rtl;
Statement
Report
5 carry and sum updated
Statement
after one delay.
Execution of a Process

Processes

Dr DC Hendry

Processes

Relationship
to Concurrent
Assume a process with a
Statements sensitivity list.
Wait
Statement
wait on
HalfAdder : process(a, b)
sensitivity list
wait until
begin
boolean
expression carry <= a and b;
wait for time
expression sum <= a or b;
Assert and end process HalfAdder;
Report
Statements
Assert
Statement
Report
Statement
Execution of a Process

Processes

Dr DC Hendry
1 Following a change in a or b the
process begins execution at its
Processes
first statement.
Relationship
to Concurrent
Assume a process with a
Statements sensitivity list.
Wait
Statement
wait on
HalfAdder : process(a, b)
sensitivity list
wait until
begin
boolean
expression carry <= a and b;
wait for time
expression sum <= a or b;
Assert and end process HalfAdder;
Report
Statements
Assert
Statement
Report
Statement
Execution of a Process

Processes

Dr DC Hendry
1 Following a change in a or b the
process begins execution at its
Processes
first statement.
Relationship Assume a process with a
to Concurrent 2 Each sequential statement then
Statements sensitivity list.
Wait
executes in turn.
Statement
wait on
HalfAdder : process(a, b)
sensitivity list
wait until
begin
boolean
expression carry <= a and b;
wait for time
expression sum <= a or b;
Assert and end process HalfAdder;
Report
Statements
Assert
Statement
Report
Statement
Execution of a Process

Processes

Dr DC Hendry
1 Following a change in a or b the
process begins execution at its
Processes
first statement.
Relationship Assume a process with a
to Concurrent 2 Each sequential statement then
Statements sensitivity list.
Wait
executes in turn.
Statement
wait on
HalfAdder : process(a, b) 3 No time, not even time passes
sensitivity list
wait until
begin between the execution of
boolean
expression carry <= a and b; statements.
wait for time
expression sum <= a or b;
Assert and end process HalfAdder;
Report
Statements
Assert
Statement
Report
Statement
Execution of a Process

Processes

Dr DC Hendry
1 Following a change in a or b the
process begins execution at its
Processes
first statement.
Relationship Assume a process with a
to Concurrent 2 Each sequential statement then
Statements sensitivity list.
Wait
executes in turn.
Statement
wait on
HalfAdder : process(a, b) 3 No time, not even time passes
sensitivity list
wait until
begin between the execution of
boolean
expression carry <= a and b; statements.
wait for time
expression sum <= a or b;
Assert and end process HalfAdder; 4 If for example a changes value at
Report
Statements
10 nS, both sequential
Assert
Statement
assignment statements are
Report
Statement executed at 10 nS.
Execution of a Process

Processes

Dr DC Hendry
1 Following a change in a or b the
process begins execution at its
Processes
first statement.
Relationship Assume a process with a
to Concurrent 2 Each sequential statement then
Statements sensitivity list.
Wait
executes in turn.
Statement
wait on
HalfAdder : process(a, b) 3 No time, not even time passes
sensitivity list
wait until
begin between the execution of
boolean
expression carry <= a and b; statements.
wait for time
expression sum <= a or b;
Assert and end process HalfAdder; 4 If for example a changes value at
Report
Statements
10 nS, both sequential
Assert
Statement
assignment statements are
Report
Statement executed at 10 nS.
5 Both carry and sum are
updated at time 10 nS + .
Process Syntax

Processes

Dr DC Hendry

Processes

Relationship [<process-name> : ] PROCESS [<sensitivity-list> ]


to Concurrent
Statements [<process-declarations>]
Wait
Statement
BEGIN
wait on
sensitivity list
<process-statements>
wait until
boolean END PROCESS [<process-name>] ;
expression
wait for time
expression

Assert and <sensitivity-list> ::=


Report
Statements ( <signal-name> [, <signal-name> ... ] )
Assert
Statement
Report
Statement
Concurrent statements are processes

Processes

Dr DC Hendry Consider the VHDL concurrent assignment statement:


Processes
x <= a and b;
Relationship
to Concurrent
Statements

Wait
Statement
wait on
sensitivity list
wait until
boolean
expression
wait for time
expression

Assert and
Report
Statements
Assert
Statement
Report
Statement
Concurrent statements are processes

Processes

Dr DC Hendry Consider the VHDL concurrent assignment statement:


Processes
x <= a and b;
Relationship
to Concurrent
Statements
and the process:
Wait
Statement
wait on xp : process(a, b)
sensitivity list
wait until begin
boolean
expression x <= a and b;
wait for time
expression end process xp;
Assert and
Report
Statements
Assert
Statement
Report
Statement
Concurrent statements are processes

Processes

Dr DC Hendry Consider the VHDL concurrent assignment statement:


Processes
x <= a and b;
Relationship
to Concurrent
Statements
and the process:
Wait
Statement
wait on xp : process(a, b)
sensitivity list
wait until begin
boolean
expression x <= a and b;
wait for time
expression end process xp;
Assert and
Report
Statements The first statement is in fact simply a shorthand for the
Assert
Statement
Report
process. Both statements require that whenever a or b change
Statement
value, that the value of x is scheduled to be updated after one
delay.
A Second Example:

Processes

Dr DC Hendry In the next example we have two outputs, x and y.


Processes x <= a or b;
Relationship y <= b and c;
to Concurrent
Statements

Wait
Statement
wait on
sensitivity list
wait until
boolean
expression
wait for time
expression

Assert and
Report
Statements
Assert
Statement
Report
Statement
A Second Example:

Processes

Dr DC Hendry In the next example we have two outputs, x and y.


Processes x <= a or b;
Relationship y <= b and c;
to Concurrent
Statements

Wait and for the process version


Statement
wait on
sensitivity list xy : process(a, b, c)
wait until
boolean
expression
begin
wait for time
expression
x <= a or b;
Assert and y <= b and c;
Report
Statements
end process xy;
Assert
Statement
Report
Statement
A Second Example:

Processes

Dr DC Hendry In the next example we have two outputs, x and y.


Processes x <= a or b;
Relationship y <= b and c;
to Concurrent
Statements

Wait and for the process version


Statement
wait on
sensitivity list xy : process(a, b, c)
wait until
boolean
expression
begin
wait for time
expression
x <= a or b;
Assert and y <= b and c;
Report
Statements
end process xy;
Assert
Statement
Report
Statement
In this case the corresponce is not quite so precise, although
the logical effect is identical. Can you see the difference? If
not, consider what happens when a or c changes value.
Processes with a WAIT statement

Processes

Dr DC Hendry

Processes
The second form of process uses a wait statement. A wait
Relationship
to Concurrent statement has a variety of forms:
Statements

Wait wait on sensitivity list


Statement
wait on
sensitivity list
wait until
boolean
expression
wait for time
expression
NOTE: When a process without a sensitivity list reaches the
Assert and
Report last sequential statement, it immediately continues to execute
Statements
Assert the first statement.
Statement
Report
Statement
Processes with a WAIT statement

Processes

Dr DC Hendry

Processes
The second form of process uses a wait statement. A wait
Relationship
to Concurrent statement has a variety of forms:
Statements

Wait wait on sensitivity list


Statement
wait on
sensitivity list
wait until boolean expression
wait until
boolean
expression
wait for time
expression
NOTE: When a process without a sensitivity list reaches the
Assert and
Report last sequential statement, it immediately continues to execute
Statements
Assert the first statement.
Statement
Report
Statement
Processes with a WAIT statement

Processes

Dr DC Hendry

Processes
The second form of process uses a wait statement. A wait
Relationship
to Concurrent statement has a variety of forms:
Statements

Wait wait on sensitivity list


Statement
wait on
sensitivity list
wait until boolean expression
wait until
boolean
expression
wait for time expression
wait for time
expression
NOTE: When a process without a sensitivity list reaches the
Assert and
Report last sequential statement, it immediately continues to execute
Statements
Assert the first statement.
Statement
Report
Statement
Wait on sensitivity list

Processes

Dr DC Hendry
wait on a, b;
Processes
When the process reaches this statement, the process is
Relationship
to Concurrent suspended until one of the signals a or b changes value. While
Statements
the process waits for this change to occur, simulation time
Wait
Statement passes.
wait on
sensitivity list
wait until
boolean
expression
wait for time
expression

Assert and
Report
Statements
Assert
Statement
Report
Statement
Wait on sensitivity list

Processes

Dr DC Hendry
wait on a, b;
Processes
When the process reaches this statement, the process is
Relationship
to Concurrent suspended until one of the signals a or b changes value. While
Statements
the process waits for this change to occur, simulation time
Wait
Statement passes. Here is yet another way of expressing the concurrent
wait on
sensitivity list assignment statement:
wait until
boolean
expression
wait for time
x <= a and b;
expression

Assert and using a process with a wait statement:


Report
Statements
Assert
Statement
Report
Statement
Wait on sensitivity list

Processes

Dr DC Hendry
wait on a, b;
Processes
When the process reaches this statement, the process is
Relationship
to Concurrent suspended until one of the signals a or b changes value. While
Statements
the process waits for this change to occur, simulation time
Wait
Statement passes. Here is yet another way of expressing the concurrent
wait on
sensitivity list assignment statement:
wait until
boolean
expression
wait for time
x <= a and b;
expression

Assert and using a process with a wait statement:


Report
Statements xy : process
Assert
Statement begin
Report
Statement x <= a and b;
wait on a, b;
end process xy;
wait until boolean expression
D type Flip Flop

Processes

Dr DC Hendry

Processes
dff : process
Relationship
to Concurrent
begin
Statements Q <= D;
Wait wait until clkevent and clk = 1;
Statement
wait on end process dff;
sensitivity list
wait until
boolean
expression
wait for time
expression

Assert and
Report
Statements
Assert
Statement
Report
Statement
wait until boolean expression
D type Flip Flop

Processes

Dr DC Hendry

Processes
dff : process
Relationship
to Concurrent
begin
Statements Q <= D;
Wait wait until clkevent and clk = 1;
Statement
wait on end process dff;
sensitivity list
wait until
boolean
expression
wait for time
Basically this says copy the signal D to the signal Q whenever
expression
we see a rising edge on signal clk. The Boolean expression in
Assert and
Report the wait statement is:
Statements
Assert
Statement
Report
clkevent and clk = 1
Statement
wait for time expression

Processes

Dr DC Hendry

Processes
Here is an example:
Relationship
to Concurrent
Statements
wait for 10 nS;
Wait
Statement
wait on
sensitivity list
wait until
boolean
expression
wait for time
expression

Assert and
Report
Statements
Assert
Statement
Report
Statement
wait for time expression

Processes

Dr DC Hendry

Processes
Here is an example:
Relationship
to Concurrent
Statements
wait for 10 nS;
Wait
Statement
wait on
sensitivity list
Another very common example to see at the end of a process
wait until
boolean in a testbench is:
expression
wait for time
expression
wait;
Assert and
Report
Statements
Assert
This is interpreted as wait forever.
Statement
Report
Statement
Assert Statement

Processes

Dr DC Hendry

Processes
The assert statement takes the form:
Relationship
to Concurrent
Statements assert <condition>
Wait
Statement
report <message>
wait on
sensitivity list
severity <severity-level>;
wait until
boolean
expression
wait for time
expression

Assert and
Report
Statements
Assert
Statement
Report
Statement
Assert Statement

Processes

Dr DC Hendry

Processes
The assert statement takes the form:
Relationship
to Concurrent
Statements assert <condition>
Wait
Statement
report <message>
wait on
sensitivity list
severity <severity-level>;
wait until
boolean
expression
wait for time
The idea is that the assert statement checks that
expression
<condition> is true, and if not, prints <message> on the
Assert and
Report simulator console. The severity level is one of NOTE, WARNING,
Statements
Assert ERROR and FAILURE.
Statement
Report
Statement
Example Assert Statement

Processes

Dr DC Hendry

Here is an example:
Processes

Relationship
to Concurrent assert actualSignal = expectedSignal
Statements report Wrong output
Wait severity error;
Statement
wait on
sensitivity list
wait until
boolean
expression
wait for time
expression

Assert and
Report
Statements
Assert
Statement
Report
Statement
Example Assert Statement

Processes

Dr DC Hendry

Here is an example:
Processes

Relationship
to Concurrent assert actualSignal = expectedSignal
Statements report Wrong output
Wait severity error;
Statement
wait on
sensitivity list
wait until It became common practice to use:
boolean
expression
wait for time
expression assert 1 = 0
Assert and report Some message to be printed
Report
Statements severity note;
Assert
Statement
Report
Statement
Example Assert Statement

Processes

Dr DC Hendry

Here is an example:
Processes

Relationship
to Concurrent assert actualSignal = expectedSignal
Statements report Wrong output
Wait severity error;
Statement
wait on
sensitivity list
wait until It became common practice to use:
boolean
expression
wait for time
expression assert 1 = 0
Assert and report Some message to be printed
Report
Statements severity note;
Assert
Statement
Report
Statement and so in the VHDL-97 the report statement was added.
Report Statement

Processes

Dr DC Hendry

Processes The report statement takes the form:


Relationship
to Concurrent
Statements
report <message>
Wait
severity <severity-level>;
Statement
wait on
sensitivity list
wait until
boolean
expression
wait for time
expression

Assert and
Report
Statements
Assert
Statement
Report
Statement
Report Statement

Processes

Dr DC Hendry

Processes The report statement takes the form:


Relationship
to Concurrent
Statements
report <message>
Wait
severity <severity-level>;
Statement
wait on
sensitivity list The report statement simply outputs the given message at the
wait until
boolean
expression
given severity level, an example:
wait for time
expression

Assert and
report Verification of Component X Succeeded
Report severity note;
Statements
Assert
Statement
Report
Statement

Das könnte Ihnen auch gefallen