TSH343

280MHz Single-Supply Triple Video Buffer

Bandwidth: 280MHz Pin Connections (top view)

5V single-supply operation
Internal input DC level shifter
No input capacitor required
Internal gain of 6dB for a matching between 3
channels
Very low harmonic distortion
Slew rate: 780V/s
Pin1 identification
Specified for 150 and 100 loads Top View

Tested on 5V power supply

Data min. and max. are tested during IN1 1 6dB 8 OUT1
production

IN2 2 6dB 7 OUT2

Description
The TSH343 is a triple single-supply video buffer IN3 3 6dB 6 OUT3
featuring an internal gain of 6dB and a large
bandwidth of 280MHz. DC Shifter
+Vcc 4 5 GND
The main advantage of this circuit is that its input
DC level shifter allows for video signals on 75
video lines without damage to the synchronization SO8
tip of the video signal, while using a single 5V
power supply with no input capacitor. The DC
level shifter is internally fixed and optimized to
keep the output video signals between low and
high output rails in the best position for the
greatest linearity. Chapter 4 of this datasheet Applications
gives technical support when using the TSH343
as Y-Pb-Pr driver for video DAC output on a video High-end video systems
line (see TSH344 for RGB signals). High Definition TV (HDTV)
The TSH343 is available in the compact SO8 Broadcast and graphic video
plastic package for optimum space-saving. Multimedia products

Order Codes
Part Number Temperature Range Package Packing Marking

TSH343ID Tube TSH343I

-40C to +85C SO-8
TSH343IDT Tape & Reel TSH343I

January 2006 Rev. 2 1/14

www.st.com 14
Absolute Maximum Ratings TSH343

1 Absolute Maximum Ratings

Table 1. Key parameters and their absolute maximum ratings

Symbol Parameter Value Unit

VCC (1)
Supply voltage 6 V
Vin Input Voltage Range (2) 0 to +1.4 V
Toper Operating Free Air Temperature Range -40 to +85 C
Tstd Storage Temperature -65 to +150 C
Tj Maximum Junction Temperature 150 C
Rthjc SO8 Thermal Resistance Junction to Case 28 C/W
Rthja SO8 Thermal Resistance Junction to Ambient Area 157 C/W
Pmax. Maximum Power Dissipation (@Ta=25C) for Tj=150C 800 mW
CDM: Charged Device Model 2 kV
ESD HBM: Human Body Model 1.5 kV
MM: Machine Model 200 V
1. All voltage values, except differential voltage, are with respect to network terminal.
2. The magnitude of input and output voltage must never exceed VCC +0.3V.

Table 2. Operating conditions

Symbol Parameter Value Unit

VCC Power Supply Voltage 3 to 5.5(1) V

1. Tested in full production at 0V/5V single power supply

2/14 Rev. 2
TSH343 Electrical Characteristics

2 Electrical Characteristics

Table 3. VCC = +5V Single Supply, Tamb = 25C (unless otherwise specified)
Symbol Parameter Test Condition Min. Typ. Max. Unit

DC Performance

RL = 150, Tamb 0.4 0.6 0.8

VDC Input DC shift mV
-40C < Tamb < +85C 0.53
Tamb , input to GND 18.2 35
Iib Input Bias Current A
-40C < Tamb < +85C 20.7
Rin Input Resistance Tamb 4 G

Cin Input Capacitance Tamb 1 pF

no Load, input to GND 14.4 18
ICC Supply Current per Buffer mA
-40C < Tamb < +85C 14.9
Power Supply Rejection Ratio input to GND, F = 1MHz
PSRR 20 log (Vout/VCC) CLF=470nF 70 dB
(see Figure 25 and Figure 26) CHF=100uF
G DC Voltage Gain RL = 150, Vin = 1V 1.92 1.99 2.05 V/V
Variation of the DC Voltage Gain
DG Input step from 0.3V to 1V 0.26 0.8 %
between inputs of 0.3V and 1V
MG1 Gain Matching between 3 channels Input = 1V 0.5 2 %
MG 0.3 Gain Matching between 3 channels Input = 0.3V 0.5 2 %

Dynamic Performance and Output Characteristics

Small Signal Vout = 20mVp

-3dB Bandwidth 160 280
RL = 150
Bw MHz
Small Signal Vout = 20mVp
Gain Flatness @ 0.1dB 65
RL = 150
Vout = 2Vp-p, VICM = 0.5V,
FPBW Full Power Bandwidth 130 200 MHz
RL = 150
Delay between each channel
D 0 to 30MHz 0.5 ns
(see Figure 30)
Input step from 0V to 1V,
SR Slew Rate (1) 500 780 V/s
RL = 150
VOH High Level Output Voltage Vin DC = +1.5V, R L = 150 3.7 3.9 V
VOL Low Level Output Voltage RL = 150 40 mV
Vout = 2V, Tamb 45 90
Output Current mA
IOUT -40C < Tamb < +85C 82
Output Short Circuit Current (Isource) 100 mA

Rev. 2 3/14
Electrical Characteristics TSH343

Table 3. VCC = +5V Single Supply, Tamb = 25C (unless otherwise specified)
Symbol Parameter Test Condition Min. Typ. Max. Unit

Noise and Distortion

F = 100kHz, R IN = 50 29 nV/Hz
eN Total Input Voltage Noise 10kHz to 30MHz 158
Vrms
10kHz to 100MHz 290
Vout = 2Vp-p, RL = 150
HD2 2nd Harmonic Distortion F= 10MHz -58 dBc
F= 30MHz -45
Vout = 2Vp-p, RL = 150
HD3 3rd Harmonic Distortion F= 10MHz -72 dBc
F= 30MHz -50
1. Non-tested value. Guaranteed value by design.

4/14 Rev. 2
TSH343 Electrical Characteristics

Figure 1. Frequency response Figure 2. Gain flatness

10 6,20

8 6,15

6 6,10

4 6,05
Gain (dB)

Gain (dB)
2 6,00

0 5,95

-2 5,90

-4 5,85

-6 5,80

-8 Vcc=5V 5,75 Vcc=5V

Load=150 Load=150
-10 5,70
1M 10M 100M 1G 1M 10M 100M 1G
Frequency (Hz) Frequency (Hz)

Figure 3. Cross-talk vs. frequency (amp1) Figure 4. Cross-talk vs. frequency (amp2)
0 0

-10
Small Signal Small Signal
-10
Vcc=5V Vcc=5V
-20 Load=150 -20 Load=150

-30 -30

-40
Gain (dB)

-40
Gain (dB)

-50 -50 2/1

-60 1/2 -60
2/3
-70 -70

-80 1/3 -80

-90 -90

-100 -100
1M 10M 100M 1M 10M 100M
Frequency (Hz) Frequency (Hz)

Figure 5. Cross-talk vs. frequency (amp3) Figure 6. Input noise vs. frequency
0
Small Signal
-10 Vcc=5V
Vcc=5V
input in short-circuit
-20 Load=150
Input Noise (nV/VHz)

-30

-40
100
Gain (dB)

NA
-50 3/1
-60
3/2
-70

-80

-90

-100 10
1M 10M 100M 10 100 1k 10k 100k 1M 10M
Frequency (Hz) Frequency (Hz)

Rev. 2 5/14
Electrical Characteristics TSH343

Figure 7. Distortion on 150 load - 10MHz Figure 8. Distortion on 100 load - 10MHz
-30 -30
-35 Vcc=5V -35 Vcc=5V
-40 F=10MHz -40 F=10MHz
-45 input DC component = 0.65V -45 input DC component = 0.65V
Load=150 Load=100
-50 -50
HD2 & HD3 (dBc)

HD2 & HD3 (dBc)

-55 -55
-60 HD2 -60 HD2
-65 -65
-70 -70
-75 -75
-80 -80
-85 -85
-90 HD3 -90 HD3
-95 -95
-100 -100
0,0 0,5 1,0 1,5 2,0 2,5 3,0 3,5 4,0 0,0 0,5 1,0 1,5 2,0 2,5 3,0 3,5 4,0
Output Amplitude (Vp-p) Output Amplitude (Vp-p)

Figure 9. Distortion on 150 load - 30MHz Figure 10. Distortion on 100 load - 30MHz
-10 -10
-15 Vcc=5V -15 Vcc=5V
-20 F=30MHz -20 F=30MHz
-25 input DC component = 0.65V -25 input DC component = 0.65V
-30 Load=150 Load=100
-30
HD2 & HD3 (dBc)

HD2 & HD3 (dBc)

-35 -35
-40 -40
-45 -45
-50 HD2 -50 HD2
-55 -55
-60 -60
-65 HD3 -65 HD3
-70 -70
-75 -75
-80 -80
0,0 0,5 1,0 1,5 2,0 2,5 3,0 3,5 4,0 0,0 0,5 1,0 1,5 2,0 2,5 3,0 3,5 4,0
Output Amplitude (Vp-p) Output Amplitude (Vp-p)

Figure 11. Output DC shift vs. frequency Figure 12. Slew rate
1,4 3,5

3,0

1,2
SR+
Output Response (V)

2,5
Gain (dB)

2,0
1,0
1,5 SR-

1,0
0,8

Vcc=5V 0,5 Vcc=5V

Load=150 Load=150
0,6 0,0
1M 10M 100M -5 -4 -3 -2 -1 0 1 2 3 4 5
Frequency (Hz) Time (ns)

6/14 Rev. 2
TSH343 Electrical Characteristics

Figure 13. Reverse isolation vs. frequency Figure 14. Bandwidth vs. temperature
0 500

-10
Vcc=5V
Load=100 450
-20
400
-30

-40 350
Gain (dB)

Bw (MHz)
-50 300

-60
250
-70
200
-80

-90 150 Vcc=5V

Load=150
-100 100
1M 10M 100M -40 -20 0 20 40 60 80
Frequency (Hz) Temperature (C)

Figure 15. Quiescent current vs. Supply Figure 16. Input DC shift vs. temperature
50 0,8

45
Vcc=5V
Input to ground, no load
0,7
40

35
0,6
Total Icc (mA)

DCshift (V)

30

25 0,5

20
0,4
15

10
0,3
Vcc=5V
5
Load=150
0 0,2
0,0 0,5 1,0 1,5 2,0 2,5 3,0 3,5 4,0 4,5 5,0 -40 -20 0 20 40 60 80
Vcc (V) Temperature (C)

Figure 17. Isource vs. output voltage Figure 18. Voltage gain vs. temperature
0 2,05

-10 +5V 2,04

VOH
-20 without load
2,03
-30
Isource 2,02
-40 V
Isource (mA)

Gain (dB)

-50 2,01
0V
-60 2,00

-70 1,99
-80
1,98
-90
1,97
-100
1,96
Vcc=5V
-110 Load=150
-120 1,95
0,0 0,5 1,0 1,5 2,0 2,5 3,0 3,5 4,0 4,5 5,0 -40 -20 0 20 40 60 80
V (V) Temperature (C)

Rev. 2 7/14
Electrical Characteristics TSH343

Figure 19. Ibias vs. temperature Figure 20. Gain deviation vs. temperature
1,0
24
Gain deviation between
22 0,8 0.3V and 1V input voltages
Vcc=5V
20
Load=150
0,6
IBIAS (A)

GD (%)
18

16 0,4

14
0,2
12 Vcc=5V
Load=150
10 0,0
-40 -20 0 20 40 60 80 -40 -20 0 20 40 60 80
Temperature (C) Temperature (C)

Figure 21. Supply current vs. temperature Figure 22. Output current vs. temperature
17 110

16
100

15
90
Isource (mA)
ICC (mA)

14
80
13

70
12

11 60
Vcc=5V Vcc=5V
no Load Load=150
10 50
-40 -20 0 20 40 60 80 -40 -20 0 20 40 60 80
Temperature (C) Temperature (C)

Figure 23. Output higher rail vs. temperature Figure 24. Gain matching vs. temperature
1,0
4,2
Gain matching between 3 channels
4,1
Vcc=5V
0,8
Load=150
Vin=0.3V and 1V
4,0
0,6
VOH (V)

GM (%)

3,9

3,8 0,4

3,7
0,2
3,6 Vcc=5V
Load=150
3,5 0,0
-40 -20 0 20 40 60 80 -40 -20 0 20 40 60 80
Temperature (C) Temperature (C)

8/14 Rev. 2
TSH343 Power Supply Considerations and improvement of the PSRR

3 Power Supply Considerations and improvement of

the PSRR

Correct power supply bypassing is very important for optimizing performance in low and
high-frequency ranges. Bypass capacitors should be placed as close as possible to the IC
pin (pin 4) to improve high-frequency bypassing. A capacitor (C LF) greater than 100uF is
necessary to improve the PSRR in low frequencies. For better quality bypassing, a capacitor
of 470nF (C HF) is added using the same implementation conditions to improve the PSRR in
the higher frequencies.

Figure 25. Circuit for power supply bypassing

+VCC

CLF
+

CHF

Y
Pb TSH343
Pr

The following graph in Figure 26 shows the evolution of the PSRR against the frequency
when the power supply decoupling is achieved carefuly or not.

Figure 26. PSRR improvement

0
Vcc=5V
-10 Load=150
PSRR=20 log (VCC/Vout)
-20
without
-30 capacitor
PSRR (dB)

without C LF
-40
C HF=100nF
-50
without C LF
C HF=470nF
-60

-70 C LF=100uF
C HF=470nF
-80
1k 10k 100k 1M 10M 100M
Frequency (Hz)

Rev. 2 9/14
Using the TSH343 to Drive Y-Pb-Pr Video Components TSH343

4 Using the TSH343 to Drive Y-Pb-Pr Video

Components

Figure 27. Shapes of video signals coming from DACs

Y R
Video Video
Pb G
DAC DAC
Pr B

Y signal R,G,B,Pb,Pr signals

(synchronization tip) (no synchronization tip)

100 IRE
White Level

Image Content Image Content

30 IRE
Black Level

300mV 1Vp-p

0 IRE
GND

Figure 28. Implementation of the video driver on output video DACs

(1) DAC output (2) Amplifier input (3) Amplifier output (4) On the line
Amplifier output rail
(3.7V min.)

Content of the 3,24V

video signal+ tip synchro.
2Vp-p

1Vp-p 1,24V 1Vp-p

1Vp-p 620mV 620mV
Amplifier output rail
20mV (70mV max.)
+600mV
0V 0V 0V 0V

+5V
Reconstruction
Y Filtering
75
Video
LPF
600mV
+ +6dB
75 Cable
1Vpp TV
DAC
75
1Vpp
2Vpp

Reconstruction
Pb Filtering
600mV 75 75 Cable
Video 0.7Vpp
LPF + +6dB
DAC
75
0.7Vpp
1.4Vpp

Reconstruction
Pr Filtering
600mV 75 75 Cable
Video 0.7Vpp
LPF + +6dB
DAC
75
0.7Vpp
TSH343 1.4Vpp
GND
-5V

10/14 Rev. 2
TSH343 Using the TSH343 to Drive Y-Pb-Pr Video Components

Figure 28 shows a schematic diagram of the use of the TSH343 to drive video output from
DACs.
The TSH343 is used to drive high definition video signals up to 30MHz on 75-ohm video
lines. It is dedicated to driving YPbPr signals where the synchronization tipclose to zero
voltsis included in Y signal, as seen in (1). An internal input DC value of 600mV is added
to the video signal in order to shift the bottom from 0V to 600mV as seen in (2).
The shift is not based on the average of the signal, but is an analog summation of a DC
component to the video signal. Therefore, no input capacitors are required which provides a
real advantage in terms of cost and board space.
Under these conditions, it is possible to drive the signal in single supply without any
saturation of the driver against the lower rail.
Assuming that we lose half of the signal by output impedance-matching in order to properly
drive the video line, the shifted signal is multiplied by a gain of 2 or +6dB (3).

4.1 Delay between channels

Figure 29. Measurement of the delay between each channel
5V

600mV 75 75 Cable
+ +6dB V1
75

Vin 600mV 75 75 Cable

+ +6dB V2
75 75

600mV 75 75 Cable
+ +6dB V3
75

Delay between each video component is an important aspect in high definition video
systems. To drive porperly the three video components without any relative delay, the dice of
the TSH343 is layouted out with a very symetrical geometry. The effect is direct on the
synchronization of each channel, as shown in Figure 30. No delay appears between each
channel when the same Vin signal is applied on the three inputs. Note that the delay from
the inputs the outputs equals 4ns.

Rev. 2 11/14
Using the TSH343 to Drive Y-Pb-Pr Video Components TSH343

Figure 30. Relative delay between each channel

3 Output responses (V1, V2, V3)

Vcc=5V
Load=150

Input (Vin)

-4ns -2ns 0s 2ns 4ns 6ns 8ns 10ns 12ns 14ns 16ns 18ns 20ns
Time

12/14 Rev. 2
TSH343 Package Mechanical Data

5 Package Mechanical Data

SO-8 MECHANICAL DATA

mm. inch
DIM.
MIN. TYP MAX. MIN. TYP. MAX.

A 1.35 1.75 0.053 0.069

A1 0.10 0.25 0.04 0.010

A2 1.10 1.65 0.043 0.065

B 0.33 0.51 0.013 0.020

C 0.19 0.25 0.007 0.010

D 4.80 5.00 0.189 0.197

E 3.80 4.00 0.150 0.157

e 1.27 0.050

H 5.80 6.20 0.228 0.244

h 0.25 0.50 0.010 0.020

L 0.40 1.27 0.016 0.050

k 8 (max.)

ddd 0.1 0.04

0016023/C

Rev. 2 13/14
Revision History TSH343

6 Revision History

Table 4. Document revision history

Date Revision Description of Changes

Dec. 2005 1 First release of datasheet.

Jan. 2006 2 Capa-load option paragraph deleted in page 11.

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14/14 Rev. 2